2 * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
44 #include <dt-bindings/pwm/pwm.h>
45 #include "rk3366.dtsi"
48 model = "Rockchip SDK tb board";
49 compatible = "rockchip,tb", "rockchip,rk3366";
52 bootargs = "console=uart,mmio32,0xff690000 clk_ignore_unused";
56 compatible = "rockchip,ion";
61 reg = <0x00000000 0x02000000>;
68 backlight: backlight {
69 compatible = "pwm-backlight";
70 pwms = <&pwm0 0 25000 PWM_POLARITY_INVERTED>;
74 16 17 18 19 20 21 22 23
75 24 25 26 27 28 29 30 31
76 32 33 34 35 36 37 38 39
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87 120 121 122 123 124 125 126 127
88 128 129 130 131 132 133 134 135
89 136 137 138 139 140 141 142 143
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91 152 153 154 155 156 157 158 159
92 160 161 162 163 164 165 166 167
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94 176 177 178 179 180 181 182 183
95 184 185 186 187 188 189 190 191
96 192 193 194 195 196 197 198 199
97 200 201 202 203 204 205 206 207
98 208 209 210 211 212 213 214 215
99 216 217 218 219 220 221 222 223
100 224 225 226 227 228 229 230 231
101 232 233 234 235 236 237 238 239
102 240 241 242 243 244 245 246 247
103 248 249 250 251 252 253 254 255>;
104 default-brightness-level = <200>;
105 enable-gpios = <&gpio0 26 GPIO_ACTIVE_HIGH>;
108 rk_key: rockchip-key {
109 compatible = "rockchip,key";
112 io-channels = <&saradc 1>;
117 rockchip,adc_value = <1>;
122 label = "volume down";
123 rockchip,adc_value = <170>;
127 gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
136 rockchip,adc_value = <355>;
142 rockchip,adc_value = <746>;
148 rockchip,adc_value = <560>;
154 rockchip,adc_value = <450>;
159 compatible = "simple-audio-card";
160 simple-audio-card,format = "i2s";
161 simple-audio-card,name = "rockchip,rt5640-codec";
162 simple-audio-card,mclk-fs = <256>;
163 simple-audio-card,widgets =
164 "Microphone", "Mic Jack",
165 "Headphone", "Headphone Jack";
166 simple-audio-card,routing =
167 "Mic Jack", "MICBIAS1",
169 "Headphone Jack", "HPOL",
170 "Headphone Jack", "HPOR";
171 simple-audio-card,cpu {
172 sound-dai = <&i2s_8ch>;
174 simple-audio-card,codec {
175 sound-dai = <&rt5640>;
180 compatible = "simple-audio-card";
181 simple-audio-card,name = "rockchip,spdif";
182 simple-audio-card,cpu {
183 sound-dai = <&spdif>;
185 simple-audio-card,codec {
186 sound-dai = <&spdif_out>;
190 spdif_out: spdif-out {
191 compatible = "linux,spdif-dit";
192 #sound-dai-cells = <0>;
196 compatible = "regulator-fixed";
197 regulator-name = "vcc_sys";
200 regulator-min-microvolt = <3800000>;
201 regulator-max-microvolt = <3800000>;
204 ext_gmac: external-gmac-clock {
205 compatible = "fixed-clock";
206 clock-frequency = <125000000>;
207 clock-output-names = "ext_gmac";
211 vcc_phy: vcc-phy-regulator {
212 compatible = "regulator-fixed";
214 gpio = <&gpio0 25 GPIO_ACTIVE_HIGH>;
215 pinctrl-names = "default";
216 pinctrl-0 = <ð_phy_pwr>;
217 regulator-name = "vcc_phy";
223 compatible = "rockchip,rk3366-io-voltage-domain";
224 rockchip,grf = <&grf>;
226 lcdc-supply = <&vcc_io>;
227 dvpts-supply = <&vcc_18>;
228 wifibt-supply = <&vccio_wl>;
229 audio-supply = <&vcc_io>;
230 sdcard-supply = <&vccio_sd>;
231 tphdsor-supply = <&vcc_io>;
234 dwc_control_usb: dwc-control-usb {
235 compatible = "rockchip,rk3368-dwc-control-usb";
236 rockchip,grf = <&grf>;
237 grf-offset = <0x049c>; /* GRF_SOC_STATUS for USB2.0 OTG */
238 interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>,
239 <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>,
240 <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
241 <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
242 interrupt-names = "otg_id", "otg_bvalid",
243 "otg_linestate", "host0_linestate";
244 clocks = <&cru SCLK_USBPHY480M>;
245 clock-names = "usbphy_480m";
248 compatible = "inno,phy";
249 regbase = &dwc_control_usb;
250 rk_usb,bvalid = <0x49c 23 1>;
251 rk_usb,iddig = <0x49c 26 1>;
252 rk_usb,vdmsrcen = <0x718 12 1>;
253 rk_usb,vdpsrcen = <0x718 11 1>;
254 rk_usb,rdmpden = <0x718 10 1>;
255 rk_usb,idpsrcen = <0x718 9 1>;
256 rk_usb,idmsinken = <0x718 8 1>;
257 rk_usb,idpsinken = <0x718 7 1>;
258 rk_usb,dpattach = <0x498 31 1>;
259 rk_usb,cpdet = <0x498 30 1>;
260 rk_usb,dcpattach = <0x498 29 1>;
266 clock-frequency = <100000000>;
267 clock-freq-min-max = <400000 100000000>;
274 pinctrl-names = "default";
275 pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>;
280 clock-frequency = <37500000>;
281 clock-freq-min-max = <400000 37500000>;
286 card-detect-delay = <200>;
289 pinctrl-names = "default";
290 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
295 clock-frequency = <50000000>;
296 clock-freq-min-max = <200000 50000000>;
302 pinctrl-names = "default";
303 pinctrl-0 = <&sdio_bus4 &sdio_cmd &sdio_clk>;
315 regulator-name = "vdd_arm";
316 compatible = "silergy,syr827";
319 regulator-compatible = "fan53555-reg";
320 regulator-min-microvolt = <712500>;
321 regulator-max-microvolt = <1500000>;
322 fcs,suspend-voltage-selector = <1>;
325 regulator-initial-state = <3>;
326 regulator-state-mem {
327 regulator-on-in-suspend;
328 regulator-suspend-microvolt = <900000>;
333 compatible = "rockchip,rk818";
336 clock-output-names = "xin32k", "wifibt_32kin";
337 interrupt-parent = <&gpio0>;
338 interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
339 pinctrl-names = "default";
340 pinctrl-0 = <&pmic_int_l>;
341 rockchip,system-power-controller;
345 vcc1-supply = <&vcc_sys>;
346 vcc2-supply = <&vcc_sys>;
347 vcc3-supply = <&vcc_sys>;
348 vcc4-supply = <&vcc_sys>;
349 vcc6-supply = <&vcc_sys>;
350 vcc7-supply = <&vcc_sys>;
351 vcc8-supply = <&vcc_sys>;
352 vcc9-supply = <&vcc_io>;
355 vdd_logic: DCDC_REG1 {
356 regulator-name = "vdd_logic";
359 regulator-min-microvolt = <750000>;
360 regulator-max-microvolt = <1450000>;
361 regulator-ramp-delay = <6001>;
362 regulator-state-mem {
363 regulator-on-in-suspend;
364 regulator-suspend-microvolt = <1000000>;
369 regulator-name = "vdd_gpu";
372 regulator-min-microvolt = <800000>;
373 regulator-max-microvolt = <1250000>;
374 regulator-ramp-delay = <6001>;
375 regulator-state-mem {
376 regulator-on-in-suspend;
377 regulator-suspend-microvolt = <1000000>;
382 regulator-name = "vcc_ddr";
385 regulator-state-mem {
386 regulator-on-in-suspend;
391 regulator-name = "vcc_io";
394 regulator-min-microvolt = <3300000>;
395 regulator-max-microvolt = <3300000>;
396 regulator-state-mem {
397 regulator-on-in-suspend;
398 regulator-suspend-microvolt = <3300000>;
402 vcca_codec: LDO_REG1 {
403 regulator-name = "vcca_codec";
406 regulator-min-microvolt = <3300000>;
407 regulator-max-microvolt = <3300000>;
408 regulator-state-mem {
409 regulator-on-in-suspend;
410 regulator-suspend-microvolt = <3300000>;
415 regulator-name = "vcc_tp";
418 regulator-min-microvolt = <3000000>;
419 regulator-max-microvolt = <3000000>;
420 regulator-state-mem {
421 regulator-on-in-suspend;
422 regulator-suspend-microvolt = <3000000>;
427 regulator-name = "vdd_10";
430 regulator-min-microvolt = <1000000>;
431 regulator-max-microvolt = <1000000>;
432 regulator-state-mem {
433 regulator-on-in-suspend;
434 regulator-suspend-microvolt = <1000000>;
438 vcc18_lcd: LDO_REG4 {
439 regulator-name = "vcc18_lcd";
442 regulator-min-microvolt = <1800000>;
443 regulator-max-microvolt = <1800000>;
444 regulator-state-mem {
445 regulator-on-in-suspend;
446 regulator-suspend-microvolt = <1800000>;
450 vccio_pmu: LDO_REG5 {
451 regulator-name = "vccio_pmu";
454 regulator-min-microvolt = <1800000>;
455 regulator-max-microvolt = <1800000>;
456 regulator-state-mem {
457 regulator-on-in-suspend;
458 regulator-suspend-microvolt = <1800000>;
462 vdd10_lcd: LDO_REG6 {
463 regulator-name = "vdd10_lcd";
466 regulator-min-microvolt = <1000000>;
467 regulator-max-microvolt = <1000000>;
468 regulator-state-mem {
469 regulator-on-in-suspend;
470 regulator-suspend-microvolt = <1000000>;
475 regulator-name = "vcc_18";
478 regulator-min-microvolt = <1800000>;
479 regulator-max-microvolt = <1800000>;
480 regulator-state-mem {
481 regulator-on-in-suspend;
482 regulator-suspend-microvolt = <1800000>;
487 regulator-name = "vccio_wl";
490 regulator-min-microvolt = <1800000>;
491 regulator-max-microvolt = <3300000>;
492 regulator-state-mem {
493 regulator-on-in-suspend;
494 regulator-suspend-microvolt = <3300000>;
499 regulator-name = "vccio_sd";
502 regulator-min-microvolt = <1800000>;
503 regulator-max-microvolt = <3300000>;
504 regulator-state-mem {
505 regulator-on-in-suspend;
506 regulator-suspend-microvolt = <3300000>;
511 regulator-name = "vcc_sd";
514 regulator-state-mem {
515 regulator-on-in-suspend;
526 #sound-dai-cells = <0>;
527 compatible = "realtek,rt5640";
529 clocks = <&cru SCLK_I2S_8CH_OUT>;
530 clock-names = "mclk";
531 realtek,in1-differential;
537 rockchip,i2s-broken-burst-len;
538 rockchip,playback-channels = <8>;
539 rockchip,capture-channels = <2>;
540 #sound-dai-cells = <0>;
545 #sound-dai-cells = <0>;
558 rockchip,disp-mode = <DUAL>;
559 rockchip,uboot-logo-on = <0>;
564 #include <dt-bindings/display/screen-timing/lcd-tv080wum-mipi.dtsi>
565 /* #include <dt-bindings/display/screen-timing/lcd-b101ew05.dtsi> */
569 pinctrl-names = "lcdc", "sleep";
570 pinctrl-0 = <&lcdc_lcdc>;
571 pinctrl-1 = <&lcdc_gpio>;
581 rockchip,prop = <EXTEND>;
582 rockchip,mirror = <NO_MIRROR>;
583 rockchip,cabc_mode = <0>;
584 rockchip,fb-win-map = <FB_DEFAULT_ORDER>;
593 rockchip,prop = <PRMRY>;
594 backlight = <&backlight>;
595 rockchip,mirror = <NO_MIRROR>;
596 rockchip,cabc_mode = <0>;
597 rockchip,fb-win-map = <FB_DEFAULT_ORDER>;
598 power_ctr: power_ctr {
599 rockchip,debug = <0>;
601 rockchip,power_type = <GPIO>;
602 gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>; /* GPIO_B4 = 12 */
603 rockchip,delay = <10>;
607 rockchip,power_type = <GPIO>;
608 gpios = <&gpio0 24 GPIO_ACTIVE_HIGH>; /* GPIO_D0 = 24 */
609 rockchip,delay = <10>;
612 /* lcd_rst: lcd-rst {
613 * rockchip,power_type = <GPIO>;
614 * gpios = <&gpio3 GPIO_D6 GPIO_ACTIVE_HIGH>;
615 * rockchip,delay = <5>;
627 pmic_int_l: pmic-int-l {
628 rockchip,pins = <0 2 RK_FUNC_GPIO &pcfg_pull_up>;
634 phy-supply = <&vcc_phy>;
636 clock_in_out = "input";
637 snps,reset-gpio = <&gpio2 15 GPIO_ACTIVE_LOW>;
638 snps,reset-active-low;
639 snps,reset-delays-us = <0 10000 50000>;
640 assigned-clocks = <&cru SCLK_MAC>;
641 assigned-clock-parents = <&ext_gmac>;
642 pinctrl-names = "default";
643 pinctrl-0 = <&rgmii_pins>;
650 host_drv_gpio = <&gpio0 16 GPIO_ACTIVE_LOW>; /* GPIO_C0 = 16 */
651 otg_drv_gpio = <&gpio0 10 GPIO_ACTIVE_LOW>; /* GPIO_B2 = 10 */
653 rockchip,remote_wakeup;
654 rockchip,usb_irq_wakeup;
658 clocks = <&cru SCLK_OTG_PHY0>, <&cru HCLK_OTG>;
659 clock-names = "sclk_otgphy0", "otg";
660 resets = <&cru SRST_USBOTG_AHB>,
661 <&cru SRST_USBOTG_PHY>,
662 <&cru SRST_USBOTG_CON>;
663 reset-names = "otg_ahb", "otg_phy", "otg_controller";
664 /* 0 - Normal, 1 - Force Host, 2 - Force Device */
665 rockchip,usb-mode = <0>;
670 cpu-supply = <&syr827>;