dbe97784959511d4c626ed755d4e9b1426ab0487
[firefly-linux-kernel-4.4.55.git] / arch / arm64 / boot / dts / rk3368-tb_8846.dts
1 /dts-v1/;
2
3 #include <dt-bindings/interrupt-controller/arm-gic.h>
4 #include <dt-bindings/rkfb/rk_fb.h>
5 #include "rk3368.dtsi"
6 #include "../../../arm/boot/dts/vtl_ts_sdk8846.dtsi"
7 //#include "../../../arm/boot/dts/lcd-b101ew05.dtsi"
8 #include "../../../arm/boot/dts/lcd-F402.dtsi"
9
10 / {
11         chosen {
12                 bootargs = "earlyprintk=uart8250-32bit,0xff690000 clk_ignore_unused";
13         };
14
15         wireless-wlan {
16                 compatible = "wlan-platdata";
17                 rockchip,grf = <&grf>;
18
19
20                 /* wifi_chip_type - wifi chip define
21                  * ap6210, ap6330, ap6335
22                  * rtl8188eu, rtl8723bs, rtl8723bu
23                  * esp8089
24                 */
25                 wifi_chip_type = "ap6335";
26
27                 sdio_vref = <1800>; //1800mv or 3300mv
28
29                 //keep_wifi_power_on;
30
31                 //power_ctrl_by_pmu;
32                 power_pmu_regulator = "act_ldo3";
33                 power_pmu_enable_level = <1>; //1->HIGH, 0->LOW
34
35                 //vref_ctrl_enable;
36                 //vref_ctrl_gpio = <&gpio0 GPIO_A2 GPIO_ACTIVE_HIGH>;
37                 vref_pmu_regulator = "act_ldo3";
38                 vref_pmu_enable_level = <1>; //1->HIGH, 0->LOW
39
40                 WIFI,poweren_gpio = <&gpio3 GPIO_A4 GPIO_ACTIVE_HIGH>;
41                 WIFI,host_wake_irq = <&gpio3 GPIO_A6 GPIO_ACTIVE_HIGH>;
42                 //WIFI,reset_gpio = <&gpio0 GPIO_A2 GPIO_ACTIVE_LOW>;
43
44                 status = "okay";
45         };
46
47         wireless-bluetooth {
48                 compatible = "bluetooth-platdata";
49
50                 //wifi-bt-power-toggle;
51
52                 uart_rts_gpios = <&gpio2 GPIO_D3 GPIO_ACTIVE_LOW>;
53                 pinctrl-names = "default","rts_gpio";
54                 pinctrl-0 = <&uart0_rts>;
55                 pinctrl-1 = <&uart0_rts_gpio>;
56
57                 BT,power_gpio = <&gpio3 GPIO_A3 GPIO_ACTIVE_HIGH>;
58                 BT,reset_gpio = <&gpio3 GPIO_A5 GPIO_ACTIVE_HIGH>;
59                 BT,wake_gpio = <&gpio3 GPIO_A2 GPIO_ACTIVE_HIGH>;
60                 BT,wake_host_irq = <&gpio3 GPIO_A7 GPIO_ACTIVE_HIGH>;
61
62                 status = "okay";
63         };
64
65         hallsensor {
66                compatible = "hall_och165t";
67                type = <SENSOR_TYPE_HALL>;
68                irq-gpio = <&gpio0 GPIO_C0 IRQ_TYPE_EDGE_BOTH>;
69         };
70
71         backlight {
72                 compatible = "pwm-backlight";
73                 pwms = <&pwm0 0 25000>;
74                 brightness-levels = <255 254 253 252 251 250 249 248 247 246 245 244 243 242 241 240
75                      239 238 237 236 235 234 233 232 231 230 229 228 227 226 225 224 223 222 221 220
76                      219 218 217 216 215 214 213 212 211 210 209 208 207 206 205 204 203 202 201 200
77                      199 198 197 196 195 194 193 192 191 190 189 188 187 186 185 184 183 182 181 180
78                      179 178 177 176 175 174 173 172 171 170 169 168 167 166 165 164 163 162 161 160
79                      159 158 157 156 155 154 153 152 151 150 149 148 147 146 145 144 143 142 141 140
80                      139 138 137 136 135 134 133 132 131 130 129 128 127 126 125 124 123 122 121 120
81                      119 118 117 116 115 114 113 112 111 110 109 108 107 106 105 104 103 102 101 100
82                      99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70
83                      69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40
84                      39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
85                      9 8 7 6 5 4 3 2 1 0>;
86                 default-brightness-level = <200>;
87                 enable-gpios = <&gpio0 GPIO_C4 GPIO_ACTIVE_HIGH>;
88         };
89
90         pwm_regulator {
91                 compatible = "rockchip_pwm_regulator";
92                 pwms = <&pwm1 0 2000>;
93                 rockchip,pwm_id= <1>;
94                 rockchip,pwm_voltage_map= <925000 950000 975000 1000000 1025000 1050000 1075000 1100000 1125000 1150000 1175000 1200000 1225000 1250000 1275000 1300000 1325000 1350000 1375000 1400000>;
95                 rockchip,pwm_voltage= <1000000>;
96                 rockchip,pwm_min_voltage= <925000>;
97                 rockchip,pwm_max_voltage= <1400000>;
98                 rockchip,pwm_suspend_voltage= <950000>;
99                 rockchip,pwm_coefficient= <475>;
100                 regulators {
101                         #address-cells = <1>;
102                         #size-cells = <0>;
103                         pwm_reg0: regulator@0 {
104                                 regulator-compatible = "pwm_dcdc1";
105                                 regulator-name= "vdd_logic";
106                                 regulator-min-microvolt = <925000>;
107                                 regulator-max-microvolt = <1400000>;
108                                 regulator-always-on;
109                                 regulator-boot-on;
110                         };
111                 };
112         };
113
114         codec_hdmi_i2s: codec-hdmi-i2s {
115                 compatible = "hdmi-i2s";
116         };
117
118         codec_hdmi_spdif: codec-hdmi-spdif {
119                 compatible = "hdmi-spdif";
120         };
121
122         rockchip-hdmi-i2s {
123                 compatible = "rockchip-hdmi-i2s";
124                 dais {
125                         dai0 {
126                                 audio-codec = <&codec_hdmi_i2s>;
127                                 i2s-controller = <&i2s0>;
128                                 format = "i2s";
129                                 //continuous-clock;
130                                 //bitclock-inversion;
131                                 //frame-inversion;
132                                 //bitclock-master;
133                                 //frame-master;
134                         };
135                 };
136         };
137
138         rockchip-hdmi-spdif {
139                 compatible = "rockchip-hdmi-spdif";
140                 dais {
141                         dai0 {
142                                 audio-codec = <&codec_hdmi_spdif>;
143                                 i2s-controller = <&spdif>;
144                         };
145                 };
146         };
147
148         rockchip-rt5631 {
149                 compatible = "rockchip-rt5631";
150                 dais {
151                         dai0 {
152                                 audio-codec = <&rt5631>;
153                                 i2s-controller = <&i2s0>;
154                                 format = "i2s";
155                                 //continuous-clock;
156                                 //bitclock-inversion;
157                                 //frame-inversion;
158                                 //bitclock-master;
159                                 //frame-master;
160                         };
161                 };
162         };
163
164         rockchip-rt3224 {
165                 compatible = "rockchip-rt3261";
166                 dais {
167                         dai0 {
168                                 audio-codec = <&rt3261>;
169                                 i2s-controller = <&i2s0>;
170                                 format = "i2s";
171                                 //continuous-clock;
172                                 //bitclock-inversion;
173                                 //frame-inversion;
174                                 //bitclock-master;
175                                 //frame-master;
176                         };
177                         dai1 {
178                                 audio-codec = <&rt3261>;
179                                 i2s-controller = <&i2s0>;
180                                 format = "dsp_a";
181                                 //continuous-clock;
182                                 bitclock-inversion;
183                                 //frame-inversion;
184                                 //bitclock-master;
185                                 //frame-master;
186                         };
187                 };
188         };
189
190         io-domains {
191                 compatible = "rockchip,rk3368-io-voltage-domain";
192                 rockchip,grf = <&grf>;
193                 rockchip,pmugrf = <&pmugrf>;
194
195                 /*GRF_IO_VSEL*/
196                 dvp-supply = <&ldo7_reg>;      /*DVPIO_VDD*/
197                 flash0-supply = <&dcdc2_reg>;  /*FLASH0_VDD*/
198                 wifi-supply = <&ldo7_reg>;     /*APIO2_VDD*/
199                 audio-supply = <&dcdc2_reg>;   /*APIO3_VDD*/
200                 sdcard-supply = <&ldo1_reg>;   /*SDMMC0_VDD*/
201                 gpio30-supply = <&dcdc2_reg>;  /*APIO1_VDD*/
202                 gpio1830-supply = <&dcdc2_reg>;/*ADIO4_VDD*/
203
204                 /*PMU_GRF_IO_VSEL*/
205                 pmu-supply = <&ldo5_reg>;      /*PMUIO_VDD*/
206                 vop-supply = <&ldo5_reg>;      /*LCDC_VDD*/
207         };
208 };
209
210
211 &gmac_clkin {
212         clock-frequency = <125000000>;
213 };
214
215 &gmac {
216 //      pmu_regulator = "act_ldo5";
217 //      power-gpio = <&gpio0 GPIO_A6 GPIO_ACTIVE_HIGH>;
218         reset-gpio = <&gpio3 GPIO_B4 GPIO_ACTIVE_LOW>;
219 //      phyirq-gpio = <&gpio0 GPIO_B1 GPIO_ACTIVE_LOW>;
220         phy-mode = "rgmii";
221         pinctrl-names = "default";
222         pinctrl-0 = <&rgmii_pins>;
223         clock_in_out = "input";
224         tx_delay = <0x30>;
225         rx_delay = <0x10>;
226         status = "disabled"; //if want to use gmac, please set "okay"
227 };
228
229 &pinctrl {
230         //used for init some gpio
231         init-gpios = <&gpio0 GPIO_A6 GPIO_ACTIVE_HIGH>;
232
233         gpio0_gpio {
234                         gpio0_c7: gpio0-c7 {
235                                 rockchip,pins = <0 GPIO_C7 RK_FUNC_GPIO &pcfg_pull_down>;
236                         };
237                         gpio0_a3: gpio0-a3 {
238                                 rockchip,pins = <0 GPIO_A3 RK_FUNC_3 &pcfg_pull_none>;
239                         };
240                         gpio0_c2: gpio0-c2 {
241                                 rockchip,pins = <0 GPIO_C2 RK_FUNC_GPIO &pcfg_pull_down>;
242                         };
243
244                         //to add
245                 };
246
247 };
248
249 &nandc0 {
250         status = "disabled"; // used nand set "disabled" ,used emmc set "okay"
251 };
252
253 &nandc0reg {
254         status = "okay"; // used nand set "disabled" ,used emmc set "okay"
255 };
256
257 &emmc {
258         clock-frequency = <100000000>;
259         clock-freq-min-max = <400000 100000000>;
260
261     supports-highspeed;
262         supports-emmc;
263     bootpart-no-access;
264
265         //supports-tSD;
266         //supports-DDR_MODE; //you should set the two value in your project. only close in RK3288-SDK board.
267         //caps2-mmc-hs200;
268
269     ignore-pm-notify;
270         keep-power-in-suspend;
271
272         //poll-hw-reset
273         status = "okay";
274 };
275
276 &sdmmc {
277                 clock-frequency = <50000000>;
278                 clock-freq-min-max = <400000 50000000>;
279                 supports-highspeed;
280                 supports-sd;
281                 broken-cd;
282                 card-detect-delay = <200>;
283
284                 ignore-pm-notify;
285                 keep-power-in-suspend;
286
287         vmmc-supply = <&ldo1_reg>;
288                 status = "okay";
289 };
290
291 &sdio {
292                 clock-frequency = <50000000>;
293                 clock-freq-min-max = <200000 50000000>;
294                 supports-highspeed;
295                 supports-sdio;
296                 ignore-pm-notify;
297                 keep-power-in-suspend;
298                 //cap-sdio-irq;
299                 status = "okay";
300 };
301
302 &spi0 {
303         status = "disabled";
304         max-freq = <48000000>;
305         /*
306         spi_test@00 {
307                 compatible = "rockchip,spi_test_bus0_cs0";
308                 reg = <0>;
309                 spi-max-frequency = <24000000>;
310                 //spi-cpha;
311                 //spi-cpol;
312                 poll_mode = <0>;
313                 type = <0>;
314                 enable_dma = <0>;
315
316         };
317
318         spi_test@01 {
319                 compatible = "rockchip,spi_test_bus0_cs1";
320                 reg = <1>;
321                 spi-max-frequency = <24000000>;
322                 spi-cpha;
323                 spi-cpol;
324                 poll_mode = <0>;
325                 type = <0>;
326                 enable_dma = <0>;
327         };
328         */
329 };
330
331 &spi1 {
332         status = "disabled";
333         max-freq = <48000000>;
334         /*
335         spi_test@10 {
336                 compatible = "rockchip,spi_test_bus1_cs0";
337                 reg = <0>;
338                 spi-max-frequency = <24000000>;
339                 //spi-cpha;
340                 //spi-cpol;
341                 poll_mode = <0>;
342                 type = <0>;
343                 enable_dma = <0>;
344         };
345
346         */
347 };
348
349 &spi2 {
350         status = "disabled";
351         max-freq = <48000000>;
352         /*
353         spi_test@20 {
354                 compatible = "rockchip,spi_test_bus2_cs0";
355                 reg = <0>;
356                 spi-max-frequency = <24000000>;
357                 //spi-cpha;
358                 //spi-cpol;
359                 poll_mode = <0>;
360                 type = <0>;
361                 enable_dma = <0>;
362         };
363
364         spi_test@21 {
365                 compatible = "rockchip,spi_test_bus2_cs1";
366                 reg = <1>;
367                 spi-max-frequency = <24000000>;
368                 //spi-cpha;
369                 //spi-cpol;
370                 poll_mode = <0>;
371                 type = <0>;
372                 enable_dma = <0>;
373         };
374         */
375 };
376
377 &uart_dbg {
378         status = "okay";
379 };
380
381 &uart_bt {
382         status = "okay";
383         dma-names = "!tx", "!rx";
384         pinctrl-0 = <&uart0_xfer &uart0_cts>;
385 };
386
387 &i2c0 {
388         status = "okay";
389         syr827: syr827@40 {
390                 compatible = "silergy,syr82x";
391                 reg = <0x40>;
392                 status = "okay";
393                 regulators {
394                         #address-cells = <1>;
395                         #size-cells = <0>;
396                         syr827_dc1: regulator@0 {
397                         reg = <0>;
398                         regulator-compatible = "syr82x_dcdc1";
399                         regulator-name = "vdd_arm";
400                         regulator-min-microvolt = <712500>;
401                         regulator-max-microvolt = <1500000>;
402                         regulator-always-on;
403                         regulator-boot-on;
404                         regulator-initial-mode = <0x2>;
405                         regulator-initial-state = <3>;
406                         regulator-state-mem {
407                                 regulator-state-mode = <0x2>;
408                                 regulator-state-disabled;
409                                 regulator-state-uv = <900000>;
410                         };
411                 };
412            };
413         };
414         syr828: syr828@41 {
415                 compatible = "silergy,syr82x";
416                 reg = <0x41>;
417                 status = "okay";
418                 regulators {
419                         #address-cells = <1>;
420                         #size-cells = <0>;
421                         syr828_dc1: regulator@0 {
422                         reg = <0>;
423                         regulator-compatible = "syr82x_dcdc1";
424                         regulator-name = "vdd_gpu";
425                         regulator-min-microvolt = <712500>;
426                         regulator-max-microvolt = <1500000>;
427                         regulator-always-on;
428                         regulator-boot-on;
429                         regulator-initial-mode = <0x2>;
430                         regulator-initial-state = <3>;
431                         regulator-state-mem {
432                                 regulator-state-mode = <0x2>;
433                                 regulator-state-enabled;
434                                 regulator-state-uv = <900000>;
435                         };
436                 };
437            };
438         };
439         act8846: act8846@5a {
440                 reg = <0x5a>;
441                 status = "okay";
442         };
443
444         CW2015@62 {
445                 compatible = "cw201x";
446                 reg = <0x62>;
447                 dc_det_gpio = <&gpio0 GPIO_C1 GPIO_ACTIVE_LOW>;
448                 bat_low_gpio = <&gpio0 GPIO_C2 GPIO_ACTIVE_LOW>;
449                 chg_ok_gpio = <&gpio0 GPIO_D3 GPIO_ACTIVE_HIGH>;
450                 bat_config_info = <0x15 0x42 0x60 0x59 0x52 0x58 0x4D 0x48 0x48 0x44 0x44 0x46 0x49 0x48 0x32
451                         0x24 0x20 0x17 0x13 0x0F 0x19 0x3E 0x51 0x45 0x08 0x76 0x0B 0x85 0x0E 0x1C 0x2E 0x3E 0x4D 0x52 0x52
452                         0x57 0x3D 0x1B 0x6A 0x2D 0x25 0x43 0x52 0x87 0x8F 0x91 0x94 0x52 0x82 0x8C 0x92 0x96 0xFF 0x7B 0xBB
453                         0xCB 0x2F 0x7D 0x72 0xA5 0xB5 0xC1 0x46 0xAE>;
454                 is_dc_charge = <1>;
455                 is_usb_charge = <0>;
456         };
457
458         rtc@51 {
459                 compatible = "rtc,hym8563";
460                 reg = <0x51>;
461                 irq_gpio = <&gpio0 GPIO_A1 IRQ_TYPE_EDGE_FALLING>;
462         };
463
464 };
465
466 &i2c1 {
467         status = "okay";
468
469         mpu6050:mpu@68{
470                 compatible = "mpu6050";
471                 reg = <0x68>;
472                 mpu-int_config = <0x10>;
473                 mpu-level_shifter = <0>;
474                 mpu-orientation = <0 1 0 1 0 0 0 0 1>;
475                 orientation-x= <0>;
476                 orientation-y= <1>;
477                 orientation-z= <1>;
478                 irq-gpio = <&gpio3 GPIO_B6 IRQ_TYPE_LEVEL_LOW>;
479                 mpu-debug = <0>;
480         };
481
482
483         ak8963:compass@0d{
484                 compatible = "mpu_ak8963";
485                 reg = <0x0d>;
486                 compass-bus = <0>;
487                 compass-adapt_num = <0>;
488                 compass-orientation = <1 0 0 0 1 0 0 0 1>;
489                 orientation-x= <0>;
490                 orientation-y= <0>;
491                 orientation-z= <1>;
492                 compass-debug = <1>;
493                 status = "okay";
494         };
495
496         rt3261: rt3261@1c {
497                 compatible = "rt3261";
498                 reg = <0x1c>;
499                 spk-num= <2>;
500                 modem-input-mode = <1>;
501                 lout-to-modem_mode = <1>;
502                 spk-amplify = <2>;
503         };
504 };
505
506 &i2c2 {
507         status = "okay";
508
509         rt5631: rt5631@1a {
510                 compatible = "rt5631";
511                 reg = <0x1a>;
512         };
513
514         ts@01 {
515                 compatible = "ct,vtl_ts";
516                 reg = <0x01>;
517                 screen_max_x = <1536>;
518                 screen_max_y = <2048>;
519                 xy_swap = <1>;
520                 x_reverse = <0>;
521                 y_reverse = <0>;
522                 x_mul = <2>;
523                 y_mul = <2>;
524                 bin_ver = <0>;
525                 irq_gpio_number = <&gpio0 GPIO_B4 IRQ_TYPE_LEVEL_LOW>;
526                 rst_gpio_number = <&gpio0 GPIO_B3 GPIO_ACTIVE_HIGH>;
527         };
528 };
529
530 &i2c3 {
531         status = "okay";
532 };
533
534 &i2c4 {
535         status = "okay";
536
537
538 };
539
540 &i2c5 {
541         status = "disable";
542 };
543
544 &fb {
545         rockchip,disp-mode = <NO_DUAL>;
546         rockchip,uboot-logo-on = <0>;
547 };
548
549 &rk_screen {
550          display-timings = <&disp_timings>;
551 };
552
553 /*&lvds {
554         status = "okay";
555         pinctrl-names = "lcdc", "sleep";
556         pinctrl-0 = <&lcdc_lcdc>;
557         pinctrl-1 = <&lcdc_gpio>;
558 };*/
559
560 &lcdc {
561         status = "okay";
562         rockchip,mirror = <NO_MIRROR>;
563         rockchip,cabc_mode = <0>;
564         rockchip,fb-win-map = <FB_DEFAULT_ORDER>;
565         power_ctr: power_ctr {
566                 rockchip,debug = <0>;
567                 lcd_en:lcd_en {
568                         rockchip,power_type = <GPIO>;
569                         gpios = <&gpio0 GPIO_C6 GPIO_ACTIVE_HIGH>;
570                         rockchip,delay = <10>;
571                 };
572
573                 lcd_cs:lcd_cs {
574                         rockchip,power_type = <GPIO>;
575                         gpios = <&gpio0 GPIO_C5 GPIO_ACTIVE_HIGH>;
576                         rockchip,delay = <10>;
577                 };
578
579                 /*lcd_rst:lcd_rst {
580                         rockchip,power_type = <GPIO>;
581                         gpios = <&gpio3 GPIO_D6 GPIO_ACTIVE_HIGH>;
582                         rockchip,delay = <5>;
583                 };*/
584         };
585 };
586
587
588 &hdmi {
589         status = "okay";
590         rockchips,hdmi_audio_source = <0>;
591 };
592
593 &adc {
594         status = "okay";
595
596         rockchip_headset {
597                 compatible = "rockchip_headset";
598                 headset_gpio = <&gpio0 GPIO_C7 GPIO_ACTIVE_LOW>;
599                 pinctrl-names = "default";
600                 pinctrl-0 = <&gpio0_c7>;//gpio0_c7
601                 io-channels = <&adc 2>;
602        /*
603                hook_gpio = ;
604                hook_down_type = ; //interrupt hook key down status
605                 */
606        };
607
608         key {
609                 compatible = "rockchip,key";
610                 io-channels = <&adc 1>;
611
612                 vol-up-key {
613                         linux,code = <115>;
614                         label = "volume up";
615                         rockchip,adc_value = <1>;
616                 };
617
618                 vol-down-key {
619                         linux,code = <114>;
620                         label = "volume down";
621                         rockchip,adc_value = <170>;
622                 };
623
624                 power-key {
625                         gpios = <&gpio0 GPIO_A2 GPIO_ACTIVE_LOW>;
626                         linux,code = <116>;
627                         label = "power";
628                         gpio-key,wakeup;
629                 };
630
631                 menu-key {
632                         linux,code = <59>;
633                         label = "menu";
634                         rockchip,adc_value = <355>;
635                 };
636
637                 home-key {
638                         linux,code = <102>;
639                         label = "home";
640                         rockchip,adc_value = <746>;
641                 };
642
643                 back-key {
644                         linux,code = <158>;
645                         label = "back";
646                         rockchip,adc_value = <560>;
647                 };
648
649                 camera-key {
650                         linux,code = <212>;
651                         label = "camera";
652                         rockchip,adc_value = <450>;
653                 };
654         };
655 };
656
657 &pwm0 {
658         status = "okay";
659 };
660
661 &clk_ddr_dvfs_table {
662         operating-points = <
663                 /* KHz    uV */
664                 200000 1050000
665                 300000 1050000
666                 400000 1100000
667                 533000 1150000
668                 >;
669
670         freq-table = <
671                 /*status                freq(KHz)*/
672                 SYS_STATUS_NORMAL       400000
673                 SYS_STATUS_SUSPEND      200000
674                 SYS_STATUS_VIDEO_1080P  240000
675                 SYS_STATUS_VIDEO_4K     400000
676                 SYS_STATUS_PERFORMANCE  528000
677                 SYS_STATUS_DUALVIEW     400000
678                 SYS_STATUS_BOOST        324000
679                 SYS_STATUS_ISP          400000
680                 >;
681         auto-freq-table = <
682                 240000
683                 324000
684                 396000
685                 528000
686                 >;
687         auto-freq=<0>;
688         status="disabled";
689 };
690
691 &dwc_control_usb {
692                 host_drv_gpio = <&gpio0 GPIO_A4 GPIO_ACTIVE_LOW>;
693                 otg_drv_gpio = <&gpio0 GPIO_D1 GPIO_ACTIVE_LOW>;
694
695                 rockchip,remote_wakeup;
696                 rockchip,usb_irq_wakeup;
697         };
698
699 /include/ "../../../arm/boot/dts/act8846.dtsi"
700 &act8846 {
701         gpios =<&gpio0 GPIO_B0 GPIO_ACTIVE_LOW>,<&gpio0 GPIO_A3 GPIO_ACTIVE_HIGH>;
702         act8846,system-power-controller;
703
704         regulators {
705
706                 dcdc1_reg: regulator@0{
707                         regulator-name= "act_dcdc1";
708                         regulator-min-microvolt = <1200000>;
709                         regulator-max-microvolt = <1200000>;
710                         regulator-always-on;
711                         regulator-boot-on;
712                 };
713
714                 dcdc2_reg: regulator@1 {
715                         regulator-name= "vccio";
716                         regulator-min-microvolt = <3300000>;
717                         regulator-max-microvolt = <3300000>;
718                         regulator-initial-state = <3>;
719                         regulator-state-mem {
720                                 regulator-state-enabled;
721                                 regulator-state-uv = <3300000>;
722                         };
723                 };
724
725                 dcdc3_reg: regulator@2 {
726                         regulator-name= "vdd_logic";
727                         regulator-min-microvolt = <700000>;
728                         regulator-max-microvolt = <1500000>;
729                         regulator-initial-state = <3>;
730                         regulator-state-mem {
731                                 regulator-state-enabled;
732                                 regulator-state-uv = <1000000>;
733                         };
734
735                 };
736
737                 dcdc4_reg: regulator@3 {
738                         regulator-name= "act_dcdc4";
739                         regulator-min-microvolt = <2000000>;
740                         regulator-max-microvolt = <2000000>;
741                                 regulator-initial-state = <3>;
742                         regulator-state-mem {
743                                 regulator-state-enabled;
744                                 regulator-state-uv = <2000000>;
745                         };
746                 };
747
748                 ldo1_reg: regulator@4 {
749                         regulator-name= "vccio_sd";
750                         regulator-min-microvolt = <1800000>;
751                         regulator-max-microvolt = <3300000>;
752
753                 };
754
755                 ldo2_reg: regulator@5 {
756                         regulator-name= "act_ldo2";
757                         regulator-min-microvolt = <1000000>;
758                         regulator-max-microvolt = <1000000>;
759
760                 };
761
762                 ldo3_reg: regulator@6 {
763                         regulator-name= "act_ldo3";
764                         regulator-min-microvolt = <3300000>;
765                         regulator-max-microvolt = <3300000>;
766
767                 };
768
769                 ldo4_reg:regulator@7 {
770                         regulator-name= "act_ldo4";
771                         regulator-min-microvolt = <3300000>;
772                         regulator-max-microvolt = <3300000>;
773
774                 };
775
776                 ldo5_reg: regulator@8 {
777                         regulator-name= "act_ldo5";
778                         regulator-min-microvolt = <3000000>;
779                         regulator-max-microvolt = <3000000>;
780
781                 };
782
783                 ldo6_reg: regulator@9 {
784                         regulator-name= "act_ldo6";
785                         regulator-min-microvolt = <1000000>;
786                         regulator-max-microvolt = <1000000>;
787                         regulator-initial-state = <3>;
788                         regulator-state-mem {
789                                 regulator-state-enabled;
790                         };
791
792                 };
793
794                 ldo7_reg: regulator@10 {
795                         regulator-name= "vcc_18";
796                         regulator-min-microvolt = <1800000>;
797                         regulator-max-microvolt = <1800000>;
798                         regulator-initial-state = <3>;
799                         regulator-state-mem {
800                                 regulator-state-enabled;
801                         };
802
803                 };
804
805                 ldo8_reg: regulator@11 {
806                         regulator-name= "act_ldo8";
807                         regulator-min-microvolt = <1800000>;
808                         regulator-max-microvolt = <1800000>;
809
810                 };
811         };
812 };
813
814 &ion_cma {
815        reg = <0x00000000 0x28000000>; /* 640MB */
816 };
817 /*
818 &dwc_control_usb {
819         usb_uart {
820                 status = "disabled";
821         };
822 };
823
824 &rk3288_cif_sensor{
825         status = "okay";
826 };
827 */