arch/arm64/boot/dts/rk3368-tb_8846.dts

   1 /dts-v1/;
   2
   3 #include <dt-bindings/interrupt-controller/arm-gic.h>
   4 #include <dt-bindings/rkfb/rk_fb.h>
   5 #include "rk3368.dtsi"
   6 #include "../../../arm/boot/dts/vtl_ts_sdk8846.dtsi"
   7 //#include "../../../arm/boot/dts/lcd-b101ew05.dtsi"
   8 #include "../../../arm/boot/dts/lcd-F402.dtsi"
   9
  10 / {
  11         chosen {
  12                 bootargs = "earlyprintk=uart8250-32bit,0xff690000 clk_ignore_unused";
  13         };
  14
  15         wireless-wlan {
  16                 compatible = "wlan-platdata";
  17
  18                 /* wifi_chip_type - wifi chip define
  19                  * bcmwifi ==> like ap6xxx, rk90x;
  20                  * rtkwifi ==> like rtl8188xx, rtl8723xx;
  21                  * esp8089 ==> esp8089;
  22                  * other   ==> for other wifi;
  23                  */
  24                 wifi_chip_type = "bcmwifi";
  25
  26                 sdio_vref = <1800>; //1800mv or 3300mv
  27
  28                 //keep_wifi_power_on;
  29
  30                 //power_ctrl_by_pmu;
  31                 power_pmu_regulator = "act_ldo3";
  32                 power_pmu_enable_level = <1>; //1->HIGH, 0->LOW
  33
  34                 //vref_ctrl_enable;
  35                 //vref_ctrl_gpio = <&gpio0 GPIO_A2 GPIO_ACTIVE_HIGH>;
  36                 vref_pmu_regulator = "act_ldo3";
  37                 vref_pmu_enable_level = <1>; //1->HIGH, 0->LOW
  38
  39                 WIFI,poweren_gpio = <&gpio3 GPIO_A4 GPIO_ACTIVE_HIGH>;
  40                 WIFI,host_wake_irq = <&gpio3 GPIO_A6 GPIO_ACTIVE_HIGH>;
  41                 //WIFI,reset_gpio = <&gpio0 GPIO_A2 GPIO_ACTIVE_LOW>;
  42
  43                 status = "disabled";
  44         };
  45
  46         wireless-bluetooth {
  47                 compatible = "bluetooth-platdata";
  48
  49                 //wifi-bt-power-toggle;
  50
  51                 uart_rts_gpios = <&gpio2 GPIO_D3 GPIO_ACTIVE_LOW>;
  52                 pinctrl-names = "default","rts_gpio";
  53                 pinctrl-0 = <&uart0_rts>;
  54                 pinctrl-1 = <&uart0_rts_gpio>;
  55
  56                 BT,power_gpio = <&gpio3 GPIO_A3 GPIO_ACTIVE_HIGH>;
  57                 BT,reset_gpio = <&gpio3 GPIO_A5 GPIO_ACTIVE_HIGH>;
  58                 BT,wake_gpio = <&gpio3 GPIO_A2 GPIO_ACTIVE_HIGH>;
  59                 BT,wake_host_irq = <&gpio3 GPIO_A7 GPIO_ACTIVE_HIGH>;
  60
  61                 status = "okay";
  62         };
  63
  64         hallsensor {
  65                compatible = "hall_och165t";
  66                type = <SENSOR_TYPE_HALL>;
  67                irq-gpio = <&gpio0 GPIO_C0 IRQ_TYPE_EDGE_BOTH>;
  68         };
  69
  70         backlight {
  71                 compatible = "pwm-backlight";
  72                 pwms = <&pwm0 0 25000>;
  73                 brightness-levels = <255 254 253 252 251 250 249 248 247 246 245 244 243 242 241 240
  74                      239 238 237 236 235 234 233 232 231 230 229 228 227 226 225 224 223 222 221 220
  75                      219 218 217 216 215 214 213 212 211 210 209 208 207 206 205 204 203 202 201 200
  76                      199 198 197 196 195 194 193 192 191 190 189 188 187 186 185 184 183 182 181 180
  77                      179 178 177 176 175 174 173 172 171 170 169 168 167 166 165 164 163 162 161 160
  78                      159 158 157 156 155 154 153 152 151 150 149 148 147 146 145 144 143 142 141 140
  79                      139 138 137 136 135 134 133 132 131 130 129 128 127 126 125 124 123 122 121 120
  80                      119 118 117 116 115 114 113 112 111 110 109 108 107 106 105 104 103 102 101 100
  81                      99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70
  82                      69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40
  83                      39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
  84                      9 8 7 6 5 4 3 2 1 0>;
  85                 default-brightness-level = <200>;
  86                 enable-gpios = <&gpio0 GPIO_C4 GPIO_ACTIVE_HIGH>;
  87         };
  88
  89         pwm_regulator {
  90                 compatible = "rockchip_pwm_regulator";
  91                 pwms = <&pwm1 0 2000>;
  92                 rockchip,pwm_id= <1>;
  93                 rockchip,pwm_voltage_map= <925000 950000 975000 1000000 1025000 1050000 1075000 1100000 1125000 1150000 1175000 1200000 1225000 1250000 1275000 1300000 1325000 1350000 1375000 1400000>;
  94                 rockchip,pwm_voltage= <1000000>;
  95                 rockchip,pwm_min_voltage= <925000>;
  96                 rockchip,pwm_max_voltage= <1400000>;
  97                 rockchip,pwm_suspend_voltage= <950000>;
  98                 rockchip,pwm_coefficient= <475>;
  99                 regulators {
 100                         #address-cells = <1>;
 101                         #size-cells = <0>;
 102                         pwm_reg0: regulator@0 {
 103                                 regulator-compatible = "pwm_dcdc1";
 104                                 regulator-name= "vdd_logic";
 105                                 regulator-min-microvolt = <925000>;
 106                                 regulator-max-microvolt = <1400000>;
 107                                 regulator-always-on;
 108                                 regulator-boot-on;
 109                         };
 110                 };
 111         };
 112
 113         codec_hdmi_i2s: codec-hdmi-i2s {
 114                 compatible = "hdmi-i2s";
 115         };
 116
 117         codec_hdmi_spdif: codec-hdmi-spdif {
 118                 compatible = "hdmi-spdif";
 119         };
 120
 121         rockchip-hdmi-i2s {
 122                 compatible = "rockchip-hdmi-i2s";
 123                 dais {
 124                         dai0 {
 125                                 audio-codec = <&codec_hdmi_i2s>;
 126                                 i2s-controller = <&i2s0>;
 127                                 format = "i2s";
 128                                 //continuous-clock;
 129                                 //bitclock-inversion;
 130                                 //frame-inversion;
 131                                 //bitclock-master;
 132                                 //frame-master;
 133                         };
 134                 };
 135         };
 136
 137         rockchip-hdmi-spdif {
 138                 compatible = "rockchip-hdmi-spdif";
 139                 dais {
 140                         dai0 {
 141                                 audio-codec = <&codec_hdmi_spdif>;
 142                                 i2s-controller = <&spdif>;
 143                         };
 144                 };
 145         };
 146
 147         rockchip-rt5631 {
 148                 compatible = "rockchip-rt5631";
 149                 dais {
 150                         dai0 {
 151                                 audio-codec = <&rt5631>;
 152                                 i2s-controller = <&i2s0>;
 153                                 format = "i2s";
 154                                 //continuous-clock;
 155                                 //bitclock-inversion;
 156                                 //frame-inversion;
 157                                 //bitclock-master;
 158                                 //frame-master;
 159                         };
 160                 };
 161         };
 162
 163         rockchip-rt3224 {
 164                 compatible = "rockchip-rt3261";
 165                 dais {
 166                         dai0 {
 167                                 audio-codec = <&rt3261>;
 168                                 i2s-controller = <&i2s0>;
 169                                 format = "i2s";
 170                                 //continuous-clock;
 171                                 //bitclock-inversion;
 172                                 //frame-inversion;
 173                                 //bitclock-master;
 174                                 //frame-master;
 175                         };
 176                         dai1 {
 177                                 audio-codec = <&rt3261>;
 178                                 i2s-controller = <&i2s0>;
 179                                 format = "dsp_a";
 180                                 //continuous-clock;
 181                                 bitclock-inversion;
 182                                 //frame-inversion;
 183                                 //bitclock-master;
 184                                 //frame-master;
 185                         };
 186                 };
 187         };
 188
 189         io-domains {
 190                 compatible = "rockchip,rk3368-io-voltage-domain";
 191                 rockchip,grf = <&grf>;
 192                 rockchip,pmu = <&pmu_grf>;
 193
 194                 /*GRF_IO_VSEL*/
 195                 dvp-supply = <&ldo7_reg>;      /*DVPIO_VDD*/
 196                 flash0-supply = <&dcdc2_reg>;  /*FLASH0_VDD*/
 197                 wifi-supply = <&ldo7_reg>;     /*APIO2_VDD*/
 198                 audio-supply = <&dcdc2_reg>;   /*APIO3_VDD*/
 199                 sdcard-supply = <&ldo1_reg>;   /*SDMMC0_VDD*/
 200                 gpio30-supply = <&dcdc2_reg>;  /*APIO1_VDD*/
 201                 gpio1830-supply = <&dcdc2_reg>;/*ADIO4_VDD*/
 202
 203                 /*PMU_GRF_IO_VSEL*/
 204                 pmu-supply = <&ldo5_reg>;      /*PMUIO_VDD*/
 205                 vop-supply = <&ldo5_reg>;      /*LCDC_VDD*/
 206         };
 207 };
 208
 209 &gmac {
 210 //      power_ctl_by = "gpio";  //"gpio" "pmu"
 211         power-gpio = <&gpio0 GPIO_A6 GPIO_ACTIVE_HIGH>;
 212 //      power-pmu = "act_ldo"
 213 //      reset-gpio = <&gpio4 GPIO_A7 GPIO_ACTIVE_LOW>;
 214     phy-mode = "rgmii";
 215     clock_in_out = "input";
 216     tx_delay = <0x28>;
 217     rx_delay = <0x10>;
 218         status = "disabled"; //if want to use gmac, please set "okay"
 219 };
 220
 221 &pinctrl {
 222         //used for init some gpio
 223         init-gpios = <&gpio0 GPIO_A6 GPIO_ACTIVE_HIGH>;
 224
 225         gpio0_gpio {
 226                         gpio0_c7: gpio0-c7 {
 227                                 rockchip,pins = <0 GPIO_C7 RK_FUNC_GPIO &pcfg_pull_down>;
 228                         };
 229                         gpio0_a3: gpio0-a3 {
 230                                 rockchip,pins = <0 GPIO_A3 RK_FUNC_3 &pcfg_pull_none>;
 231                         };
 232                         gpio0_c2: gpio0-c2 {
 233                                 rockchip,pins = <0 GPIO_C2 RK_FUNC_GPIO &pcfg_pull_down>;
 234                         };
 235
 236                         //to add
 237                 };
 238
 239 };
 240
 241 &nandc0 {
 242         status = "disabled"; // used nand set "disabled" ,used emmc set "okay"
 243 };
 244
 245 &nandc0reg {
 246         status = "okay"; // used nand set "disabled" ,used emmc set "okay"
 247 };
 248
 249 &emmc {
 250         clock-frequency = <100000000>;
 251         clock-freq-min-max = <400000 100000000>;
 252
 253     supports-highspeed;
 254         supports-emmc;
 255     bootpart-no-access;
 256
 257         //supports-tSD;
 258         //supports-DDR_MODE; //you should set the two value in your project. only close in RK3288-SDK board.
 259         //caps2-mmc-hs200;
 260
 261     ignore-pm-notify;
 262         keep-power-in-suspend;
 263
 264         //poll-hw-reset
 265         status = "okay";
 266 };
 267
 268 &sdmmc {
 269                 clock-frequency = <50000000>;
 270                 clock-freq-min-max = <400000 50000000>;
 271                 supports-highspeed;
 272                 supports-sd;
 273                 broken-cd;
 274                 card-detect-delay = <200>;
 275
 276                 ignore-pm-notify;
 277                 keep-power-in-suspend;
 278
 279         vmmc-supply = <&ldo1_reg>;
 280                 status = "okay";
 281 };
 282
 283 &sdio {
 284                 clock-frequency = <50000000>;
 285                 clock-freq-min-max = <200000 50000000>;
 286                 supports-highspeed;
 287                 supports-sdio;
 288                 ignore-pm-notify;
 289                 keep-power-in-suspend;
 290                 //cap-sdio-irq;
 291                 status = "okay";
 292 };
 293
 294 &spi0 {
 295         status = "disabled";
 296         max-freq = <48000000>;
 297         /*
 298         spi_test@00 {
 299                 compatible = "rockchip,spi_test_bus0_cs0";
 300                 reg = <0>;
 301                 spi-max-frequency = <24000000>;
 302                 //spi-cpha;
 303                 //spi-cpol;
 304                 poll_mode = <0>;
 305                 type = <0>;
 306                 enable_dma = <0>;
 307
 308         };
 309
 310         spi_test@01 {
 311                 compatible = "rockchip,spi_test_bus0_cs1";
 312                 reg = <1>;
 313                 spi-max-frequency = <24000000>;
 314                 spi-cpha;
 315                 spi-cpol;
 316                 poll_mode = <0>;
 317                 type = <0>;
 318                 enable_dma = <0>;
 319         };
 320         */
 321 };
 322
 323 &spi1 {
 324         status = "disabled";
 325         max-freq = <48000000>;
 326         /*
 327         spi_test@10 {
 328                 compatible = "rockchip,spi_test_bus1_cs0";
 329                 reg = <0>;
 330                 spi-max-frequency = <24000000>;
 331                 //spi-cpha;
 332                 //spi-cpol;
 333                 poll_mode = <0>;
 334                 type = <0>;
 335                 enable_dma = <0>;
 336         };
 337
 338         */
 339 };
 340
 341 &spi2 {
 342         status = "disabled";
 343         max-freq = <48000000>;
 344         /*
 345         spi_test@20 {
 346                 compatible = "rockchip,spi_test_bus2_cs0";
 347                 reg = <0>;
 348                 spi-max-frequency = <24000000>;
 349                 //spi-cpha;
 350                 //spi-cpol;
 351                 poll_mode = <0>;
 352                 type = <0>;
 353                 enable_dma = <0>;
 354         };
 355
 356         spi_test@21 {
 357                 compatible = "rockchip,spi_test_bus2_cs1";
 358                 reg = <1>;
 359                 spi-max-frequency = <24000000>;
 360                 //spi-cpha;
 361                 //spi-cpol;
 362                 poll_mode = <0>;
 363                 type = <0>;
 364                 enable_dma = <0>;
 365         };
 366         */
 367 };
 368
 369 &uart_dbg {
 370         status = "okay";
 371 };
 372
 373 &uart_bt {
 374         status = "okay";
 375         dma-names = "!tx", "!rx";
 376         pinctrl-0 = <&uart0_xfer &uart0_cts>;
 377 };
 378
 379 &i2c0 {
 380         status = "okay";
 381         syr827: syr827@40 {
 382                 compatible = "silergy,syr82x";
 383                 reg = <0x40>;
 384                 status = "okay";
 385                 regulators {
 386                         #address-cells = <1>;
 387                         #size-cells = <0>;
 388                         syr827_dc1: regulator@0 {
 389                         reg = <0>;
 390                         regulator-compatible = "syr82x_dcdc1";
 391                         regulator-name = "vdd_arm";
 392                         regulator-min-microvolt = <712500>;
 393                         regulator-max-microvolt = <1500000>;
 394                         regulator-always-on;
 395                         regulator-boot-on;
 396                         regulator-initial-mode = <0x2>;
 397                         regulator-initial-state = <3>;
 398                         regulator-state-mem {
 399                                 regulator-state-mode = <0x2>;
 400                                 regulator-state-disabled;
 401                                 regulator-state-uv = <900000>;
 402                         };
 403                 };
 404            };
 405         };
 406         syr828: syr828@41 {
 407                 compatible = "silergy,syr82x";
 408                 reg = <0x41>;
 409                 status = "okay";
 410                 regulators {
 411                         #address-cells = <1>;
 412                         #size-cells = <0>;
 413                         syr828_dc1: regulator@0 {
 414                         reg = <0>;
 415                         regulator-compatible = "syr82x_dcdc1";
 416                         regulator-name = "vdd_gpu";
 417                         regulator-min-microvolt = <712500>;
 418                         regulator-max-microvolt = <1500000>;
 419                         regulator-always-on;
 420                         regulator-boot-on;
 421                         regulator-initial-mode = <0x2>;
 422                         regulator-initial-state = <3>;
 423                         regulator-state-mem {
 424                                 regulator-state-mode = <0x2>;
 425                                 regulator-state-enabled;
 426                                 regulator-state-uv = <900000>;
 427                         };
 428                 };
 429            };
 430         };
 431         act8846: act8846@5a {
 432                 reg = <0x5a>;
 433                 status = "okay";
 434         };
 435
 436         CW2015@62 {
 437                 compatible = "cw201x";
 438                 reg = <0x62>;
 439                 dc_det_gpio = <&gpio0 GPIO_C1 GPIO_ACTIVE_LOW>;
 440                 bat_low_gpio = <&gpio0 GPIO_C2 GPIO_ACTIVE_LOW>;
 441                 chg_ok_gpio = <&gpio0 GPIO_D3 GPIO_ACTIVE_HIGH>;
 442                 bat_config_info = <0x15 0x42 0x60 0x59 0x52 0x58 0x4D 0x48 0x48 0x44 0x44 0x46 0x49 0x48 0x32
 443                         0x24 0x20 0x17 0x13 0x0F 0x19 0x3E 0x51 0x45 0x08 0x76 0x0B 0x85 0x0E 0x1C 0x2E 0x3E 0x4D 0x52 0x52
 444                         0x57 0x3D 0x1B 0x6A 0x2D 0x25 0x43 0x52 0x87 0x8F 0x91 0x94 0x52 0x82 0x8C 0x92 0x96 0xFF 0x7B 0xBB
 445                         0xCB 0x2F 0x7D 0x72 0xA5 0xB5 0xC1 0x46 0xAE>;
 446                 is_dc_charge = <1>;
 447                 is_usb_charge = <0>;
 448         };
 449
 450         rtc@51 {
 451                 compatible = "rtc,hym8563";
 452                 reg = <0x51>;
 453                 irq_gpio = <&gpio0 GPIO_A1 IRQ_TYPE_EDGE_FALLING>;
 454         };
 455
 456 };
 457
 458 &i2c1 {
 459         status = "okay";
 460
 461         mpu6050:mpu@68{
 462                 compatible = "mpu6050";
 463                 reg = <0x68>;
 464                 mpu-int_config = <0x10>;
 465                 mpu-level_shifter = <0>;
 466                 mpu-orientation = <0 1 0 1 0 0 0 0 1>;
 467                 orientation-x= <0>;
 468                 orientation-y= <1>;
 469                 orientation-z= <1>;
 470                 irq-gpio = <&gpio3 GPIO_B6 IRQ_TYPE_LEVEL_LOW>;
 471                 mpu-debug = <0>;
 472         };
 473
 474
 475         ak8963:compass@0d{
 476                 compatible = "mpu_ak8963";
 477                 reg = <0x0d>;
 478                 compass-bus = <0>;
 479                 compass-adapt_num = <0>;
 480                 compass-orientation = <1 0 0 0 1 0 0 0 1>;
 481                 orientation-x= <0>;
 482                 orientation-y= <0>;
 483                 orientation-z= <1>;
 484                 compass-debug = <1>;
 485                 status = "okay";
 486         };
 487
 488         rt3261: rt3261@1c {
 489                 compatible = "rt3261";
 490                 reg = <0x1c>;
 491                 spk-num= <2>;
 492                 modem-input-mode = <1>;
 493                 lout-to-modem_mode = <1>;
 494                 spk-amplify = <2>;
 495         };
 496 };
 497
 498 &i2c2 {
 499         status = "okay";
 500
 501         rt5631: rt5631@1a {
 502                 compatible = "rt5631";
 503                 reg = <0x1a>;
 504         };
 505
 506         ts@01 {
 507                 compatible = "ct,vtl_ts";
 508                 reg = <0x01>;
 509                 screen_max_x = <1536>;
 510                 screen_max_y = <2048>;
 511                 xy_swap = <1>;
 512                 x_reverse = <0>;
 513                 y_reverse = <0>;
 514                 x_mul = <2>;
 515                 y_mul = <2>;
 516                 bin_ver = <0>;
 517                 irq_gpio_number = <&gpio0 GPIO_B4 IRQ_TYPE_LEVEL_LOW>;
 518                 rst_gpio_number = <&gpio0 GPIO_B3 GPIO_ACTIVE_HIGH>;
 519         };
 520 };
 521
 522 &i2c3 {
 523         status = "okay";
 524 };
 525
 526 &i2c4 {
 527         status = "okay";
 528
 529
 530 };
 531
 532 &i2c5 {
 533         status = "disable";
 534 };
 535
 536 &fb {
 537         rockchip,disp-mode = <NO_DUAL>;
 538         rockchip,uboot-logo-on = <0>;
 539 };
 540
 541 &rk_screen {
 542          display-timings = <&disp_timings>;
 543 };
 544
 545 /*&lvds {
 546         status = "okay";
 547         pinctrl-names = "lcdc", "sleep";
 548         pinctrl-0 = <&lcdc_lcdc>;
 549         pinctrl-1 = <&lcdc_gpio>;
 550 };*/
 551
 552 &lcdc {
 553         status = "okay";
 554         rockchip,mirror = <NO_MIRROR>;
 555         rockchip,cabc_mode = <0>;
 556         rockchip,fb-win-map = <FB_DEFAULT_ORDER>;
 557         power_ctr: power_ctr {
 558                 rockchip,debug = <0>;
 559                 lcd_en:lcd_en {
 560                         rockchip,power_type = <GPIO>;
 561                         gpios = <&gpio0 GPIO_C6 GPIO_ACTIVE_HIGH>;
 562                         rockchip,delay = <10>;
 563                 };
 564
 565                 lcd_cs:lcd_cs {
 566                         rockchip,power_type = <GPIO>;
 567                         gpios = <&gpio0 GPIO_C5 GPIO_ACTIVE_HIGH>;
 568                         rockchip,delay = <10>;
 569                 };
 570
 571                 /*lcd_rst:lcd_rst {
 572                         rockchip,power_type = <GPIO>;
 573                         gpios = <&gpio3 GPIO_D6 GPIO_ACTIVE_HIGH>;
 574                         rockchip,delay = <5>;
 575                 };*/
 576         };
 577 };
 578
 579
 580 &hdmi {
 581         status = "okay";
 582         rockchips,hdmi_audio_source = <0>;
 583 };
 584
 585 &adc {
 586         status = "okay";
 587
 588         rockchip_headset {
 589                 compatible = "rockchip_headset";
 590                 headset_gpio = <&gpio0 GPIO_C7 GPIO_ACTIVE_LOW>;
 591                 pinctrl-names = "default";
 592                 pinctrl-0 = <&gpio0_c7>;//gpio0_c7
 593                 io-channels = <&adc 2>;
 594        /*
 595                hook_gpio = ;
 596                hook_down_type = ; //interrupt hook key down status
 597                 */
 598        };
 599
 600         key {
 601                 compatible = "rockchip,key";
 602                 io-channels = <&adc 1>;
 603
 604                 vol-up-key {
 605                         linux,code = <115>;
 606                         label = "volume up";
 607                         rockchip,adc_value = <1>;
 608                 };
 609
 610                 vol-down-key {
 611                         linux,code = <114>;
 612                         label = "volume down";
 613                         rockchip,adc_value = <170>;
 614                 };
 615
 616                 power-key {
 617                         gpios = <&gpio0 GPIO_A2 GPIO_ACTIVE_LOW>;
 618                         linux,code = <116>;
 619                         label = "power";
 620                         gpio-key,wakeup;
 621                 };
 622
 623                 menu-key {
 624                         linux,code = <59>;
 625                         label = "menu";
 626                         rockchip,adc_value = <355>;
 627                 };
 628
 629                 home-key {
 630                         linux,code = <102>;
 631                         label = "home";
 632                         rockchip,adc_value = <746>;
 633                 };
 634
 635                 back-key {
 636                         linux,code = <158>;
 637                         label = "back";
 638                         rockchip,adc_value = <560>;
 639                 };
 640
 641                 camera-key {
 642                         linux,code = <212>;
 643                         label = "camera";
 644                         rockchip,adc_value = <450>;
 645                 };
 646         };
 647 };
 648
 649 &pwm0 {
 650         status = "okay";
 651 };
 652
 653 &pwm1 {
 654         status = "okay";
 655 };
 656
 657
 658 &clk_core_dvfs_table {
 659         operating-points = <
 660                 /* KHz    uV */
 661                 126000 900000
 662                 216000 900000
 663                 312000 900000
 664                 408000 900000
 665                 600000 900000
 666                 696000 950000
 667                 816000 1000000
 668                 1008000 1050000
 669                 1200000 1100000
 670                 1416000 1200000
 671                 1512000 1300000
 672                 1608000 1350000
 673         //      1704000 1350000
 674         //      1800000 1400000
 675                 >;
 676         support-pvtm = <1>;
 677         pvtm-operating-points = <
 678                 /* KHz    uV    margin(uV)*/
 679                 126000 900000   25000
 680                 216000 900000   25000
 681                 312000 900000   25000
 682                 408000 900000   25000
 683                 600000 900000   25000
 684                 696000 950000   25000
 685                 816000 1000000  25000
 686                 1008000 1050000 25000
 687                 1200000 1100000 25000
 688                 1416000 1200000 25000
 689                 1512000 1300000 25000
 690                 1608000 1350000 25000
 691                 >;
 692         status="okay";
 693 };
 694
 695 &clk_gpu_dvfs_table {
 696         operating-points = <
 697                 /* KHz    uV */
 698                 100000 900000
 699                 200000 900000
 700                 300000 950000
 701                 420000 1050000
 702                 500000 1150000
 703                 >;
 704         status="okay";
 705 };
 706
 707 &clk_ddr_dvfs_table {
 708         operating-points = <
 709                 /* KHz    uV */
 710                 200000 1050000
 711                 300000 1050000
 712                 400000 1100000
 713                 533000 1150000
 714                 >;
 715
 716         freq-table = <
 717                 /*status                freq(KHz)*/
 718                 SYS_STATUS_NORMAL       400000
 719                 SYS_STATUS_SUSPEND      200000
 720                 SYS_STATUS_VIDEO_1080P  240000
 721                 SYS_STATUS_VIDEO_4K     400000
 722                 SYS_STATUS_PERFORMANCE  528000
 723                 SYS_STATUS_DUALVIEW     400000
 724                 SYS_STATUS_BOOST        324000
 725                 SYS_STATUS_ISP          400000
 726                 >;
 727         auto-freq-table = <
 728                 240000
 729                 324000
 730                 396000
 731                 528000
 732                 >;
 733         auto-freq=<0>;
 734         status="disabled";
 735 };
 736
 737 &dwc_control_usb {
 738                 host_drv_gpio = <&gpio0 GPIO_A4 GPIO_ACTIVE_LOW>;
 739                 otg_drv_gpio = <&gpio0 GPIO_D1 GPIO_ACTIVE_LOW>;
 740
 741                 rockchip,remote_wakeup;
 742                 rockchip,usb_irq_wakeup;
 743         };
 744
 745 /include/ "../../../arm/boot/dts/act8846.dtsi"
 746 &act8846 {
 747         gpios =<&gpio0 GPIO_B0 GPIO_ACTIVE_LOW>,<&gpio0 GPIO_A3 GPIO_ACTIVE_HIGH>;
 748         act8846,system-power-controller;
 749
 750         regulators {
 751
 752                 dcdc1_reg: regulator@0{
 753                         regulator-name= "act_dcdc1";
 754                         regulator-min-microvolt = <1200000>;
 755                         regulator-max-microvolt = <1200000>;
 756                         regulator-always-on;
 757                         regulator-boot-on;
 758                 };
 759
 760                 dcdc2_reg: regulator@1 {
 761                         regulator-name= "vccio";
 762                         regulator-min-microvolt = <3300000>;
 763                         regulator-max-microvolt = <3300000>;
 764                         regulator-initial-state = <3>;
 765                         regulator-state-mem {
 766                                 regulator-state-enabled;
 767                                 regulator-state-uv = <3300000>;
 768                         };
 769                 };
 770
 771                 dcdc3_reg: regulator@2 {
 772                         regulator-name= "vdd_logic";
 773                         regulator-min-microvolt = <700000>;
 774                         regulator-max-microvolt = <1500000>;
 775                         regulator-initial-state = <3>;
 776                         regulator-state-mem {
 777                                 regulator-state-enabled;
 778                                 regulator-state-uv = <1000000>;
 779                         };
 780
 781                 };
 782
 783                 dcdc4_reg: regulator@3 {
 784                         regulator-name= "act_dcdc4";
 785                         regulator-min-microvolt = <2000000>;
 786                         regulator-max-microvolt = <2000000>;
 787                                 regulator-initial-state = <3>;
 788                         regulator-state-mem {
 789                                 regulator-state-enabled;
 790                                 regulator-state-uv = <2000000>;
 791                         };
 792                 };
 793
 794                 ldo1_reg: regulator@4 {
 795                         regulator-name= "vccio_sd";
 796                         regulator-min-microvolt = <1800000>;
 797                         regulator-max-microvolt = <3300000>;
 798
 799                 };
 800
 801                 ldo2_reg: regulator@5 {
 802                         regulator-name= "act_ldo2";
 803                         regulator-min-microvolt = <1000000>;
 804                         regulator-max-microvolt = <1000000>;
 805
 806                 };
 807
 808                 ldo3_reg: regulator@6 {
 809                         regulator-name= "act_ldo3";
 810                         regulator-min-microvolt = <3300000>;
 811                         regulator-max-microvolt = <3300000>;
 812
 813                 };
 814
 815                 ldo4_reg:regulator@7 {
 816                         regulator-name= "act_ldo4";
 817                         regulator-min-microvolt = <3300000>;
 818                         regulator-max-microvolt = <3300000>;
 819
 820                 };
 821
 822                 ldo5_reg: regulator@8 {
 823                         regulator-name= "act_ldo5";
 824                         regulator-min-microvolt = <3300000>;
 825                         regulator-max-microvolt = <3300000>;
 826
 827                 };
 828
 829                 ldo6_reg: regulator@9 {
 830                         regulator-name= "act_ldo6";
 831                         regulator-min-microvolt = <1000000>;
 832                         regulator-max-microvolt = <1000000>;
 833                         regulator-initial-state = <3>;
 834                         regulator-state-mem {
 835                                 regulator-state-enabled;
 836                         };
 837
 838                 };
 839
 840                 ldo7_reg: regulator@10 {
 841                         regulator-name= "vcc_18";
 842                         regulator-min-microvolt = <1800000>;
 843                         regulator-max-microvolt = <1800000>;
 844                         regulator-initial-state = <3>;
 845                         regulator-state-mem {
 846                                 regulator-state-enabled;
 847                         };
 848
 849                 };
 850
 851                 ldo8_reg: regulator@11 {
 852                         regulator-name= "act_ldo8";
 853                         regulator-min-microvolt = <1800000>;
 854                         regulator-max-microvolt = <1800000>;
 855
 856                 };
 857         };
 858 };
 859
 860 &ion_cma {
 861        reg = <0x00000000 0x28000000>; /* 640MB */
 862 };
 863 /*
 864 &dwc_control_usb {
 865         usb_uart {
 866                 status = "disabled";
 867         };
 868 };
 869
 870 &rk3288_cif_sensor{
 871         status = "okay";
 872 };
 873 */