arm64: rockchip: fix tb_8846 boot
[firefly-linux-kernel-4.4.55.git] / arch / arm64 / boot / dts / rk3368-tb_8846.dts
1 /dts-v1/;
2
3 #include <dt-bindings/interrupt-controller/arm-gic.h>
4 #include <dt-bindings/rkfb/rk_fb.h>
5 #include "rk3368.dtsi"
6 #include "../../../arm/boot/dts/lcd-b101ew05.dtsi"
7
8 / {
9         chosen {
10                 bootargs = "earlyprintk=uart8250-32bit,0xff690000 clk_ignore_unused";
11         };
12
13         wireless-wlan {
14                 compatible = "wlan-platdata";
15
16                 /* wifi_chip_type - wifi chip define
17                  * bcmwifi ==> like ap6xxx, rk90x;
18                  * rtkwifi ==> like rtl8188xx, rtl8723xx;
19                  * esp8089 ==> esp8089;
20                  * other   ==> for other wifi;
21                  */
22                 wifi_chip_type = "bcmwifi";
23
24                 sdio_vref = <1800>; //1800mv or 3300mv
25
26                 //keep_wifi_power_on;
27
28                 //power_ctrl_by_pmu;
29                 power_pmu_regulator = "act_ldo3";
30                 power_pmu_enable_level = <1>; //1->HIGH, 0->LOW
31
32                 //vref_ctrl_enable;
33                 //vref_ctrl_gpio = <&gpio0 GPIO_A2 GPIO_ACTIVE_HIGH>;
34                 vref_pmu_regulator = "act_ldo3";
35                 vref_pmu_enable_level = <1>; //1->HIGH, 0->LOW
36
37                 WIFI,poweren_gpio = <&gpio3 GPIO_A4 GPIO_ACTIVE_HIGH>;
38                 WIFI,host_wake_irq = <&gpio3 GPIO_A6 GPIO_ACTIVE_HIGH>;
39                 //WIFI,reset_gpio = <&gpio0 GPIO_A2 GPIO_ACTIVE_LOW>;
40
41                 status = "disabled";
42         };
43
44         wireless-bluetooth {
45                 compatible = "bluetooth-platdata";
46
47                 //wifi-bt-power-toggle;
48
49                 uart_rts_gpios = <&gpio2 GPIO_D3 GPIO_ACTIVE_LOW>;
50                 pinctrl-names = "default","rts_gpio";
51                 pinctrl-0 = <&uart0_rts>;
52                 pinctrl-1 = <&uart0_rts_gpio>;
53
54                 BT,power_gpio = <&gpio3 GPIO_A3 GPIO_ACTIVE_HIGH>;
55                 BT,reset_gpio = <&gpio3 GPIO_A5 GPIO_ACTIVE_HIGH>;
56                 BT,wake_gpio = <&gpio3 GPIO_A2 GPIO_ACTIVE_HIGH>;
57                 BT,wake_host_irq = <&gpio3 GPIO_A7 GPIO_ACTIVE_HIGH>;
58
59                 status = "okay";
60         };
61
62         hallsensor {
63                compatible = "hall_och165t";
64                type = <SENSOR_TYPE_HALL>;
65                irq-gpio = <&gpio0 GPIO_C0 IRQ_TYPE_EDGE_BOTH>;
66         };
67
68         backlight {
69                 compatible = "pwm-backlight";
70                 pwms = <&pwm0 0 25000>;
71                 brightness-levels = <255 254 253 252 251 250 249 248 247 246 245 244 243 242 241 240
72                      239 238 237 236 235 234 233 232 231 230 229 228 227 226 225 224 223 222 221 220
73                      219 218 217 216 215 214 213 212 211 210 209 208 207 206 205 204 203 202 201 200
74                      199 198 197 196 195 194 193 192 191 190 189 188 187 186 185 184 183 182 181 180
75                      179 178 177 176 175 174 173 172 171 170 169 168 167 166 165 164 163 162 161 160
76                      159 158 157 156 155 154 153 152 151 150 149 148 147 146 145 144 143 142 141 140
77                      139 138 137 136 135 134 133 132 131 130 129 128 127 126 125 124 123 122 121 120
78                      119 118 117 116 115 114 113 112 111 110 109 108 107 106 105 104 103 102 101 100
79                      99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70
80                      69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40
81                      39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
82                      9 8 7 6 5 4 3 2 1 0>;
83                 default-brightness-level = <200>;
84                 enable-gpios = <&gpio0 GPIO_C4 GPIO_ACTIVE_HIGH>;
85         };
86
87         pwm_regulator {
88                 compatible = "rockchip_pwm_regulator";
89                 pwms = <&pwm1 0 2000>;
90                 rockchip,pwm_id= <1>;
91                 rockchip,pwm_voltage_map= <925000 950000 975000 1000000 1025000 1050000 1075000 1100000 1125000 1150000 1175000 1200000 1225000 1250000 1275000 1300000 1325000 1350000 1375000 1400000>;
92                 rockchip,pwm_voltage= <1000000>;
93                 rockchip,pwm_min_voltage= <925000>;
94                 rockchip,pwm_max_voltage= <1400000>;
95                 rockchip,pwm_suspend_voltage= <950000>;
96                 rockchip,pwm_coefficient= <475>;
97                 regulators {
98                         #address-cells = <1>;
99                         #size-cells = <0>;
100                         pwm_reg0: regulator@0 {
101                                 regulator-compatible = "pwm_dcdc1";
102                                 regulator-name= "vdd_logic";
103                                 regulator-min-microvolt = <925000>;
104                                 regulator-max-microvolt = <1400000>;
105                                 regulator-always-on;
106                                 regulator-boot-on;
107                         };
108                 };
109         };
110
111         codec_hdmi_i2s: codec-hdmi-i2s {
112                 compatible = "hdmi-i2s";
113         };
114
115         codec_hdmi_spdif: codec-hdmi-spdif {
116                 compatible = "hdmi-spdif";
117         };
118
119         rockchip-hdmi-i2s {
120                 compatible = "rockchip-hdmi-i2s";
121                 dais {
122                         dai0 {
123                                 audio-codec = <&codec_hdmi_i2s>;
124                                 i2s-controller = <&i2s0>;
125                                 format = "i2s";
126                                 //continuous-clock;
127                                 //bitclock-inversion;
128                                 //frame-inversion;
129                                 //bitclock-master;
130                                 //frame-master;
131                         };
132                 };
133         };
134
135         rockchip-hdmi-spdif {
136                 compatible = "rockchip-hdmi-spdif";
137                 dais {
138                         dai0 {
139                                 audio-codec = <&codec_hdmi_spdif>;
140                                 i2s-controller = <&spdif>;
141                         };
142                 };
143         };
144
145         rockchip-rt5631 {
146                 compatible = "rockchip-rt5631";
147                 dais {
148                         dai0 {
149                                 audio-codec = <&rt5631>;
150                                 i2s-controller = <&i2s0>;
151                                 format = "i2s";
152                                 //continuous-clock;
153                                 //bitclock-inversion;
154                                 //frame-inversion;
155                                 //bitclock-master;
156                                 //frame-master;
157                         };
158                 };
159         };
160
161         rockchip-rt3224 {
162                 compatible = "rockchip-rt3261";
163                 dais {
164                         dai0 {
165                                 audio-codec = <&rt3261>;
166                                 i2s-controller = <&i2s0>;
167                                 format = "i2s";
168                                 //continuous-clock;
169                                 //bitclock-inversion;
170                                 //frame-inversion;
171                                 //bitclock-master;
172                                 //frame-master;
173                         };
174                         dai1 {
175                                 audio-codec = <&rt3261>;
176                                 i2s-controller = <&i2s0>;
177                                 format = "dsp_a";
178                                 //continuous-clock;
179                                 bitclock-inversion;
180                                 //frame-inversion;
181                                 //bitclock-master;
182                                 //frame-master;
183                         };
184                 };
185         };
186
187         usb_control {
188                 compatible = "rockchip,rk3288-usb-control";
189
190                 host_drv_gpio = <&gpio0 GPIO_A4 GPIO_ACTIVE_LOW>;
191                 otg_drv_gpio = <&gpio0 GPIO_D1 GPIO_ACTIVE_LOW>;
192
193                 rockchip,remote_wakeup;
194                 rockchip,usb_irq_wakeup;
195         };
196
197         io-domains {
198                 compatible = "rockchip,rk3368-io-voltage-domain";
199                 rockchip,grf = <&grf>;
200                 rockchip,pmu = <&pmu_grf>;
201
202                 grf {
203                         dvp-supply = "vccio";
204                         flash0-supply = "vccio";
205                         wifi-supply = "act_ldo6";
206                         audio-supply = "vccio";
207                         sdcard-supply = "vccio_sd";
208                         gpio30-supply = "vccio";
209                         gpio1830-supply = "vccio";
210                 };
211
212                 pmu_grf {
213                         pmu-supply = "act_ldo4";
214                         vop-supply = "act_ldo4";
215                 };
216         };
217 };
218
219 &gmac {
220 //      power_ctl_by = "gpio";  //"gpio" "pmu"
221         power-gpio = <&gpio0 GPIO_A6 GPIO_ACTIVE_HIGH>;
222 //      power-pmu = "act_ldo"
223 //      reset-gpio = <&gpio4 GPIO_A7 GPIO_ACTIVE_LOW>;
224     phy-mode = "rgmii";
225     clock_in_out = "input";
226     tx_delay = <0x28>;
227     rx_delay = <0x10>;
228         status = "disabled"; //if want to use gmac, please set "okay"
229 };
230
231 &pinctrl {
232         //used for init some gpio
233         init-gpios = <&gpio0 GPIO_A6 GPIO_ACTIVE_HIGH>;
234
235         gpio0_gpio {
236                         gpio0_c7: gpio0-c7 {
237                                 rockchip,pins = <0 GPIO_C7 RK_FUNC_GPIO &pcfg_pull_down>;
238                         };
239                         gpio0_a3: gpio0-a3 {
240                                 rockchip,pins = <0 GPIO_A3 RK_FUNC_3 &pcfg_pull_none>;
241                         };
242                         gpio0_c2: gpio0-c2 {
243                                 rockchip,pins = <0 GPIO_C2 RK_FUNC_GPIO &pcfg_pull_down>;
244                         };
245
246                         //to add
247                 };
248
249 };
250
251 &nandc0 {
252         status = "disabled"; // used nand set "disabled" ,used emmc set "okay"
253 };
254
255 &nandc0reg {
256         status = "okay"; // used nand set "disabled" ,used emmc set "okay"
257 };
258
259 &emmc {
260         clock-frequency = <100000000>;
261         clock-freq-min-max = <400000 100000000>;
262
263     supports-highspeed;
264         supports-emmc;
265     bootpart-no-access;
266
267         //supports-tSD;
268         //supports-DDR_MODE; //you should set the two value in your project. only close in RK3288-SDK board.
269         //caps2-mmc-hs200;
270
271     ignore-pm-notify;
272         keep-power-in-suspend;
273
274         //poll-hw-reset
275         status = "okay";
276 };
277
278 &sdmmc {
279                 clock-frequency = <50000000>;
280                 clock-freq-min-max = <400000 50000000>;
281                 supports-highspeed;
282                 supports-sd;
283                 broken-cd;
284                 card-detect-delay = <200>;
285
286                 ignore-pm-notify;
287                 keep-power-in-suspend;
288
289         vmmc-supply = <&ldo1_reg>;
290                 status = "okay";
291 };
292
293 &sdio {
294                 clock-frequency = <50000000>;
295                 clock-freq-min-max = <200000 50000000>;
296                 supports-highspeed;
297                 supports-sdio;
298                 ignore-pm-notify;
299                 keep-power-in-suspend;
300                 //cap-sdio-irq;
301                 status = "okay";
302 };
303
304 &spi0 {
305         status = "disabled";
306         max-freq = <48000000>;
307         /*
308         spi_test@00 {
309                 compatible = "rockchip,spi_test_bus0_cs0";
310                 reg = <0>;
311                 spi-max-frequency = <24000000>;
312                 //spi-cpha;
313                 //spi-cpol;
314                 poll_mode = <0>;
315                 type = <0>;
316                 enable_dma = <0>;
317
318         };
319
320         spi_test@01 {
321                 compatible = "rockchip,spi_test_bus0_cs1";
322                 reg = <1>;
323                 spi-max-frequency = <24000000>;
324                 spi-cpha;
325                 spi-cpol;
326                 poll_mode = <0>;
327                 type = <0>;
328                 enable_dma = <0>;
329         };
330         */
331 };
332
333 &spi1 {
334         status = "disabled";
335         max-freq = <48000000>;
336         /*
337         spi_test@10 {
338                 compatible = "rockchip,spi_test_bus1_cs0";
339                 reg = <0>;
340                 spi-max-frequency = <24000000>;
341                 //spi-cpha;
342                 //spi-cpol;
343                 poll_mode = <0>;
344                 type = <0>;
345                 enable_dma = <0>;
346         };
347
348         */
349 };
350
351 &spi2 {
352         status = "disabled";
353         max-freq = <48000000>;
354         /*
355         spi_test@20 {
356                 compatible = "rockchip,spi_test_bus2_cs0";
357                 reg = <0>;
358                 spi-max-frequency = <24000000>;
359                 //spi-cpha;
360                 //spi-cpol;
361                 poll_mode = <0>;
362                 type = <0>;
363                 enable_dma = <0>;
364         };
365
366         spi_test@21 {
367                 compatible = "rockchip,spi_test_bus2_cs1";
368                 reg = <1>;
369                 spi-max-frequency = <24000000>;
370                 //spi-cpha;
371                 //spi-cpol;
372                 poll_mode = <0>;
373                 type = <0>;
374                 enable_dma = <0>;
375         };
376         */
377 };
378
379 &uart_dbg {
380         status = "okay";
381 };
382
383 &uart_bt {
384         status = "okay";
385         dma-names = "!tx", "!rx";
386         pinctrl-0 = <&uart0_xfer &uart0_cts>;
387 };
388
389 &i2c0 {
390         status = "okay";
391         syr827: syr827@40 {
392                 compatible = "silergy,syr82x";
393                 reg = <0x40>;
394                 status = "okay";
395                 regulators {
396                         #address-cells = <1>;
397                         #size-cells = <0>;
398                         syr827_dc1: regulator@0 {
399                         reg = <0>;
400                         regulator-compatible = "syr82x_dcdc1";
401                         regulator-name = "vdd_arm";
402                         regulator-min-microvolt = <712500>;
403                         regulator-max-microvolt = <1500000>;
404                         regulator-always-on;
405                         regulator-boot-on;
406                         regulator-initial-mode = <0x2>;
407                         regulator-initial-state = <3>;
408                         regulator-state-mem {
409                                 regulator-state-mode = <0x2>;
410                                 regulator-state-disabled;
411                                 regulator-state-uv = <900000>;
412                         };
413                 };
414            };
415         };
416         syr828: syr828@41 {
417                 compatible = "silergy,syr82x";
418                 reg = <0x41>;
419                 status = "okay";
420                 regulators {
421                         #address-cells = <1>;
422                         #size-cells = <0>;
423                         syr828_dc1: regulator@0 {
424                         reg = <0>;
425                         regulator-compatible = "syr82x_dcdc1";
426                         regulator-name = "vdd_gpu";
427                         regulator-min-microvolt = <712500>;
428                         regulator-max-microvolt = <1500000>;
429                         regulator-always-on;
430                         regulator-boot-on;
431                         regulator-initial-mode = <0x2>;
432                         regulator-initial-state = <3>;
433                         regulator-state-mem {
434                                 regulator-state-mode = <0x2>;
435                                 regulator-state-enabled;
436                                 regulator-state-uv = <900000>;
437                         };
438                 };
439            };
440         };
441         act8846: act8846@5a {
442                 reg = <0x5a>;
443                 status = "okay";
444         };
445
446         CW2015@62 {
447                 compatible = "cw201x";
448                 reg = <0x62>;
449                 //dc_det_gpio = <&gpio0 GPIO_B0 GPIO_ACTIVE_LOW>;
450                 //bat_low_gpio = <&gpio0 GPIO_A7 GPIO_ACTIVE_LOW>;
451                 chg_ok_gpio = <&gpio0 GPIO_C2 GPIO_ACTIVE_HIGH>;
452                 bat_config_info = <0x15 0x42 0x60 0x59 0x52 0x58 0x4D 0x48 0x48 0x44 0x44 0x46 0x49 0x48 0x32
453                         0x24 0x20 0x17 0x13 0x0F 0x19 0x3E 0x51 0x45 0x08 0x76 0x0B 0x85 0x0E 0x1C 0x2E 0x3E 0x4D 0x52 0x52
454                         0x57 0x3D 0x1B 0x6A 0x2D 0x25 0x43 0x52 0x87 0x8F 0x91 0x94 0x52 0x82 0x8C 0x92 0x96 0xFF 0x7B 0xBB
455                         0xCB 0x2F 0x7D 0x72 0xA5 0xB5 0xC1 0x46 0xAE>;
456                 is_dc_charge = <1>;
457                 is_usb_charge = <0>;
458         };
459
460         rtc@51 {
461                 compatible = "rtc,hym8563";
462                 reg = <0x51>;
463                 irq_gpio = <&gpio0 GPIO_A1 IRQ_TYPE_EDGE_FALLING>;
464         };
465
466 };
467
468 &i2c1 {
469         status = "okay";
470
471         mpu6050:mpu@68{
472                 compatible = "mpu6050";
473                 reg = <0x68>;
474                 mpu-int_config = <0x10>;
475                 mpu-level_shifter = <0>;
476                 mpu-orientation = <0 1 0 1 0 0 0 0 1>;
477                 orientation-x= <0>;
478                 orientation-y= <1>;
479                 orientation-z= <1>;
480                 irq-gpio = <&gpio3 GPIO_B6 IRQ_TYPE_LEVEL_LOW>;
481                 mpu-debug = <0>;
482         };
483
484
485         ak8963:compass@0d{
486                 compatible = "mpu_ak8963";
487                 reg = <0x0d>;
488                 compass-bus = <0>;
489                 compass-adapt_num = <0>;
490                 compass-orientation = <1 0 0 0 1 0 0 0 1>;
491                 orientation-x= <0>;
492                 orientation-y= <0>;
493                 orientation-z= <1>;
494                 compass-debug = <1>;
495                 status = "okay";
496         };
497
498 };
499
500 &i2c2 {
501         status = "okay";
502
503         rt5631: rt5631@1a {
504                 compatible = "rt5631";
505                 reg = <0x1a>;
506         };
507
508         ts@01 {
509                 compatible = "ct,vtl_ts";
510                 reg = <0x01>;
511                 screen_max_x = <1536>;
512                 screen_max_y = <2048>;
513                 xy_swap = <1>;
514                 x_reverse = <0>;
515                 y_reverse = <0>;
516                 x_mul = <2>;
517                 y_mul = <2>;
518                 bin_ver = <0>;
519                 irq_gpio_number = <&gpio0 GPIO_B4 IRQ_TYPE_LEVEL_LOW>;
520                 rst_gpio_number = <&gpio0 GPIO_B3 GPIO_ACTIVE_HIGH>;
521         };
522
523         rt3261: rt3261@1c {
524                 compatible = "rt3261";
525                 reg = <0x1c>;
526         //      codec-en-gpio = <0>;//sdk default high level
527                 spk-num= <2>;
528                 modem-input-mode = <1>;
529                 lout-to-modem_mode = <1>;
530                 spk-amplify = <2>;
531                 playback-if1-data_control = <0>;
532                 playback-if2-data_control = <0>;
533         };
534 };
535
536 &i2c3 {
537         status = "okay";
538 };
539
540 &i2c4 {
541         status = "okay";
542
543
544 };
545
546 &i2c5 {
547         status = "disable";
548 };
549
550 &fb {
551         rockchip,disp-mode = <NO_DUAL>;
552         rockchip,uboot-logo-on = <0>;
553 };
554
555 &rk_screen {
556          display-timings = <&disp_timings>;
557 };
558
559 &lvds {
560         status = "okay";
561 };
562
563 &lcdc {
564         status = "okay";
565         rockchip,mirror = <NO_MIRROR>;
566         rockchip,cabc_mode = <0>;
567         rockchip,fb-win-map = <FB_DEFAULT_ORDER>;
568         power_ctr: power_ctr {
569                 rockchip,debug = <0>;
570                 lcd_en:lcd_en {
571                         rockchip,power_type = <GPIO>;
572                         gpios = <&gpio0 GPIO_C6 GPIO_ACTIVE_HIGH>;
573                         rockchip,delay = <10>;
574                 };
575
576                 lcd_cs:lcd_cs {
577                         rockchip,power_type = <GPIO>;
578                         gpios = <&gpio0 GPIO_C5 GPIO_ACTIVE_HIGH>;
579                         rockchip,delay = <10>;
580                 };
581
582                 /*lcd_rst:lcd_rst {
583                         rockchip,power_type = <GPIO>;
584                         gpios = <&gpio3 GPIO_D6 GPIO_ACTIVE_HIGH>;
585                         rockchip,delay = <5>;
586                 };*/
587         };
588 };
589
590
591 &hdmi {
592         status = "okay";
593         rockchips,hdmi_audio_source = <0>;
594 };
595
596 &adc {
597         status = "okay";
598
599         rockchip_headset {
600                 compatible = "rockchip_headset";
601                 headset_gpio = <&gpio0 GPIO_C7 GPIO_ACTIVE_LOW>;
602                 pinctrl-names = "default";
603                 pinctrl-0 = <&gpio0_c7>;//gpio0_c7
604                 io-channels = <&adc 2>;
605        /*
606                hook_gpio = ;
607                hook_down_type = ; //interrupt hook key down status
608                 */
609        };
610
611         key {
612                 compatible = "rockchip,key";
613                 io-channels = <&adc 1>;
614
615                 vol-up-key {
616                         linux,code = <115>;
617                         label = "volume up";
618                         rockchip,adc_value = <1>;
619                 };
620
621                 vol-down-key {
622                         linux,code = <114>;
623                         label = "volume down";
624                         rockchip,adc_value = <170>;
625                 };
626
627                 power-key {
628                         gpios = <&gpio0 GPIO_A2 GPIO_ACTIVE_LOW>;
629                         linux,code = <116>;
630                         label = "power";
631                         gpio-key,wakeup;
632                 };
633
634                 menu-key {
635                         linux,code = <59>;
636                         label = "menu";
637                         rockchip,adc_value = <355>;
638                 };
639
640                 home-key {
641                         linux,code = <102>;
642                         label = "home";
643                         rockchip,adc_value = <746>;
644                 };
645
646                 back-key {
647                         linux,code = <158>;
648                         label = "back";
649                         rockchip,adc_value = <560>;
650                 };
651
652                 camera-key {
653                         linux,code = <212>;
654                         label = "camera";
655                         rockchip,adc_value = <450>;
656                 };
657         };
658 };
659
660 &pwm0 {
661         status = "okay";
662 };
663
664 &pwm1 {
665         status = "okay";
666 };
667
668
669 &clk_core_dvfs_table {
670         operating-points = <
671                 /* KHz    uV */
672                 126000 900000
673                 216000 900000
674                 312000 900000
675                 408000 900000
676                 600000 900000
677                 696000 950000
678                 816000 1000000
679                 1008000 1050000
680                 1200000 1100000
681                 1416000 1200000
682                 1512000 1300000
683                 1608000 1350000
684         //      1704000 1350000
685         //      1800000 1400000
686                 >;
687         support-pvtm = <1>;
688         pvtm-operating-points = <
689                 /* KHz    uV    margin(uV)*/
690                 126000 900000   25000
691                 216000 900000   25000
692                 312000 900000   25000
693                 408000 900000   25000
694                 600000 900000   25000
695                 696000 950000   25000
696                 816000 1000000  25000
697                 1008000 1050000 25000
698                 1200000 1100000 25000
699                 1416000 1200000 25000
700                 1512000 1300000 25000
701                 1608000 1350000 25000
702                 >;
703         status="okay";
704 };
705
706 &clk_gpu_dvfs_table {
707         operating-points = <
708                 /* KHz    uV */
709                 100000 900000
710                 200000 900000
711                 300000 950000
712                 420000 1050000
713                 500000 1150000
714                 >;
715         status="okay";
716 };
717
718 &clk_ddr_dvfs_table {
719         operating-points = <
720                 /* KHz    uV */
721                 200000 1050000
722                 300000 1050000
723                 400000 1100000
724                 533000 1150000
725                 >;
726
727         freq-table = <
728                 /*status                freq(KHz)*/
729                 SYS_STATUS_NORMAL       400000
730                 SYS_STATUS_SUSPEND      200000
731                 SYS_STATUS_VIDEO_1080P  240000
732                 SYS_STATUS_VIDEO_4K     400000
733                 SYS_STATUS_PERFORMANCE  528000
734                 SYS_STATUS_DUALVIEW     400000
735                 SYS_STATUS_BOOST        324000
736                 SYS_STATUS_ISP          400000
737                 >;
738         auto-freq-table = <
739                 240000
740                 324000
741                 396000
742                 528000
743                 >;
744         auto-freq=<0>;
745         status="disabled";
746 };
747
748 /include/ "../../../arm/boot/dts/act8846.dtsi"
749 &act8846 {
750         gpios =<&gpio0 GPIO_A0 GPIO_ACTIVE_LOW>,<&gpio0 GPIO_A3 GPIO_ACTIVE_HIGH>;
751         act8846,system-power-controller;
752
753         regulators {
754
755                 dcdc1_reg: regulator@0{
756                         regulator-name= "act_dcdc1";
757                         regulator-min-microvolt = <1200000>;
758                         regulator-max-microvolt = <1200000>;
759                         regulator-always-on;
760                         regulator-boot-on;
761                 };
762
763                 dcdc2_reg: regulator@1 {
764                         regulator-name= "vccio";
765                         regulator-min-microvolt = <3300000>;
766                         regulator-max-microvolt = <3300000>;
767                         regulator-initial-state = <3>;
768                         regulator-state-mem {
769                                 regulator-state-enabled;
770                                 regulator-state-uv = <3300000>;
771                         };
772                 };
773
774                 dcdc3_reg: regulator@2 {
775                         regulator-name= "vdd_logic";
776                         regulator-min-microvolt = <700000>;
777                         regulator-max-microvolt = <1500000>;
778                         regulator-initial-state = <3>;
779                         regulator-state-mem {
780                                 regulator-state-enabled;
781                                 regulator-state-uv = <1000000>;
782                         };
783
784                 };
785
786                 dcdc4_reg: regulator@3 {
787                         regulator-name= "act_dcdc4";
788                         regulator-min-microvolt = <2000000>;
789                         regulator-max-microvolt = <2000000>;
790                                 regulator-initial-state = <3>;
791                         regulator-state-mem {
792                                 regulator-state-enabled;
793                                 regulator-state-uv = <2000000>;
794                         };
795                 };
796
797                 ldo1_reg: regulator@4 {
798                         regulator-name= "vccio_sd";
799                         regulator-min-microvolt = <1800000>;
800                         regulator-max-microvolt = <3300000>;
801
802                 };
803
804                 ldo2_reg: regulator@5 {
805                         regulator-name= "act_ldo2";
806                         regulator-min-microvolt = <1000000>;
807                         regulator-max-microvolt = <1000000>;
808
809                 };
810
811                 ldo3_reg: regulator@6 {
812                         regulator-name= "act_ldo3";
813                         regulator-min-microvolt = <3300000>;
814                         regulator-max-microvolt = <3300000>;
815
816                 };
817
818                 ldo4_reg:regulator@7 {
819                         regulator-name= "act_ldo4";
820                         regulator-min-microvolt = <3300000>;
821                         regulator-max-microvolt = <3300000>;
822
823                 };
824
825                 ldo5_reg: regulator@8 {
826                         regulator-name= "act_ldo5";
827                         regulator-min-microvolt = <3300000>;
828                         regulator-max-microvolt = <3300000>;
829
830                 };
831
832                 ldo6_reg: regulator@9 {
833                         regulator-name= "act_ldo6";
834                         regulator-min-microvolt = <1000000>;
835                         regulator-max-microvolt = <1000000>;
836                         regulator-initial-state = <3>;
837                         regulator-state-mem {
838                                 regulator-state-enabled;
839                         };
840
841                 };
842
843                 ldo7_reg: regulator@10 {
844                         regulator-name= "vcc_18";
845                         regulator-min-microvolt = <1800000>;
846                         regulator-max-microvolt = <1800000>;
847                         regulator-initial-state = <3>;
848                         regulator-state-mem {
849                                 regulator-state-enabled;
850                         };
851
852                 };
853
854                 ldo8_reg: regulator@11 {
855                         regulator-name= "act_ldo8";
856                         regulator-min-microvolt = <1800000>;
857                         regulator-max-microvolt = <1800000>;
858
859                 };
860         };
861 };
862
863 &ion_cma {
864        reg = <0x00000000 0x28000000>; /* 640MB */
865 };
866 /*
867 &dwc_control_usb {
868         usb_uart {
869                 status = "disabled";
870         };
871 };
872
873 &rk3288_cif_sensor{
874         status = "okay";
875 };
876 */