ARM64: dt: rk3368: add driver support for rk818
[firefly-linux-kernel-4.4.55.git] / arch / arm64 / boot / dts / rk3368-tb_8846.dts
1 /dts-v1/;
2
3 #include <dt-bindings/interrupt-controller/arm-gic.h>
4 #include <dt-bindings/rkfb/rk_fb.h>
5 #include "rk3368.dtsi"
6 #include "../../../arm/boot/dts/vtl_ts_sdk8846.dtsi"
7 //#include "../../../arm/boot/dts/lcd-b101ew05.dtsi"
8 #include "../../../arm/boot/dts/lcd-F402.dtsi"
9 #include "rk3368-cif-sensor.dtsi"
10
11 / {
12         chosen {
13                 bootargs = "earlyprintk=uart8250-32bit,0xff690000";
14         };
15
16         wireless-wlan {
17                 compatible = "wlan-platdata";
18                 rockchip,grf = <&grf>;
19
20                 /* wifi_chip_type - wifi chip define
21                  * ap6210, ap6330, ap6335
22                  * rtl8188eu, rtl8723bs, rtl8723bu
23                  * esp8089
24                 */
25                 wifi_chip_type = "ap6335";
26
27                 sdio_vref = <1800>; //1800mv or 3300mv
28
29                 //keep_wifi_power_on;
30
31                 //power_ctrl_by_pmu;
32                 power_pmu_regulator = "act_ldo3";
33                 power_pmu_enable_level = <1>; //1->HIGH, 0->LOW
34
35                 //vref_ctrl_enable;
36                 //vref_ctrl_gpio = <&gpio0 GPIO_A2 GPIO_ACTIVE_HIGH>;
37                 vref_pmu_regulator = "act_ldo3";
38                 vref_pmu_enable_level = <1>; //1->HIGH, 0->LOW
39
40                 WIFI,poweren_gpio = <&gpio3 GPIO_A4 GPIO_ACTIVE_HIGH>;
41                 WIFI,host_wake_irq = <&gpio3 GPIO_A6 GPIO_ACTIVE_HIGH>;
42                 //WIFI,reset_gpio = <&gpio0 GPIO_A2 GPIO_ACTIVE_LOW>;
43
44                 status = "okay";
45         };
46
47         wireless-bluetooth {
48                 compatible = "bluetooth-platdata";
49
50                 //wifi-bt-power-toggle;
51
52                 uart_rts_gpios = <&gpio2 GPIO_D3 GPIO_ACTIVE_LOW>;
53                 pinctrl-names = "default","rts_gpio";
54                 pinctrl-0 = <&uart0_rts>;
55                 pinctrl-1 = <&uart0_rts_gpio>;
56
57                 BT,power_gpio = <&gpio3 GPIO_A3 GPIO_ACTIVE_HIGH>;
58                 BT,reset_gpio = <&gpio3 GPIO_A5 GPIO_ACTIVE_HIGH>;
59                 BT,wake_gpio = <&gpio3 GPIO_A2 GPIO_ACTIVE_HIGH>;
60                 BT,wake_host_irq = <&gpio3 GPIO_A7 GPIO_ACTIVE_HIGH>;
61
62                 status = "okay";
63         };
64
65         hallsensor {
66                compatible = "hall_och165t";
67                type = <SENSOR_TYPE_HALL>;
68                irq-gpio = <&gpio0 GPIO_C0 IRQ_TYPE_EDGE_BOTH>;
69         };
70
71         backlight: backlight {
72                 compatible = "pwm-backlight";
73                 pwms = <&pwm0 0 25000>;
74                 brightness-levels = <255 254 253 252 251 250 249 248 247 246 245 244 243 242 241 240
75                      239 238 237 236 235 234 233 232 231 230 229 228 227 226 225 224 223 222 221 220
76                      219 218 217 216 215 214 213 212 211 210 209 208 207 206 205 204 203 202 201 200
77                      199 198 197 196 195 194 193 192 191 190 189 188 187 186 185 184 183 182 181 180
78                      179 178 177 176 175 174 173 172 171 170 169 168 167 166 165 164 163 162 161 160
79                      159 158 157 156 155 154 153 152 151 150 149 148 147 146 145 144 143 142 141 140
80                      139 138 137 136 135 134 133 132 131 130 129 128 127 126 125 124 123 122 121 120
81                      119 118 117 116 115 114 113 112 111 110 109 108 107 106 105 104 103 102 101 100
82                      99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70
83                      69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40
84                      39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
85                      9 8 7 6 5 4 3 2 1 0>;
86                 default-brightness-level = <200>;
87                 enable-gpios = <&gpio0 GPIO_C4 GPIO_ACTIVE_HIGH>;
88         };
89
90         pwm_regulator {
91                 compatible = "rockchip_pwm_regulator";
92                 pwms = <&pwm1 0 2000>;
93                 rockchip,pwm_id= <1>;
94                 rockchip,pwm_voltage_map= <925000 950000 975000 1000000 1025000 1050000 1075000 1100000 1125000 1150000 1175000 1200000 1225000 1250000 1275000 1300000 1325000 1350000 1375000 1400000>;
95                 rockchip,pwm_voltage= <1000000>;
96                 rockchip,pwm_min_voltage= <925000>;
97                 rockchip,pwm_max_voltage= <1400000>;
98                 rockchip,pwm_suspend_voltage= <950000>;
99                 rockchip,pwm_coefficient= <475>;
100                 regulators {
101                         #address-cells = <1>;
102                         #size-cells = <0>;
103                         pwm_reg0: regulator@0 {
104                                 regulator-compatible = "pwm_dcdc1";
105                                 regulator-name= "vdd_logic";
106                                 regulator-min-microvolt = <925000>;
107                                 regulator-max-microvolt = <1400000>;
108                                 regulator-always-on;
109                                 regulator-boot-on;
110                         };
111                 };
112         };
113
114         codec_hdmi_i2s: codec-hdmi-i2s {
115                 compatible = "hdmi-i2s";
116         };
117
118         codec_hdmi_spdif: codec-hdmi-spdif {
119                 compatible = "hdmi-spdif";
120         };
121
122         rockchip-hdmi-i2s {
123                 compatible = "rockchip-hdmi-i2s";
124                 dais {
125                         dai0 {
126                                 audio-codec = <&codec_hdmi_i2s>;
127                                 i2s-controller = <&i2s0>;
128                                 format = "i2s";
129                                 //continuous-clock;
130                                 //bitclock-inversion;
131                                 //frame-inversion;
132                                 //bitclock-master;
133                                 //frame-master;
134                         };
135                 };
136         };
137
138         rockchip-hdmi-spdif {
139                 compatible = "rockchip-hdmi-spdif";
140                 dais {
141                         dai0 {
142                                 audio-codec = <&codec_hdmi_spdif>;
143                                 i2s-controller = <&spdif>;
144                         };
145                 };
146         };
147
148         rockchip-rt5631 {
149                 compatible = "rockchip-rt5631";
150                 dais {
151                         dai0 {
152                                 audio-codec = <&rt5631>;
153                                 i2s-controller = <&i2s0>;
154                                 format = "i2s";
155                                 //continuous-clock;
156                                 //bitclock-inversion;
157                                 //frame-inversion;
158                                 //bitclock-master;
159                                 //frame-master;
160                         };
161                 };
162         };
163
164         rockchip-rt3224 {
165                 compatible = "rockchip-rt3261";
166                 dais {
167                         dai0 {
168                                 audio-codec = <&rt3261>;
169                                 i2s-controller = <&i2s0>;
170                                 format = "i2s";
171                                 //continuous-clock;
172                                 //bitclock-inversion;
173                                 //frame-inversion;
174                                 //bitclock-master;
175                                 //frame-master;
176                         };
177                         dai1 {
178                                 audio-codec = <&rt3261>;
179                                 i2s-controller = <&i2s0>;
180                                 format = "dsp_a";
181                                 //continuous-clock;
182                                 bitclock-inversion;
183                                 //frame-inversion;
184                                 //bitclock-master;
185                                 //frame-master;
186                         };
187                 };
188         };
189
190         io-domains {
191                 compatible = "rockchip,rk3368-io-voltage-domain";
192                 rockchip,grf = <&grf>;
193                 rockchip,pmugrf = <&pmugrf>;
194
195                 /*GRF_IO_VSEL*/
196                 dvp-supply = <&ldo7_reg>;      /*DVPIO_VDD*/
197                 flash0-supply = <&dcdc2_reg>;  /*FLASH0_VDD*/
198                 wifi-supply = <&ldo7_reg>;     /*APIO2_VDD*/
199                 audio-supply = <&dcdc2_reg>;   /*APIO3_VDD*/
200                 sdcard-supply = <&ldo1_reg>;   /*SDMMC0_VDD*/
201                 gpio30-supply = <&dcdc2_reg>;  /*APIO1_VDD*/
202                 gpio1830-supply = <&dcdc2_reg>;/*ADIO4_VDD*/
203
204                 /*PMU_GRF_IO_VSEL*/
205                 pmu-supply = <&ldo5_reg>;      /*PMUIO_VDD*/
206                 vop-supply = <&ldo5_reg>;      /*LCDC_VDD*/
207         };
208         test-power{
209                 status = "okay";
210         };
211 };
212
213
214 &gmac_clkin {
215         clock-frequency = <125000000>;
216 };
217
218 &gmac {
219 //      pmu_regulator = "act_ldo5";
220 //      power-gpio = <&gpio0 GPIO_A6 GPIO_ACTIVE_HIGH>;
221         reset-gpio = <&gpio3 GPIO_B4 GPIO_ACTIVE_LOW>;
222 //      phyirq-gpio = <&gpio0 GPIO_B1 GPIO_ACTIVE_LOW>;
223         phy-mode = "rgmii";
224         pinctrl-names = "default";
225         pinctrl-0 = <&rgmii_pins>;
226         clock_in_out = "input";
227         tx_delay = <0x30>;
228         rx_delay = <0x10>;
229         status = "disabled"; //if want to use gmac, please set "okay"
230 };
231
232 &pinctrl {
233         //used for init some gpio
234         init-gpios = <&gpio0 GPIO_A6 GPIO_ACTIVE_HIGH>;
235
236         gpio0_gpio {
237                         gpio0_c7: gpio0-c7 {
238                                 rockchip,pins = <0 GPIO_C7 RK_FUNC_GPIO &pcfg_pull_down>;
239                         };
240                         gpio0_a3: gpio0-a3 {
241                                 rockchip,pins = <0 GPIO_A3 RK_FUNC_3 &pcfg_pull_none>;
242                         };
243                         gpio0_c2: gpio0-c2 {
244                                 rockchip,pins = <0 GPIO_C2 RK_FUNC_GPIO &pcfg_pull_down>;
245                         };
246
247                         //to add
248                 };
249
250 };
251
252 &nandc0 {
253         status = "disabled"; // used nand set "disabled" ,used emmc set "okay"
254 };
255
256 &nandc0reg {
257         status = "okay"; // used nand set "disabled" ,used emmc set "okay"
258 };
259
260 &emmc {
261         clock-frequency = <100000000>;
262         clock-freq-min-max = <400000 100000000>;
263
264     supports-highspeed;
265         supports-emmc;
266     bootpart-no-access;
267
268         //supports-tSD;
269         //supports-DDR_MODE; //you should set the two value in your project. only close in RK3288-SDK board.
270         //caps2-mmc-hs200;
271
272     ignore-pm-notify;
273         keep-power-in-suspend;
274
275         //poll-hw-reset
276         status = "okay";
277 };
278
279 &sdmmc {
280                 clock-frequency = <50000000>;
281                 clock-freq-min-max = <400000 50000000>;
282                 supports-highspeed;
283                 supports-sd;
284                 broken-cd;
285                 card-detect-delay = <200>;
286
287                 ignore-pm-notify;
288                 keep-power-in-suspend;
289
290         vmmc-supply = <&ldo1_reg>;
291                 status = "okay";
292 };
293
294 &sdio {
295                 clock-frequency = <50000000>;
296                 clock-freq-min-max = <200000 50000000>;
297                 supports-highspeed;
298                 supports-sdio;
299                 ignore-pm-notify;
300                 keep-power-in-suspend;
301                 //cap-sdio-irq;
302                 status = "okay";
303 };
304
305 &spi0 {
306         status = "disabled";
307         max-freq = <48000000>;
308         /*
309         spi_test@00 {
310                 compatible = "rockchip,spi_test_bus0_cs0";
311                 reg = <0>;
312                 spi-max-frequency = <24000000>;
313                 //spi-cpha;
314                 //spi-cpol;
315                 poll_mode = <0>;
316                 type = <0>;
317                 enable_dma = <0>;
318
319         };
320
321         spi_test@01 {
322                 compatible = "rockchip,spi_test_bus0_cs1";
323                 reg = <1>;
324                 spi-max-frequency = <24000000>;
325                 spi-cpha;
326                 spi-cpol;
327                 poll_mode = <0>;
328                 type = <0>;
329                 enable_dma = <0>;
330         };
331         */
332 };
333
334 &spi1 {
335         status = "disabled";
336         max-freq = <48000000>;
337         /*
338         spi_test@10 {
339                 compatible = "rockchip,spi_test_bus1_cs0";
340                 reg = <0>;
341                 spi-max-frequency = <24000000>;
342                 //spi-cpha;
343                 //spi-cpol;
344                 poll_mode = <0>;
345                 type = <0>;
346                 enable_dma = <0>;
347         };
348         spi_test@11 {
349                 compatible = "rockchip,spi_test_bus1_cs1";
350                 reg = <1>;
351                 spi-max-frequency = <24000000>;
352                 //spi-cpha;
353                 //spi-cpol;
354                 poll_mode = <0>;
355                 type = <0>;
356                 enable_dma = <1>;
357         };
358         */
359 };
360
361 &spi2 {
362         status = "disabled";
363         max-freq = <48000000>;
364         /*
365         spi_test@20 {
366                 compatible = "rockchip,spi_test_bus2_cs0";
367                 reg = <0>;
368                 spi-max-frequency = <24000000>;
369                 //spi-cpha;
370                 //spi-cpol;
371                 poll_mode = <0>;
372                 type = <0>;
373                 enable_dma = <0>;
374         };
375         */
376 };
377
378 &uart_dbg {
379         status = "okay";
380 };
381
382 &uart_bt {
383         status = "okay";
384         dma-names = "!tx", "!rx";
385         pinctrl-0 = <&uart0_xfer &uart0_cts>;
386 };
387
388 &tsadc {
389        tsadc-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */
390        //tsadc-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */
391        status = "okay";
392 };
393
394 &i2c0 {
395         status = "okay";
396         syr827: syr827@40 {
397                 compatible = "silergy,syr82x";
398                 reg = <0x40>;
399                 status = "okay";
400                 regulators {
401                         #address-cells = <1>;
402                         #size-cells = <0>;
403                         syr827_dc1: regulator@0 {
404                         reg = <0>;
405                         regulator-compatible = "syr82x_dcdc1";
406                         regulator-name = "vdd_arm";
407                         regulator-min-microvolt = <712500>;
408                         regulator-max-microvolt = <1500000>;
409                         regulator-always-on;
410                         regulator-boot-on;
411                         regulator-initial-mode = <0x2>;
412                         regulator-initial-state = <3>;
413                         regulator-state-mem {
414                                 regulator-state-mode = <0x2>;
415                                 regulator-state-disabled;
416                                 regulator-state-uv = <900000>;
417                         };
418                 };
419            };
420         };
421         syr828: syr828@41 {
422                 compatible = "silergy,syr82x";
423                 reg = <0x41>;
424                 status = "disabled";
425                 regulators {
426                         #address-cells = <1>;
427                         #size-cells = <0>;
428                         syr828_dc1: regulator@0 {
429                         reg = <0>;
430                         regulator-compatible = "syr82x_dcdc1";
431                         regulator-name = "vdd_gpu";
432                         regulator-min-microvolt = <712500>;
433                         regulator-max-microvolt = <1500000>;
434                         regulator-always-on;
435                         regulator-boot-on;
436                         regulator-initial-mode = <0x2>;
437                         regulator-initial-state = <3>;
438                         regulator-state-mem {
439                                 regulator-state-mode = <0x2>;
440                                 regulator-state-enabled;
441                                 regulator-state-uv = <900000>;
442                         };
443                 };
444            };
445         };
446         act8846: act8846@5a {
447                 reg = <0x5a>;
448                 status = "okay";
449         };
450
451         rk818: rk818@1c {
452                 reg = <0x1c>;
453                 status = "okay";
454         };
455
456         CW2015@62 {
457                 compatible = "cw201x";
458                 reg = <0x62>;
459                 dc_det_gpio = <&gpio0 GPIO_C1 GPIO_ACTIVE_LOW>;
460                 bat_low_gpio = <&gpio0 GPIO_C2 GPIO_ACTIVE_LOW>;
461                 chg_ok_gpio = <&gpio0 GPIO_D3 GPIO_ACTIVE_HIGH>;
462                 bat_config_info = <0x15 0x42 0x60 0x59 0x52 0x58 0x4D 0x48 0x48 0x44 0x44 0x46 0x49 0x48 0x32
463                         0x24 0x20 0x17 0x13 0x0F 0x19 0x3E 0x51 0x45 0x08 0x76 0x0B 0x85 0x0E 0x1C 0x2E 0x3E 0x4D 0x52 0x52
464                         0x57 0x3D 0x1B 0x6A 0x2D 0x25 0x43 0x52 0x87 0x8F 0x91 0x94 0x52 0x82 0x8C 0x92 0x96 0xFF 0x7B 0xBB
465                         0xCB 0x2F 0x7D 0x72 0xA5 0xB5 0xC1 0x46 0xAE>;
466                 is_dc_charge = <1>;
467                 is_usb_charge = <0>;
468         };
469
470         rtc@51 {
471                 compatible = "rtc,hym8563";
472                 reg = <0x51>;
473                 irq_gpio = <&gpio0 GPIO_A1 IRQ_TYPE_EDGE_FALLING>;
474         };
475
476 };
477
478 &i2c1 {
479         status = "okay";
480
481         mpu6050:mpu@68{
482                 compatible = "mpu6050";
483                 reg = <0x68>;
484                 mpu-int_config = <0x10>;
485                 mpu-level_shifter = <0>;
486                 mpu-orientation = <0 1 0 1 0 0 0 0 1>;
487                 orientation-x= <0>;
488                 orientation-y= <1>;
489                 orientation-z= <1>;
490                 irq-gpio = <&gpio3 GPIO_B6 IRQ_TYPE_LEVEL_LOW>;
491                 mpu-debug = <0>;
492         };
493
494
495         ak8963:compass@0d{
496                 compatible = "mpu_ak8963";
497                 reg = <0x0d>;
498                 compass-bus = <0>;
499                 compass-adapt_num = <0>;
500                 compass-orientation = <1 0 0 0 1 0 0 0 1>;
501                 orientation-x= <0>;
502                 orientation-y= <0>;
503                 orientation-z= <1>;
504                 compass-debug = <1>;
505                 status = "okay";
506         };
507
508         rt3261: rt3261@1c {
509                 compatible = "rt3261";
510                 reg = <0x1c>;
511                 spk-num= <2>;
512                 modem-input-mode = <1>;
513                 lout-to-modem_mode = <1>;
514                 spk-amplify = <2>;
515         };
516 };
517
518 &i2c2 {
519         status = "okay";
520
521         rt5631: rt5631@1a {
522                 compatible = "rt5631";
523                 reg = <0x1a>;
524         };
525
526         ts@01 {
527                 compatible = "ct,vtl_ts";
528                 reg = <0x01>;
529                 screen_max_x = <1536>;
530                 screen_max_y = <2048>;
531                 xy_swap = <1>;
532                 x_reverse = <0>;
533                 y_reverse = <0>;
534                 x_mul = <2>;
535                 y_mul = <2>;
536                 bin_ver = <0>;
537                 irq_gpio_number = <&gpio0 GPIO_B4 IRQ_TYPE_LEVEL_LOW>;
538                 rst_gpio_number = <&gpio0 GPIO_B3 GPIO_ACTIVE_HIGH>;
539         };
540 };
541
542 &i2c3 {
543         status = "okay";
544 };
545
546 &i2c4 {
547         status = "okay";
548
549
550 };
551
552 &i2c5 {
553         status = "disable";
554 };
555
556 &fb {
557         rockchip,disp-mode = <NO_DUAL>;
558         rockchip,uboot-logo-on = <0>;
559 };
560
561 &rk_screen {
562          display-timings = <&disp_timings>;
563 };
564
565 /*&lvds {
566         status = "okay";
567         pinctrl-names = "lcdc", "sleep";
568         pinctrl-0 = <&lcdc_lcdc>;
569         pinctrl-1 = <&lcdc_gpio>;
570 };*/
571
572 &lcdc {
573         status = "okay";
574         backlight = <&backlight>;
575         rockchip,mirror = <NO_MIRROR>;
576         rockchip,cabc_mode = <0>;
577         rockchip,fb-win-map = <FB_DEFAULT_ORDER>;
578         power_ctr: power_ctr {
579                 rockchip,debug = <0>;
580                 lcd_en:lcd_en {
581                         rockchip,power_type = <GPIO>;
582                         gpios = <&gpio0 GPIO_C6 GPIO_ACTIVE_HIGH>;
583                         rockchip,delay = <10>;
584                 };
585
586                 lcd_cs:lcd_cs {
587                         rockchip,power_type = <GPIO>;
588                         gpios = <&gpio0 GPIO_C5 GPIO_ACTIVE_HIGH>;
589                         rockchip,delay = <10>;
590                 };
591
592                 /*lcd_rst:lcd_rst {
593                         rockchip,power_type = <GPIO>;
594                         gpios = <&gpio3 GPIO_D6 GPIO_ACTIVE_HIGH>;
595                         rockchip,delay = <5>;
596                 };*/
597         };
598 };
599
600
601 &hdmi {
602         status = "okay";
603         rockchips,hdmi_audio_source = <0>;
604 };
605
606 &adc {
607         status = "okay";
608
609         rockchip_headset {
610                 compatible = "rockchip_headset";
611                 headset_gpio = <&gpio0 GPIO_C7 GPIO_ACTIVE_LOW>;
612                 pinctrl-names = "default";
613                 pinctrl-0 = <&gpio0_c7>;//gpio0_c7
614                 io-channels = <&adc 2>;
615        /*
616                hook_gpio = ;
617                hook_down_type = ; //interrupt hook key down status
618                 */
619        };
620
621         key {
622                 compatible = "rockchip,key";
623                 io-channels = <&adc 1>;
624
625                 vol-up-key {
626                         linux,code = <115>;
627                         label = "volume up";
628                         rockchip,adc_value = <1>;
629                 };
630
631                 vol-down-key {
632                         linux,code = <114>;
633                         label = "volume down";
634                         rockchip,adc_value = <170>;
635                 };
636
637                 power-key {
638                         gpios = <&gpio0 GPIO_A2 GPIO_ACTIVE_LOW>;
639                         linux,code = <116>;
640                         label = "power";
641                         gpio-key,wakeup;
642                 };
643
644                 menu-key {
645                         linux,code = <59>;
646                         label = "menu";
647                         rockchip,adc_value = <355>;
648                 };
649
650                 home-key {
651                         linux,code = <102>;
652                         label = "home";
653                         rockchip,adc_value = <746>;
654                 };
655
656                 back-key {
657                         linux,code = <158>;
658                         label = "back";
659                         rockchip,adc_value = <560>;
660                 };
661
662                 camera-key {
663                         linux,code = <212>;
664                         label = "camera";
665                         rockchip,adc_value = <450>;
666                 };
667         };
668 };
669
670 &pwm0 {
671         status = "okay";
672 };
673
674 &clk_core_b_dvfs_table {
675         operating-points = <
676                 /* KHz    uV */
677                 216000 950000
678                 312000 950000
679                 408000 950000
680                 600000 950000
681                 696000 950000
682                 816000 975000
683                 1008000 1050000
684                 //1200000 1175000
685                 //1296000 1200000
686                 //1416000 1275000
687                 //1512000 1325000
688                 >;
689         status = "okay";
690 };
691
692 &clk_core_l_dvfs_table {
693         operating-points = <
694                 /* KHz    uV */
695                 216000 950000
696                 312000 950000
697                 408000 950000
698                 600000 950000
699                 696000 950000
700                 816000 1025000
701                 1008000 1125000
702                 //1200000 1225000
703                 >;
704         status = "okay";
705 };
706
707 &clk_gpu_dvfs_table {
708         operating-points = <
709                 /* KHz    uV */
710                 200000 1200000
711                 288000 1200000
712                 400000 1200000
713                 576000 1200000
714                 >;
715 };
716
717 &clk_ddr_dvfs_table {
718         operating-points = <
719                 /* KHz    uV */
720                 200000 1050000
721                 300000 1050000
722                 400000 1100000
723                 533000 1150000
724                 >;
725
726         freq-table = <
727                 /*status                freq(KHz)*/
728                 SYS_STATUS_NORMAL       400000
729                 SYS_STATUS_SUSPEND      200000
730                 SYS_STATUS_VIDEO_1080P  240000
731                 SYS_STATUS_VIDEO_4K     400000
732                 SYS_STATUS_PERFORMANCE  528000
733                 SYS_STATUS_DUALVIEW     400000
734                 SYS_STATUS_BOOST        324000
735                 SYS_STATUS_ISP          400000
736                 >;
737         auto-freq-table = <
738                 240000
739                 324000
740                 396000
741                 528000
742                 >;
743         auto-freq=<0>;
744         status="disabled";
745 };
746
747 &dwc_control_usb {
748                 host_drv_gpio = <&gpio0 GPIO_A4 GPIO_ACTIVE_LOW>;
749                 otg_drv_gpio = <&gpio0 GPIO_D1 GPIO_ACTIVE_LOW>;
750
751                 rockchip,remote_wakeup;
752                 rockchip,usb_irq_wakeup;
753         };
754
755 /include/ "../../../arm/boot/dts/act8846.dtsi"
756 &act8846 {
757         gpios =<&gpio0 GPIO_B0 GPIO_ACTIVE_LOW>,<&gpio0 GPIO_A3 GPIO_ACTIVE_HIGH>;
758         act8846,system-power-controller;
759
760         regulators {
761
762                 dcdc1_reg: regulator@0{
763                         regulator-name= "act_dcdc1";
764                         regulator-min-microvolt = <1200000>;
765                         regulator-max-microvolt = <1200000>;
766                         regulator-always-on;
767                         regulator-boot-on;
768                 };
769
770                 dcdc2_reg: regulator@1 {
771                         regulator-name= "vccio";
772                         regulator-min-microvolt = <3300000>;
773                         regulator-max-microvolt = <3300000>;
774                         regulator-initial-state = <3>;
775                         regulator-state-mem {
776                                 regulator-state-enabled;
777                                 regulator-state-uv = <3300000>;
778                         };
779                 };
780
781                 dcdc3_reg: regulator@2 {
782                         regulator-name= "vdd_logic";
783                         regulator-min-microvolt = <700000>;
784                         regulator-max-microvolt = <1500000>;
785                         regulator-initial-state = <3>;
786                         regulator-state-mem {
787                                 regulator-state-enabled;
788                                 regulator-state-uv = <1000000>;
789                         };
790
791                 };
792
793                 dcdc4_reg: regulator@3 {
794                         regulator-name= "act_dcdc4";
795                         regulator-min-microvolt = <2000000>;
796                         regulator-max-microvolt = <2000000>;
797                                 regulator-initial-state = <3>;
798                         regulator-state-mem {
799                                 regulator-state-enabled;
800                                 regulator-state-uv = <2000000>;
801                         };
802                 };
803
804                 ldo1_reg: regulator@4 {
805                         regulator-name= "vccio_sd";
806                         regulator-min-microvolt = <1800000>;
807                         regulator-max-microvolt = <3300000>;
808
809                 };
810
811                 ldo2_reg: regulator@5 {
812                         regulator-name= "act_ldo2";
813                         regulator-min-microvolt = <1000000>;
814                         regulator-max-microvolt = <1000000>;
815
816                 };
817
818                 ldo3_reg: regulator@6 {
819                         regulator-name= "act_ldo3";
820                         regulator-min-microvolt = <3300000>;
821                         regulator-max-microvolt = <3300000>;
822
823                 };
824
825                 ldo4_reg:regulator@7 {
826                         regulator-name= "act_ldo4";
827                         regulator-min-microvolt = <3300000>;
828                         regulator-max-microvolt = <3300000>;
829
830                 };
831
832                 ldo5_reg: regulator@8 {
833                         regulator-name= "act_ldo5";
834                         regulator-min-microvolt = <3300000>;
835                         regulator-max-microvolt = <3300000>;
836
837                 };
838
839                 ldo6_reg: regulator@9 {
840                         regulator-name= "act_ldo6";
841                         regulator-min-microvolt = <1000000>;
842                         regulator-max-microvolt = <1000000>;
843                         regulator-initial-state = <3>;
844                         regulator-state-mem {
845                                 regulator-state-enabled;
846                         };
847
848                 };
849
850                 ldo7_reg: regulator@10 {
851                         regulator-name= "vcc_18";
852                         regulator-min-microvolt = <1800000>;
853                         regulator-max-microvolt = <1800000>;
854                         regulator-initial-state = <3>;
855                         regulator-state-mem {
856                                 regulator-state-enabled;
857                         };
858
859                 };
860
861                 ldo8_reg: regulator@11 {
862                         regulator-name= "act_ldo8";
863                         regulator-min-microvolt = <1800000>;
864                         regulator-max-microvolt = <1800000>;
865
866                 };
867         };
868 };
869
870 /include/ "../../../arm/boot/dts/rk818.dtsi"
871 &rk818 {
872         gpios =<&gpio0 GPIO_A1 GPIO_ACTIVE_HIGH>,<&gpio0 GPIO_A0 GPIO_ACTIVE_LOW>;
873         rk818,system-power-controller;
874
875 rk818,support_dc_chg = <1>;/*1:dc chg; 0:usb chg*/
876         regulators {
877
878                 rk818_dcdc1_reg: regulator@0{
879                         regulator-name= "vdd_logic";/*vcc arm*/
880                         regulator-min-microvolt = <700000>;/*<725000>;*/
881                         regulator-max-microvolt = <1500000>;
882                         regulator-initial-mode = <0x2>;
883                         regulator-initial-state = <3>;
884                         regulator-state-mem {
885                                 regulator-state-mode = <0x2>;
886                                 regulator-state-enabled;
887                                 regulator-state-uv =<1100000>;
888                         };
889                 };
890
891                 rk818_dcdc2_reg: regulator@1 {
892                         regulator-name= "rk818_dcdc2";/*vcc gpu*/
893                         regulator-min-microvolt = <700000>;
894                         regulator-max-microvolt = <1200000>;
895                         regulator-initial-mode = <0x2>;
896                         regulator-initial-state = <3>;
897                         regulator-state-mem {
898                                 regulator-state-mode = <0x2>;
899                                 regulator-state-enabled;
900                                 regulator-state-uv = <1200000>;
901                         };
902                 };
903
904                 rk818_dcdc3_reg: regulator@2 {
905                         regulator-name= "rk818_dcdc3";
906                         regulator-min-microvolt = <1200000>;
907                         regulator-max-microvolt = <1200000>;
908                         regulator-initial-mode = <0x2>;
909                         regulator-initial-state = <3>;
910                         regulator-state-mem {
911                                 regulator-state-mode = <0x2>;
912                                 regulator-state-enabled;
913                                 regulator-state-uv = <1200000>;
914                         };
915                 };
916
917                 rk818_dcdc4_reg: regulator@3 {
918                         regulator-name= "vccio";
919                         regulator-min-microvolt = <3000000>;
920                         regulator-max-microvolt = <3000000>;
921                         regulator-initial-mode = <0x2>;
922                         regulator-initial-state = <3>;
923                         regulator-state-mem {
924                                 regulator-state-mode = <0x2>;
925                                 regulator-state-enabled;
926                                 regulator-state-uv = <3000000>;
927                         };
928                 };
929
930                 rk818_ldo1_reg: regulator@4 {
931                         regulator-name= "rk818_ldo1";
932                         regulator-min-microvolt = <3300000>;
933                         regulator-max-microvolt = <3300000>;
934                         regulator-initial-state = <3>;
935                         regulator-state-mem {
936                                 regulator-state-enabled;
937                                 regulator-state-uv = <3300000>;
938                         };
939                 };
940
941                 rk818_ldo2_reg: regulator@5 {
942                         regulator-name= "rk818_ldo2";
943                         regulator-min-microvolt = <3000000>;
944                         regulator-max-microvolt = <3000000>;
945                         regulator-initial-state = <3>;
946                         regulator-state-mem {
947                                 regulator-state-enabled;
948                                 regulator-state-uv = <3000000>;
949                         };
950                 };
951
952                 rk818_ldo3_reg: regulator@6 {
953                         regulator-name= "rk818_ldo3";
954                         regulator-min-microvolt = <1000000>;
955                         regulator-max-microvolt = <1000000>;
956                         regulator-initial-state = <3>;
957                         regulator-state-mem {
958                                 regulator-state-enabled;
959                                 regulator-state-uv = <1000000>;
960                         };
961                 };
962
963                 rk818_ldo4_reg:regulator@7 {
964                         regulator-name= "rk818_ldo4";
965                         regulator-min-microvolt = <1800000>;
966                         regulator-max-microvolt = <1800000>;
967                         regulator-initial-state = <3>;
968                         regulator-state-mem {
969                                 regulator-state-disabled;
970                                 regulator-state-uv = <1800000>;
971                         };
972                 };
973
974                 rk818_ldo5_reg: regulator@8 {
975                         regulator-name= "rk818_ldo5";
976                         regulator-min-microvolt = <1800000>;
977                         regulator-max-microvolt = <1800000>;
978                         regulator-initial-state = <3>;
979                         regulator-state-mem {
980                                 regulator-state-enabled;
981                                 regulator-state-uv = <1800000>;
982                         };
983                 };
984
985                 rk818_ldo6_reg: regulator@9 {
986                         regulator-name= "rk818_ldo6";
987                         regulator-min-microvolt = <1000000>;
988                         regulator-max-microvolt = <1000000>;
989                         regulator-initial-state = <3>;
990                         regulator-state-mem {
991                                 regulator-state-disabled;
992                                 regulator-state-uv = <1000000>;
993                         };
994                 };
995
996                 rk818_ldo7_reg: regulator@10 {
997                         regulator-name= "rk818_ldo7";
998                         regulator-min-microvolt = <1800000>;
999                         regulator-max-microvolt = <1800000>;
1000                         regulator-initial-state = <3>;
1001                         regulator-state-mem {
1002                                 regulator-state-enabled;
1003                                 regulator-state-uv = <1800000>;
1004                         };
1005                 };
1006
1007                 rk818_ldo8_reg: regulator@11 {
1008                         regulator-name= "rk818_ldo8";
1009                         regulator-min-microvolt = <1800000>;
1010                         regulator-max-microvolt = <1800000>;
1011                         regulator-initial-state = <3>;
1012                         regulator-state-mem {
1013                                 regulator-state-enabled;
1014                                 regulator-state-uv = <1800000>;
1015                         };
1016                 };
1017
1018                 rk818_ldo9_reg: regulator@12 {
1019                         regulator-name= "vccio_sd";
1020                         regulator-min-microvolt = <1800000>;
1021                         regulator-max-microvolt = <3300000>;
1022                         regulator-initial-state = <3>;
1023                         regulator-state-mem {
1024                                 regulator-state-enabled;
1025                                 regulator-state-uv = <3300000>;
1026                         };
1027                 };
1028
1029                 rk818_ldo10_reg: regulator@13 {
1030                         regulator-name= "rk818_ldo10";
1031                         regulator-state-mem {
1032                                 regulator-state-disabled;
1033                         };
1034                 };
1035         };
1036
1037        battery {
1038                 ocv_table = <3350 3677 3693 3719 3752
1039                              3770 3775 3778 3785 3796
1040                              3812 3839 3881 3907 3933
1041                              3958 3978 4033 4087 4123
1042                              4174 >;
1043                 design_capacity = <2100>;
1044                 design_qmax = <2200>;
1045                 max_overcharge = <100>;
1046                 max_charge_currentma = <1500>;
1047                 max_charge_voltagemv = <4260>;
1048                 max_bat_voltagemv = <4200>;
1049         };
1050 };
1051
1052
1053 &ion_cma {
1054        reg = <0x00000000 0x28000000>; /* 640MB */
1055 };
1056
1057 &rk3368_cif_sensor{
1058         status = "okay";
1059 };
1060
1061 /*
1062 &dwc_control_usb {
1063         usb_uart {
1064                 status = "disabled";
1065         };
1066 };
1067 */