rk: iommu: enable iommu by default on rk33xx platform
[firefly-linux-kernel-4.4.55.git] / arch / arm64 / boot / dts / rk3368-p9_818.dts
1 /dts-v1/;
2
3 #include <dt-bindings/interrupt-controller/arm-gic.h>
4 #include <dt-bindings/rkfb/rk_fb.h>
5 #include "rk3368.dtsi"
6 #include "../../../arm/boot/dts/lcd-ld089wu1-mipi.dtsi"
7 / {
8         chosen {
9                 bootargs = "earlyprintk=uart8250-32bit,0xff690000";
10         };
11
12         wireless-wlan {
13                 compatible = "wlan-platdata";
14
15                 rockchip,grf = <&grf>;
16
17                 /* wifi_chip_type - wifi chip define
18                  * ap6210, ap6330, ap6335
19                  * rtl8188eu, rtl8723bs, rtl8723bu
20                  * esp8089
21                 */
22                 wifi_chip_type = "ap6210";              
23
24                 sdio_vref = <1800>; //1800mv or 3300mv
25                 power_pmu_regulator = "rk818_ldo8_reg";
26                 power_pmu_enable_level = <1>; //1->HIGH, 0->LOW
27                 vref_pmu_regulator = "rk818_ldo8_reg";
28                 vref_pmu_enable_level = <1>; //1->HIGH, 0->LOW
29
30                 WIFI,poweren_gpio = <&gpio3 GPIO_A4 GPIO_ACTIVE_HIGH>;
31                 WIFI,host_wake_irq = <&gpio3 GPIO_A6 GPIO_ACTIVE_HIGH>;
32
33                 status = "okay";
34         };
35
36         wireless-bluetooth {
37                 compatible = "bluetooth-platdata";
38                 uart_rts_gpios = <&gpio2 GPIO_D3 GPIO_ACTIVE_LOW>;
39                 pinctrl-names = "default","rts_gpio";
40                 pinctrl-0 = <&uart0_rts>;
41                 pinctrl-1 = <&uart0_rts_gpio>;
42
43                 BT,power_gpio = <&gpio3 GPIO_A3 GPIO_ACTIVE_HIGH>;
44                 BT,reset_gpio = <&gpio3 GPIO_A5 GPIO_ACTIVE_HIGH>;
45                 BT,wake_gpio = <&gpio3 GPIO_A2 GPIO_ACTIVE_HIGH>;
46                 BT,wake_host_irq = <&gpio3 GPIO_A7 GPIO_ACTIVE_HIGH>;
47
48                 status = "okay";
49         };
50
51         hallsensor {
52                compatible = "hall_och165t";
53                type = <SENSOR_TYPE_HALL>;
54                irq-gpio = <&gpio0 GPIO_C0 IRQ_TYPE_EDGE_BOTH>;
55         };
56
57         backlight: backlight {
58                 compatible = "pwm-backlight";
59                 pwms = <&pwm0 0 25000>;
60                 brightness-levels = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
61                 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41
62                 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64
63                 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87
64                 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109
65                 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128
66                 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147
67                 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166
68                 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185
69                 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204
70                 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223
71                 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242
72                 243 244 245 246 247 248 249 250 251 252 253 254 255>;
73                 default-brightness-level = <128>;
74                 enable-gpios = <&gpio0 GPIO_C4 GPIO_ACTIVE_HIGH>;
75         };
76
77         pwm_regulator {
78                 compatible = "rockchip_pwm_regulator";
79                 pwms = <&pwm1 0 2000>;
80                 rockchip,pwm_id= <1>;
81                 rockchip,pwm_voltage_map= <925000 950000 975000 1000000 1025000 1050000 1075000 1100000 1125000 1150000 1175000 1200000 1225000 1250000 1275000 1300000 1325000 1350000 1375000 1400000>;
82                 rockchip,pwm_voltage= <1000000>;
83                 rockchip,pwm_min_voltage= <925000>;
84                 rockchip,pwm_max_voltage= <1400000>;
85                 rockchip,pwm_suspend_voltage= <950000>;
86                 rockchip,pwm_coefficient= <475>;
87                 regulators {
88                         #address-cells = <1>;
89                         #size-cells = <0>;
90                         pwm_reg0: regulator@0 {
91                                 regulator-compatible = "pwm_dcdc1";
92                                 regulator-name= "vdd_logic";
93                                 regulator-min-microvolt = <925000>;
94                                 regulator-max-microvolt = <1400000>;
95                                 regulator-always-on;
96                                 regulator-boot-on;
97                         };
98                 };
99         };
100
101         codec_hdmi_i2s: codec-hdmi-i2s {
102                 compatible = "hdmi-i2s";
103         };
104
105         codec_hdmi_spdif: codec-hdmi-spdif {
106                 compatible = "hdmi-spdif";
107         };
108
109         rockchip-hdmi-i2s {
110                 compatible = "rockchip-hdmi-i2s";
111                 dais {
112                         dai0 {
113                                 audio-codec = <&codec_hdmi_i2s>;
114                                 i2s-controller = <&i2s0>;
115                                 format = "i2s";
116                         };
117                 };
118         };
119
120         rockchip-hdmi-spdif {
121                 compatible = "rockchip-hdmi-spdif";
122                 dais {
123                         dai0 {
124                                 audio-codec = <&codec_hdmi_spdif>;
125                                 i2s-controller = <&spdif>;
126                         };
127                 };
128         };
129
130         rockchip-es8316 {
131                 compatible = "rockchip-es8316";
132                 dais {
133                         dai0 {
134                                 audio-codec = <&es8316>;
135                                 i2s-controller = <&i2s0>;
136                                 format = "i2s";
137                         };
138                 };
139         };
140
141         io-domains {
142                 compatible = "rockchip,rk3368-io-voltage-domain";
143                 rockchip,grf = <&grf>;
144                 rockchip,pmugrf = <&pmugrf>;
145
146                 /*GRF_IO_VSEL*/
147                 gpio30-supply = <&rk818_dcdc4_reg>;     /*APIO1_VDD*/
148                 wifi-supply = <&rk818_ldo8_reg>;     /*APIO2_VDD*/
149                 audio-supply = <&rk818_dcdc4_reg>;   /*APIO3_VDD*/
150                 gpio1830-supply = <&rk818_dcdc4_reg>;   /*ADIO4_VDD*/
151                 sdcard-supply = <&rk818_ldo9_reg>;   /*SDMMC_VDD*/
152
153                 /*PMU_GRF_IO_VSEL*/
154                 pmu-supply = <&rk818_ldo5_reg>;      /*PMUIO_VDD*/
155                 vop-supply = <&rk818_ldo5_reg>;      /*LCDC_VDD*/
156         };
157 };
158
159 &tsadc {
160        tsadc-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */
161        //tsadc-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */
162        status = "okay";
163 };
164
165 &pinctrl {
166         //used for init some gpio
167         init-gpios = <&gpio0 GPIO_A6 GPIO_ACTIVE_HIGH>;
168
169         gpio0_gpio {
170                         gpio0_c7: gpio0-c7 {
171                                 rockchip,pins = <0 GPIO_C7 RK_FUNC_GPIO &pcfg_pull_down>;
172                         };
173                         gpio0_a3: gpio0-a3 {
174                                 rockchip,pins = <0 GPIO_A3 RK_FUNC_3 &pcfg_pull_none>;
175                         };
176                         gpio0_c2: gpio0-c2 {
177                                 rockchip,pins = <0 GPIO_C2 RK_FUNC_GPIO &pcfg_pull_down>;
178                         };
179                         gpio0_c3: gpio0-c3{
180                                 rockchip,pins = <0 GPIO_C3 RK_FUNC_GPIO &pcfg_pull_down>;
181                         };
182                         //to add
183                 };
184
185 };
186
187 &nandc0 {
188         status = "disabled"; // used nand set "disabled" ,used emmc set "okay"
189 };
190
191 &nandc0reg {
192         status = "okay"; // used nand set "disabled" ,used emmc set "okay"
193 };
194
195 &emmc {
196         clock-frequency = <150000000>;
197         clock-freq-min-max = <400000 150000000>;
198
199         supports-highspeed;
200         supports-emmc;
201         bootpart-no-access;
202
203         //supports-tSD;
204         supports-DDR_MODE; //you should set the two value in your project. only close in RK3288-SDK board.
205         caps2-mmc-hs200;
206
207         ignore-pm-notify;
208         keep-power-in-suspend;
209
210         //poll-hw-reset
211         status = "okay";
212 };
213
214 &sdmmc {
215         clock-frequency = <50000000>;
216         clock-freq-min-max = <400000 50000000>;
217         supports-highspeed;
218         supports-sd;
219         broken-cd;
220         card-detect-delay = <200>;
221
222         ignore-pm-notify;
223         keep-power-in-suspend;
224
225         vmmc-supply = <&rk818_ldo1_reg>;
226                 status = "okay";
227 };
228
229 &sdio {
230         clock-frequency = <50000000>;
231         clock-freq-min-max = <200000 50000000>;
232         supports-highspeed;
233         supports-sdio;
234         ignore-pm-notify;
235         keep-power-in-suspend;
236         //cap-sdio-irq;
237         status = "okay";
238 };
239
240 &dsihost0{
241         status = "okay";
242 };
243
244 &spi0 {
245         status = "disabled";
246 };
247
248 &spi1 {
249         status = "disabled";
250 };
251
252 &spi2 {
253         status = "disabled";
254 };
255
256 &gmac {
257         status = "disabled";
258 };
259
260 &uart_dbg {
261         status = "okay";
262 };
263
264 &uart_bt {
265         status = "okay";
266         dma-names = "!tx", "!rx";
267         pinctrl-0 = <&uart0_xfer &uart0_cts>;
268 };
269
270 &i2c0 {
271         status = "okay";
272         syr827: syr827@40 {
273                 compatible = "silergy,syr82x";
274                 reg = <0x40>;
275                 status = "okay";
276                 regulators {
277                         #address-cells = <1>;
278                         #size-cells = <0>;
279                         syr827_dc1: regulator@0 {
280                         reg = <0>;
281                         regulator-compatible = "syr82x_dcdc1";
282                         regulator-name = "vdd_arm";
283                         regulator-min-microvolt = <712500>;
284                         regulator-max-microvolt = <1500000>;
285                         regulator-always-on;
286                         regulator-boot-on;
287                         regulator-initial-mode = <0x2>;
288                         regulator-initial-state = <3>;
289                         regulator-state-mem {
290                                 regulator-state-mode = <0x2>;
291                                 regulator-state-disabled;
292                                 regulator-state-uv = <900000>;
293                         };
294                 };
295            };
296         };
297         syr828: syr828@41 {
298                 compatible = "silergy,syr82x";
299                 reg = <0x41>;
300                 status = "okay";
301                 regulators {
302                         #address-cells = <1>;
303                         #size-cells = <0>;
304                         syr828_dc1: regulator@0 {
305                         reg = <0>;
306                         regulator-compatible = "syr82x_dcdc1";
307                         regulator-name = "vdd_gpu";
308                         regulator-min-microvolt = <712500>;
309                         regulator-max-microvolt = <1500000>;
310                         regulator-always-on;
311                         regulator-boot-on;
312                         regulator-initial-mode = <0x2>;
313                         regulator-initial-state = <3>;
314                         regulator-state-mem {
315                                 regulator-state-mode = <0x2>;
316                                 regulator-state-enabled;
317                                 regulator-state-uv = <900000>;
318                         };
319                 };
320            };
321         };
322
323         rk818: rk818@1c {
324                 reg = <0x1c>;
325                 status = "okay";
326                 compatible = "rockchip,rk818";
327                 battery {
328                         ocv_table = <3400 3650 3693 3707 3731 3749 3760
329                                      3770 3782 3796 3812 3829 3852 3882
330                                      3915 3951 3981 4047 4086 4132 4182>;
331                         design_capacity = <8650>;
332                         design_qmax = <8800>;
333                         max_overcharge = <100>;
334                         bat_res = <85>;
335                         max_charge_ilimitmA  = <2000>;
336                         max_charge_currentmA = <1800>;
337                         max_charge_voltagemV = <4200>;
338                         max_bat_voltagemV = <4200>;
339                         sleep_enter_current = <150>;
340                         sleep_exit_current = <180>;
341                         support_uboot_chrg = <0>;
342                 };
343         };
344 };
345
346 &i2c1 {
347         status = "okay";
348         es8316: es8316@10 {
349                 compatible = "es8316";
350                 reg = <0x10>;
351                 spk-con-gpio = <&gpio0 GPIO_C3 GPIO_ACTIVE_HIGH>;
352                 hp-det-gpio = <&gpio0 GPIO_C7 GPIO_ACTIVE_HIGH>;
353                 status = "okay";
354         };
355 };
356
357 &i2c2 {
358         status = "okay";
359         touchscreen@14 {
360                 compatible = "goodix,gt9xx";
361                 reg = <0x14>;
362                 touch-gpio = <&gpio0 GPIO_B4 IRQ_TYPE_LEVEL_LOW>;
363                 reset-gpio = <&gpio0 GPIO_B3 GPIO_ACTIVE_HIGH>;  
364                 max-x = <1920>;                  
365                 max-y = <1200>;
366                 tp-size = <89>;
367         };
368 };
369
370 &i2c3 {
371         status = "okay";
372 };
373
374 &i2c4 {
375         status = "okay";
376         mpu6500_acc:mpu_acc@68{
377                 compatible = "mpu6500_acc";
378                 reg = <0x68>;
379                 irq_enable = <0>;
380                 poll_delay_ms = <30>;
381                 type = <SENSOR_TYPE_ACCEL>;
382                 layout = <7>;
383         };
384 };
385
386 &i2c5 {
387         status = "disabled";
388 };
389
390 &fb {
391         status = "okay";
392         rockchip,disp-mode = <NO_DUAL>;
393         rockchip,uboot-logo-on = <0>;
394 };
395
396 &rk_screen {
397         status = "okay";
398         display-timings = <&disp_timings>;
399 };
400
401 &lcdc {
402         status = "okay";
403         backlight = <&backlight>;
404         rockchip,mirror = <NO_MIRROR>;
405         rockchip,cabc_mode = <0>;
406         rockchip,fb-win-map = <FB_DEFAULT_ORDER>;
407         power_ctr: power_ctr {
408                 rockchip,debug = <0>;
409                 lcd_en:lcd_en {
410                         rockchip,power_type = <GPIO>;
411                         gpios = <&gpio0 GPIO_C6 GPIO_ACTIVE_HIGH>;
412                         rockchip,delay = <120>;
413                 };
414
415                 lcd_cs:lcd_cs {
416                         rockchip,power_type = <GPIO>;
417                         gpios = <&gpio0 GPIO_C5 GPIO_ACTIVE_HIGH>;
418                         rockchip,delay = <10>;
419                 };
420
421                 /*lcd_rst:lcd_rst {
422                         rockchip,power_type = <GPIO>;
423                         gpios = <&gpio3 GPIO_D6 GPIO_ACTIVE_HIGH>;
424                         rockchip,delay = <5>;
425                 };*/
426         };
427 };
428
429
430 &hdmi {
431         status = "okay";
432         rockchips,hdmi_audio_source = <0>;
433 };
434
435 &adc {
436         status = "okay";
437
438         rockchip_headset {
439                 compatible = "rockchip_headset";
440                 headset_gpio = <&gpio0 GPIO_C7 GPIO_ACTIVE_LOW>;
441                 pinctrl-names = "default";
442                 pinctrl-0 = <&gpio0_c7>;//gpio0_c7
443                 io-channels = <&adc 2>;
444        /*
445                hook_gpio = ;
446                hook_down_type = ; //interrupt hook key down status
447                 */
448        };
449
450         key {
451                 compatible = "rockchip,key";
452                 io-channels = <&adc 1>;
453
454                 vol-up-key {
455                         linux,code = <115>;
456                         label = "volume up";
457                         rockchip,adc_value = <1>;
458                 };
459
460                 vol-down-key {
461                         linux,code = <114>;
462                         label = "volume down";
463                         rockchip,adc_value = <170>;
464                 };
465
466                 power-key {
467                         gpios = <&gpio0 GPIO_A2 GPIO_ACTIVE_LOW>;
468                         linux,code = <116>;
469                         label = "power";
470                         gpio-key,wakeup;
471                 };
472         };
473 };
474
475 &pwm0 {
476         status = "okay";
477 };
478
479 &pwm1 {
480         status = "disabled";
481 };
482
483 &clk_core_b_dvfs_table {
484         operating-points = <
485                 /* KHz    uV */
486                 216000 1000000
487                 312000 1000000
488                 408000 1000000
489                 600000 1000000
490                 696000 1000000
491                 816000 1025000
492                 1008000 1100000
493                 //1200000 1175000
494                 //1296000 1200000
495                 //1416000 1275000
496                 //1512000 1325000
497                 >;
498         status = "okay";
499 };
500
501 &clk_core_l_dvfs_table {
502         operating-points = <
503                 /* KHz    uV */
504                 216000 1000000
505                 312000 1000000
506                 408000 1000000
507                 600000 1000000
508                 696000 1000000
509                 816000 1075000
510                 1008000 1175000
511                 //1200000 1225000
512                 >;
513         status = "okay";
514 };
515
516 &clk_gpu_dvfs_table {
517         operating-points = <
518                 /* KHz    uV */
519                 200000 1100000
520                 288000 1100000
521                 400000 1150000
522                 576000 1200000
523                 >;
524 };
525
526 &clk_ddr_dvfs_table {
527         operating-points = <
528                 /* KHz    uV */
529                 200000 1100000
530                 300000 1100000
531                 400000 1100000
532                 533000 1150000
533                 600000 1200000
534                 >;
535
536         freq-table = <
537                 /*status                freq(KHz)*/
538                 SYS_STATUS_NORMAL       600000
539                 SYS_STATUS_SUSPEND      200000
540                 SYS_STATUS_VIDEO_1080P  400000
541                 SYS_STATUS_VIDEO_4K     533000
542                 SYS_STATUS_PERFORMANCE  600000
543                 SYS_STATUS_DUALVIEW     600000
544                 SYS_STATUS_BOOST        400000
545                 SYS_STATUS_ISP          533000
546                 >;
547         auto-freq-table = <
548                 240000
549                 324000
550                 396000
551                 528000
552                 >;
553         auto-freq=<0>;
554         status="okay";
555 };
556
557 &dwc_control_usb {
558         host_drv_gpio = <&gpio0 GPIO_A4 GPIO_ACTIVE_LOW>;
559         otg_drv_gpio = <&gpio0 GPIO_D1 GPIO_ACTIVE_LOW>;
560         rockchip,remote_wakeup;
561         rockchip,usb_irq_wakeup;
562 };
563
564 /include/ "../../../arm/boot/dts/rk818.dtsi"
565 &rk818 {
566         gpios =<&gpio0 GPIO_A1 GPIO_ACTIVE_HIGH>,<&gpio0 GPIO_A0 GPIO_ACTIVE_LOW>;
567         rk818,system-power-controller;
568         
569         regulators {
570
571                 rk818_dcdc1_reg: regulator@0{
572                         regulator-name= "vdd_arm";/*vcc arm*/
573                         regulator-min-microvolt = <700000>;/*<725000>;*/
574                         regulator-max-microvolt = <1500000>;
575                         regulator-initial-mode = <0x2>;
576                         regulator-initial-state = <3>;
577                         regulator-state-mem {
578                                 regulator-state-mode = <0x2>;
579                                 regulator-state-disabled;
580                                 regulator-state-uv =<900000>;
581                         };
582                 };
583
584                 rk818_dcdc2_reg: regulator@1 {
585                         regulator-name= "vdd_logic";/*vcc gpu*/
586                         regulator-min-microvolt = <700000>;
587                         regulator-max-microvolt = <1200000>;
588                         regulator-initial-mode = <0x2>;
589                         regulator-initial-state = <3>;
590                         regulator-state-mem {
591                                 regulator-state-mode = <0x2>;
592                                 regulator-state-enabled;
593                                 regulator-state-uv = <1200000>;
594                         };
595                 };
596
597                 rk818_dcdc3_reg: regulator@2 {
598                         regulator-name= "vcc_ddr";
599                         regulator-min-microvolt = <1200000>;
600                         regulator-max-microvolt = <1200000>;
601                         regulator-initial-mode = <0x2>;
602                         regulator-initial-state = <3>;
603                         regulator-state-mem {
604                                 regulator-state-mode = <0x2>;
605                                 regulator-state-enabled;
606                                 regulator-state-uv = <1200000>;
607                         };
608                 };
609
610                 rk818_dcdc4_reg: regulator@3 {
611                         regulator-name= "vccio";
612                         regulator-min-microvolt = <3300000>;
613                         regulator-max-microvolt = <3300000>;
614                         regulator-initial-mode = <0x2>;
615                         regulator-initial-state = <3>;
616                         regulator-state-mem {
617                                 regulator-state-mode = <0x2>;
618                                 regulator-state-enabled;
619                                 regulator-state-uv = <3000000>;
620                         };
621                 };
622
623                 rk818_ldo1_reg: regulator@4 {
624                         regulator-name= "vcc_codec";
625                         regulator-min-microvolt = <3300000>;
626                         regulator-max-microvolt = <3300000>;
627                         regulator-initial-state = <3>;
628                         regulator-state-mem {
629                                 regulator-state-enabled;
630                                 regulator-state-uv = <3300000>;
631                         };
632                 };
633
634                 rk818_ldo2_reg: regulator@5 {
635                         regulator-name= "vcc_tp";
636                         regulator-min-microvolt = <3300000>;
637                         regulator-max-microvolt = <3300000>;
638                         regulator-initial-state = <3>;
639                         regulator-state-mem {
640                                 regulator-state-enabled;
641                                 regulator-state-uv = <3300000>;
642                         };
643                 };
644
645                 rk818_ldo3_reg: regulator@6 {
646                         regulator-name= "vdd_10";
647                         regulator-min-microvolt = <1000000>;
648                         regulator-max-microvolt = <1000000>;
649                         regulator-initial-state = <3>;
650                         regulator-state-mem {
651                                 regulator-state-enabled;
652                                 regulator-state-uv = <1000000>;
653                         };
654                 };
655
656                 rk818_ldo4_reg:regulator@7 {
657                         regulator-name= "vcc18_lcd";
658                         regulator-min-microvolt = <1800000>;
659                         regulator-max-microvolt = <1800000>;
660                         regulator-initial-state = <3>;
661                         regulator-state-mem {
662                                 regulator-state-disabled;
663                                 regulator-state-uv = <1800000>;
664                         };
665                 };
666
667                 rk818_ldo5_reg: regulator@8 {
668                         regulator-name= "vccio_pmu";
669                         regulator-min-microvolt = <1800000>;
670                         regulator-max-microvolt = <1800000>;
671                         regulator-initial-state = <3>;
672                         regulator-state-mem {
673                                 regulator-state-enabled;
674                                 regulator-state-uv = <1800000>;
675                         };
676                 };
677
678                 rk818_ldo6_reg: regulator@9 {
679                         regulator-name= "vdd10_lcd";
680                         regulator-min-microvolt = <1000000>;
681                         regulator-max-microvolt = <1000000>;
682                         regulator-initial-state = <3>;
683                         regulator-state-mem {
684                                 regulator-state-disabled;
685                                 regulator-state-uv = <1000000>;
686                         };
687                 };
688
689                 rk818_ldo7_reg: regulator@10 {
690                         regulator-name= "vcc_18";
691                         regulator-min-microvolt = <1800000>;
692                         regulator-max-microvolt = <1800000>;
693                         regulator-initial-state = <3>;
694                         regulator-state-mem {
695                                 regulator-state-enabled;
696                                 regulator-state-uv = <1800000>;
697                         };
698                 };
699
700                 rk818_ldo8_reg: regulator@11 {
701                         regulator-name= "vccio_wl";
702                         regulator-min-microvolt = <1800000>;
703                         regulator-max-microvolt = <1800000>;
704                         regulator-initial-state = <3>;
705                         regulator-state-mem {
706                                 regulator-state-enabled;
707                                 regulator-state-uv = <1800000>;
708                         };
709                 };
710
711                 rk818_ldo9_reg: regulator@12 {
712                         regulator-name= "vcc_sd";
713                         regulator-min-microvolt = <1800000>;
714                         regulator-max-microvolt = <3300000>;
715                         regulator-initial-state = <3>;
716                         regulator-state-mem {
717                                 regulator-state-enabled;
718                                 regulator-state-uv = <3300000>;
719                         };
720                 };
721
722                 rk818_ldo10_reg: regulator@13 {
723                         regulator-name= "rk818_ldo10";
724                         regulator-state-mem {
725                                 regulator-state-disabled;
726                         };
727                 };
728         };
729 };
730
731 &ion_cma {
732        reg = <0x00000000 0x00000000>; /* 0MB */
733 };
734