3 #include <dt-bindings/interrupt-controller/arm-gic.h>
4 #include <dt-bindings/rkfb/rk_fb.h>
5 #include <dt-bindings/input/input.h>
7 #include "../../../arm/boot/dts/vtl_ts_sdk8846.dtsi"
8 //#include "../../../arm/boot/dts/lcd-b101ew05.dtsi"
9 #include "../../../arm/boot/dts/lcd-box.dtsi"
14 bootargs = "earlyprintk=uart8250-32bit,0xff690000";
18 compatible = "wlan-platdata";
19 rockchip,grf = <&grf>;
21 /* wifi_chip_type - wifi chip define
22 * ap6210, ap6330, ap6335
23 * rtl8188eu, rtl8723bs, rtl8723bu
26 wifi_chip_type = "ap6335";
28 sdio_vref = <1800>; //1800mv or 3300mv
33 power_pmu_regulator = "act_ldo3";
34 power_pmu_enable_level = <1>; //1->HIGH, 0->LOW
37 //vref_ctrl_gpio = <&gpio0 GPIO_A2 GPIO_ACTIVE_HIGH>;
38 vref_pmu_regulator = "act_ldo3";
39 vref_pmu_enable_level = <1>; //1->HIGH, 0->LOW
41 WIFI,poweren_gpio = <&gpio3 GPIO_A4 GPIO_ACTIVE_HIGH>;
42 WIFI,host_wake_irq = <&gpio3 GPIO_A6 GPIO_ACTIVE_HIGH>;
43 //WIFI,reset_gpio = <&gpio0 GPIO_A2 GPIO_ACTIVE_LOW>;
49 compatible = "bluetooth-platdata";
51 //wifi-bt-power-toggle;
53 uart_rts_gpios = <&gpio2 GPIO_D3 GPIO_ACTIVE_LOW>;
54 pinctrl-names = "default","rts_gpio";
55 pinctrl-0 = <&uart0_rts>;
56 pinctrl-1 = <&uart0_rts_gpio>;
58 BT,power_gpio = <&gpio3 GPIO_A3 GPIO_ACTIVE_HIGH>;
59 BT,reset_gpio = <&gpio3 GPIO_A5 GPIO_ACTIVE_HIGH>;
60 BT,wake_gpio = <&gpio3 GPIO_A2 GPIO_ACTIVE_HIGH>;
61 BT,wake_host_irq = <&gpio3 GPIO_A7 GPIO_ACTIVE_HIGH>;
66 compatible = "hall_och165t";
67 type = <SENSOR_TYPE_HALL>;
68 irq-gpio = <&gpio0 GPIO_C0 IRQ_TYPE_EDGE_BOTH>;
72 compatible = "pwm-backlight";
73 pwms = <&pwm0 0 25000>;
74 brightness-levels = <255 254 253 252 251 250 249 248 247 246 245 244 243 242 241 240
75 239 238 237 236 235 234 233 232 231 230 229 228 227 226 225 224 223 222 221 220
76 219 218 217 216 215 214 213 212 211 210 209 208 207 206 205 204 203 202 201 200
77 199 198 197 196 195 194 193 192 191 190 189 188 187 186 185 184 183 182 181 180
78 179 178 177 176 175 174 173 172 171 170 169 168 167 166 165 164 163 162 161 160
79 159 158 157 156 155 154 153 152 151 150 149 148 147 146 145 144 143 142 141 140
80 139 138 137 136 135 134 133 132 131 130 129 128 127 126 125 124 123 122 121 120
81 119 118 117 116 115 114 113 112 111 110 109 108 107 106 105 104 103 102 101 100
82 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70
83 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40
84 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
86 default-brightness-level = <200>;
87 enable-gpios = <&gpio0 GPIO_C4 GPIO_ACTIVE_HIGH>;
92 compatible = "rockchip_pwm_regulator";
93 pwms = <&pwm1 0 2000>;
95 rockchip,pwm_voltage_map= <900000 925000 950000 975000 1000000 1025000 1050000 1075000 1100000 1125000 1150000 1175000 1200000 1225000 1250000 1275000 1300000 1325000 1350000 1375000>;
96 rockchip,pwm_voltage= <1000000>;
97 rockchip,pwm_min_voltage= <900000>;
98 rockchip,pwm_max_voltage= <1375000>;
99 rockchip,pwm_suspend_voltage= <950000>;
100 rockchip,pwm_coefficient= <555>;
102 #address-cells = <1>;
104 pwm_reg0: regulator@0 {
105 regulator-compatible = "pwm_dcdc1";
106 regulator-name= "vdd_logic";
107 regulator-min-microvolt = <900000>;
108 regulator-max-microvolt = <1375000>;
118 codec_hdmi_i2s: codec-hdmi-i2s {
119 compatible = "hdmi-i2s";
122 codec_hdmi_spdif: codec-hdmi-spdif {
123 compatible = "hdmi-spdif";
128 compatible = "rockchip-hdmi-i2s";
131 audio-codec = <&codec_hdmi_i2s>;
132 i2s-controller = <&i2s0>;
135 //bitclock-inversion;
145 rockchip-spdif-card {
146 compatible = "rockchip-spdif-card";
149 audio-codec = <&codec_hdmi_spdif>;
150 i2s-controller = <&spdif>;
155 compatible = "rockchip-rk1000";
158 audio-codec = <&rk1000_codec>;
159 i2s-controller = <&i2s0>;
165 compatible = "rockchip-rt5631";
168 audio-codec = <&rt5631>;
169 i2s-controller = <&i2s0>;
172 //bitclock-inversion;
181 compatible = "rockchip-rt3261";
184 audio-codec = <&rt3261>;
185 i2s-controller = <&i2s0>;
188 //bitclock-inversion;
194 audio-codec = <&rt3261>;
195 i2s-controller = <&i2s0>;
207 compatible = "rockchip,rk3368-io-voltage-domain";
208 rockchip,grf = <&grf>;
209 rockchip,pmugrf = <&pmugrf>;
212 dvp-supply = <&ldo7_reg>; /*DVPIO_VDD*/
213 flash0-supply = <&dcdc2_reg>; /*FLASH0_VDD*/
214 wifi-supply = <&ldo7_reg>; /*APIO2_VDD*/
215 audio-supply = <&dcdc2_reg>; /*APIO3_VDD*/
216 sdcard-supply = <&ldo1_reg>; /*SDMMC0_VDD*/
217 gpio30-supply = <&dcdc2_reg>; /*APIO1_VDD*/
218 gpio1830-supply = <&dcdc2_reg>;/*ADIO4_VDD*/
221 pmu-supply = <&ldo5_reg>; /*PMUIO_VDD*/
222 vop-supply = <&ldo5_reg>; /*LCDC_VDD*/
227 clock-frequency = <125000000>;
231 //power_ctl_by = "gpio"; //"gpio" "pmu"
232 //power-gpio = <&gpio0 GPIO_A6 GPIO_ACTIVE_HIGH>;
233 //power-pmu = "act_ldo"
234 reset-gpio = <&gpio3 GPIO_B4 GPIO_ACTIVE_LOW>;
236 pinctrl-names = "default";
237 pinctrl-0 = <&rgmii_pins>;
238 clock_in_out = "input";
241 status = "okay"; //if want to use gmac, please set "okay"
245 //used for init some gpio
246 init-gpios = <&gpio0 GPIO_A6 GPIO_ACTIVE_HIGH
247 &gpio0 GPIO_B1 GPIO_ACTIVE_LOW>;
251 rockchip,pins = <0 GPIO_C7 RK_FUNC_GPIO &pcfg_pull_down>;
254 rockchip,pins = <0 GPIO_A3 RK_FUNC_3 &pcfg_pull_none>;
257 rockchip,pins = <0 GPIO_C2 RK_FUNC_GPIO &pcfg_pull_down>;
266 status = "disabled"; // used nand set "disabled" ,used emmc set "okay"
270 status = "okay"; // used nand set "disabled" ,used emmc set "okay"
274 clock-frequency = <150000000>;
275 clock-freq-min-max = <400000 150000000>;
282 supports-DDR_MODE; //you should set the two value in your project. only close in RK3288-SDK board.
286 keep-power-in-suspend;
293 clock-frequency = <50000000>;
294 clock-freq-min-max = <400000 50000000>;
298 card-detect-delay = <200>;
301 keep-power-in-suspend;
303 vmmc-supply = <&ldo1_reg>;
312 clock-frequency = <50000000>;
313 clock-freq-min-max = <200000 50000000>;
317 keep-power-in-suspend;
324 max-freq = <48000000>;
327 compatible = "rockchip,spi_test_bus0_cs0";
329 spi-max-frequency = <24000000>;
339 compatible = "rockchip,spi_test_bus0_cs1";
341 spi-max-frequency = <24000000>;
353 max-freq = <48000000>;
356 compatible = "rockchip,spi_test_bus1_cs0";
358 spi-max-frequency = <24000000>;
370 max-freq = <48000000>;
373 compatible = "rockchip,spi_test_bus2_cs0";
375 spi-max-frequency = <24000000>;
384 compatible = "rockchip,spi_test_bus2_cs1";
386 spi-max-frequency = <24000000>;
402 dma-names = "!tx", "!rx";
403 pinctrl-0 = <&uart0_xfer &uart0_cts>;
407 tsadc-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */
408 //tsadc-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */
415 compatible = "silergy,syr82x";
419 #address-cells = <1>;
421 syr827_dc1: regulator@0 {
423 regulator-compatible = "syr82x_dcdc1";
424 regulator-name = "vdd_arm";
425 regulator-min-microvolt = <712500>;
426 regulator-max-microvolt = <1500000>;
429 regulator-initial-mode = <0x1>;
430 regulator-initial-state = <3>;
431 regulator-state-mem {
432 regulator-state-mode = <0x2>;
433 regulator-state-disabled;
434 regulator-state-uv = <900000>;
440 compatible = "silergy,syr82x";
444 #address-cells = <1>;
446 syr828_dc1: regulator@0 {
448 regulator-compatible = "syr82x_dcdc1";
449 regulator-name = "vdd_gpu";
450 regulator-min-microvolt = <712500>;
451 regulator-max-microvolt = <1500000>;
454 regulator-initial-mode = <0x1>;
455 regulator-initial-state = <3>;
456 regulator-state-mem {
457 regulator-state-mode = <0x2>;
458 regulator-state-enabled;
459 regulator-state-uv = <900000>;
465 act8846: act8846@5a {
471 compatible = "cw201x";
473 dc_det_gpio = <&gpio0 GPIO_C1 GPIO_ACTIVE_LOW>;
474 bat_low_gpio = <&gpio0 GPIO_C2 GPIO_ACTIVE_LOW>;
475 chg_ok_gpio = <&gpio0 GPIO_D3 GPIO_ACTIVE_HIGH>;
476 bat_config_info = <0x15 0x42 0x60 0x59 0x52 0x58 0x4D 0x48 0x48 0x44 0x44 0x46 0x49 0x48 0x32
477 0x24 0x20 0x17 0x13 0x0F 0x19 0x3E 0x51 0x45 0x08 0x76 0x0B 0x85 0x0E 0x1C 0x2E 0x3E 0x4D 0x52 0x52
478 0x57 0x3D 0x1B 0x6A 0x2D 0x25 0x43 0x52 0x87 0x8F 0x91 0x94 0x52 0x82 0x8C 0x92 0x96 0xFF 0x7B 0xBB
479 0xCB 0x2F 0x7D 0x72 0xA5 0xB5 0xC1 0x46 0xAE>;
485 compatible = "rtc,hym8563";
487 /*box not used rtc irq,and this pin used as rk1000 spk ctrl*/
488 #irq_gpio = <&gpio0 GPIO_A1 IRQ_TYPE_EDGE_FALLING>;
496 compatible = "rockchip,rk1000_control";
498 gpio-reset = <&gpio0 GPIO_A1 GPIO_ACTIVE_LOW>;
499 #clocks = <&clk_i2s>, <&i2s_out>, <&clk_gates12 7>;
500 #clock-names = "i2s_clk", "i2s_mclk", "i2s_hclk";
501 #pinctrl-names = "default";
502 #pinctrl-0 = <&i2s_mclk>;
506 compatible = "rockchip,rk1000_tve";
508 rockchip,source = <0>; //0: LCDC0; 1: LCDC1
509 rockchip,prop = <PRMRY>;//<EXTEND>
512 rk1000_codec: rk1000_codec@60 {
513 compatible = "rockchip,rk1000_codec";
515 spk_ctl_io = <&gpio3 GPIO_D7 GPIO_ACTIVE_LOW>;
517 pa_enable_time = <5000>;
521 compatible = "mpu6050";
523 mpu-int_config = <0x10>;
524 mpu-level_shifter = <0>;
525 mpu-orientation = <0 1 0 1 0 0 0 0 1>;
529 irq-gpio = <&gpio3 GPIO_B6 IRQ_TYPE_LEVEL_LOW>;
534 compatible = "mpu_ak8963";
537 compass-adapt_num = <0>;
538 compass-orientation = <1 0 0 0 1 0 0 0 1>;
546 compatible = "rt3261";
549 modem-input-mode = <1>;
550 lout-to-modem_mode = <1>;
559 compatible = "rt5631";
563 compatible = "ct,vtl_ts";
565 screen_max_x = <1536>;
566 screen_max_y = <2048>;
573 irq_gpio_number = <&gpio0 GPIO_B4 IRQ_TYPE_LEVEL_LOW>;
574 rst_gpio_number = <&gpio0 GPIO_B3 GPIO_ACTIVE_HIGH>;
591 arm,psci-suspend-param = <0x1010000>;
595 rockchip,disp-mode = <NO_DUAL>;
596 rockchip,uboot-logo-on = <0>;
597 rockchip,disp-policy = <DISPLAY_POLICY_BOX_TEMP>;
601 native-mode = <&timing1>;
605 display-timings = <&disp_timings>;
611 //pinctrl-names = "lcdc", "sleep";
612 //pinctrl-0 = <&lcdc_lcdc>;
613 //pinctrl-1 = <&lcdc_gpio>;
618 rockchip,mirror = <NO_MIRROR>;
619 rockchip,cabc_mode = <0>;
620 rockchip,fb-win-map = <FB_DEFAULT_ORDER>;
621 pinctrl-names = "default", "gpio";
622 pinctrl-0 = <&lcdc_lcdc>;
623 pinctrl-1 = <&lcdc_gpio>;
624 power_ctr: power_ctr {
625 rockchip,debug = <0>;
627 rockchip,power_type = <GPIO>;
628 gpios = <&gpio0 GPIO_C6 GPIO_ACTIVE_HIGH>;
629 rockchip,delay = <10>;
633 rockchip,power_type = <GPIO>;
634 gpios = <&gpio0 GPIO_C5 GPIO_ACTIVE_HIGH>;
635 rockchip,delay = <10>;
639 rockchip,power_type = <GPIO>;
640 gpios = <&gpio3 GPIO_D6 GPIO_ACTIVE_HIGH>;
641 rockchip,delay = <5>;
654 compatible = "rockchip_headset";
655 headset_gpio = <&gpio0 GPIO_C7 GPIO_ACTIVE_LOW>;
656 pinctrl-names = "default";
657 pinctrl-0 = <&gpio0_c7>;//gpio0_c7
658 io-channels = <&adc 2>;
661 hook_down_type = ; //interrupt hook key down status
666 compatible = "rockchip,key";
667 io-channels = <&adc 1>;
672 rockchip,adc_value = <1>;
677 label = "volume down";
678 rockchip,adc_value = <170>;
682 gpios = <&gpio0 GPIO_A2 GPIO_ACTIVE_LOW>;
691 rockchip,adc_value = <355>;
697 rockchip,adc_value = <746>;
703 rockchip,adc_value = <560>;
709 rockchip,adc_value = <450>;
722 &clk_core_b_dvfs_table {
740 &clk_core_l_dvfs_table {
756 &clk_gpu_dvfs_table {
766 &clk_ddr_dvfs_table {
777 SYS_STATUS_NORMAL 400000
778 SYS_STATUS_SUSPEND 200000
779 SYS_STATUS_VIDEO_1080P 240000
780 SYS_STATUS_VIDEO_4K 400000
781 SYS_STATUS_PERFORMANCE 528000
782 SYS_STATUS_DUALVIEW 400000
783 SYS_STATUS_BOOST 324000
784 SYS_STATUS_ISP 400000
797 host_drv_gpio = <&gpio0 GPIO_A4 GPIO_ACTIVE_LOW>;
798 otg_drv_gpio = <&gpio0 GPIO_A5 GPIO_ACTIVE_LOW>;
800 rockchip,remote_wakeup;
801 rockchip,usb_irq_wakeup;
805 /*0 - Normal, 1 - Force Host, 2 - Force Device*/
806 rockchip,usb-mode = <0>;
809 /include/ "../../../arm/boot/dts/act8846.dtsi"
811 gpios =<&gpio0 GPIO_B0 GPIO_ACTIVE_LOW>,<&gpio0 GPIO_A3 GPIO_ACTIVE_HIGH>;
812 act8846,system-power-controller;
816 dcdc1_reg: regulator@0{
817 regulator-name= "act_dcdc1";
818 regulator-min-microvolt = <1200000>;
819 regulator-max-microvolt = <1200000>;
824 dcdc2_reg: regulator@1 {
825 regulator-name= "vccio";
826 regulator-min-microvolt = <3300000>;
827 regulator-max-microvolt = <3300000>;
828 regulator-initial-state = <3>;
829 regulator-state-mem {
830 regulator-state-enabled;
831 regulator-state-uv = <3300000>;
835 dcdc3_reg: regulator@2 {
836 regulator-name= "vdd_logic";
837 regulator-min-microvolt = <700000>;
838 regulator-max-microvolt = <1500000>;
839 regulator-initial-state = <3>;
840 regulator-state-mem {
841 regulator-state-enabled;
842 regulator-state-uv = <1000000>;
847 dcdc4_reg: regulator@3 {
848 regulator-name= "act_dcdc4";
849 regulator-min-microvolt = <2000000>;
850 regulator-max-microvolt = <2000000>;
851 regulator-initial-state = <3>;
852 regulator-state-mem {
853 regulator-state-enabled;
854 regulator-state-uv = <2000000>;
858 ldo1_reg: regulator@4 {
859 regulator-name= "vccio_sd";
860 regulator-min-microvolt = <1800000>;
861 regulator-max-microvolt = <3300000>;
865 ldo2_reg: regulator@5 {
866 regulator-name= "act_ldo2";
867 regulator-min-microvolt = <1000000>;
868 regulator-max-microvolt = <1000000>;
872 ldo3_reg: regulator@6 {
873 regulator-name= "act_ldo3";
874 regulator-min-microvolt = <3300000>;
875 regulator-max-microvolt = <3300000>;
879 ldo4_reg:regulator@7 {
880 regulator-name= "act_ldo4";
881 regulator-min-microvolt = <3300000>;
882 regulator-max-microvolt = <3300000>;
886 ldo5_reg: regulator@8 {
887 regulator-name= "act_ldo5";
888 regulator-min-microvolt = <3300000>;
889 regulator-max-microvolt = <3300000>;
893 ldo6_reg: regulator@9 {
894 regulator-name= "act_ldo6";
895 regulator-min-microvolt = <1000000>;
896 regulator-max-microvolt = <1000000>;
897 regulator-initial-state = <3>;
898 regulator-state-mem {
899 regulator-state-enabled;
904 ldo7_reg: regulator@10 {
905 regulator-name= "vcc_18";
906 regulator-min-microvolt = <1800000>;
907 regulator-max-microvolt = <1800000>;
908 regulator-initial-state = <3>;
909 regulator-state-mem {
910 regulator-state-enabled;
915 ldo8_reg: regulator@11 {
916 regulator-name= "act_ldo8";
917 regulator-min-microvolt = <1800000>;
918 regulator-max-microvolt = <1800000>;
925 reg = <0x00000000 0x00000000>; /* 0MB */
944 rockchip,usercode = <0x4040>;
954 <0xe3 KEY_VOLUMEDOWN>,
970 rockchip,usercode = <0xff00>;
980 <0xeb KEY_VOLUMEDOWN>,
985 <0xa9 KEY_VOLUMEDOWN>,
986 <0xa8 KEY_VOLUMEDOWN>,
987 <0xe0 KEY_VOLUMEDOWN>,
988 <0xa5 KEY_VOLUMEDOWN>,
993 <0xed KEY_VOLUMEDOWN>,
995 <0xb3 KEY_VOLUMEDOWN>,
996 <0xf1 KEY_VOLUMEDOWN>,
997 <0xf2 KEY_VOLUMEDOWN>,
999 <0xb4 KEY_VOLUMEDOWN>,
1003 rockchip,usercode = <0x1dcc>;
1004 rockchip,key_table =
1012 <0xf1 KEY_VOLUMEUP>,
1013 <0xfd KEY_VOLUMEDOWN>,
1031 <0xb5 KEY_BACKSPACE>;