arch/arm64/boot/dts/rk3368-box.dts

   1 /dts-v1/;
   2
   3 #include <dt-bindings/interrupt-controller/arm-gic.h>
   4 #include <dt-bindings/rkfb/rk_fb.h>
   5 #include <dt-bindings/input/input.h>
   6 #include "rk3368.dtsi"
   7 #include "../../../arm/boot/dts/vtl_ts_sdk8846.dtsi"
   8 //#include "../../../arm/boot/dts/lcd-b101ew05.dtsi"
   9 #include "../../../arm/boot/dts/lcd-box.dtsi"
  10
  11
  12 / {
  13         chosen {
  14                 bootargs = "earlyprintk=uart8250-32bit,0xff690000";
  15         };
  16
  17         wireless-wlan {
  18                 compatible = "wlan-platdata";
  19                 rockchip,grf = <&grf>;
  20
  21                 /* wifi_chip_type - wifi chip define
  22                  * ap6210, ap6330, ap6335
  23                  * rtl8188eu, rtl8723bs, rtl8723bu
  24                  * esp8089
  25                 */
  26                 wifi_chip_type = "ap6335";
  27
  28                 sdio_vref = <1800>; //1800mv or 3300mv
  29
  30                 //keep_wifi_power_on;
  31
  32                 //power_ctrl_by_pmu;
  33                 power_pmu_regulator = "act_ldo3";
  34                 power_pmu_enable_level = <1>; //1->HIGH, 0->LOW
  35
  36                 //vref_ctrl_enable;
  37                 //vref_ctrl_gpio = <&gpio0 GPIO_A2 GPIO_ACTIVE_HIGH>;
  38                 vref_pmu_regulator = "act_ldo3";
  39                 vref_pmu_enable_level = <1>; //1->HIGH, 0->LOW
  40
  41                 WIFI,poweren_gpio = <&gpio3 GPIO_A4 GPIO_ACTIVE_HIGH>;
  42                 WIFI,host_wake_irq = <&gpio3 GPIO_A6 GPIO_ACTIVE_HIGH>;
  43                 //WIFI,reset_gpio = <&gpio0 GPIO_A2 GPIO_ACTIVE_LOW>;
  44
  45                 status = "okay";
  46         };
  47
  48         wireless-bluetooth {
  49                 compatible = "bluetooth-platdata";
  50
  51                 //wifi-bt-power-toggle;
  52
  53                 uart_rts_gpios = <&gpio2 GPIO_D3 GPIO_ACTIVE_LOW>;
  54                 pinctrl-names = "default","rts_gpio";
  55                 pinctrl-0 = <&uart0_rts>;
  56                 pinctrl-1 = <&uart0_rts_gpio>;
  57
  58                 BT,power_gpio = <&gpio3 GPIO_A3 GPIO_ACTIVE_HIGH>;
  59                 BT,reset_gpio = <&gpio3 GPIO_A5 GPIO_ACTIVE_HIGH>;
  60                 BT,wake_gpio = <&gpio3 GPIO_A2 GPIO_ACTIVE_HIGH>;
  61                 BT,wake_host_irq = <&gpio3 GPIO_A7 GPIO_ACTIVE_HIGH>;
  62                 status = "okay";
  63         };
  64
  65         hallsensor {
  66                compatible = "hall_och165t";
  67                type = <SENSOR_TYPE_HALL>;
  68                irq-gpio = <&gpio0 GPIO_C0 IRQ_TYPE_EDGE_BOTH>;
  69         };
  70
  71         backlight {
  72                 compatible = "pwm-backlight";
  73                 pwms = <&pwm0 0 25000>;
  74                 brightness-levels = <255 254 253 252 251 250 249 248 247 246 245 244 243 242 241 240
  75                      239 238 237 236 235 234 233 232 231 230 229 228 227 226 225 224 223 222 221 220
  76                      219 218 217 216 215 214 213 212 211 210 209 208 207 206 205 204 203 202 201 200
  77                      199 198 197 196 195 194 193 192 191 190 189 188 187 186 185 184 183 182 181 180
  78                      179 178 177 176 175 174 173 172 171 170 169 168 167 166 165 164 163 162 161 160
  79                      159 158 157 156 155 154 153 152 151 150 149 148 147 146 145 144 143 142 141 140
  80                      139 138 137 136 135 134 133 132 131 130 129 128 127 126 125 124 123 122 121 120
  81                      119 118 117 116 115 114 113 112 111 110 109 108 107 106 105 104 103 102 101 100
  82                      99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70
  83                      69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40
  84                      39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
  85                      9 8 7 6 5 4 3 2 1 0>;
  86                 default-brightness-level = <200>;
  87                 enable-gpios = <&gpio0 GPIO_C4 GPIO_ACTIVE_HIGH>;
  88                 status = "disabled";
  89         };
  90
  91         pwm_regulator {
  92                 compatible = "rockchip_pwm_regulator";
  93                 pwms = <&pwm1 0 2000>;
  94                 rockchip,pwm_id= <1>;
  95                 rockchip,pwm_voltage_map= <900000 925000 950000 975000 1000000 1025000 1050000 1075000 1100000 1125000 1150000 1175000 1200000 1225000 1250000 1275000 1300000 1325000 1350000 1375000>;
  96                 rockchip,pwm_voltage= <1000000>;
  97                 rockchip,pwm_min_voltage= <900000>;
  98                 rockchip,pwm_max_voltage= <1375000>;
  99                 rockchip,pwm_suspend_voltage= <950000>;
 100                 rockchip,pwm_coefficient= <555>;
 101                 regulators {
 102                         #address-cells = <1>;
 103                         #size-cells = <0>;
 104                         pwm_reg0: regulator@0 {
 105                                 regulator-compatible = "pwm_dcdc1";
 106                                 regulator-name= "vdd_logic";
 107                                 regulator-min-microvolt = <900000>;
 108                                 regulator-max-microvolt = <1375000>;
 109                                 regulator-always-on;
 110                                 regulator-boot-on;
 111                         };
 112                 };
 113                 test-power{
 114                         status = "okay";
 115                 };
 116         };
 117
 118         codec_hdmi_i2s: codec-hdmi-i2s {
 119                 compatible = "hdmi-i2s";
 120         };
 121
 122         codec_hdmi_spdif: codec-hdmi-spdif {
 123                 compatible = "hdmi-spdif";
 124         };
 125
 126         rockchip-hdmi-i2s {
 127                 status = "disabled";
 128                 compatible = "rockchip-hdmi-i2s";
 129                 dais {
 130                         dai0 {
 131                                 audio-codec = <&codec_hdmi_i2s>;
 132                                 i2s-controller = <&i2s0>;
 133                                 format = "i2s";
 134                                 //continuous-clock;
 135                                 //bitclock-inversion;
 136                                 //frame-inversion;
 137                                 //bitclock-master;
 138                                 //frame-master;
 139                         };
 140                 };
 141         };
 142
 143
 144
 145         rockchip-spdif-card {
 146                         compatible = "rockchip-spdif-card";
 147                         dais {
 148                                 dai0 {
 149                                         audio-codec = <&codec_hdmi_spdif>;
 150                                         i2s-controller = <&spdif>;
 151                                 };
 152                         };
 153                 };
 154         rockchip-rk1000 {
 155                 compatible = "rockchip-rk1000";
 156                 dais {
 157                         dai0 {
 158                                 audio-codec = <&rk1000_codec>;
 159                                 i2s-controller = <&i2s0>;
 160                                 format = "i2s";
 161                         };
 162                 };
 163         };
 164         rockchip-rt5631 {
 165                 compatible = "rockchip-rt5631";
 166                 dais {
 167                         dai0 {
 168                                 audio-codec = <&rt5631>;
 169                                 i2s-controller = <&i2s0>;
 170                                 format = "i2s";
 171                                 //continuous-clock;
 172                                 //bitclock-inversion;
 173                                 //frame-inversion;
 174                                 //bitclock-master;
 175                                 //frame-master;
 176                         };
 177                 };
 178         };
 179
 180         rockchip-rt3224 {
 181                 compatible = "rockchip-rt3261";
 182                 dais {
 183                         dai0 {
 184                                 audio-codec = <&rt3261>;
 185                                 i2s-controller = <&i2s0>;
 186                                 format = "i2s";
 187                                 //continuous-clock;
 188                                 //bitclock-inversion;
 189                                 //frame-inversion;
 190                                 //bitclock-master;
 191                                 //frame-master;
 192                         };
 193                         dai1 {
 194                                 audio-codec = <&rt3261>;
 195                                 i2s-controller = <&i2s0>;
 196                                 format = "dsp_a";
 197                                 //continuous-clock;
 198                                 bitclock-inversion;
 199                                 //frame-inversion;
 200                                 //bitclock-master;
 201                                 //frame-master;
 202                         };
 203                 };
 204         };
 205
 206         io-domains {
 207                 compatible = "rockchip,rk3368-io-voltage-domain";
 208                 rockchip,grf = <&grf>;
 209                 rockchip,pmugrf = <&pmugrf>;
 210
 211                 /*GRF_IO_VSEL*/
 212                 dvp-supply = <&ldo7_reg>;      /*DVPIO_VDD*/
 213                 flash0-supply = <&dcdc2_reg>;  /*FLASH0_VDD*/
 214                 wifi-supply = <&ldo7_reg>;     /*APIO2_VDD*/
 215                 audio-supply = <&dcdc2_reg>;   /*APIO3_VDD*/
 216                 sdcard-supply = <&ldo1_reg>;   /*SDMMC0_VDD*/
 217                 gpio30-supply = <&dcdc2_reg>;  /*APIO1_VDD*/
 218                 gpio1830-supply = <&dcdc2_reg>;/*ADIO4_VDD*/
 219
 220                 /*PMU_GRF_IO_VSEL*/
 221                 pmu-supply = <&ldo5_reg>;      /*PMUIO_VDD*/
 222                 vop-supply = <&ldo5_reg>;      /*LCDC_VDD*/
 223         };
 224 };
 225
 226 &gmac_clkin {
 227         clock-frequency = <125000000>;
 228 };
 229
 230 &gmac {
 231         //power_ctl_by = "gpio";        //"gpio" "pmu"
 232         //power-gpio = <&gpio0 GPIO_A6 GPIO_ACTIVE_HIGH>;
 233         //power-pmu = "act_ldo"
 234         reset-gpio = <&gpio3 GPIO_B4 GPIO_ACTIVE_LOW>;
 235         phy-mode = "rgmii";
 236         pinctrl-names = "default";
 237         pinctrl-0 = <&rgmii_pins>;
 238         clock_in_out = "input";
 239         tx_delay = <0x28>;
 240         rx_delay = <0x10>;
 241         status = "okay"; //if want to use gmac, please set "okay"
 242 };
 243
 244 &pinctrl {
 245         //used for init some gpio
 246         init-gpios = <&gpio0 GPIO_A6 GPIO_ACTIVE_HIGH
 247         &gpio0 GPIO_B1 GPIO_ACTIVE_LOW>;
 248
 249         gpio0_gpio {
 250                 gpio0_c7: gpio0-c7 {
 251                 rockchip,pins = <0 GPIO_C7 RK_FUNC_GPIO &pcfg_pull_down>;
 252         };
 253         gpio0_a3: gpio0-a3 {
 254                 rockchip,pins = <0 GPIO_A3 RK_FUNC_3 &pcfg_pull_none>;
 255         };
 256         gpio0_c2: gpio0-c2 {
 257                 rockchip,pins = <0 GPIO_C2 RK_FUNC_GPIO &pcfg_pull_down>;
 258         };
 259
 260         //to add
 261         };
 262
 263 };
 264
 265 &nandc0 {
 266         status = "disabled"; // used nand set "disabled" ,used emmc set "okay"
 267 };
 268
 269 &nandc0reg {
 270         status = "okay"; // used nand set "disabled" ,used emmc set "okay"
 271 };
 272
 273 &emmc {
 274         clock-frequency = <150000000>;
 275         clock-freq-min-max = <400000 150000000>;
 276
 277         supports-highspeed;
 278         supports-emmc;
 279         bootpart-no-access;
 280
 281         //supports-sd;
 282         supports-DDR_MODE; //you should set the two value in your project. only close in RK3288-SDK board.
 283         caps2-mmc-hs200;
 284
 285         ignore-pm-notify;
 286         keep-power-in-suspend;
 287
 288         //poll-hw-reset
 289         status = "okay";
 290 };
 291
 292 &sdmmc {
 293         clock-frequency = <50000000>;
 294         clock-freq-min-max = <400000 50000000>;
 295         supports-highspeed;
 296         supports-sd;
 297         broken-cd;
 298         card-detect-delay = <200>;
 299
 300         ignore-pm-notify;
 301         keep-power-in-suspend;
 302
 303         vmmc-supply = <&ldo1_reg>;
 304         status = "okay";
 305 };
 306
 307 &edp{
 308         status = "disabled";
 309 };
 310
 311 &sdio {
 312         clock-frequency = <50000000>;
 313         clock-freq-min-max = <200000 50000000>;
 314         supports-highspeed;
 315         supports-sdio;
 316         ignore-pm-notify;
 317         keep-power-in-suspend;
 318         //cap-sdio-irq;
 319         status = "okay";
 320 };
 321
 322 &spi0 {
 323         status = "disabled";
 324         max-freq = <48000000>;
 325         /*
 326         spi_test@00 {
 327                 compatible = "rockchip,spi_test_bus0_cs0";
 328                 reg = <0>;
 329                 spi-max-frequency = <24000000>;
 330                 //spi-cpha;
 331                 //spi-cpol;
 332                 poll_mode = <0>;
 333                 type = <0>;
 334                 enable_dma = <0>;
 335
 336         };
 337
 338         spi_test@01 {
 339                 compatible = "rockchip,spi_test_bus0_cs1";
 340                 reg = <1>;
 341                 spi-max-frequency = <24000000>;
 342                 spi-cpha;
 343                 spi-cpol;
 344                 poll_mode = <0>;
 345                 type = <0>;
 346                 enable_dma = <0>;
 347         };
 348         */
 349 };
 350
 351 &spi1 {
 352         status = "disabled";
 353         max-freq = <48000000>;
 354         /*
 355         spi_test@10 {
 356                 compatible = "rockchip,spi_test_bus1_cs0";
 357                 reg = <0>;
 358                 spi-max-frequency = <24000000>;
 359                 //spi-cpha;
 360                 //spi-cpol;
 361                 poll_mode = <0>;
 362                 type = <0>;
 363                 enable_dma = <0>;
 364         };
 365         */
 366 };
 367
 368 &spi2 {
 369         status = "disabled";
 370         max-freq = <48000000>;
 371         /*
 372         spi_test@20 {
 373                 compatible = "rockchip,spi_test_bus2_cs0";
 374                 reg = <0>;
 375                 spi-max-frequency = <24000000>;
 376                 //spi-cpha;
 377                 //spi-cpol;
 378                 poll_mode = <0>;
 379                 type = <0>;
 380                 enable_dma = <0>;
 381         };
 382
 383         spi_test@21 {
 384                 compatible = "rockchip,spi_test_bus2_cs1";
 385                 reg = <1>;
 386                 spi-max-frequency = <24000000>;
 387                 //spi-cpha;
 388                 //spi-cpol;
 389                 poll_mode = <0>;
 390                 type = <0>;
 391                 enable_dma = <0>;
 392         };
 393         */
 394 };
 395
 396 &uart_dbg {
 397         status = "okay";
 398 };
 399
 400 &uart_bt {
 401         status = "okay";
 402         dma-names = "!tx", "!rx";
 403         pinctrl-0 = <&uart0_xfer &uart0_cts>;
 404 };
 405
 406 &tsadc {
 407        tsadc-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */
 408        //tsadc-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */
 409        status = "okay";
 410 };
 411
 412 &i2c0 {
 413         status = "okay";
 414         syr827: syr827@40 {
 415                 compatible = "silergy,syr82x";
 416                 reg = <0x40>;
 417                 status = "okay";
 418                 regulators {
 419                         #address-cells = <1>;
 420                         #size-cells = <0>;
 421                         syr827_dc1: regulator@0 {
 422                         reg = <0>;
 423                         regulator-compatible = "syr82x_dcdc1";
 424                         regulator-name = "vdd_arm";
 425                         regulator-min-microvolt = <712500>;
 426                         regulator-max-microvolt = <1500000>;
 427                         regulator-always-on;
 428                         regulator-boot-on;
 429                         regulator-initial-mode = <0x1>;
 430                         regulator-initial-state = <3>;
 431                         regulator-state-mem {
 432                                 regulator-state-mode = <0x2>;
 433                                 regulator-state-disabled;
 434                                 regulator-state-uv = <900000>;
 435                         };
 436                 };
 437            };
 438         };
 439         syr828: syr828@41 {
 440                 compatible = "silergy,syr82x";
 441                 reg = <0x41>;
 442                 status = "disabled";
 443                 regulators {
 444                         #address-cells = <1>;
 445                         #size-cells = <0>;
 446                         syr828_dc1: regulator@0 {
 447                         reg = <0>;
 448                         regulator-compatible = "syr82x_dcdc1";
 449                         regulator-name = "vdd_gpu";
 450                         regulator-min-microvolt = <712500>;
 451                         regulator-max-microvolt = <1500000>;
 452                         regulator-always-on;
 453                         regulator-boot-on;
 454                         regulator-initial-mode = <0x1>;
 455                         regulator-initial-state = <3>;
 456                         regulator-state-mem {
 457                                 regulator-state-mode = <0x2>;
 458                                 regulator-state-enabled;
 459                                 regulator-state-uv = <900000>;
 460                         };
 461                 };
 462            };
 463         };
 464
 465         act8846: act8846@5a {
 466                 reg = <0x5a>;
 467                 status = "diasbled";
 468         };
 469
 470         CW2015@62 {
 471                 compatible = "cw201x";
 472                 reg = <0x62>;
 473                 dc_det_gpio = <&gpio0 GPIO_C1 GPIO_ACTIVE_LOW>;
 474                 bat_low_gpio = <&gpio0 GPIO_C2 GPIO_ACTIVE_LOW>;
 475                 chg_ok_gpio = <&gpio0 GPIO_D3 GPIO_ACTIVE_HIGH>;
 476                 bat_config_info = <0x15 0x42 0x60 0x59 0x52 0x58 0x4D 0x48 0x48 0x44 0x44 0x46 0x49 0x48 0x32
 477                         0x24 0x20 0x17 0x13 0x0F 0x19 0x3E 0x51 0x45 0x08 0x76 0x0B 0x85 0x0E 0x1C 0x2E 0x3E 0x4D 0x52 0x52
 478                         0x57 0x3D 0x1B 0x6A 0x2D 0x25 0x43 0x52 0x87 0x8F 0x91 0x94 0x52 0x82 0x8C 0x92 0x96 0xFF 0x7B 0xBB
 479                         0xCB 0x2F 0x7D 0x72 0xA5 0xB5 0xC1 0x46 0xAE>;
 480                 is_dc_charge = <1>;
 481                 is_usb_charge = <0>;
 482                 status = "diasbled";
 483         };
 484         rtc@51 {
 485                 compatible = "rtc,hym8563";
 486                 reg = <0x51>;
 487                 /*box not used rtc irq,and this pin used as rk1000 spk ctrl*/
 488                 #irq_gpio = <&gpio0 GPIO_A1 IRQ_TYPE_EDGE_FALLING>;
 489         };
 490
 491 };
 492
 493 &i2c1 {
 494         status = "okay";
 495         rk1000_control@40 {
 496                 compatible = "rockchip,rk1000_control";
 497                 reg = <0x40>;
 498                 gpio-reset = <&gpio0 GPIO_A1 GPIO_ACTIVE_LOW>;
 499                 #clocks = <&clk_i2s>, <&i2s_out>, <&clk_gates12 7>;
 500                 #clock-names = "i2s_clk", "i2s_mclk", "i2s_hclk";
 501                 #pinctrl-names = "default";
 502                 #pinctrl-0 = <&i2s_mclk>;
 503                 status = "okay";
 504         };
 505         rk1000_tve@42 {
 506                 compatible = "rockchip,rk1000_tve";
 507                 reg = <0x42>;
 508                 rockchip,source = <0>; //0: LCDC0; 1: LCDC1
 509                 rockchip,prop = <PRMRY>;//<EXTEND>
 510                 status = "okay";
 511         };
 512         rk1000_codec: rk1000_codec@60 {
 513                 compatible = "rockchip,rk1000_codec";
 514                 reg = <0x60>;
 515                 spk_ctl_io = <&gpio3 GPIO_D7 GPIO_ACTIVE_LOW>;
 516                 boot_depop = <1>;
 517                 pa_enable_time = <5000>;
 518                 status = "okay";
 519         };
 520         mpu6050:mpu@68{
 521                 compatible = "mpu6050";
 522                 reg = <0x68>;
 523                 mpu-int_config = <0x10>;
 524                 mpu-level_shifter = <0>;
 525                 mpu-orientation = <0 1 0 1 0 0 0 0 1>;
 526                 orientation-x= <0>;
 527                 orientation-y= <1>;
 528                 orientation-z= <1>;
 529                 irq-gpio = <&gpio3 GPIO_B6 IRQ_TYPE_LEVEL_LOW>;
 530                 mpu-debug = <0>;
 531                 status = "disabled";
 532         };
 533         ak8963:compass@0d{
 534                 compatible = "mpu_ak8963";
 535                 reg = <0x0d>;
 536                 compass-bus = <0>;
 537                 compass-adapt_num = <0>;
 538                 compass-orientation = <1 0 0 0 1 0 0 0 1>;
 539                 orientation-x= <0>;
 540                 orientation-y= <0>;
 541                 orientation-z= <1>;
 542                 compass-debug = <1>;
 543                 status = "disabled";
 544         };
 545         rt3261: rt3261@1c {
 546                 compatible = "rt3261";
 547                 reg = <0x1c>;
 548                 spk-num= <2>;
 549                 modem-input-mode = <1>;
 550                 lout-to-modem_mode = <1>;
 551                 spk-amplify = <2>;
 552                 status = "disabled";
 553         };
 554 };
 555
 556 &i2c2 {
 557         status = "disabled";
 558         rt5631: rt5631@1a {
 559                 compatible = "rt5631";
 560                 reg = <0x1a>;
 561         };
 562         ts@01 {
 563                 compatible = "ct,vtl_ts";
 564                 reg = <0x01>;
 565                 screen_max_x = <1536>;
 566                 screen_max_y = <2048>;
 567                 xy_swap = <1>;
 568                 x_reverse = <0>;
 569                 y_reverse = <0>;
 570                 x_mul = <2>;
 571                 y_mul = <2>;
 572                 bin_ver = <0>;
 573                 irq_gpio_number = <&gpio0 GPIO_B4 IRQ_TYPE_LEVEL_LOW>;
 574                 rst_gpio_number = <&gpio0 GPIO_B3 GPIO_ACTIVE_HIGH>;
 575         };
 576 };
 577
 578 &i2c3 {
 579         status = "disabled";
 580 };
 581
 582 &i2c4 {
 583         status = "disabled";
 584 };
 585
 586 &i2c5 {
 587         status = "disabled";
 588 };
 589
 590 &CPU_SLEEP_0 {
 591         arm,psci-suspend-param = <0x1010000>;
 592 };
 593
 594 &fb {
 595         rockchip,disp-mode = <NO_DUAL>;
 596         rockchip,uboot-logo-on = <0>;
 597         rockchip,disp-policy = <DISPLAY_POLICY_BOX_TEMP>;
 598 };
 599
 600 &disp_timings {
 601         native-mode = <&timing1>;
 602 };
 603
 604 &rk_screen {
 605         display-timings = <&disp_timings>;
 606 };
 607
 608
 609 &lvds {
 610         status = "okay";
 611         //pinctrl-names = "lcdc", "sleep";
 612         //pinctrl-0 = <&lcdc_lcdc>;
 613         //pinctrl-1 = <&lcdc_gpio>;
 614 };
 615
 616 &lcdc {
 617         status = "okay";
 618         rockchip,mirror = <NO_MIRROR>;
 619         rockchip,cabc_mode = <0>;
 620         rockchip,fb-win-map = <FB_DEFAULT_ORDER>;
 621         pinctrl-names = "default", "gpio";
 622         pinctrl-0 = <&lcdc_lcdc>;
 623         pinctrl-1 = <&lcdc_gpio>;
 624         power_ctr: power_ctr {
 625                 rockchip,debug = <0>;
 626                 /*lcd_en:lcd_en {
 627                         rockchip,power_type = <GPIO>;
 628                         gpios = <&gpio0 GPIO_C6 GPIO_ACTIVE_HIGH>;
 629                         rockchip,delay = <10>;
 630                 };
 631
 632                 lcd_cs:lcd_cs {
 633                         rockchip,power_type = <GPIO>;
 634                         gpios = <&gpio0 GPIO_C5 GPIO_ACTIVE_HIGH>;
 635                         rockchip,delay = <10>;
 636                 };
 637
 638                 lcd_rst:lcd_rst {
 639                         rockchip,power_type = <GPIO>;
 640                         gpios = <&gpio3 GPIO_D6 GPIO_ACTIVE_HIGH>;
 641                         rockchip,delay = <5>;
 642                 };*/
 643         };
 644 };
 645
 646 &hdmi {
 647         status = "okay";
 648 };
 649
 650 &adc {
 651         status = "disabled";
 652
 653         rockchip_headset {
 654                 compatible = "rockchip_headset";
 655                 headset_gpio = <&gpio0 GPIO_C7 GPIO_ACTIVE_LOW>;
 656                 pinctrl-names = "default";
 657                 pinctrl-0 = <&gpio0_c7>;//gpio0_c7
 658                 io-channels = <&adc 2>;
 659                 /*
 660                 hook_gpio = ;
 661                 hook_down_type = ; //interrupt hook key down status
 662                 */
 663        };
 664
 665         key {
 666                 compatible = "rockchip,key";
 667                 io-channels = <&adc 1>;
 668
 669                 vol-up-key {
 670                         linux,code = <115>;
 671                         label = "volume up";
 672                         rockchip,adc_value = <1>;
 673                 };
 674
 675                 vol-down-key {
 676                         linux,code = <114>;
 677                         label = "volume down";
 678                         rockchip,adc_value = <170>;
 679                 };
 680
 681                 power-key {
 682                         gpios = <&gpio0 GPIO_A2 GPIO_ACTIVE_LOW>;
 683                         linux,code = <116>;
 684                         label = "power";
 685                         gpio-key,wakeup;
 686                 };
 687
 688                 menu-key {
 689                         linux,code = <59>;
 690                         label = "menu";
 691                         rockchip,adc_value = <355>;
 692                 };
 693
 694                 home-key {
 695                         linux,code = <102>;
 696                         label = "home";
 697                         rockchip,adc_value = <746>;
 698                 };
 699
 700                 back-key {
 701                         linux,code = <158>;
 702                         label = "back";
 703                         rockchip,adc_value = <560>;
 704                 };
 705
 706                 camera-key {
 707                         linux,code = <212>;
 708                         label = "camera";
 709                         rockchip,adc_value = <450>;
 710                 };
 711         };
 712 };
 713
 714 &pwm0 {
 715         status = "disabled";
 716 };
 717
 718 &pwm1 {
 719         status = "okay";
 720 };
 721
 722 &clk_core_b_dvfs_table {
 723         operating-points = <
 724                 /* KHz    uV */
 725                 //216000 950000
 726                 312000 950000
 727                 408000 950000
 728                 600000 975000
 729                 696000 975000
 730                 816000 1000000
 731                 1008000 1100000
 732                 1200000 1175000
 733                 1416000 1300000
 734                 1488000 1325000
 735                 1512000 1350000
 736                 >;
 737         status = "okay";
 738 };
 739
 740 &clk_core_l_dvfs_table {
 741         operating-points = <
 742                 /* KHz    uV */
 743                 //216000 950000
 744                 312000 950000
 745                 408000 950000
 746                 600000 950000
 747                 696000 975000
 748                 816000 1050000
 749                 1008000 1150000
 750                 1200000 1250000
 751                 //1300000 1300000
 752                 >;
 753         status = "okay";
 754 };
 755
 756 &clk_gpu_dvfs_table {
 757         operating-points = <
 758                 /* KHz    uV */
 759                 //200000 1200000
 760                 300000 1200000
 761                 400000 1200000
 762                 600000 1200000
 763                 >;
 764 };
 765
 766 &clk_ddr_dvfs_table {
 767         operating-points = <
 768                 /* KHz    uV */
 769                 200000 1050000
 770                 300000 1050000
 771                 400000 1100000
 772                 533000 1150000
 773                 800000 1200000
 774                 >;
 775
 776         freq-table = <
 777                 /*status                freq(KHz)*/
 778                 SYS_STATUS_NORMAL       800000
 779                 /*SYS_STATUS_SUSPEND    200000
 780                 SYS_STATUS_VIDEO_1080P  240000
 781                 SYS_STATUS_VIDEO_4K     400000
 782                 SYS_STATUS_PERFORMANCE  528000
 783                 SYS_STATUS_DUALVIEW     400000
 784                 SYS_STATUS_BOOST        324000
 785                 SYS_STATUS_ISP          400000*/
 786                 >;
 787         auto-freq-table = <
 788                 240000
 789                 324000
 790                 396000
 791                 528000
 792                 >;
 793         auto-freq=<0>;
 794         status="okay";
 795 };
 796
 797 &dwc_control_usb {
 798                 host_drv_gpio = <&gpio0 GPIO_A4 GPIO_ACTIVE_LOW>;
 799                 otg_drv_gpio = <&gpio0 GPIO_A5 GPIO_ACTIVE_LOW>;
 800
 801                 rockchip,remote_wakeup;
 802                 rockchip,usb_irq_wakeup;
 803         };
 804
 805 &usb0 {
 806         /*0 - Normal, 1 - Force Host, 2 - Force Device*/
 807         rockchip,usb-mode = <0>;
 808 };
 809
 810 /include/ "../../../arm/boot/dts/act8846.dtsi"
 811 &act8846 {
 812         gpios =<&gpio0 GPIO_B0 GPIO_ACTIVE_LOW>,<&gpio0 GPIO_A3 GPIO_ACTIVE_HIGH>;
 813         act8846,system-power-controller;
 814
 815         regulators {
 816
 817                 dcdc1_reg: regulator@0{
 818                         regulator-name= "act_dcdc1";
 819                         regulator-min-microvolt = <1200000>;
 820                         regulator-max-microvolt = <1200000>;
 821                         regulator-always-on;
 822                         regulator-boot-on;
 823                 };
 824
 825                 dcdc2_reg: regulator@1 {
 826                         regulator-name= "vccio";
 827                         regulator-min-microvolt = <3300000>;
 828                         regulator-max-microvolt = <3300000>;
 829                         regulator-initial-state = <3>;
 830                         regulator-state-mem {
 831                                 regulator-state-enabled;
 832                                 regulator-state-uv = <3300000>;
 833                         };
 834                 };
 835
 836                 dcdc3_reg: regulator@2 {
 837                         regulator-name= "vdd_logic";
 838                         regulator-min-microvolt = <700000>;
 839                         regulator-max-microvolt = <1500000>;
 840                         regulator-initial-state = <3>;
 841                         regulator-state-mem {
 842                                 regulator-state-enabled;
 843                                 regulator-state-uv = <1000000>;
 844                         };
 845
 846                 };
 847
 848                 dcdc4_reg: regulator@3 {
 849                         regulator-name= "act_dcdc4";
 850                         regulator-min-microvolt = <2000000>;
 851                         regulator-max-microvolt = <2000000>;
 852                                 regulator-initial-state = <3>;
 853                         regulator-state-mem {
 854                                 regulator-state-enabled;
 855                                 regulator-state-uv = <2000000>;
 856                         };
 857                 };
 858
 859                 ldo1_reg: regulator@4 {
 860                         regulator-name= "vccio_sd";
 861                         regulator-min-microvolt = <1800000>;
 862                         regulator-max-microvolt = <3300000>;
 863
 864                 };
 865
 866                 ldo2_reg: regulator@5 {
 867                         regulator-name= "act_ldo2";
 868                         regulator-min-microvolt = <1000000>;
 869                         regulator-max-microvolt = <1000000>;
 870
 871                 };
 872
 873                 ldo3_reg: regulator@6 {
 874                         regulator-name= "act_ldo3";
 875                         regulator-min-microvolt = <3300000>;
 876                         regulator-max-microvolt = <3300000>;
 877
 878                 };
 879
 880                 ldo4_reg:regulator@7 {
 881                         regulator-name= "act_ldo4";
 882                         regulator-min-microvolt = <3300000>;
 883                         regulator-max-microvolt = <3300000>;
 884
 885                 };
 886
 887                 ldo5_reg: regulator@8 {
 888                         regulator-name= "act_ldo5";
 889                         regulator-min-microvolt = <3300000>;
 890                         regulator-max-microvolt = <3300000>;
 891
 892                 };
 893
 894                 ldo6_reg: regulator@9 {
 895                         regulator-name= "act_ldo6";
 896                         regulator-min-microvolt = <1000000>;
 897                         regulator-max-microvolt = <1000000>;
 898                         regulator-initial-state = <3>;
 899                         regulator-state-mem {
 900                                 regulator-state-enabled;
 901                         };
 902
 903                 };
 904
 905                 ldo7_reg: regulator@10 {
 906                         regulator-name= "vcc_18";
 907                         regulator-min-microvolt = <1800000>;
 908                         regulator-max-microvolt = <1800000>;
 909                         regulator-initial-state = <3>;
 910                         regulator-state-mem {
 911                                 regulator-state-enabled;
 912                         };
 913
 914                 };
 915
 916                 ldo8_reg: regulator@11 {
 917                         regulator-name= "act_ldo8";
 918                         regulator-min-microvolt = <1800000>;
 919                         regulator-max-microvolt = <1800000>;
 920
 921                 };
 922         };
 923 };
 924
 925 &ion_cma {
 926        reg = <0x00000000 0x00000000>; /* 0MB */
 927 };
 928
 929 /*
 930 &dwc_control_usb {
 931         usb_uart {
 932                 status = "disabled";
 933         };
 934 };
 935
 936 &rk3288_cif_sensor{
 937         status = "okay";
 938 };
 939 */
 940
 941 &remotectl {
 942         handle_cpu_id = <1>;
 943         status = "okay";
 944         ir_key1{
 945                 rockchip,usercode = <0x4040>;
 946                 rockchip,key_table =
 947                         <0xf2   KEY_REPLY>,
 948                         <0xba   KEY_BACK>,
 949                         <0xf4   KEY_UP>,
 950                         <0xf1   KEY_DOWN>,
 951                         <0xef   KEY_LEFT>,
 952                         <0xee   KEY_RIGHT>,
 953                         <0xbd   KEY_HOME>,
 954                         <0xea   KEY_VOLUMEUP>,
 955                         <0xe3   KEY_VOLUMEDOWN>,
 956                         <0xe2   KEY_SEARCH>,
 957                         <0xb2   KEY_POWER>,
 958                         <0xbc   KEY_MUTE>,
 959                         <0xec   KEY_MENU>,
 960                         <0xbf   0x190>,
 961                         <0xe0   0x191>,
 962                         <0xe1   0x192>,
 963                         <0xe9   183>,
 964                         <0xe6   248>,
 965                         <0xe8   185>,
 966                         <0xe7   186>,
 967                         <0xf0   388>,
 968                         <0xbe   0x175>;
 969         };
 970         ir_key2{
 971                 rockchip,usercode = <0xff00>;
 972                 rockchip,key_table =
 973                         <0xf9   KEY_HOME>,
 974                         <0xbf   KEY_BACK>,
 975                         <0xfb   KEY_MENU>,
 976                         <0xaa   KEY_REPLY>,
 977                         <0xb9   KEY_UP>,
 978                         <0xe9   KEY_DOWN>,
 979                         <0xb8   KEY_LEFT>,
 980                         <0xea   KEY_RIGHT>,
 981                         <0xeb   KEY_VOLUMEDOWN>,
 982                         <0xef   KEY_VOLUMEUP>,
 983                         <0xf7   KEY_MUTE>,
 984                         <0xe7   KEY_POWER>,
 985                         <0xfc   KEY_POWER>,
 986                         <0xa9   KEY_VOLUMEDOWN>,
 987                         <0xa8   KEY_VOLUMEDOWN>,
 988                         <0xe0   KEY_VOLUMEDOWN>,
 989                         <0xa5   KEY_VOLUMEDOWN>,
 990                         <0xab   183>,
 991                         <0xb7   388>,
 992                         <0xf8   184>,
 993                         <0xaf   185>,
 994                         <0xed   KEY_VOLUMEDOWN>,
 995                         <0xee   186>,
 996                         <0xb3   KEY_VOLUMEDOWN>,
 997                         <0xf1   KEY_VOLUMEDOWN>,
 998                         <0xf2   KEY_VOLUMEDOWN>,
 999                         <0xf3   KEY_SEARCH>,
1000                         <0xb4   KEY_VOLUMEDOWN>,
1001                         <0xbe   KEY_SEARCH>;
1002         };
1003         ir_key3{
1004                 rockchip,usercode = <0x1dcc>;
1005                 rockchip,key_table =
1006                         <0xee   KEY_REPLY>,
1007                         <0xf0   KEY_BACK>,
1008                         <0xf8   KEY_UP>,
1009                         <0xbb   KEY_DOWN>,
1010                         <0xef   KEY_LEFT>,
1011                         <0xed   KEY_RIGHT>,
1012                         <0xfc   KEY_HOME>,
1013                         <0xf1   KEY_VOLUMEUP>,
1014                         <0xfd   KEY_VOLUMEDOWN>,
1015                         <0xb7   KEY_SEARCH>,
1016                         <0xff   KEY_POWER>,
1017                         <0xf3   KEY_MUTE>,
1018                         <0xbf   KEY_MENU>,
1019                         <0xf9   0x191>,
1020                         <0xf5   0x192>,
1021                         <0xb3   388>,
1022                         <0xbe   KEY_1>,
1023                         <0xba   KEY_2>,
1024                         <0xb2   KEY_3>,
1025                         <0xbd   KEY_4>,
1026                         <0xf9   KEY_5>,
1027                         <0xb1   KEY_6>,
1028                         <0xfc   KEY_7>,
1029                         <0xf8   KEY_8>,
1030                         <0xb0   KEY_9>,
1031                         <0xb6   KEY_0>,
1032                         <0xb5   KEY_BACKSPACE>;
1033         };
1034 };