ethernet: fix dts for rk3368-box
[firefly-linux-kernel-4.4.55.git] / arch / arm64 / boot / dts / rk3368-box.dts
1 /dts-v1/;
2
3 #include <dt-bindings/interrupt-controller/arm-gic.h>
4 #include <dt-bindings/rkfb/rk_fb.h>
5 #include <dt-bindings/input/input.h>
6 #include "rk3368.dtsi"
7 #include "../../../arm/boot/dts/vtl_ts_sdk8846.dtsi"
8 //#include "../../../arm/boot/dts/lcd-b101ew05.dtsi"
9 #include "../../../arm/boot/dts/lcd-box.dtsi"
10
11
12 / {
13         chosen {
14                 bootargs = "earlyprintk=uart8250-32bit,0xff690000 clk_ignore_unused";
15         };
16
17         wireless-wlan {
18                 compatible = "wlan-platdata";
19                 rockchip,grf = <&grf>;
20
21                 /* wifi_chip_type - wifi chip define
22                  * bcmwifi ==> like ap6xxx, rk90x;
23                  * rtkwifi ==> like rtl8188xx, rtl8723xx;
24                  * esp8089 ==> esp8089;
25                  * other   ==> for other wifi;
26                  */
27                 wifi_chip_type = "bcmwifi";
28
29                 sdio_vref = <1800>; //1800mv or 3300mv
30
31                 //keep_wifi_power_on;
32
33                 //power_ctrl_by_pmu;
34                 power_pmu_regulator = "act_ldo3";
35                 power_pmu_enable_level = <1>; //1->HIGH, 0->LOW
36
37                 //vref_ctrl_enable;
38                 //vref_ctrl_gpio = <&gpio0 GPIO_A2 GPIO_ACTIVE_HIGH>;
39                 vref_pmu_regulator = "act_ldo3";
40                 vref_pmu_enable_level = <1>; //1->HIGH, 0->LOW
41
42                 WIFI,poweren_gpio = <&gpio3 GPIO_A4 GPIO_ACTIVE_HIGH>;
43                 WIFI,host_wake_irq = <&gpio3 GPIO_A6 GPIO_ACTIVE_HIGH>;
44                 //WIFI,reset_gpio = <&gpio0 GPIO_A2 GPIO_ACTIVE_LOW>;
45
46                 status = "okay";
47         };
48
49         wireless-bluetooth {
50                 compatible = "bluetooth-platdata";
51
52                 //wifi-bt-power-toggle;
53
54                 uart_rts_gpios = <&gpio2 GPIO_D3 GPIO_ACTIVE_LOW>;
55                 pinctrl-names = "default","rts_gpio";
56                 pinctrl-0 = <&uart0_rts>;
57                 pinctrl-1 = <&uart0_rts_gpio>;
58
59                 BT,power_gpio = <&gpio3 GPIO_A3 GPIO_ACTIVE_HIGH>;
60                 BT,reset_gpio = <&gpio3 GPIO_A5 GPIO_ACTIVE_HIGH>;
61                 BT,wake_gpio = <&gpio3 GPIO_A2 GPIO_ACTIVE_HIGH>;
62                 BT,wake_host_irq = <&gpio3 GPIO_A7 GPIO_ACTIVE_HIGH>;
63                 status = "okay";
64         };
65
66         hallsensor {
67                compatible = "hall_och165t";
68                type = <SENSOR_TYPE_HALL>;
69                irq-gpio = <&gpio0 GPIO_C0 IRQ_TYPE_EDGE_BOTH>;
70         };
71
72         backlight {
73                 compatible = "pwm-backlight";
74                 pwms = <&pwm0 0 25000>;
75                 brightness-levels = <255 254 253 252 251 250 249 248 247 246 245 244 243 242 241 240
76                      239 238 237 236 235 234 233 232 231 230 229 228 227 226 225 224 223 222 221 220
77                      219 218 217 216 215 214 213 212 211 210 209 208 207 206 205 204 203 202 201 200
78                      199 198 197 196 195 194 193 192 191 190 189 188 187 186 185 184 183 182 181 180
79                      179 178 177 176 175 174 173 172 171 170 169 168 167 166 165 164 163 162 161 160
80                      159 158 157 156 155 154 153 152 151 150 149 148 147 146 145 144 143 142 141 140
81                      139 138 137 136 135 134 133 132 131 130 129 128 127 126 125 124 123 122 121 120
82                      119 118 117 116 115 114 113 112 111 110 109 108 107 106 105 104 103 102 101 100
83                      99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70
84                      69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40
85                      39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
86                      9 8 7 6 5 4 3 2 1 0>;
87                 default-brightness-level = <200>;
88                 enable-gpios = <&gpio0 GPIO_C4 GPIO_ACTIVE_HIGH>;
89                 status = "disabled"; 
90         };
91
92         pwm_regulator {
93                 compatible = "rockchip_pwm_regulator";
94                 pwms = <&pwm1 0 2000>;
95                 rockchip,pwm_id= <1>;
96                 rockchip,pwm_voltage_map= <925000 950000 975000 1000000 1025000 1050000 1075000 1100000 1125000 1150000 1175000 1200000 1225000 1250000 1275000 1300000 1325000 1350000 1375000 1400000>;
97                 rockchip,pwm_voltage= <1000000>;
98                 rockchip,pwm_min_voltage= <925000>;
99                 rockchip,pwm_max_voltage= <1400000>;
100                 rockchip,pwm_suspend_voltage= <950000>;
101                 rockchip,pwm_coefficient= <475>;
102                 regulators {
103                         #address-cells = <1>;
104                         #size-cells = <0>;
105                         pwm_reg0: regulator@0 {
106                                 regulator-compatible = "pwm_dcdc1";
107                                 regulator-name= "vdd_logic";
108                                 regulator-min-microvolt = <925000>;
109                                 regulator-max-microvolt = <1400000>;
110                                 regulator-always-on;
111                                 regulator-boot-on;
112                         };
113                 };
114                 test-power{
115                         status = "okay";
116                 };
117         };
118
119         codec_hdmi_i2s: codec-hdmi-i2s {
120                 compatible = "hdmi-i2s";
121         };
122
123         codec_hdmi_spdif: codec-hdmi-spdif {
124                 compatible = "hdmi-spdif";
125         };
126
127         rockchip-hdmi-i2s {
128                 compatible = "rockchip-hdmi-i2s";
129                 dais {
130                         dai0 {
131                                 audio-codec = <&codec_hdmi_i2s>;
132                                 i2s-controller = <&i2s0>;
133                                 format = "i2s";
134                                 //continuous-clock;
135                                 //bitclock-inversion;
136                                 //frame-inversion;
137                                 //bitclock-master;
138                                 //frame-master;
139                         };
140                 };
141         };
142
143         
144         
145         rockchip-spdif-card {
146                         compatible = "rockchip-spdif-card";
147                         dais {
148                                 dai0 {
149                                         audio-codec = <&codec_hdmi_spdif>;
150                                         i2s-controller = <&spdif>;
151                                 };
152                         };
153                 };
154         rockchip-rk1000 {
155                 compatible = "rockchip-rk1000";
156                 dais {
157                         dai0 {
158                                 audio-codec = <&rk1000_codec>;
159                                 i2s-controller = <&i2s0>;
160                                 format = "i2s";
161                         };
162                 };
163         };
164         rockchip-rt5631 {
165                 compatible = "rockchip-rt5631";
166                 dais {
167                         dai0 {
168                                 audio-codec = <&rt5631>;
169                                 i2s-controller = <&i2s0>;
170                                 format = "i2s";
171                                 //continuous-clock;
172                                 //bitclock-inversion;
173                                 //frame-inversion;
174                                 //bitclock-master;
175                                 //frame-master;
176                         };
177                 };
178         };
179
180         rockchip-rt3224 {
181                 compatible = "rockchip-rt3261";
182                 dais {
183                         dai0 {
184                                 audio-codec = <&rt3261>;
185                                 i2s-controller = <&i2s0>;
186                                 format = "i2s";
187                                 //continuous-clock;
188                                 //bitclock-inversion;
189                                 //frame-inversion;
190                                 //bitclock-master;
191                                 //frame-master;
192                         };
193                         dai1 {
194                                 audio-codec = <&rt3261>;
195                                 i2s-controller = <&i2s0>;
196                                 format = "dsp_a";
197                                 //continuous-clock;
198                                 bitclock-inversion;
199                                 //frame-inversion;
200                                 //bitclock-master;
201                                 //frame-master;
202                         };
203                 };
204         };
205
206         io-domains {
207                 compatible = "rockchip,rk3368-io-voltage-domain";
208                 rockchip,grf = <&grf>;
209                 rockchip,pmugrf = <&pmugrf>;
210
211                 /*GRF_IO_VSEL*/
212                 dvp-supply = <&ldo7_reg>;      /*DVPIO_VDD*/
213                 flash0-supply = <&dcdc2_reg>;  /*FLASH0_VDD*/
214                 wifi-supply = <&ldo7_reg>;     /*APIO2_VDD*/
215                 audio-supply = <&dcdc2_reg>;   /*APIO3_VDD*/
216                 sdcard-supply = <&ldo1_reg>;   /*SDMMC0_VDD*/
217                 gpio30-supply = <&dcdc2_reg>;  /*APIO1_VDD*/
218                 gpio1830-supply = <&dcdc2_reg>;/*ADIO4_VDD*/
219                 
220                 /*PMU_GRF_IO_VSEL*/
221                 pmu-supply = <&ldo5_reg>;      /*PMUIO_VDD*/
222                 vop-supply = <&ldo5_reg>;      /*LCDC_VDD*/
223         };
224 };
225
226 &gmac_clkin {
227         clock-frequency = <125000000>;
228 };
229
230 &gmac {
231         //power_ctl_by = "gpio";        //"gpio" "pmu"
232         //power-gpio = <&gpio0 GPIO_A6 GPIO_ACTIVE_HIGH>;
233         //power-pmu = "act_ldo"
234         reset-gpio = <&gpio3 GPIO_B4 GPIO_ACTIVE_LOW>;
235         phy-mode = "rgmii";
236         pinctrl-names = "default";
237         pinctrl-0 = <&rgmii_pins>;
238         clock_in_out = "input";
239         tx_delay = <0x28>;
240         rx_delay = <0x10>;
241         status = "okay"; //if want to use gmac, please set "okay"
242 };
243
244 &pinctrl {
245         //used for init some gpio
246         init-gpios = <&gpio0 GPIO_A6 GPIO_ACTIVE_HIGH
247         &gpio0 GPIO_B1 GPIO_ACTIVE_LOW>;
248         
249         gpio0_gpio {
250                 gpio0_c7: gpio0-c7 {
251                 rockchip,pins = <0 GPIO_C7 RK_FUNC_GPIO &pcfg_pull_down>;
252         };
253         gpio0_a3: gpio0-a3 {
254                 rockchip,pins = <0 GPIO_A3 RK_FUNC_3 &pcfg_pull_none>;
255         };
256         gpio0_c2: gpio0-c2 {
257                 rockchip,pins = <0 GPIO_C2 RK_FUNC_GPIO &pcfg_pull_down>;
258         };
259         
260         //to add
261         };
262
263 };
264
265 &nandc0 {
266         status = "disabled"; // used nand set "disabled" ,used emmc set "okay"
267 };
268
269 &nandc0reg {
270         status = "okay"; // used nand set "disabled" ,used emmc set "okay"
271 };
272
273 &emmc {
274         clock-frequency = <100000000>;
275         clock-freq-min-max = <400000 100000000>;
276
277         supports-highspeed;
278         supports-emmc;
279         bootpart-no-access;
280         
281         //supports-tSD;
282         //supports-DDR_MODE; //you should set the two value in your project. only close in RK3288-SDK board.
283         //caps2-mmc-hs200;
284         
285         ignore-pm-notify;
286         keep-power-in-suspend;
287         
288         //poll-hw-reset
289         status = "okay";
290 };
291
292 &sdmmc {
293         clock-frequency = <50000000>;
294         clock-freq-min-max = <400000 50000000>;
295         supports-highspeed;
296         supports-sd;
297         broken-cd;
298         card-detect-delay = <200>;
299         
300         ignore-pm-notify;
301         keep-power-in-suspend;
302         
303         vmmc-supply = <&ldo1_reg>;
304         status = "okay";
305 };
306
307 &edp{
308         status = "disabled";
309 };
310
311 &sdio {
312         clock-frequency = <50000000>;
313         clock-freq-min-max = <200000 50000000>;
314         supports-highspeed;
315         supports-sdio;
316         ignore-pm-notify;
317         keep-power-in-suspend;
318         //cap-sdio-irq;
319         status = "okay";
320 };
321
322 &spi0 {
323         status = "disabled";
324         max-freq = <48000000>;
325         /*
326         spi_test@00 {
327                 compatible = "rockchip,spi_test_bus0_cs0";
328                 reg = <0>;
329                 spi-max-frequency = <24000000>;
330                 //spi-cpha;
331                 //spi-cpol;
332                 poll_mode = <0>;
333                 type = <0>;
334                 enable_dma = <0>;
335
336         };
337
338         spi_test@01 {
339                 compatible = "rockchip,spi_test_bus0_cs1";
340                 reg = <1>;
341                 spi-max-frequency = <24000000>;
342                 spi-cpha;
343                 spi-cpol;
344                 poll_mode = <0>;
345                 type = <0>;
346                 enable_dma = <0>;
347         };
348         */
349 };
350
351 &spi1 {
352         status = "disabled";
353         max-freq = <48000000>;
354         /*
355         spi_test@10 {
356                 compatible = "rockchip,spi_test_bus1_cs0";
357                 reg = <0>;
358                 spi-max-frequency = <24000000>;
359                 //spi-cpha;
360                 //spi-cpol;
361                 poll_mode = <0>;
362                 type = <0>;
363                 enable_dma = <0>;
364         };
365         */
366 };
367
368 &spi2 {
369         status = "disabled";
370         max-freq = <48000000>;
371         /*
372         spi_test@20 {
373                 compatible = "rockchip,spi_test_bus2_cs0";
374                 reg = <0>;
375                 spi-max-frequency = <24000000>;
376                 //spi-cpha;
377                 //spi-cpol;
378                 poll_mode = <0>;
379                 type = <0>;
380                 enable_dma = <0>;
381         };
382
383         spi_test@21 {
384                 compatible = "rockchip,spi_test_bus2_cs1";
385                 reg = <1>;
386                 spi-max-frequency = <24000000>;
387                 //spi-cpha;
388                 //spi-cpol;
389                 poll_mode = <0>;
390                 type = <0>;
391                 enable_dma = <0>;
392         };
393         */
394 };
395
396 &uart_dbg {
397         status = "okay";
398 };
399
400 &uart_bt {
401         status = "okay";
402         dma-names = "!tx", "!rx";
403         pinctrl-0 = <&uart0_xfer &uart0_cts>;
404 };
405
406 &i2c0 {
407         status = "okay";
408         syr827: syr827@40 {
409                 compatible = "silergy,syr82x";
410                 reg = <0x40>;
411                 status = "okay";
412                 regulators {
413                         #address-cells = <1>;
414                         #size-cells = <0>;
415                         syr827_dc1: regulator@0 {
416                         reg = <0>;
417                         regulator-compatible = "syr82x_dcdc1";
418                         regulator-name = "vdd_arm";
419                         regulator-min-microvolt = <712500>;
420                         regulator-max-microvolt = <1500000>;
421                         regulator-always-on;
422                         regulator-boot-on;
423                         regulator-initial-mode = <0x2>;
424                         regulator-initial-state = <3>;
425                         regulator-state-mem {
426                                 regulator-state-mode = <0x2>;
427                                 regulator-state-disabled;
428                                 regulator-state-uv = <900000>;
429                         };
430                 };
431            };
432         };
433         syr828: syr828@41 {
434                 compatible = "silergy,syr82x";
435                 reg = <0x41>;
436                 status = "disabled";
437                 regulators {
438                         #address-cells = <1>;
439                         #size-cells = <0>;
440                         syr828_dc1: regulator@0 {
441                         reg = <0>;
442                         regulator-compatible = "syr82x_dcdc1";
443                         regulator-name = "vdd_gpu";
444                         regulator-min-microvolt = <712500>;
445                         regulator-max-microvolt = <1500000>;
446                         regulator-always-on;
447                         regulator-boot-on;
448                         regulator-initial-mode = <0x2>;
449                         regulator-initial-state = <3>;
450                         regulator-state-mem {
451                                 regulator-state-mode = <0x2>;
452                                 regulator-state-enabled;
453                                 regulator-state-uv = <900000>;
454                         };
455                 };
456            };
457         };
458         
459         act8846: act8846@5a {
460                 reg = <0x5a>;
461                 status = "diasbled";
462         };
463         
464         CW2015@62 {
465                 compatible = "cw201x";
466                 reg = <0x62>;
467                 dc_det_gpio = <&gpio0 GPIO_C1 GPIO_ACTIVE_LOW>;
468                 bat_low_gpio = <&gpio0 GPIO_C2 GPIO_ACTIVE_LOW>;
469                 chg_ok_gpio = <&gpio0 GPIO_D3 GPIO_ACTIVE_HIGH>;
470                 bat_config_info = <0x15 0x42 0x60 0x59 0x52 0x58 0x4D 0x48 0x48 0x44 0x44 0x46 0x49 0x48 0x32
471                         0x24 0x20 0x17 0x13 0x0F 0x19 0x3E 0x51 0x45 0x08 0x76 0x0B 0x85 0x0E 0x1C 0x2E 0x3E 0x4D 0x52 0x52
472                         0x57 0x3D 0x1B 0x6A 0x2D 0x25 0x43 0x52 0x87 0x8F 0x91 0x94 0x52 0x82 0x8C 0x92 0x96 0xFF 0x7B 0xBB
473                         0xCB 0x2F 0x7D 0x72 0xA5 0xB5 0xC1 0x46 0xAE>;
474                 is_dc_charge = <1>;
475                 is_usb_charge = <0>;
476                 status = "diasbled";
477         };
478         rtc@51 {
479                 compatible = "rtc,hym8563";
480                 reg = <0x51>;
481                 /*box not used rtc irq,and this pin used as rk1000 spk ctrl*/
482                 #irq_gpio = <&gpio0 GPIO_A1 IRQ_TYPE_EDGE_FALLING>;
483         };
484
485 };
486
487 &i2c1 {
488         status = "okay";
489         rk1000_control@40 {
490                 compatible = "rockchip,rk1000_control";
491                 reg = <0x40>;
492                 gpio-reset = <&gpio0 GPIO_A1 GPIO_ACTIVE_LOW>;
493                 #clocks = <&clk_i2s>, <&i2s_out>, <&clk_gates12 7>;
494                 #clock-names = "i2s_clk", "i2s_mclk", "i2s_hclk";
495                 #pinctrl-names = "default";
496                 #pinctrl-0 = <&i2s_mclk>;
497                 status = "okay";
498         };
499         rk1000_tve@42 {
500                 compatible = "rockchip,rk1000_tve";
501                 reg = <0x42>;
502                 rockchip,source = <0>; //0: LCDC0; 1: LCDC1
503                 rockchip,prop = <PRMRY>;//<EXTEND>
504                 status = "okay";
505         };
506         rk1000_codec: rk1000_codec@60 {
507                 compatible = "rockchip,rk1000_codec";
508                 reg = <0x60>;
509                 spk_ctl_io = <&gpio3 GPIO_D7 GPIO_ACTIVE_LOW>;
510                 boot_depop = <1>;
511                 pa_enable_time = <5000>;
512                 status = "okay";
513         };
514         mpu6050:mpu@68{
515                 compatible = "mpu6050";
516                 reg = <0x68>;
517                 mpu-int_config = <0x10>;
518                 mpu-level_shifter = <0>;
519                 mpu-orientation = <0 1 0 1 0 0 0 0 1>;
520                 orientation-x= <0>;
521                 orientation-y= <1>;
522                 orientation-z= <1>;
523                 irq-gpio = <&gpio3 GPIO_B6 IRQ_TYPE_LEVEL_LOW>;
524                 mpu-debug = <0>;
525                 status = "disabled";
526         };
527         ak8963:compass@0d{
528                 compatible = "mpu_ak8963";
529                 reg = <0x0d>;
530                 compass-bus = <0>;
531                 compass-adapt_num = <0>;
532                 compass-orientation = <1 0 0 0 1 0 0 0 1>;
533                 orientation-x= <0>;
534                 orientation-y= <0>;
535                 orientation-z= <1>;
536                 compass-debug = <1>;
537                 status = "disabled";
538         };
539         rt3261: rt3261@1c {
540                 compatible = "rt3261";
541                 reg = <0x1c>;
542                 spk-num= <2>;
543                 modem-input-mode = <1>;
544                 lout-to-modem_mode = <1>;
545                 spk-amplify = <2>;
546                 status = "disabled";
547         };
548 };
549
550 &i2c2 {
551         status = "disabled";
552         rt5631: rt5631@1a {
553                 compatible = "rt5631";
554                 reg = <0x1a>;
555         };
556         ts@01 {
557                 compatible = "ct,vtl_ts";
558                 reg = <0x01>;
559                 screen_max_x = <1536>;
560                 screen_max_y = <2048>;
561                 xy_swap = <1>;
562                 x_reverse = <0>;
563                 y_reverse = <0>;
564                 x_mul = <2>;
565                 y_mul = <2>;
566                 bin_ver = <0>;
567                 irq_gpio_number = <&gpio0 GPIO_B4 IRQ_TYPE_LEVEL_LOW>;
568                 rst_gpio_number = <&gpio0 GPIO_B3 GPIO_ACTIVE_HIGH>;
569         };
570 };
571
572 &i2c3 {
573         status = "disabled";
574 };
575
576 &i2c4 {
577         status = "disabled";
578 };
579
580 &i2c5 {
581         status = "disabled";
582 };
583
584
585 &fb {
586         rockchip,disp-mode = <NO_DUAL>;
587         rockchip,uboot-logo-on = <0>;
588 };
589
590 &rk_screen {
591         display-timings = <&disp_timings>;
592 };
593
594
595 &lvds {
596         status = "okay";
597         //pinctrl-names = "lcdc", "sleep";
598         //pinctrl-0 = <&lcdc_lcdc>;
599         //pinctrl-1 = <&lcdc_gpio>;
600 };
601
602 &lcdc {
603         status = "okay";
604         rockchip,mirror = <NO_MIRROR>;
605         rockchip,cabc_mode = <0>;
606         rockchip,fb-win-map = <FB_DEFAULT_ORDER>;
607         power_ctr: power_ctr {
608                 rockchip,debug = <0>;
609                 lcd_en:lcd_en {
610                         rockchip,power_type = <GPIO>;
611                         gpios = <&gpio0 GPIO_C6 GPIO_ACTIVE_HIGH>;
612                         rockchip,delay = <10>;
613                 };
614
615                 lcd_cs:lcd_cs {
616                         rockchip,power_type = <GPIO>;
617                         gpios = <&gpio0 GPIO_C5 GPIO_ACTIVE_HIGH>;
618                         rockchip,delay = <10>;
619                 };
620
621                 /*lcd_rst:lcd_rst {
622                         rockchip,power_type = <GPIO>;
623                         gpios = <&gpio3 GPIO_D6 GPIO_ACTIVE_HIGH>;
624                         rockchip,delay = <5>;
625                 };*/
626         };
627 };
628
629
630 &hdmi {
631         status = "okay";
632         rockchips,hdmi_audio_source = <0>;
633 };
634
635 &adc {
636         status = "disabled";
637
638         rockchip_headset {
639                 compatible = "rockchip_headset";
640                 headset_gpio = <&gpio0 GPIO_C7 GPIO_ACTIVE_LOW>;
641                 pinctrl-names = "default";
642                 pinctrl-0 = <&gpio0_c7>;//gpio0_c7
643                 io-channels = <&adc 2>;
644                 /*
645                 hook_gpio = ;
646                 hook_down_type = ; //interrupt hook key down status
647                 */
648        };
649
650         key {
651                 compatible = "rockchip,key";
652                 io-channels = <&adc 1>;
653
654                 vol-up-key {
655                         linux,code = <115>;
656                         label = "volume up";
657                         rockchip,adc_value = <1>;
658                 };
659
660                 vol-down-key {
661                         linux,code = <114>;
662                         label = "volume down";
663                         rockchip,adc_value = <170>;
664                 };
665
666                 power-key {
667                         gpios = <&gpio0 GPIO_A2 GPIO_ACTIVE_LOW>;
668                         linux,code = <116>;
669                         label = "power";
670                         gpio-key,wakeup;
671                 };
672
673                 menu-key {
674                         linux,code = <59>;
675                         label = "menu";
676                         rockchip,adc_value = <355>;
677                 };
678
679                 home-key {
680                         linux,code = <102>;
681                         label = "home";
682                         rockchip,adc_value = <746>;
683                 };
684
685                 back-key {
686                         linux,code = <158>;
687                         label = "back";
688                         rockchip,adc_value = <560>;
689                 };
690
691                 camera-key {
692                         linux,code = <212>;
693                         label = "camera";
694                         rockchip,adc_value = <450>;
695                 };
696         };
697 };
698
699 &pwm0 {
700         status = "disabled";
701 };
702
703 &clk_ddr_dvfs_table {
704         operating-points = <
705                 /* KHz    uV */
706                 200000 1050000
707                 300000 1050000
708                 400000 1100000
709                 533000 1150000
710                 >;
711
712         freq-table = <
713                 /*status                freq(KHz)*/
714                 SYS_STATUS_NORMAL       400000
715                 SYS_STATUS_SUSPEND      200000
716                 SYS_STATUS_VIDEO_1080P  240000
717                 SYS_STATUS_VIDEO_4K     400000
718                 SYS_STATUS_PERFORMANCE  528000
719                 SYS_STATUS_DUALVIEW     400000
720                 SYS_STATUS_BOOST        324000
721                 SYS_STATUS_ISP          400000
722                 >;
723         auto-freq-table = <
724                 240000
725                 324000
726                 396000
727                 528000
728                 >;
729         auto-freq=<0>;
730         status="disabled";
731 };
732
733 &dwc_control_usb {
734                 host_drv_gpio = <&gpio0 GPIO_A4 GPIO_ACTIVE_LOW>;
735                 otg_drv_gpio = <&gpio0 GPIO_D1 GPIO_ACTIVE_LOW>;
736
737                 rockchip,remote_wakeup;
738                 rockchip,usb_irq_wakeup;
739         };
740         
741 &usb0 {
742         /*0 - Normal, 1 - Force Host, 2 - Force Device*/
743         rockchip,usb-mode = <0>;
744 };
745
746 /include/ "../../../arm/boot/dts/act8846.dtsi"
747 &act8846 {
748         gpios =<&gpio0 GPIO_B0 GPIO_ACTIVE_LOW>,<&gpio0 GPIO_A3 GPIO_ACTIVE_HIGH>;
749         act8846,system-power-controller;
750
751         regulators {
752
753                 dcdc1_reg: regulator@0{
754                         regulator-name= "act_dcdc1";
755                         regulator-min-microvolt = <1200000>;
756                         regulator-max-microvolt = <1200000>;
757                         regulator-always-on;
758                         regulator-boot-on;
759                 };
760
761                 dcdc2_reg: regulator@1 {
762                         regulator-name= "vccio";
763                         regulator-min-microvolt = <3300000>;
764                         regulator-max-microvolt = <3300000>;
765                         regulator-initial-state = <3>;
766                         regulator-state-mem {
767                                 regulator-state-enabled;
768                                 regulator-state-uv = <3300000>;
769                         };
770                 };
771
772                 dcdc3_reg: regulator@2 {
773                         regulator-name= "vdd_logic";
774                         regulator-min-microvolt = <700000>;
775                         regulator-max-microvolt = <1500000>;
776                         regulator-initial-state = <3>;
777                         regulator-state-mem {
778                                 regulator-state-enabled;
779                                 regulator-state-uv = <1000000>;
780                         };
781
782                 };
783
784                 dcdc4_reg: regulator@3 {
785                         regulator-name= "act_dcdc4";
786                         regulator-min-microvolt = <2000000>;
787                         regulator-max-microvolt = <2000000>;
788                                 regulator-initial-state = <3>;
789                         regulator-state-mem {
790                                 regulator-state-enabled;
791                                 regulator-state-uv = <2000000>;
792                         };
793                 };
794
795                 ldo1_reg: regulator@4 {
796                         regulator-name= "vccio_sd";
797                         regulator-min-microvolt = <1800000>;
798                         regulator-max-microvolt = <3300000>;
799
800                 };
801
802                 ldo2_reg: regulator@5 {
803                         regulator-name= "act_ldo2";
804                         regulator-min-microvolt = <1000000>;
805                         regulator-max-microvolt = <1000000>;
806
807                 };
808
809                 ldo3_reg: regulator@6 {
810                         regulator-name= "act_ldo3";
811                         regulator-min-microvolt = <3300000>;
812                         regulator-max-microvolt = <3300000>;
813
814                 };
815
816                 ldo4_reg:regulator@7 {
817                         regulator-name= "act_ldo4";
818                         regulator-min-microvolt = <3300000>;
819                         regulator-max-microvolt = <3300000>;
820
821                 };
822
823                 ldo5_reg: regulator@8 {
824                         regulator-name= "act_ldo5";
825                         regulator-min-microvolt = <3300000>;
826                         regulator-max-microvolt = <3300000>;
827
828                 };
829
830                 ldo6_reg: regulator@9 {
831                         regulator-name= "act_ldo6";
832                         regulator-min-microvolt = <1000000>;
833                         regulator-max-microvolt = <1000000>;
834                         regulator-initial-state = <3>;
835                         regulator-state-mem {
836                                 regulator-state-enabled;
837                         };
838
839                 };
840
841                 ldo7_reg: regulator@10 {
842                         regulator-name= "vcc_18";
843                         regulator-min-microvolt = <1800000>;
844                         regulator-max-microvolt = <1800000>;
845                         regulator-initial-state = <3>;
846                         regulator-state-mem {
847                                 regulator-state-enabled;
848                         };
849
850                 };
851
852                 ldo8_reg: regulator@11 {
853                         regulator-name= "act_ldo8";
854                         regulator-min-microvolt = <1800000>;
855                         regulator-max-microvolt = <1800000>;
856
857                 };
858         };
859 };
860
861 &ion_cma {
862        reg = <0x00000000 0x28000000>; /* 640MB */
863 };
864
865 /*
866 &dwc_control_usb {
867         usb_uart {
868                 status = "disabled";
869         };
870 };
871
872 &rk3288_cif_sensor{
873         status = "okay";
874 };
875 */
876
877 &remotectl {
878         handle_cpu_id = <1>;
879         status = "okay";
880         ir_key1{
881                 rockchip,usercode = <0x4040>;
882                 rockchip,key_table =
883                         <0xf2   KEY_REPLY>,
884                         <0xba   KEY_BACK>,
885                         <0xf4   KEY_UP>,
886                         <0xf1   KEY_DOWN>,
887                         <0xef   KEY_LEFT>,
888                         <0xee   KEY_RIGHT>,
889                         <0xbd   KEY_HOME>,
890                         <0xea   KEY_VOLUMEUP>,
891                         <0xe3   KEY_VOLUMEDOWN>,
892                         <0xe2   KEY_SEARCH>,
893                         <0xb2   KEY_POWER>,
894                         <0xbc   KEY_MUTE>,
895                         <0xec   KEY_MENU>,
896                         <0xbf   0x190>,
897                         <0xe0   0x191>,
898                         <0xe1   0x192>,
899                         <0xe9   183>,
900                         <0xe6   248>,
901                         <0xe8   185>,
902                         <0xe7   186>,
903                         <0xf0   388>,
904                         <0xbe   0x175>;
905         };
906         ir_key2{
907                 rockchip,usercode = <0xff00>;
908                 rockchip,key_table =
909                         <0xf9   KEY_HOME>,
910                         <0xbf   KEY_BACK>,
911                         <0xfb   KEY_MENU>,
912                         <0xaa   KEY_REPLY>,
913                         <0xb9   KEY_UP>,
914                         <0xe9   KEY_DOWN>,
915                         <0xb8   KEY_LEFT>,
916                         <0xea   KEY_RIGHT>,
917                         <0xeb   KEY_VOLUMEDOWN>,
918                         <0xef   KEY_VOLUMEUP>,
919                         <0xf7   KEY_MUTE>,
920                         <0xe7   KEY_POWER>,
921                         <0xfc   KEY_POWER>,
922                         <0xa9   KEY_VOLUMEDOWN>,
923                         <0xa8   KEY_VOLUMEDOWN>,
924                         <0xe0   KEY_VOLUMEDOWN>,
925                         <0xa5   KEY_VOLUMEDOWN>,
926                         <0xab   183>,
927                         <0xb7   388>,
928                         <0xf8   184>,
929                         <0xaf   185>,
930                         <0xed   KEY_VOLUMEDOWN>,
931                         <0xee   186>,
932                         <0xb3   KEY_VOLUMEDOWN>,
933                         <0xf1   KEY_VOLUMEDOWN>,
934                         <0xf2   KEY_VOLUMEDOWN>,
935                         <0xf3   KEY_SEARCH>,
936                         <0xb4   KEY_VOLUMEDOWN>,
937                         <0xbe   KEY_SEARCH>;
938         };
939         ir_key3{
940                 rockchip,usercode = <0x1dcc>;
941                 rockchip,key_table =
942                         <0xee   KEY_REPLY>,
943                         <0xf0   KEY_BACK>,
944                         <0xf8   KEY_UP>,
945                         <0xbb   KEY_DOWN>,
946                         <0xef   KEY_LEFT>,
947                         <0xed   KEY_RIGHT>,
948                         <0xfc   KEY_HOME>,
949                         <0xf1   KEY_VOLUMEUP>,
950                         <0xfd   KEY_VOLUMEDOWN>,
951                         <0xb7   KEY_SEARCH>,
952                         <0xff   KEY_POWER>,
953                         <0xf3   KEY_MUTE>,
954                         <0xbf   KEY_MENU>,
955                         <0xf9   0x191>,
956                         <0xf5   0x192>,
957                         <0xb3   388>,
958                         <0xbe   KEY_1>,
959                         <0xba   KEY_2>,
960                         <0xb2   KEY_3>,
961                         <0xbd   KEY_4>,
962                         <0xf9   KEY_5>,
963                         <0xb1   KEY_6>,
964                         <0xfc   KEY_7>,
965                         <0xf8   KEY_8>,
966                         <0xb0   KEY_9>,
967                         <0xb6   KEY_0>,
968                         <0xb5   KEY_BACKSPACE>;
969         };
970 };