3 #include <dt-bindings/interrupt-controller/arm-gic.h>
4 #include <dt-bindings/rkfb/rk_fb.h>
5 #include <dt-bindings/input/input.h>
7 #include "../../../arm/boot/dts/vtl_ts_sdk8846.dtsi"
8 //#include "../../../arm/boot/dts/lcd-b101ew05.dtsi"
9 #include "../../../arm/boot/dts/lcd-box.dtsi"
14 bootargs = "earlyprintk=uart8250-32bit,0xff690000 clk_ignore_unused";
18 compatible = "wlan-platdata";
19 rockchip,grf = <&grf>;
21 /* wifi_chip_type - wifi chip define
22 * bcmwifi ==> like ap6xxx, rk90x;
23 * rtkwifi ==> like rtl8188xx, rtl8723xx;
24 * esp8089 ==> esp8089;
25 * other ==> for other wifi;
27 wifi_chip_type = "bcmwifi";
29 sdio_vref = <1800>; //1800mv or 3300mv
34 power_pmu_regulator = "act_ldo3";
35 power_pmu_enable_level = <1>; //1->HIGH, 0->LOW
38 //vref_ctrl_gpio = <&gpio0 GPIO_A2 GPIO_ACTIVE_HIGH>;
39 vref_pmu_regulator = "act_ldo3";
40 vref_pmu_enable_level = <1>; //1->HIGH, 0->LOW
42 WIFI,poweren_gpio = <&gpio3 GPIO_A4 GPIO_ACTIVE_HIGH>;
43 WIFI,host_wake_irq = <&gpio3 GPIO_A6 GPIO_ACTIVE_HIGH>;
44 //WIFI,reset_gpio = <&gpio0 GPIO_A2 GPIO_ACTIVE_LOW>;
50 compatible = "bluetooth-platdata";
52 //wifi-bt-power-toggle;
54 uart_rts_gpios = <&gpio2 GPIO_D3 GPIO_ACTIVE_LOW>;
55 pinctrl-names = "default","rts_gpio";
56 pinctrl-0 = <&uart0_rts>;
57 pinctrl-1 = <&uart0_rts_gpio>;
59 BT,power_gpio = <&gpio3 GPIO_A3 GPIO_ACTIVE_HIGH>;
60 BT,reset_gpio = <&gpio3 GPIO_A5 GPIO_ACTIVE_HIGH>;
61 BT,wake_gpio = <&gpio3 GPIO_A2 GPIO_ACTIVE_HIGH>;
62 BT,wake_host_irq = <&gpio3 GPIO_A7 GPIO_ACTIVE_HIGH>;
67 compatible = "hall_och165t";
68 type = <SENSOR_TYPE_HALL>;
69 irq-gpio = <&gpio0 GPIO_C0 IRQ_TYPE_EDGE_BOTH>;
73 compatible = "pwm-backlight";
74 pwms = <&pwm0 0 25000>;
75 brightness-levels = <255 254 253 252 251 250 249 248 247 246 245 244 243 242 241 240
76 239 238 237 236 235 234 233 232 231 230 229 228 227 226 225 224 223 222 221 220
77 219 218 217 216 215 214 213 212 211 210 209 208 207 206 205 204 203 202 201 200
78 199 198 197 196 195 194 193 192 191 190 189 188 187 186 185 184 183 182 181 180
79 179 178 177 176 175 174 173 172 171 170 169 168 167 166 165 164 163 162 161 160
80 159 158 157 156 155 154 153 152 151 150 149 148 147 146 145 144 143 142 141 140
81 139 138 137 136 135 134 133 132 131 130 129 128 127 126 125 124 123 122 121 120
82 119 118 117 116 115 114 113 112 111 110 109 108 107 106 105 104 103 102 101 100
83 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70
84 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40
85 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
87 default-brightness-level = <200>;
88 enable-gpios = <&gpio0 GPIO_C4 GPIO_ACTIVE_HIGH>;
93 compatible = "rockchip_pwm_regulator";
94 pwms = <&pwm1 0 2000>;
96 rockchip,pwm_voltage_map= <925000 950000 975000 1000000 1025000 1050000 1075000 1100000 1125000 1150000 1175000 1200000 1225000 1250000 1275000 1300000 1325000 1350000 1375000 1400000>;
97 rockchip,pwm_voltage= <1000000>;
98 rockchip,pwm_min_voltage= <925000>;
99 rockchip,pwm_max_voltage= <1400000>;
100 rockchip,pwm_suspend_voltage= <950000>;
101 rockchip,pwm_coefficient= <475>;
103 #address-cells = <1>;
105 pwm_reg0: regulator@0 {
106 regulator-compatible = "pwm_dcdc1";
107 regulator-name= "vdd_logic";
108 regulator-min-microvolt = <925000>;
109 regulator-max-microvolt = <1400000>;
119 codec_hdmi_i2s: codec-hdmi-i2s {
120 compatible = "hdmi-i2s";
123 codec_hdmi_spdif: codec-hdmi-spdif {
124 compatible = "hdmi-spdif";
128 compatible = "rockchip-hdmi-i2s";
131 audio-codec = <&codec_hdmi_i2s>;
132 i2s-controller = <&i2s0>;
135 //bitclock-inversion;
145 rockchip-spdif-card {
146 compatible = "rockchip-spdif-card";
149 audio-codec = <&codec_hdmi_spdif>;
150 i2s-controller = <&spdif>;
155 compatible = "rockchip-rk1000";
158 audio-codec = <&rk1000_codec>;
159 i2s-controller = <&i2s0>;
165 compatible = "rockchip-rt5631";
168 audio-codec = <&rt5631>;
169 i2s-controller = <&i2s0>;
172 //bitclock-inversion;
181 compatible = "rockchip-rt3261";
184 audio-codec = <&rt3261>;
185 i2s-controller = <&i2s0>;
188 //bitclock-inversion;
194 audio-codec = <&rt3261>;
195 i2s-controller = <&i2s0>;
207 compatible = "rockchip,rk3368-io-voltage-domain";
208 rockchip,grf = <&grf>;
209 rockchip,pmugrf = <&pmugrf>;
212 dvp-supply = <&ldo7_reg>; /*DVPIO_VDD*/
213 flash0-supply = <&dcdc2_reg>; /*FLASH0_VDD*/
214 wifi-supply = <&ldo7_reg>; /*APIO2_VDD*/
215 audio-supply = <&dcdc2_reg>; /*APIO3_VDD*/
216 sdcard-supply = <&ldo1_reg>; /*SDMMC0_VDD*/
217 gpio30-supply = <&dcdc2_reg>; /*APIO1_VDD*/
218 gpio1830-supply = <&dcdc2_reg>;/*ADIO4_VDD*/
221 pmu-supply = <&ldo5_reg>; /*PMUIO_VDD*/
222 vop-supply = <&ldo5_reg>; /*LCDC_VDD*/
227 clock-frequency = <125000000>;
231 //power_ctl_by = "gpio"; //"gpio" "pmu"
232 //power-gpio = <&gpio0 GPIO_A6 GPIO_ACTIVE_HIGH>;
233 //power-pmu = "act_ldo"
234 reset-gpio = <&gpio3 GPIO_B4 GPIO_ACTIVE_LOW>;
236 pinctrl-names = "default";
237 pinctrl-0 = <&rgmii_pins>;
238 clock_in_out = "input";
241 status = "okay"; //if want to use gmac, please set "okay"
245 //used for init some gpio
246 init-gpios = <&gpio0 GPIO_A6 GPIO_ACTIVE_HIGH
247 &gpio0 GPIO_B1 GPIO_ACTIVE_LOW>;
251 rockchip,pins = <0 GPIO_C7 RK_FUNC_GPIO &pcfg_pull_down>;
254 rockchip,pins = <0 GPIO_A3 RK_FUNC_3 &pcfg_pull_none>;
257 rockchip,pins = <0 GPIO_C2 RK_FUNC_GPIO &pcfg_pull_down>;
266 status = "disabled"; // used nand set "disabled" ,used emmc set "okay"
270 status = "okay"; // used nand set "disabled" ,used emmc set "okay"
274 clock-frequency = <100000000>;
275 clock-freq-min-max = <400000 100000000>;
282 //supports-DDR_MODE; //you should set the two value in your project. only close in RK3288-SDK board.
286 keep-power-in-suspend;
293 clock-frequency = <50000000>;
294 clock-freq-min-max = <400000 50000000>;
298 card-detect-delay = <200>;
301 keep-power-in-suspend;
303 vmmc-supply = <&ldo1_reg>;
312 clock-frequency = <50000000>;
313 clock-freq-min-max = <200000 50000000>;
317 keep-power-in-suspend;
324 max-freq = <48000000>;
327 compatible = "rockchip,spi_test_bus0_cs0";
329 spi-max-frequency = <24000000>;
339 compatible = "rockchip,spi_test_bus0_cs1";
341 spi-max-frequency = <24000000>;
353 max-freq = <48000000>;
356 compatible = "rockchip,spi_test_bus1_cs0";
358 spi-max-frequency = <24000000>;
370 max-freq = <48000000>;
373 compatible = "rockchip,spi_test_bus2_cs0";
375 spi-max-frequency = <24000000>;
384 compatible = "rockchip,spi_test_bus2_cs1";
386 spi-max-frequency = <24000000>;
402 dma-names = "!tx", "!rx";
403 pinctrl-0 = <&uart0_xfer &uart0_cts>;
409 compatible = "silergy,syr82x";
413 #address-cells = <1>;
415 syr827_dc1: regulator@0 {
417 regulator-compatible = "syr82x_dcdc1";
418 regulator-name = "vdd_arm";
419 regulator-min-microvolt = <712500>;
420 regulator-max-microvolt = <1500000>;
423 regulator-initial-mode = <0x2>;
424 regulator-initial-state = <3>;
425 regulator-state-mem {
426 regulator-state-mode = <0x2>;
427 regulator-state-disabled;
428 regulator-state-uv = <900000>;
434 compatible = "silergy,syr82x";
438 #address-cells = <1>;
440 syr828_dc1: regulator@0 {
442 regulator-compatible = "syr82x_dcdc1";
443 regulator-name = "vdd_gpu";
444 regulator-min-microvolt = <712500>;
445 regulator-max-microvolt = <1500000>;
448 regulator-initial-mode = <0x2>;
449 regulator-initial-state = <3>;
450 regulator-state-mem {
451 regulator-state-mode = <0x2>;
452 regulator-state-enabled;
453 regulator-state-uv = <900000>;
459 act8846: act8846@5a {
465 compatible = "cw201x";
467 dc_det_gpio = <&gpio0 GPIO_C1 GPIO_ACTIVE_LOW>;
468 bat_low_gpio = <&gpio0 GPIO_C2 GPIO_ACTIVE_LOW>;
469 chg_ok_gpio = <&gpio0 GPIO_D3 GPIO_ACTIVE_HIGH>;
470 bat_config_info = <0x15 0x42 0x60 0x59 0x52 0x58 0x4D 0x48 0x48 0x44 0x44 0x46 0x49 0x48 0x32
471 0x24 0x20 0x17 0x13 0x0F 0x19 0x3E 0x51 0x45 0x08 0x76 0x0B 0x85 0x0E 0x1C 0x2E 0x3E 0x4D 0x52 0x52
472 0x57 0x3D 0x1B 0x6A 0x2D 0x25 0x43 0x52 0x87 0x8F 0x91 0x94 0x52 0x82 0x8C 0x92 0x96 0xFF 0x7B 0xBB
473 0xCB 0x2F 0x7D 0x72 0xA5 0xB5 0xC1 0x46 0xAE>;
479 compatible = "rtc,hym8563";
481 /*box not used rtc irq,and this pin used as rk1000 spk ctrl*/
482 #irq_gpio = <&gpio0 GPIO_A1 IRQ_TYPE_EDGE_FALLING>;
490 compatible = "rockchip,rk1000_control";
492 gpio-reset = <&gpio0 GPIO_A1 GPIO_ACTIVE_LOW>;
493 #clocks = <&clk_i2s>, <&i2s_out>, <&clk_gates12 7>;
494 #clock-names = "i2s_clk", "i2s_mclk", "i2s_hclk";
495 #pinctrl-names = "default";
496 #pinctrl-0 = <&i2s_mclk>;
500 compatible = "rockchip,rk1000_tve";
502 rockchip,source = <0>; //0: LCDC0; 1: LCDC1
503 rockchip,prop = <PRMRY>;//<EXTEND>
506 rk1000_codec: rk1000_codec@60 {
507 compatible = "rockchip,rk1000_codec";
509 spk_ctl_io = <&gpio3 GPIO_D7 GPIO_ACTIVE_LOW>;
511 pa_enable_time = <5000>;
515 compatible = "mpu6050";
517 mpu-int_config = <0x10>;
518 mpu-level_shifter = <0>;
519 mpu-orientation = <0 1 0 1 0 0 0 0 1>;
523 irq-gpio = <&gpio3 GPIO_B6 IRQ_TYPE_LEVEL_LOW>;
528 compatible = "mpu_ak8963";
531 compass-adapt_num = <0>;
532 compass-orientation = <1 0 0 0 1 0 0 0 1>;
540 compatible = "rt3261";
543 modem-input-mode = <1>;
544 lout-to-modem_mode = <1>;
553 compatible = "rt5631";
557 compatible = "ct,vtl_ts";
559 screen_max_x = <1536>;
560 screen_max_y = <2048>;
567 irq_gpio_number = <&gpio0 GPIO_B4 IRQ_TYPE_LEVEL_LOW>;
568 rst_gpio_number = <&gpio0 GPIO_B3 GPIO_ACTIVE_HIGH>;
586 rockchip,disp-mode = <NO_DUAL>;
587 rockchip,uboot-logo-on = <0>;
591 display-timings = <&disp_timings>;
597 //pinctrl-names = "lcdc", "sleep";
598 //pinctrl-0 = <&lcdc_lcdc>;
599 //pinctrl-1 = <&lcdc_gpio>;
604 rockchip,mirror = <NO_MIRROR>;
605 rockchip,cabc_mode = <0>;
606 rockchip,fb-win-map = <FB_DEFAULT_ORDER>;
607 power_ctr: power_ctr {
608 rockchip,debug = <0>;
610 rockchip,power_type = <GPIO>;
611 gpios = <&gpio0 GPIO_C6 GPIO_ACTIVE_HIGH>;
612 rockchip,delay = <10>;
616 rockchip,power_type = <GPIO>;
617 gpios = <&gpio0 GPIO_C5 GPIO_ACTIVE_HIGH>;
618 rockchip,delay = <10>;
622 rockchip,power_type = <GPIO>;
623 gpios = <&gpio3 GPIO_D6 GPIO_ACTIVE_HIGH>;
624 rockchip,delay = <5>;
632 rockchips,hdmi_audio_source = <0>;
639 compatible = "rockchip_headset";
640 headset_gpio = <&gpio0 GPIO_C7 GPIO_ACTIVE_LOW>;
641 pinctrl-names = "default";
642 pinctrl-0 = <&gpio0_c7>;//gpio0_c7
643 io-channels = <&adc 2>;
646 hook_down_type = ; //interrupt hook key down status
651 compatible = "rockchip,key";
652 io-channels = <&adc 1>;
657 rockchip,adc_value = <1>;
662 label = "volume down";
663 rockchip,adc_value = <170>;
667 gpios = <&gpio0 GPIO_A2 GPIO_ACTIVE_LOW>;
676 rockchip,adc_value = <355>;
682 rockchip,adc_value = <746>;
688 rockchip,adc_value = <560>;
694 rockchip,adc_value = <450>;
703 &clk_ddr_dvfs_table {
714 SYS_STATUS_NORMAL 400000
715 SYS_STATUS_SUSPEND 200000
716 SYS_STATUS_VIDEO_1080P 240000
717 SYS_STATUS_VIDEO_4K 400000
718 SYS_STATUS_PERFORMANCE 528000
719 SYS_STATUS_DUALVIEW 400000
720 SYS_STATUS_BOOST 324000
721 SYS_STATUS_ISP 400000
734 host_drv_gpio = <&gpio0 GPIO_A4 GPIO_ACTIVE_LOW>;
735 otg_drv_gpio = <&gpio0 GPIO_D1 GPIO_ACTIVE_LOW>;
737 rockchip,remote_wakeup;
738 rockchip,usb_irq_wakeup;
742 /*0 - Normal, 1 - Force Host, 2 - Force Device*/
743 rockchip,usb-mode = <0>;
746 /include/ "../../../arm/boot/dts/act8846.dtsi"
748 gpios =<&gpio0 GPIO_B0 GPIO_ACTIVE_LOW>,<&gpio0 GPIO_A3 GPIO_ACTIVE_HIGH>;
749 act8846,system-power-controller;
753 dcdc1_reg: regulator@0{
754 regulator-name= "act_dcdc1";
755 regulator-min-microvolt = <1200000>;
756 regulator-max-microvolt = <1200000>;
761 dcdc2_reg: regulator@1 {
762 regulator-name= "vccio";
763 regulator-min-microvolt = <3300000>;
764 regulator-max-microvolt = <3300000>;
765 regulator-initial-state = <3>;
766 regulator-state-mem {
767 regulator-state-enabled;
768 regulator-state-uv = <3300000>;
772 dcdc3_reg: regulator@2 {
773 regulator-name= "vdd_logic";
774 regulator-min-microvolt = <700000>;
775 regulator-max-microvolt = <1500000>;
776 regulator-initial-state = <3>;
777 regulator-state-mem {
778 regulator-state-enabled;
779 regulator-state-uv = <1000000>;
784 dcdc4_reg: regulator@3 {
785 regulator-name= "act_dcdc4";
786 regulator-min-microvolt = <2000000>;
787 regulator-max-microvolt = <2000000>;
788 regulator-initial-state = <3>;
789 regulator-state-mem {
790 regulator-state-enabled;
791 regulator-state-uv = <2000000>;
795 ldo1_reg: regulator@4 {
796 regulator-name= "vccio_sd";
797 regulator-min-microvolt = <1800000>;
798 regulator-max-microvolt = <3300000>;
802 ldo2_reg: regulator@5 {
803 regulator-name= "act_ldo2";
804 regulator-min-microvolt = <1000000>;
805 regulator-max-microvolt = <1000000>;
809 ldo3_reg: regulator@6 {
810 regulator-name= "act_ldo3";
811 regulator-min-microvolt = <3300000>;
812 regulator-max-microvolt = <3300000>;
816 ldo4_reg:regulator@7 {
817 regulator-name= "act_ldo4";
818 regulator-min-microvolt = <3300000>;
819 regulator-max-microvolt = <3300000>;
823 ldo5_reg: regulator@8 {
824 regulator-name= "act_ldo5";
825 regulator-min-microvolt = <3300000>;
826 regulator-max-microvolt = <3300000>;
830 ldo6_reg: regulator@9 {
831 regulator-name= "act_ldo6";
832 regulator-min-microvolt = <1000000>;
833 regulator-max-microvolt = <1000000>;
834 regulator-initial-state = <3>;
835 regulator-state-mem {
836 regulator-state-enabled;
841 ldo7_reg: regulator@10 {
842 regulator-name= "vcc_18";
843 regulator-min-microvolt = <1800000>;
844 regulator-max-microvolt = <1800000>;
845 regulator-initial-state = <3>;
846 regulator-state-mem {
847 regulator-state-enabled;
852 ldo8_reg: regulator@11 {
853 regulator-name= "act_ldo8";
854 regulator-min-microvolt = <1800000>;
855 regulator-max-microvolt = <1800000>;
862 reg = <0x00000000 0x28000000>; /* 640MB */
881 rockchip,usercode = <0x4040>;
891 <0xe3 KEY_VOLUMEDOWN>,
907 rockchip,usercode = <0xff00>;
917 <0xeb KEY_VOLUMEDOWN>,
922 <0xa9 KEY_VOLUMEDOWN>,
923 <0xa8 KEY_VOLUMEDOWN>,
924 <0xe0 KEY_VOLUMEDOWN>,
925 <0xa5 KEY_VOLUMEDOWN>,
930 <0xed KEY_VOLUMEDOWN>,
932 <0xb3 KEY_VOLUMEDOWN>,
933 <0xf1 KEY_VOLUMEDOWN>,
934 <0xf2 KEY_VOLUMEDOWN>,
936 <0xb4 KEY_VOLUMEDOWN>,
940 rockchip,usercode = <0x1dcc>;
950 <0xfd KEY_VOLUMEDOWN>,
968 <0xb5 KEY_BACKSPACE>;