arch/arm64/boot/dts/rk3368-box.dts

   1 /dts-v1/;
   2
   3 #include <dt-bindings/interrupt-controller/arm-gic.h>
   4 #include <dt-bindings/rkfb/rk_fb.h>
   5 #include <dt-bindings/input/input.h>
   6 #include "rk3368.dtsi"
   7 #include "../../../arm/boot/dts/vtl_ts_sdk8846.dtsi"
   8 //#include "../../../arm/boot/dts/lcd-b101ew05.dtsi"
   9 #include "../../../arm/boot/dts/lcd-box.dtsi"
  10
  11
  12 / {
  13         chosen {
  14                 bootargs = "earlyprintk=uart8250-32bit,0xff690000 clk_ignore_unused";
  15         };
  16
  17         wireless-wlan {
  18                 compatible = "wlan-platdata";
  19                 rockchip,grf = <&grf>;
  20
  21                 /* wifi_chip_type - wifi chip define
  22                  * ap6210, ap6330, ap6335
  23                  * rtl8188eu, rtl8723bs, rtl8723bu
  24                  * esp8089
  25                 */
  26                 wifi_chip_type = "ap6335";
  27
  28                 sdio_vref = <1800>; //1800mv or 3300mv
  29
  30                 //keep_wifi_power_on;
  31
  32                 //power_ctrl_by_pmu;
  33                 power_pmu_regulator = "act_ldo3";
  34                 power_pmu_enable_level = <1>; //1->HIGH, 0->LOW
  35
  36                 //vref_ctrl_enable;
  37                 //vref_ctrl_gpio = <&gpio0 GPIO_A2 GPIO_ACTIVE_HIGH>;
  38                 vref_pmu_regulator = "act_ldo3";
  39                 vref_pmu_enable_level = <1>; //1->HIGH, 0->LOW
  40
  41                 WIFI,poweren_gpio = <&gpio3 GPIO_A4 GPIO_ACTIVE_HIGH>;
  42                 WIFI,host_wake_irq = <&gpio3 GPIO_A6 GPIO_ACTIVE_HIGH>;
  43                 //WIFI,reset_gpio = <&gpio0 GPIO_A2 GPIO_ACTIVE_LOW>;
  44
  45                 status = "okay";
  46         };
  47
  48         wireless-bluetooth {
  49                 compatible = "bluetooth-platdata";
  50
  51                 //wifi-bt-power-toggle;
  52
  53                 uart_rts_gpios = <&gpio2 GPIO_D3 GPIO_ACTIVE_LOW>;
  54                 pinctrl-names = "default","rts_gpio";
  55                 pinctrl-0 = <&uart0_rts>;
  56                 pinctrl-1 = <&uart0_rts_gpio>;
  57
  58                 BT,power_gpio = <&gpio3 GPIO_A3 GPIO_ACTIVE_HIGH>;
  59                 BT,reset_gpio = <&gpio3 GPIO_A5 GPIO_ACTIVE_HIGH>;
  60                 BT,wake_gpio = <&gpio3 GPIO_A2 GPIO_ACTIVE_HIGH>;
  61                 BT,wake_host_irq = <&gpio3 GPIO_A7 GPIO_ACTIVE_HIGH>;
  62                 status = "okay";
  63         };
  64
  65         hallsensor {
  66                compatible = "hall_och165t";
  67                type = <SENSOR_TYPE_HALL>;
  68                irq-gpio = <&gpio0 GPIO_C0 IRQ_TYPE_EDGE_BOTH>;
  69         };
  70
  71         backlight {
  72                 compatible = "pwm-backlight";
  73                 pwms = <&pwm0 0 25000>;
  74                 brightness-levels = <255 254 253 252 251 250 249 248 247 246 245 244 243 242 241 240
  75                      239 238 237 236 235 234 233 232 231 230 229 228 227 226 225 224 223 222 221 220
  76                      219 218 217 216 215 214 213 212 211 210 209 208 207 206 205 204 203 202 201 200
  77                      199 198 197 196 195 194 193 192 191 190 189 188 187 186 185 184 183 182 181 180
  78                      179 178 177 176 175 174 173 172 171 170 169 168 167 166 165 164 163 162 161 160
  79                      159 158 157 156 155 154 153 152 151 150 149 148 147 146 145 144 143 142 141 140
  80                      139 138 137 136 135 134 133 132 131 130 129 128 127 126 125 124 123 122 121 120
  81                      119 118 117 116 115 114 113 112 111 110 109 108 107 106 105 104 103 102 101 100
  82                      99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70
  83                      69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40
  84                      39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
  85                      9 8 7 6 5 4 3 2 1 0>;
  86                 default-brightness-level = <200>;
  87                 enable-gpios = <&gpio0 GPIO_C4 GPIO_ACTIVE_HIGH>;
  88                 status = "disabled";
  89         };
  90
  91         pwm_regulator {
  92                 compatible = "rockchip_pwm_regulator";
  93                 pwms = <&pwm1 0 2000>;
  94                 rockchip,pwm_id= <1>;
  95                 rockchip,pwm_voltage_map= <925000 950000 975000 1000000 1025000 1050000 1075000 1100000 1125000 1150000 1175000 1200000 1225000 1250000 1275000 1300000 1325000 1350000 1375000 1400000>;
  96                 rockchip,pwm_voltage= <1000000>;
  97                 rockchip,pwm_min_voltage= <925000>;
  98                 rockchip,pwm_max_voltage= <1400000>;
  99                 rockchip,pwm_suspend_voltage= <950000>;
 100                 rockchip,pwm_coefficient= <475>;
 101                 regulators {
 102                         #address-cells = <1>;
 103                         #size-cells = <0>;
 104                         pwm_reg0: regulator@0 {
 105                                 regulator-compatible = "pwm_dcdc1";
 106                                 regulator-name= "vdd_logic";
 107                                 regulator-min-microvolt = <925000>;
 108                                 regulator-max-microvolt = <1400000>;
 109                                 regulator-always-on;
 110                                 regulator-boot-on;
 111                         };
 112                 };
 113                 test-power{
 114                         status = "okay";
 115                 };
 116         };
 117
 118         codec_hdmi_i2s: codec-hdmi-i2s {
 119                 compatible = "hdmi-i2s";
 120         };
 121
 122         codec_hdmi_spdif: codec-hdmi-spdif {
 123                 compatible = "hdmi-spdif";
 124         };
 125
 126         rockchip-hdmi-i2s {
 127                 compatible = "rockchip-hdmi-i2s";
 128                 dais {
 129                         dai0 {
 130                                 audio-codec = <&codec_hdmi_i2s>;
 131                                 i2s-controller = <&i2s0>;
 132                                 format = "i2s";
 133                                 //continuous-clock;
 134                                 //bitclock-inversion;
 135                                 //frame-inversion;
 136                                 //bitclock-master;
 137                                 //frame-master;
 138                         };
 139                 };
 140         };
 141
 142
 143
 144         rockchip-spdif-card {
 145                         compatible = "rockchip-spdif-card";
 146                         dais {
 147                                 dai0 {
 148                                         audio-codec = <&codec_hdmi_spdif>;
 149                                         i2s-controller = <&spdif>;
 150                                 };
 151                         };
 152                 };
 153         rockchip-rk1000 {
 154                 compatible = "rockchip-rk1000";
 155                 dais {
 156                         dai0 {
 157                                 audio-codec = <&rk1000_codec>;
 158                                 i2s-controller = <&i2s0>;
 159                                 format = "i2s";
 160                         };
 161                 };
 162         };
 163         rockchip-rt5631 {
 164                 compatible = "rockchip-rt5631";
 165                 dais {
 166                         dai0 {
 167                                 audio-codec = <&rt5631>;
 168                                 i2s-controller = <&i2s0>;
 169                                 format = "i2s";
 170                                 //continuous-clock;
 171                                 //bitclock-inversion;
 172                                 //frame-inversion;
 173                                 //bitclock-master;
 174                                 //frame-master;
 175                         };
 176                 };
 177         };
 178
 179         rockchip-rt3224 {
 180                 compatible = "rockchip-rt3261";
 181                 dais {
 182                         dai0 {
 183                                 audio-codec = <&rt3261>;
 184                                 i2s-controller = <&i2s0>;
 185                                 format = "i2s";
 186                                 //continuous-clock;
 187                                 //bitclock-inversion;
 188                                 //frame-inversion;
 189                                 //bitclock-master;
 190                                 //frame-master;
 191                         };
 192                         dai1 {
 193                                 audio-codec = <&rt3261>;
 194                                 i2s-controller = <&i2s0>;
 195                                 format = "dsp_a";
 196                                 //continuous-clock;
 197                                 bitclock-inversion;
 198                                 //frame-inversion;
 199                                 //bitclock-master;
 200                                 //frame-master;
 201                         };
 202                 };
 203         };
 204
 205         io-domains {
 206                 compatible = "rockchip,rk3368-io-voltage-domain";
 207                 rockchip,grf = <&grf>;
 208                 rockchip,pmugrf = <&pmugrf>;
 209
 210                 /*GRF_IO_VSEL*/
 211                 dvp-supply = <&ldo7_reg>;      /*DVPIO_VDD*/
 212                 flash0-supply = <&dcdc2_reg>;  /*FLASH0_VDD*/
 213                 wifi-supply = <&ldo7_reg>;     /*APIO2_VDD*/
 214                 audio-supply = <&dcdc2_reg>;   /*APIO3_VDD*/
 215                 sdcard-supply = <&ldo1_reg>;   /*SDMMC0_VDD*/
 216                 gpio30-supply = <&dcdc2_reg>;  /*APIO1_VDD*/
 217                 gpio1830-supply = <&dcdc2_reg>;/*ADIO4_VDD*/
 218
 219                 /*PMU_GRF_IO_VSEL*/
 220                 pmu-supply = <&ldo5_reg>;      /*PMUIO_VDD*/
 221                 vop-supply = <&ldo5_reg>;      /*LCDC_VDD*/
 222         };
 223 };
 224
 225 &gmac_clkin {
 226         clock-frequency = <125000000>;
 227 };
 228
 229 &gmac {
 230         //power_ctl_by = "gpio";        //"gpio" "pmu"
 231         //power-gpio = <&gpio0 GPIO_A6 GPIO_ACTIVE_HIGH>;
 232         //power-pmu = "act_ldo"
 233         reset-gpio = <&gpio3 GPIO_B4 GPIO_ACTIVE_LOW>;
 234         phy-mode = "rgmii";
 235         pinctrl-names = "default";
 236         pinctrl-0 = <&rgmii_pins>;
 237         clock_in_out = "input";
 238         tx_delay = <0x28>;
 239         rx_delay = <0x10>;
 240         status = "okay"; //if want to use gmac, please set "okay"
 241 };
 242
 243 &pinctrl {
 244         //used for init some gpio
 245         init-gpios = <&gpio0 GPIO_A6 GPIO_ACTIVE_HIGH
 246         &gpio0 GPIO_B1 GPIO_ACTIVE_LOW>;
 247
 248         gpio0_gpio {
 249                 gpio0_c7: gpio0-c7 {
 250                 rockchip,pins = <0 GPIO_C7 RK_FUNC_GPIO &pcfg_pull_down>;
 251         };
 252         gpio0_a3: gpio0-a3 {
 253                 rockchip,pins = <0 GPIO_A3 RK_FUNC_3 &pcfg_pull_none>;
 254         };
 255         gpio0_c2: gpio0-c2 {
 256                 rockchip,pins = <0 GPIO_C2 RK_FUNC_GPIO &pcfg_pull_down>;
 257         };
 258
 259         //to add
 260         };
 261
 262 };
 263
 264 &nandc0 {
 265         status = "disabled"; // used nand set "disabled" ,used emmc set "okay"
 266 };
 267
 268 &nandc0reg {
 269         status = "okay"; // used nand set "disabled" ,used emmc set "okay"
 270 };
 271
 272 &emmc {
 273         clock-frequency = <150000000>;
 274         clock-freq-min-max = <400000 150000000>;
 275
 276         supports-highspeed;
 277         supports-emmc;
 278         bootpart-no-access;
 279
 280         //supports-tSD;
 281         supports-DDR_MODE; //you should set the two value in your project. only close in RK3288-SDK board.
 282         caps2-mmc-hs200;
 283
 284         ignore-pm-notify;
 285         keep-power-in-suspend;
 286
 287         //poll-hw-reset
 288         status = "okay";
 289 };
 290
 291 &sdmmc {
 292         clock-frequency = <50000000>;
 293         clock-freq-min-max = <400000 50000000>;
 294         supports-highspeed;
 295         supports-sd;
 296         broken-cd;
 297         card-detect-delay = <200>;
 298
 299         ignore-pm-notify;
 300         keep-power-in-suspend;
 301
 302         vmmc-supply = <&ldo1_reg>;
 303         status = "okay";
 304 };
 305
 306 &edp{
 307         status = "disabled";
 308 };
 309
 310 &sdio {
 311         clock-frequency = <50000000>;
 312         clock-freq-min-max = <200000 50000000>;
 313         supports-highspeed;
 314         supports-sdio;
 315         ignore-pm-notify;
 316         keep-power-in-suspend;
 317         //cap-sdio-irq;
 318         status = "okay";
 319 };
 320
 321 &spi0 {
 322         status = "disabled";
 323         max-freq = <48000000>;
 324         /*
 325         spi_test@00 {
 326                 compatible = "rockchip,spi_test_bus0_cs0";
 327                 reg = <0>;
 328                 spi-max-frequency = <24000000>;
 329                 //spi-cpha;
 330                 //spi-cpol;
 331                 poll_mode = <0>;
 332                 type = <0>;
 333                 enable_dma = <0>;
 334
 335         };
 336
 337         spi_test@01 {
 338                 compatible = "rockchip,spi_test_bus0_cs1";
 339                 reg = <1>;
 340                 spi-max-frequency = <24000000>;
 341                 spi-cpha;
 342                 spi-cpol;
 343                 poll_mode = <0>;
 344                 type = <0>;
 345                 enable_dma = <0>;
 346         };
 347         */
 348 };
 349
 350 &spi1 {
 351         status = "disabled";
 352         max-freq = <48000000>;
 353         /*
 354         spi_test@10 {
 355                 compatible = "rockchip,spi_test_bus1_cs0";
 356                 reg = <0>;
 357                 spi-max-frequency = <24000000>;
 358                 //spi-cpha;
 359                 //spi-cpol;
 360                 poll_mode = <0>;
 361                 type = <0>;
 362                 enable_dma = <0>;
 363         };
 364         */
 365 };
 366
 367 &spi2 {
 368         status = "disabled";
 369         max-freq = <48000000>;
 370         /*
 371         spi_test@20 {
 372                 compatible = "rockchip,spi_test_bus2_cs0";
 373                 reg = <0>;
 374                 spi-max-frequency = <24000000>;
 375                 //spi-cpha;
 376                 //spi-cpol;
 377                 poll_mode = <0>;
 378                 type = <0>;
 379                 enable_dma = <0>;
 380         };
 381
 382         spi_test@21 {
 383                 compatible = "rockchip,spi_test_bus2_cs1";
 384                 reg = <1>;
 385                 spi-max-frequency = <24000000>;
 386                 //spi-cpha;
 387                 //spi-cpol;
 388                 poll_mode = <0>;
 389                 type = <0>;
 390                 enable_dma = <0>;
 391         };
 392         */
 393 };
 394
 395 &uart_dbg {
 396         status = "okay";
 397 };
 398
 399 &uart_bt {
 400         status = "okay";
 401         dma-names = "!tx", "!rx";
 402         pinctrl-0 = <&uart0_xfer &uart0_cts>;
 403 };
 404
 405 &i2c0 {
 406         status = "okay";
 407         syr827: syr827@40 {
 408                 compatible = "silergy,syr82x";
 409                 reg = <0x40>;
 410                 status = "okay";
 411                 regulators {
 412                         #address-cells = <1>;
 413                         #size-cells = <0>;
 414                         syr827_dc1: regulator@0 {
 415                         reg = <0>;
 416                         regulator-compatible = "syr82x_dcdc1";
 417                         regulator-name = "vdd_arm";
 418                         regulator-min-microvolt = <712500>;
 419                         regulator-max-microvolt = <1500000>;
 420                         regulator-always-on;
 421                         regulator-boot-on;
 422                         regulator-initial-mode = <0x2>;
 423                         regulator-initial-state = <3>;
 424                         regulator-state-mem {
 425                                 regulator-state-mode = <0x2>;
 426                                 regulator-state-disabled;
 427                                 regulator-state-uv = <900000>;
 428                         };
 429                 };
 430            };
 431         };
 432         syr828: syr828@41 {
 433                 compatible = "silergy,syr82x";
 434                 reg = <0x41>;
 435                 status = "disabled";
 436                 regulators {
 437                         #address-cells = <1>;
 438                         #size-cells = <0>;
 439                         syr828_dc1: regulator@0 {
 440                         reg = <0>;
 441                         regulator-compatible = "syr82x_dcdc1";
 442                         regulator-name = "vdd_gpu";
 443                         regulator-min-microvolt = <712500>;
 444                         regulator-max-microvolt = <1500000>;
 445                         regulator-always-on;
 446                         regulator-boot-on;
 447                         regulator-initial-mode = <0x2>;
 448                         regulator-initial-state = <3>;
 449                         regulator-state-mem {
 450                                 regulator-state-mode = <0x2>;
 451                                 regulator-state-enabled;
 452                                 regulator-state-uv = <900000>;
 453                         };
 454                 };
 455            };
 456         };
 457
 458         act8846: act8846@5a {
 459                 reg = <0x5a>;
 460                 status = "diasbled";
 461         };
 462
 463         CW2015@62 {
 464                 compatible = "cw201x";
 465                 reg = <0x62>;
 466                 dc_det_gpio = <&gpio0 GPIO_C1 GPIO_ACTIVE_LOW>;
 467                 bat_low_gpio = <&gpio0 GPIO_C2 GPIO_ACTIVE_LOW>;
 468                 chg_ok_gpio = <&gpio0 GPIO_D3 GPIO_ACTIVE_HIGH>;
 469                 bat_config_info = <0x15 0x42 0x60 0x59 0x52 0x58 0x4D 0x48 0x48 0x44 0x44 0x46 0x49 0x48 0x32
 470                         0x24 0x20 0x17 0x13 0x0F 0x19 0x3E 0x51 0x45 0x08 0x76 0x0B 0x85 0x0E 0x1C 0x2E 0x3E 0x4D 0x52 0x52
 471                         0x57 0x3D 0x1B 0x6A 0x2D 0x25 0x43 0x52 0x87 0x8F 0x91 0x94 0x52 0x82 0x8C 0x92 0x96 0xFF 0x7B 0xBB
 472                         0xCB 0x2F 0x7D 0x72 0xA5 0xB5 0xC1 0x46 0xAE>;
 473                 is_dc_charge = <1>;
 474                 is_usb_charge = <0>;
 475                 status = "diasbled";
 476         };
 477         rtc@51 {
 478                 compatible = "rtc,hym8563";
 479                 reg = <0x51>;
 480                 /*box not used rtc irq,and this pin used as rk1000 spk ctrl*/
 481                 #irq_gpio = <&gpio0 GPIO_A1 IRQ_TYPE_EDGE_FALLING>;
 482         };
 483
 484 };
 485
 486 &i2c1 {
 487         status = "okay";
 488         rk1000_control@40 {
 489                 compatible = "rockchip,rk1000_control";
 490                 reg = <0x40>;
 491                 gpio-reset = <&gpio0 GPIO_A1 GPIO_ACTIVE_LOW>;
 492                 #clocks = <&clk_i2s>, <&i2s_out>, <&clk_gates12 7>;
 493                 #clock-names = "i2s_clk", "i2s_mclk", "i2s_hclk";
 494                 #pinctrl-names = "default";
 495                 #pinctrl-0 = <&i2s_mclk>;
 496                 status = "okay";
 497         };
 498         rk1000_tve@42 {
 499                 compatible = "rockchip,rk1000_tve";
 500                 reg = <0x42>;
 501                 rockchip,source = <0>; //0: LCDC0; 1: LCDC1
 502                 rockchip,prop = <PRMRY>;//<EXTEND>
 503                 status = "okay";
 504         };
 505         rk1000_codec: rk1000_codec@60 {
 506                 compatible = "rockchip,rk1000_codec";
 507                 reg = <0x60>;
 508                 spk_ctl_io = <&gpio3 GPIO_D7 GPIO_ACTIVE_LOW>;
 509                 boot_depop = <1>;
 510                 pa_enable_time = <5000>;
 511                 status = "okay";
 512         };
 513         mpu6050:mpu@68{
 514                 compatible = "mpu6050";
 515                 reg = <0x68>;
 516                 mpu-int_config = <0x10>;
 517                 mpu-level_shifter = <0>;
 518                 mpu-orientation = <0 1 0 1 0 0 0 0 1>;
 519                 orientation-x= <0>;
 520                 orientation-y= <1>;
 521                 orientation-z= <1>;
 522                 irq-gpio = <&gpio3 GPIO_B6 IRQ_TYPE_LEVEL_LOW>;
 523                 mpu-debug = <0>;
 524                 status = "disabled";
 525         };
 526         ak8963:compass@0d{
 527                 compatible = "mpu_ak8963";
 528                 reg = <0x0d>;
 529                 compass-bus = <0>;
 530                 compass-adapt_num = <0>;
 531                 compass-orientation = <1 0 0 0 1 0 0 0 1>;
 532                 orientation-x= <0>;
 533                 orientation-y= <0>;
 534                 orientation-z= <1>;
 535                 compass-debug = <1>;
 536                 status = "disabled";
 537         };
 538         rt3261: rt3261@1c {
 539                 compatible = "rt3261";
 540                 reg = <0x1c>;
 541                 spk-num= <2>;
 542                 modem-input-mode = <1>;
 543                 lout-to-modem_mode = <1>;
 544                 spk-amplify = <2>;
 545                 status = "disabled";
 546         };
 547 };
 548
 549 &i2c2 {
 550         status = "disabled";
 551         rt5631: rt5631@1a {
 552                 compatible = "rt5631";
 553                 reg = <0x1a>;
 554         };
 555         ts@01 {
 556                 compatible = "ct,vtl_ts";
 557                 reg = <0x01>;
 558                 screen_max_x = <1536>;
 559                 screen_max_y = <2048>;
 560                 xy_swap = <1>;
 561                 x_reverse = <0>;
 562                 y_reverse = <0>;
 563                 x_mul = <2>;
 564                 y_mul = <2>;
 565                 bin_ver = <0>;
 566                 irq_gpio_number = <&gpio0 GPIO_B4 IRQ_TYPE_LEVEL_LOW>;
 567                 rst_gpio_number = <&gpio0 GPIO_B3 GPIO_ACTIVE_HIGH>;
 568         };
 569 };
 570
 571 &i2c3 {
 572         status = "disabled";
 573 };
 574
 575 &i2c4 {
 576         status = "disabled";
 577 };
 578
 579 &i2c5 {
 580         status = "disabled";
 581 };
 582
 583
 584 &fb {
 585         rockchip,disp-mode = <NO_DUAL>;
 586         rockchip,uboot-logo-on = <0>;
 587 };
 588
 589 &disp_timings {
 590         native-mode = <&timing1>;
 591 };
 592
 593 &rk_screen {
 594         display-timings = <&disp_timings>;
 595 };
 596
 597
 598 &lvds {
 599         status = "okay";
 600         //pinctrl-names = "lcdc", "sleep";
 601         //pinctrl-0 = <&lcdc_lcdc>;
 602         //pinctrl-1 = <&lcdc_gpio>;
 603 };
 604
 605 &lcdc {
 606         status = "okay";
 607         rockchip,mirror = <NO_MIRROR>;
 608         rockchip,cabc_mode = <0>;
 609         rockchip,fb-win-map = <FB_DEFAULT_ORDER>;
 610         power_ctr: power_ctr {
 611                 rockchip,debug = <0>;
 612                 lcd_en:lcd_en {
 613                         rockchip,power_type = <GPIO>;
 614                         gpios = <&gpio0 GPIO_C6 GPIO_ACTIVE_HIGH>;
 615                         rockchip,delay = <10>;
 616                 };
 617
 618                 lcd_cs:lcd_cs {
 619                         rockchip,power_type = <GPIO>;
 620                         gpios = <&gpio0 GPIO_C5 GPIO_ACTIVE_HIGH>;
 621                         rockchip,delay = <10>;
 622                 };
 623
 624                 /*lcd_rst:lcd_rst {
 625                         rockchip,power_type = <GPIO>;
 626                         gpios = <&gpio3 GPIO_D6 GPIO_ACTIVE_HIGH>;
 627                         rockchip,delay = <5>;
 628                 };*/
 629         };
 630 };
 631
 632
 633 &hdmi {
 634         status = "okay";
 635         rockchips,hdmi_audio_source = <0>;
 636 };
 637
 638 &adc {
 639         status = "disabled";
 640
 641         rockchip_headset {
 642                 compatible = "rockchip_headset";
 643                 headset_gpio = <&gpio0 GPIO_C7 GPIO_ACTIVE_LOW>;
 644                 pinctrl-names = "default";
 645                 pinctrl-0 = <&gpio0_c7>;//gpio0_c7
 646                 io-channels = <&adc 2>;
 647                 /*
 648                 hook_gpio = ;
 649                 hook_down_type = ; //interrupt hook key down status
 650                 */
 651        };
 652
 653         key {
 654                 compatible = "rockchip,key";
 655                 io-channels = <&adc 1>;
 656
 657                 vol-up-key {
 658                         linux,code = <115>;
 659                         label = "volume up";
 660                         rockchip,adc_value = <1>;
 661                 };
 662
 663                 vol-down-key {
 664                         linux,code = <114>;
 665                         label = "volume down";
 666                         rockchip,adc_value = <170>;
 667                 };
 668
 669                 power-key {
 670                         gpios = <&gpio0 GPIO_A2 GPIO_ACTIVE_LOW>;
 671                         linux,code = <116>;
 672                         label = "power";
 673                         gpio-key,wakeup;
 674                 };
 675
 676                 menu-key {
 677                         linux,code = <59>;
 678                         label = "menu";
 679                         rockchip,adc_value = <355>;
 680                 };
 681
 682                 home-key {
 683                         linux,code = <102>;
 684                         label = "home";
 685                         rockchip,adc_value = <746>;
 686                 };
 687
 688                 back-key {
 689                         linux,code = <158>;
 690                         label = "back";
 691                         rockchip,adc_value = <560>;
 692                 };
 693
 694                 camera-key {
 695                         linux,code = <212>;
 696                         label = "camera";
 697                         rockchip,adc_value = <450>;
 698                 };
 699         };
 700 };
 701
 702 &pwm0 {
 703         status = "disabled";
 704 };
 705
 706 &pwm1 {
 707         status = "okay";
 708 };
 709 &clk_ddr_dvfs_table {
 710         operating-points = <
 711                 /* KHz    uV */
 712                 200000 1050000
 713                 300000 1050000
 714                 400000 1100000
 715                 533000 1150000
 716                 >;
 717
 718         freq-table = <
 719                 /*status                freq(KHz)*/
 720                 SYS_STATUS_NORMAL       400000
 721                 SYS_STATUS_SUSPEND      200000
 722                 SYS_STATUS_VIDEO_1080P  240000
 723                 SYS_STATUS_VIDEO_4K     400000
 724                 SYS_STATUS_PERFORMANCE  528000
 725                 SYS_STATUS_DUALVIEW     400000
 726                 SYS_STATUS_BOOST        324000
 727                 SYS_STATUS_ISP          400000
 728                 >;
 729         auto-freq-table = <
 730                 240000
 731                 324000
 732                 396000
 733                 528000
 734                 >;
 735         auto-freq=<0>;
 736         status="disabled";
 737 };
 738
 739 &dwc_control_usb {
 740                 host_drv_gpio = <&gpio0 GPIO_A4 GPIO_ACTIVE_LOW>;
 741                 otg_drv_gpio = <&gpio0 GPIO_D1 GPIO_ACTIVE_LOW>;
 742
 743                 rockchip,remote_wakeup;
 744                 rockchip,usb_irq_wakeup;
 745         };
 746
 747 &usb0 {
 748         /*0 - Normal, 1 - Force Host, 2 - Force Device*/
 749         rockchip,usb-mode = <0>;
 750 };
 751
 752 /include/ "../../../arm/boot/dts/act8846.dtsi"
 753 &act8846 {
 754         gpios =<&gpio0 GPIO_B0 GPIO_ACTIVE_LOW>,<&gpio0 GPIO_A3 GPIO_ACTIVE_HIGH>;
 755         act8846,system-power-controller;
 756
 757         regulators {
 758
 759                 dcdc1_reg: regulator@0{
 760                         regulator-name= "act_dcdc1";
 761                         regulator-min-microvolt = <1200000>;
 762                         regulator-max-microvolt = <1200000>;
 763                         regulator-always-on;
 764                         regulator-boot-on;
 765                 };
 766
 767                 dcdc2_reg: regulator@1 {
 768                         regulator-name= "vccio";
 769                         regulator-min-microvolt = <3300000>;
 770                         regulator-max-microvolt = <3300000>;
 771                         regulator-initial-state = <3>;
 772                         regulator-state-mem {
 773                                 regulator-state-enabled;
 774                                 regulator-state-uv = <3300000>;
 775                         };
 776                 };
 777
 778                 dcdc3_reg: regulator@2 {
 779                         regulator-name= "vdd_logic";
 780                         regulator-min-microvolt = <700000>;
 781                         regulator-max-microvolt = <1500000>;
 782                         regulator-initial-state = <3>;
 783                         regulator-state-mem {
 784                                 regulator-state-enabled;
 785                                 regulator-state-uv = <1000000>;
 786                         };
 787
 788                 };
 789
 790                 dcdc4_reg: regulator@3 {
 791                         regulator-name= "act_dcdc4";
 792                         regulator-min-microvolt = <2000000>;
 793                         regulator-max-microvolt = <2000000>;
 794                                 regulator-initial-state = <3>;
 795                         regulator-state-mem {
 796                                 regulator-state-enabled;
 797                                 regulator-state-uv = <2000000>;
 798                         };
 799                 };
 800
 801                 ldo1_reg: regulator@4 {
 802                         regulator-name= "vccio_sd";
 803                         regulator-min-microvolt = <1800000>;
 804                         regulator-max-microvolt = <3300000>;
 805
 806                 };
 807
 808                 ldo2_reg: regulator@5 {
 809                         regulator-name= "act_ldo2";
 810                         regulator-min-microvolt = <1000000>;
 811                         regulator-max-microvolt = <1000000>;
 812
 813                 };
 814
 815                 ldo3_reg: regulator@6 {
 816                         regulator-name= "act_ldo3";
 817                         regulator-min-microvolt = <3300000>;
 818                         regulator-max-microvolt = <3300000>;
 819
 820                 };
 821
 822                 ldo4_reg:regulator@7 {
 823                         regulator-name= "act_ldo4";
 824                         regulator-min-microvolt = <3300000>;
 825                         regulator-max-microvolt = <3300000>;
 826
 827                 };
 828
 829                 ldo5_reg: regulator@8 {
 830                         regulator-name= "act_ldo5";
 831                         regulator-min-microvolt = <3300000>;
 832                         regulator-max-microvolt = <3300000>;
 833
 834                 };
 835
 836                 ldo6_reg: regulator@9 {
 837                         regulator-name= "act_ldo6";
 838                         regulator-min-microvolt = <1000000>;
 839                         regulator-max-microvolt = <1000000>;
 840                         regulator-initial-state = <3>;
 841                         regulator-state-mem {
 842                                 regulator-state-enabled;
 843                         };
 844
 845                 };
 846
 847                 ldo7_reg: regulator@10 {
 848                         regulator-name= "vcc_18";
 849                         regulator-min-microvolt = <1800000>;
 850                         regulator-max-microvolt = <1800000>;
 851                         regulator-initial-state = <3>;
 852                         regulator-state-mem {
 853                                 regulator-state-enabled;
 854                         };
 855
 856                 };
 857
 858                 ldo8_reg: regulator@11 {
 859                         regulator-name= "act_ldo8";
 860                         regulator-min-microvolt = <1800000>;
 861                         regulator-max-microvolt = <1800000>;
 862
 863                 };
 864         };
 865 };
 866
 867 &ion_cma {
 868        reg = <0x00000000 0x28000000>; /* 640MB */
 869 };
 870
 871 /*
 872 &dwc_control_usb {
 873         usb_uart {
 874                 status = "disabled";
 875         };
 876 };
 877
 878 &rk3288_cif_sensor{
 879         status = "okay";
 880 };
 881 */
 882
 883 &remotectl {
 884         handle_cpu_id = <1>;
 885         status = "okay";
 886         ir_key1{
 887                 rockchip,usercode = <0x4040>;
 888                 rockchip,key_table =
 889                         <0xf2   KEY_REPLY>,
 890                         <0xba   KEY_BACK>,
 891                         <0xf4   KEY_UP>,
 892                         <0xf1   KEY_DOWN>,
 893                         <0xef   KEY_LEFT>,
 894                         <0xee   KEY_RIGHT>,
 895                         <0xbd   KEY_HOME>,
 896                         <0xea   KEY_VOLUMEUP>,
 897                         <0xe3   KEY_VOLUMEDOWN>,
 898                         <0xe2   KEY_SEARCH>,
 899                         <0xb2   KEY_POWER>,
 900                         <0xbc   KEY_MUTE>,
 901                         <0xec   KEY_MENU>,
 902                         <0xbf   0x190>,
 903                         <0xe0   0x191>,
 904                         <0xe1   0x192>,
 905                         <0xe9   183>,
 906                         <0xe6   248>,
 907                         <0xe8   185>,
 908                         <0xe7   186>,
 909                         <0xf0   388>,
 910                         <0xbe   0x175>;
 911         };
 912         ir_key2{
 913                 rockchip,usercode = <0xff00>;
 914                 rockchip,key_table =
 915                         <0xf9   KEY_HOME>,
 916                         <0xbf   KEY_BACK>,
 917                         <0xfb   KEY_MENU>,
 918                         <0xaa   KEY_REPLY>,
 919                         <0xb9   KEY_UP>,
 920                         <0xe9   KEY_DOWN>,
 921                         <0xb8   KEY_LEFT>,
 922                         <0xea   KEY_RIGHT>,
 923                         <0xeb   KEY_VOLUMEDOWN>,
 924                         <0xef   KEY_VOLUMEUP>,
 925                         <0xf7   KEY_MUTE>,
 926                         <0xe7   KEY_POWER>,
 927                         <0xfc   KEY_POWER>,
 928                         <0xa9   KEY_VOLUMEDOWN>,
 929                         <0xa8   KEY_VOLUMEDOWN>,
 930                         <0xe0   KEY_VOLUMEDOWN>,
 931                         <0xa5   KEY_VOLUMEDOWN>,
 932                         <0xab   183>,
 933                         <0xb7   388>,
 934                         <0xf8   184>,
 935                         <0xaf   185>,
 936                         <0xed   KEY_VOLUMEDOWN>,
 937                         <0xee   186>,
 938                         <0xb3   KEY_VOLUMEDOWN>,
 939                         <0xf1   KEY_VOLUMEDOWN>,
 940                         <0xf2   KEY_VOLUMEDOWN>,
 941                         <0xf3   KEY_SEARCH>,
 942                         <0xb4   KEY_VOLUMEDOWN>,
 943                         <0xbe   KEY_SEARCH>;
 944         };
 945         ir_key3{
 946                 rockchip,usercode = <0x1dcc>;
 947                 rockchip,key_table =
 948                         <0xee   KEY_REPLY>,
 949                         <0xf0   KEY_BACK>,
 950                         <0xf8   KEY_UP>,
 951                         <0xbb   KEY_DOWN>,
 952                         <0xef   KEY_LEFT>,
 953                         <0xed   KEY_RIGHT>,
 954                         <0xfc   KEY_HOME>,
 955                         <0xf1   KEY_VOLUMEUP>,
 956                         <0xfd   KEY_VOLUMEDOWN>,
 957                         <0xb7   KEY_SEARCH>,
 958                         <0xff   KEY_POWER>,
 959                         <0xf3   KEY_MUTE>,
 960                         <0xbf   KEY_MENU>,
 961                         <0xf9   0x191>,
 962                         <0xf5   0x192>,
 963                         <0xb3   388>,
 964                         <0xbe   KEY_1>,
 965                         <0xba   KEY_2>,
 966                         <0xb2   KEY_3>,
 967                         <0xbd   KEY_4>,
 968                         <0xf9   KEY_5>,
 969                         <0xb1   KEY_6>,
 970                         <0xfc   KEY_7>,
 971                         <0xf8   KEY_8>,
 972                         <0xb0   KEY_9>,
 973                         <0xb6   KEY_0>,
 974                         <0xb5   KEY_BACKSPACE>;
 975         };
 976 };