arch/arm64/boot/dts/rk3368-box-r88.dts

   1 /dts-v1/;
   2
   3 #include <dt-bindings/interrupt-controller/arm-gic.h>
   4 #include <dt-bindings/rkfb/rk_fb.h>
   5 #include <dt-bindings/input/input.h>
   6 #include "rk3368.dtsi"
   7 #include "../../../arm/boot/dts/vtl_ts_sdk8846.dtsi"
   8 //#include "../../../arm/boot/dts/lcd-b101ew05.dtsi"
   9 #include "../../../arm/boot/dts/lcd-box.dtsi"
  10
  11
  12 / {
  13         chosen {
  14                 bootargs = "earlyprintk=uart8250-32bit,0xff690000";
  15         };
  16
  17         wireless-wlan {
  18                 compatible = "wlan-platdata";
  19                 rockchip,grf = <&grf>;
  20
  21                 /* wifi_chip_type - wifi chip define
  22                  * ap6210, ap6330, ap6335
  23                  * rtl8188eu, rtl8723bs, rtl8723bu
  24                  * esp8089
  25                 */
  26                 wifi_chip_type = "ap6335";
  27
  28                 sdio_vref = <1800>; //1800mv or 3300mv
  29
  30                 //keep_wifi_power_on;
  31
  32                 //power_ctrl_by_pmu;
  33                 power_pmu_regulator = "act_ldo3";
  34                 power_pmu_enable_level = <1>; //1->HIGH, 0->LOW
  35
  36                 //vref_ctrl_enable;
  37                 //vref_ctrl_gpio = <&gpio0 GPIO_A2 GPIO_ACTIVE_HIGH>;
  38                 vref_pmu_regulator = "act_ldo3";
  39                 vref_pmu_enable_level = <1>; //1->HIGH, 0->LOW
  40
  41                 WIFI,poweren_gpio = <&gpio3 GPIO_A4 GPIO_ACTIVE_HIGH>;
  42                 WIFI,host_wake_irq = <&gpio3 GPIO_A6 GPIO_ACTIVE_HIGH>;
  43                 //WIFI,reset_gpio = <&gpio0 GPIO_A2 GPIO_ACTIVE_LOW>;
  44
  45                 status = "okay";
  46         };
  47
  48         wireless-bluetooth {
  49                 compatible = "bluetooth-platdata";
  50
  51                 //wifi-bt-power-toggle;
  52
  53                 uart_rts_gpios = <&gpio2 GPIO_D3 GPIO_ACTIVE_LOW>;
  54                 pinctrl-names = "default","rts_gpio";
  55                 pinctrl-0 = <&uart0_rts>;
  56                 pinctrl-1 = <&uart0_rts_gpio>;
  57
  58                 BT,power_gpio = <&gpio3 GPIO_A3 GPIO_ACTIVE_HIGH>;
  59                 BT,reset_gpio = <&gpio3 GPIO_A5 GPIO_ACTIVE_HIGH>;
  60                 BT,wake_gpio = <&gpio3 GPIO_A2 GPIO_ACTIVE_HIGH>;
  61                 BT,wake_host_irq = <&gpio3 GPIO_A7 GPIO_ACTIVE_HIGH>;
  62                 status = "okay";
  63         };
  64
  65         hallsensor {
  66                compatible = "hall_och165t";
  67                type = <SENSOR_TYPE_HALL>;
  68                irq-gpio = <&gpio0 GPIO_C0 IRQ_TYPE_EDGE_BOTH>;
  69         };
  70
  71         backlight {
  72                 compatible = "pwm-backlight";
  73                 pwms = <&pwm0 0 25000>;
  74                 brightness-levels = <255 254 253 252 251 250 249 248 247 246 245 244 243 242 241 240
  75                      239 238 237 236 235 234 233 232 231 230 229 228 227 226 225 224 223 222 221 220
  76                      219 218 217 216 215 214 213 212 211 210 209 208 207 206 205 204 203 202 201 200
  77                      199 198 197 196 195 194 193 192 191 190 189 188 187 186 185 184 183 182 181 180
  78                      179 178 177 176 175 174 173 172 171 170 169 168 167 166 165 164 163 162 161 160
  79                      159 158 157 156 155 154 153 152 151 150 149 148 147 146 145 144 143 142 141 140
  80                      139 138 137 136 135 134 133 132 131 130 129 128 127 126 125 124 123 122 121 120
  81                      119 118 117 116 115 114 113 112 111 110 109 108 107 106 105 104 103 102 101 100
  82                      99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70
  83                      69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40
  84                      39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
  85                      9 8 7 6 5 4 3 2 1 0>;
  86                 default-brightness-level = <200>;
  87                 enable-gpios = <&gpio0 GPIO_C4 GPIO_ACTIVE_HIGH>;
  88                 status = "disabled";
  89         };
  90
  91         pwm_regulator {
  92                 compatible = "rockchip_pwm_regulator";
  93                 pwms = <&pwm1 0 2000>;
  94                 rockchip,pwm_id= <1>;
  95                 rockchip,pwm_voltage_map= <900000 925000 950000 975000 1000000 1025000 1050000 1075000 1100000 1125000 1150000 1175000 1200000 1225000 1250000 1275000 1300000 1325000 1350000 1375000>;
  96                 rockchip,pwm_voltage= <1000000>;
  97                 rockchip,pwm_min_voltage= <900000>;
  98                 rockchip,pwm_max_voltage= <1375000>;
  99                 rockchip,pwm_suspend_voltage= <950000>;
 100                 rockchip,pwm_coefficient= <555>;
 101                 regulators {
 102                         #address-cells = <1>;
 103                         #size-cells = <0>;
 104                         pwm_reg0: regulator@0 {
 105                                 regulator-compatible = "pwm_dcdc1";
 106                                 regulator-name= "vdd_logic";
 107                                 regulator-min-microvolt = <900000>;
 108                                 regulator-max-microvolt = <1375000>;
 109                                 regulator-always-on;
 110                                 regulator-boot-on;
 111                         };
 112                 };
 113                 test-power{
 114                         status = "okay";
 115                 };
 116         };
 117
 118         codec_hdmi_i2s: codec-hdmi-i2s {
 119                 compatible = "hdmi-i2s";
 120         };
 121
 122         codec_hdmi_spdif: codec-hdmi-spdif {
 123                 compatible = "hdmi-spdif";
 124         };
 125
 126         rockchip-hdmi-i2s {
 127                 status = "disabled";
 128                 compatible = "rockchip-hdmi-i2s";
 129                 dais {
 130                         dai0 {
 131                                 audio-codec = <&codec_hdmi_i2s>;
 132                                 i2s-controller = <&i2s0>;
 133                                 format = "i2s";
 134                                 //continuous-clock;
 135                                 //bitclock-inversion;
 136                                 //frame-inversion;
 137                                 //bitclock-master;
 138                                 //frame-master;
 139                         };
 140                 };
 141         };
 142
 143
 144
 145         rockchip-spdif-card {
 146                         compatible = "rockchip-spdif-card";
 147                         dais {
 148                                 dai0 {
 149                                         audio-codec = <&codec_hdmi_spdif>;
 150                                         i2s-controller = <&spdif>;
 151                                 };
 152                         };
 153                 };
 154         rockchip-rk1000 {
 155                 compatible = "rockchip-rk1000";
 156                 dais {
 157                         dai0 {
 158                                 audio-codec = <&rk1000_codec>;
 159                                 i2s-controller = <&i2s0>;
 160                                 format = "i2s";
 161                         };
 162                 };
 163         };
 164         rockchip-rt5631 {
 165                 compatible = "rockchip-rt5631";
 166                 dais {
 167                         dai0 {
 168                                 audio-codec = <&rt5631>;
 169                                 i2s-controller = <&i2s0>;
 170                                 format = "i2s";
 171                                 //continuous-clock;
 172                                 //bitclock-inversion;
 173                                 //frame-inversion;
 174                                 //bitclock-master;
 175                                 //frame-master;
 176                         };
 177                 };
 178         };
 179
 180         rockchip-rt3224 {
 181                 compatible = "rockchip-rt3261";
 182                 dais {
 183                         dai0 {
 184                                 audio-codec = <&rt3261>;
 185                                 i2s-controller = <&i2s0>;
 186                                 format = "i2s";
 187                                 //continuous-clock;
 188                                 //bitclock-inversion;
 189                                 //frame-inversion;
 190                                 //bitclock-master;
 191                                 //frame-master;
 192                         };
 193                         dai1 {
 194                                 audio-codec = <&rt3261>;
 195                                 i2s-controller = <&i2s0>;
 196                                 format = "dsp_a";
 197                                 //continuous-clock;
 198                                 bitclock-inversion;
 199                                 //frame-inversion;
 200                                 //bitclock-master;
 201                                 //frame-master;
 202                         };
 203                 };
 204         };
 205         power-led {
 206                 compatible = "gpio-leds";
 207                 green {
 208                         gpios = <&gpio3 GPIO_D5 GPIO_ACTIVE_LOW>;
 209                         default-state = "on";
 210                 };
 211         };
 212         io-domains {
 213                 compatible = "rockchip,rk3368-io-voltage-domain";
 214                 rockchip,grf = <&grf>;
 215                 rockchip,pmugrf = <&pmugrf>;
 216
 217                 /*GRF_IO_VSEL*/
 218                 dvp-supply = <&ldo7_reg>;      /*DVPIO_VDD*/
 219                 flash0-supply = <&dcdc2_reg>;  /*FLASH0_VDD*/
 220                 wifi-supply = <&ldo7_reg>;     /*APIO2_VDD*/
 221                 audio-supply = <&dcdc2_reg>;   /*APIO3_VDD*/
 222                 sdcard-supply = <&ldo1_reg>;   /*SDMMC0_VDD*/
 223                 gpio30-supply = <&dcdc2_reg>;  /*APIO1_VDD*/
 224                 gpio1830-supply = <&dcdc2_reg>;/*ADIO4_VDD*/
 225
 226                 /*PMU_GRF_IO_VSEL*/
 227                 pmu-supply = <&ldo5_reg>;      /*PMUIO_VDD*/
 228                 vop-supply = <&ldo5_reg>;      /*LCDC_VDD*/
 229         };
 230 };
 231
 232 &gmac_clkin {
 233         clock-frequency = <50000000>;
 234 };
 235
 236 &gmac {
 237         //power_ctl_by = "gpio";        //"gpio" "pmu"
 238         //power-gpio = <&gpio0 GPIO_A6 GPIO_ACTIVE_HIGH>;
 239         //power-pmu = "act_ldo"
 240         reset-gpio = <&gpio3 GPIO_B4 GPIO_ACTIVE_LOW>;
 241         phy-mode = "rmii";
 242         pinctrl-names = "default";
 243         pinctrl-0 = <&rmii_pins>;
 244         clock_in_out = "output";
 245         tx_delay = <0x28>;
 246         rx_delay = <0x10>;
 247         status = "okay"; //if want to use gmac, please set "okay"
 248 };
 249
 250 &pinctrl {
 251         //used for init some gpio
 252         init-gpios = <&gpio0 GPIO_A6 GPIO_ACTIVE_HIGH
 253         &gpio0 GPIO_B1 GPIO_ACTIVE_LOW>;
 254
 255         gpio0_gpio {
 256                 gpio0_c7: gpio0-c7 {
 257                 rockchip,pins = <0 GPIO_C7 RK_FUNC_GPIO &pcfg_pull_down>;
 258         };
 259         gpio0_a3: gpio0-a3 {
 260                 rockchip,pins = <0 GPIO_A3 RK_FUNC_3 &pcfg_pull_none>;
 261         };
 262         gpio0_c2: gpio0-c2 {
 263                 rockchip,pins = <0 GPIO_C2 RK_FUNC_GPIO &pcfg_pull_down>;
 264         };
 265
 266         //to add
 267         };
 268
 269 };
 270
 271 &nandc0 {
 272         status = "disabled"; // used nand set "disabled" ,used emmc set "okay"
 273 };
 274
 275 &nandc0reg {
 276         status = "okay"; // used nand set "disabled" ,used emmc set "okay"
 277 };
 278
 279 &emmc {
 280         clock-frequency = <150000000>;
 281         clock-freq-min-max = <400000 150000000>;
 282
 283         supports-highspeed;
 284         supports-emmc;
 285         bootpart-no-access;
 286
 287         //supports-sd;
 288         supports-DDR_MODE; //you should set the two value in your project. only close in RK3288-SDK board.
 289         caps2-mmc-hs200;
 290
 291         ignore-pm-notify;
 292         keep-power-in-suspend;
 293
 294         //poll-hw-reset
 295         status = "okay";
 296 };
 297
 298 &sdmmc {
 299         clock-frequency = <50000000>;
 300         clock-freq-min-max = <400000 50000000>;
 301         supports-highspeed;
 302         supports-sd;
 303         broken-cd;
 304         card-detect-delay = <200>;
 305
 306         ignore-pm-notify;
 307         keep-power-in-suspend;
 308
 309         vmmc-supply = <&ldo1_reg>;
 310         status = "okay";
 311 };
 312
 313 &edp{
 314         status = "disabled";
 315 };
 316
 317 &sdio {
 318         clock-frequency = <50000000>;
 319         clock-freq-min-max = <200000 50000000>;
 320         supports-highspeed;
 321         supports-sdio;
 322         ignore-pm-notify;
 323         keep-power-in-suspend;
 324         //cap-sdio-irq;
 325         status = "okay";
 326 };
 327
 328 &spi0 {
 329         status = "disabled";
 330         max-freq = <48000000>;
 331         /*
 332         spi_test@00 {
 333                 compatible = "rockchip,spi_test_bus0_cs0";
 334                 reg = <0>;
 335                 spi-max-frequency = <24000000>;
 336                 //spi-cpha;
 337                 //spi-cpol;
 338                 poll_mode = <0>;
 339                 type = <0>;
 340                 enable_dma = <0>;
 341
 342         };
 343
 344         spi_test@01 {
 345                 compatible = "rockchip,spi_test_bus0_cs1";
 346                 reg = <1>;
 347                 spi-max-frequency = <24000000>;
 348                 spi-cpha;
 349                 spi-cpol;
 350                 poll_mode = <0>;
 351                 type = <0>;
 352                 enable_dma = <0>;
 353         };
 354         */
 355 };
 356
 357 &spi1 {
 358         status = "disabled";
 359         max-freq = <48000000>;
 360         /*
 361         spi_test@10 {
 362                 compatible = "rockchip,spi_test_bus1_cs0";
 363                 reg = <0>;
 364                 spi-max-frequency = <24000000>;
 365                 //spi-cpha;
 366                 //spi-cpol;
 367                 poll_mode = <0>;
 368                 type = <0>;
 369                 enable_dma = <0>;
 370         };
 371         */
 372 };
 373
 374 &spi2 {
 375         status = "disabled";
 376         max-freq = <48000000>;
 377         /*
 378         spi_test@20 {
 379                 compatible = "rockchip,spi_test_bus2_cs0";
 380                 reg = <0>;
 381                 spi-max-frequency = <24000000>;
 382                 //spi-cpha;
 383                 //spi-cpol;
 384                 poll_mode = <0>;
 385                 type = <0>;
 386                 enable_dma = <0>;
 387         };
 388
 389         spi_test@21 {
 390                 compatible = "rockchip,spi_test_bus2_cs1";
 391                 reg = <1>;
 392                 spi-max-frequency = <24000000>;
 393                 //spi-cpha;
 394                 //spi-cpol;
 395                 poll_mode = <0>;
 396                 type = <0>;
 397                 enable_dma = <0>;
 398         };
 399         */
 400 };
 401
 402 &uart_dbg {
 403         status = "okay";
 404 };
 405
 406 &uart_bt {
 407         status = "okay";
 408         dma-names = "!tx", "!rx";
 409         pinctrl-0 = <&uart0_xfer &uart0_cts>;
 410 };
 411
 412 &tsadc {
 413        tsadc-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */
 414        //tsadc-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */
 415        status = "okay";
 416 };
 417
 418 &i2c0 {
 419         status = "okay";
 420         syr827: syr827@40 {
 421                 compatible = "silergy,syr82x";
 422                 reg = <0x40>;
 423                 status = "okay";
 424                 regulators {
 425                         #address-cells = <1>;
 426                         #size-cells = <0>;
 427                         syr827_dc1: regulator@0 {
 428                         reg = <0>;
 429                         regulator-compatible = "syr82x_dcdc1";
 430                         regulator-name = "vdd_arm";
 431                         regulator-min-microvolt = <712500>;
 432                         regulator-max-microvolt = <1500000>;
 433                         regulator-always-on;
 434                         regulator-boot-on;
 435                         regulator-initial-mode = <0x1>;
 436                         regulator-initial-state = <3>;
 437                         regulator-state-mem {
 438                                 regulator-state-mode = <0x2>;
 439                                 regulator-state-disabled;
 440                                 regulator-state-uv = <900000>;
 441                         };
 442                 };
 443            };
 444         };
 445         syr828: syr828@41 {
 446                 compatible = "silergy,syr82x";
 447                 reg = <0x41>;
 448                 status = "disabled";
 449                 regulators {
 450                         #address-cells = <1>;
 451                         #size-cells = <0>;
 452                         syr828_dc1: regulator@0 {
 453                         reg = <0>;
 454                         regulator-compatible = "syr82x_dcdc1";
 455                         regulator-name = "vdd_gpu";
 456                         regulator-min-microvolt = <712500>;
 457                         regulator-max-microvolt = <1500000>;
 458                         regulator-always-on;
 459                         regulator-boot-on;
 460                         regulator-initial-mode = <0x1>;
 461                         regulator-initial-state = <3>;
 462                         regulator-state-mem {
 463                                 regulator-state-mode = <0x2>;
 464                                 regulator-state-enabled;
 465                                 regulator-state-uv = <900000>;
 466                         };
 467                 };
 468            };
 469         };
 470
 471         act8846: act8846@5a {
 472                 reg = <0x5a>;
 473                 status = "diasbled";
 474         };
 475
 476         CW2015@62 {
 477                 compatible = "cw201x";
 478                 reg = <0x62>;
 479                 dc_det_gpio = <&gpio0 GPIO_C1 GPIO_ACTIVE_LOW>;
 480                 bat_low_gpio = <&gpio0 GPIO_C2 GPIO_ACTIVE_LOW>;
 481                 chg_ok_gpio = <&gpio0 GPIO_D3 GPIO_ACTIVE_HIGH>;
 482                 bat_config_info = <0x15 0x42 0x60 0x59 0x52 0x58 0x4D 0x48 0x48 0x44 0x44 0x46 0x49 0x48 0x32
 483                         0x24 0x20 0x17 0x13 0x0F 0x19 0x3E 0x51 0x45 0x08 0x76 0x0B 0x85 0x0E 0x1C 0x2E 0x3E 0x4D 0x52 0x52
 484                         0x57 0x3D 0x1B 0x6A 0x2D 0x25 0x43 0x52 0x87 0x8F 0x91 0x94 0x52 0x82 0x8C 0x92 0x96 0xFF 0x7B 0xBB
 485                         0xCB 0x2F 0x7D 0x72 0xA5 0xB5 0xC1 0x46 0xAE>;
 486                 is_dc_charge = <1>;
 487                 is_usb_charge = <0>;
 488                 status = "diasbled";
 489         };
 490         rtc@51 {
 491                 compatible = "rtc,hym8563";
 492                 reg = <0x51>;
 493                 /*box not used rtc irq,and this pin used as rk1000 spk ctrl*/
 494                 #irq_gpio = <&gpio0 GPIO_A1 IRQ_TYPE_EDGE_FALLING>;
 495         };
 496
 497 };
 498
 499 &i2c1 {
 500         status = "okay";
 501         rk1000_control@40 {
 502                 compatible = "rockchip,rk1000_control";
 503                 reg = <0x40>;
 504                 gpio-reset = <&gpio0 GPIO_A1 GPIO_ACTIVE_LOW>;
 505                 #clocks = <&clk_i2s>, <&i2s_out>, <&clk_gates12 7>;
 506                 #clock-names = "i2s_clk", "i2s_mclk", "i2s_hclk";
 507                 #pinctrl-names = "default";
 508                 #pinctrl-0 = <&i2s_mclk>;
 509                 status = "okay";
 510         };
 511         rk1000_tve@42 {
 512                 compatible = "rockchip,rk1000_tve";
 513                 reg = <0x42>;
 514                 rockchip,source = <0>; //0: LCDC0; 1: LCDC1
 515                 rockchip,prop = <PRMRY>;//<EXTEND>
 516                 status = "okay";
 517         };
 518         rk1000_codec: rk1000_codec@60 {
 519                 compatible = "rockchip,rk1000_codec";
 520                 reg = <0x60>;
 521                 spk_ctl_io = <&gpio3 GPIO_D7 GPIO_ACTIVE_LOW>;
 522                 boot_depop = <1>;
 523                 pa_enable_time = <5000>;
 524                 status = "okay";
 525         };
 526         mpu6050:mpu@68{
 527                 compatible = "mpu6050";
 528                 reg = <0x68>;
 529                 mpu-int_config = <0x10>;
 530                 mpu-level_shifter = <0>;
 531                 mpu-orientation = <0 1 0 1 0 0 0 0 1>;
 532                 orientation-x= <0>;
 533                 orientation-y= <1>;
 534                 orientation-z= <1>;
 535                 irq-gpio = <&gpio3 GPIO_B6 IRQ_TYPE_LEVEL_LOW>;
 536                 mpu-debug = <0>;
 537                 status = "disabled";
 538         };
 539         ak8963:compass@0d{
 540                 compatible = "mpu_ak8963";
 541                 reg = <0x0d>;
 542                 compass-bus = <0>;
 543                 compass-adapt_num = <0>;
 544                 compass-orientation = <1 0 0 0 1 0 0 0 1>;
 545                 orientation-x= <0>;
 546                 orientation-y= <0>;
 547                 orientation-z= <1>;
 548                 compass-debug = <1>;
 549                 status = "disabled";
 550         };
 551         rt3261: rt3261@1c {
 552                 compatible = "rt3261";
 553                 reg = <0x1c>;
 554                 spk-num= <2>;
 555                 modem-input-mode = <1>;
 556                 lout-to-modem_mode = <1>;
 557                 spk-amplify = <2>;
 558                 status = "disabled";
 559         };
 560 };
 561
 562 &i2c2 {
 563         status = "disabled";
 564         rt5631: rt5631@1a {
 565                 compatible = "rt5631";
 566                 reg = <0x1a>;
 567         };
 568         ts@01 {
 569                 compatible = "ct,vtl_ts";
 570                 reg = <0x01>;
 571                 screen_max_x = <1536>;
 572                 screen_max_y = <2048>;
 573                 xy_swap = <1>;
 574                 x_reverse = <0>;
 575                 y_reverse = <0>;
 576                 x_mul = <2>;
 577                 y_mul = <2>;
 578                 bin_ver = <0>;
 579                 irq_gpio_number = <&gpio0 GPIO_B4 IRQ_TYPE_LEVEL_LOW>;
 580                 rst_gpio_number = <&gpio0 GPIO_B3 GPIO_ACTIVE_HIGH>;
 581         };
 582 };
 583
 584 &i2c3 {
 585         status = "disabled";
 586 };
 587
 588 &i2c4 {
 589         status = "disabled";
 590 };
 591
 592 &i2c5 {
 593         status = "disabled";
 594 };
 595
 596 &CPU_SLEEP_0 {
 597         arm,psci-suspend-param = <0x1010000>;
 598 };
 599
 600 &fb {
 601         rockchip,disp-mode = <NO_DUAL>;
 602         rockchip,uboot-logo-on = <1>;
 603         rockchip,disp-policy = <DISPLAY_POLICY_BOX_TEMP>;
 604 };
 605
 606 &disp_timings {
 607         native-mode = <&timing1>;
 608 };
 609
 610 &rk_screen {
 611         display-timings = <&disp_timings>;
 612 };
 613
 614
 615 &lvds {
 616         status = "okay";
 617         //pinctrl-names = "lcdc", "sleep";
 618         //pinctrl-0 = <&lcdc_lcdc>;
 619         //pinctrl-1 = <&lcdc_gpio>;
 620 };
 621
 622 &lcdc {
 623         status = "okay";
 624         rockchip,mirror = <NO_MIRROR>;
 625         rockchip,cabc_mode = <0>;
 626         rockchip,fb-win-map = <FB_DEFAULT_ORDER>;
 627         pinctrl-names = "default", "gpio";
 628         pinctrl-0 = <&lcdc_lcdc>;
 629         pinctrl-1 = <&lcdc_gpio>;
 630
 631         power_ctr: power_ctr {
 632                 rockchip,debug = <0>;
 633                 /*lcd_en:lcd_en {
 634                         rockchip,power_type = <GPIO>;
 635                         gpios = <&gpio0 GPIO_C6 GPIO_ACTIVE_HIGH>;
 636                         rockchip,delay = <10>;
 637                 };
 638
 639                 lcd_cs:lcd_cs {
 640                         rockchip,power_type = <GPIO>;
 641                         gpios = <&gpio0 GPIO_C5 GPIO_ACTIVE_HIGH>;
 642                         rockchip,delay = <10>;
 643                 };
 644
 645                 lcd_rst:lcd_rst {
 646                         rockchip,power_type = <GPIO>;
 647                         gpios = <&gpio3 GPIO_D6 GPIO_ACTIVE_HIGH>;
 648                         rockchip,delay = <5>;
 649                 };*/
 650         };
 651 };
 652
 653
 654
 655
 656 &hdmi {
 657         status = "okay";
 658 };
 659
 660 &adc {
 661         status = "disabled";
 662
 663         rockchip_headset {
 664                 compatible = "rockchip_headset";
 665                 headset_gpio = <&gpio0 GPIO_C7 GPIO_ACTIVE_LOW>;
 666                 pinctrl-names = "default";
 667                 pinctrl-0 = <&gpio0_c7>;//gpio0_c7
 668                 io-channels = <&adc 2>;
 669                 /*
 670                 hook_gpio = ;
 671                 hook_down_type = ; //interrupt hook key down status
 672                 */
 673        };
 674
 675         key {
 676                 compatible = "rockchip,key";
 677                 io-channels = <&adc 1>;
 678
 679                 vol-up-key {
 680                         linux,code = <115>;
 681                         label = "volume up";
 682                         rockchip,adc_value = <1>;
 683                 };
 684
 685                 vol-down-key {
 686                         linux,code = <114>;
 687                         label = "volume down";
 688                         rockchip,adc_value = <170>;
 689                 };
 690
 691                 power-key {
 692                         gpios = <&gpio0 GPIO_A2 GPIO_ACTIVE_LOW>;
 693                         linux,code = <116>;
 694                         label = "power";
 695                         gpio-key,wakeup;
 696                 };
 697
 698                 menu-key {
 699                         linux,code = <59>;
 700                         label = "menu";
 701                         rockchip,adc_value = <355>;
 702                 };
 703
 704                 home-key {
 705                         linux,code = <102>;
 706                         label = "home";
 707                         rockchip,adc_value = <746>;
 708                 };
 709
 710                 back-key {
 711                         linux,code = <158>;
 712                         label = "back";
 713                         rockchip,adc_value = <560>;
 714                 };
 715
 716                 camera-key {
 717                         linux,code = <212>;
 718                         label = "camera";
 719                         rockchip,adc_value = <450>;
 720                 };
 721         };
 722 };
 723
 724 &pwm0 {
 725         status = "disabled";
 726 };
 727
 728 &pwm1 {
 729         status = "okay";
 730 };
 731
 732 &clk_core_b_dvfs_table {
 733         operating-points = <
 734                 /* KHz    uV */
 735                 //216000 950000
 736                 312000 950000
 737                 408000 950000
 738                 600000 975000
 739                 696000 975000
 740                 816000 1000000
 741                 1008000 1100000
 742                 1200000 1175000
 743                 1416000 1300000
 744                 1488000 1325000
 745                 1512000 1350000
 746                 >;
 747         status = "okay";
 748 };
 749
 750 &clk_core_l_dvfs_table {
 751         operating-points = <
 752                 /* KHz    uV */
 753                 //216000 950000
 754                 312000 950000
 755                 408000 950000
 756                 600000 950000
 757                 696000 975000
 758                 816000 1050000
 759                 1008000 1100000
 760                 1200000 1250000
 761                 //1300000 1300000
 762                 >;
 763         status = "okay";
 764 };
 765
 766 &clk_gpu_dvfs_table {
 767         operating-points = <
 768                 /* KHz    uV */
 769                 //200000 1200000
 770                 300000 1200000
 771                 400000 1200000
 772                 600000 1200000
 773                 >;
 774 };
 775
 776 &clk_ddr_dvfs_table {
 777         operating-points = <
 778                 /* KHz    uV */
 779                 200000 1050000
 780                 300000 1050000
 781                 400000 1100000
 782                 533000 1150000
 783                 >;
 784
 785         freq-table = <
 786                 /*status                freq(KHz)*/
 787                 SYS_STATUS_NORMAL       400000
 788                 SYS_STATUS_SUSPEND      200000
 789                 SYS_STATUS_VIDEO_1080P  240000
 790                 SYS_STATUS_VIDEO_4K     400000
 791                 SYS_STATUS_PERFORMANCE  528000
 792                 SYS_STATUS_DUALVIEW     400000
 793                 SYS_STATUS_BOOST        324000
 794                 SYS_STATUS_ISP          400000
 795                 >;
 796         auto-freq-table = <
 797                 240000
 798                 324000
 799                 396000
 800                 528000
 801                 >;
 802         auto-freq=<0>;
 803         status="disabled";
 804 };
 805
 806 &dwc_control_usb {
 807                 host_drv_gpio = <&gpio0 GPIO_A4 GPIO_ACTIVE_LOW>;
 808                 otg_drv_gpio = <&gpio0 GPIO_A5 GPIO_ACTIVE_LOW>;
 809
 810                 rockchip,remote_wakeup;
 811                 rockchip,usb_irq_wakeup;
 812         };
 813
 814 &usb0 {
 815         /*0 - Normal, 1 - Force Host, 2 - Force Device*/
 816         rockchip,usb-mode = <0>;
 817 };
 818
 819 /include/ "../../../arm/boot/dts/act8846.dtsi"
 820 &act8846 {
 821         gpios =<&gpio0 GPIO_B0 GPIO_ACTIVE_LOW>,<&gpio0 GPIO_A3 GPIO_ACTIVE_HIGH>;
 822         act8846,system-power-controller;
 823
 824         regulators {
 825
 826                 dcdc1_reg: regulator@0{
 827                         regulator-name= "act_dcdc1";
 828                         regulator-min-microvolt = <1200000>;
 829                         regulator-max-microvolt = <1200000>;
 830                         regulator-always-on;
 831                         regulator-boot-on;
 832                 };
 833
 834                 dcdc2_reg: regulator@1 {
 835                         regulator-name= "vccio";
 836                         regulator-min-microvolt = <3300000>;
 837                         regulator-max-microvolt = <3300000>;
 838                         regulator-initial-state = <3>;
 839                         regulator-state-mem {
 840                                 regulator-state-enabled;
 841                                 regulator-state-uv = <3300000>;
 842                         };
 843                 };
 844
 845                 dcdc3_reg: regulator@2 {
 846                         regulator-name= "vdd_logic";
 847                         regulator-min-microvolt = <700000>;
 848                         regulator-max-microvolt = <1500000>;
 849                         regulator-initial-state = <3>;
 850                         regulator-state-mem {
 851                                 regulator-state-enabled;
 852                                 regulator-state-uv = <1000000>;
 853                         };
 854
 855                 };
 856
 857                 dcdc4_reg: regulator@3 {
 858                         regulator-name= "act_dcdc4";
 859                         regulator-min-microvolt = <2000000>;
 860                         regulator-max-microvolt = <2000000>;
 861                                 regulator-initial-state = <3>;
 862                         regulator-state-mem {
 863                                 regulator-state-enabled;
 864                                 regulator-state-uv = <2000000>;
 865                         };
 866                 };
 867
 868                 ldo1_reg: regulator@4 {
 869                         regulator-name= "vccio_sd";
 870                         regulator-min-microvolt = <1800000>;
 871                         regulator-max-microvolt = <3300000>;
 872
 873                 };
 874
 875                 ldo2_reg: regulator@5 {
 876                         regulator-name= "act_ldo2";
 877                         regulator-min-microvolt = <1000000>;
 878                         regulator-max-microvolt = <1000000>;
 879
 880                 };
 881
 882                 ldo3_reg: regulator@6 {
 883                         regulator-name= "act_ldo3";
 884                         regulator-min-microvolt = <3300000>;
 885                         regulator-max-microvolt = <3300000>;
 886
 887                 };
 888
 889                 ldo4_reg:regulator@7 {
 890                         regulator-name= "act_ldo4";
 891                         regulator-min-microvolt = <3300000>;
 892                         regulator-max-microvolt = <3300000>;
 893
 894                 };
 895
 896                 ldo5_reg: regulator@8 {
 897                         regulator-name= "act_ldo5";
 898                         regulator-min-microvolt = <3300000>;
 899                         regulator-max-microvolt = <3300000>;
 900
 901                 };
 902
 903                 ldo6_reg: regulator@9 {
 904                         regulator-name= "act_ldo6";
 905                         regulator-min-microvolt = <1000000>;
 906                         regulator-max-microvolt = <1000000>;
 907                         regulator-initial-state = <3>;
 908                         regulator-state-mem {
 909                                 regulator-state-enabled;
 910                         };
 911
 912                 };
 913
 914                 ldo7_reg: regulator@10 {
 915                         regulator-name= "vcc_18";
 916                         regulator-min-microvolt = <1800000>;
 917                         regulator-max-microvolt = <1800000>;
 918                         regulator-initial-state = <3>;
 919                         regulator-state-mem {
 920                                 regulator-state-enabled;
 921                         };
 922
 923                 };
 924
 925                 ldo8_reg: regulator@11 {
 926                         regulator-name= "act_ldo8";
 927                         regulator-min-microvolt = <1800000>;
 928                         regulator-max-microvolt = <1800000>;
 929
 930                 };
 931         };
 932 };
 933
 934 &ion_cma {
 935        reg = <0x00000000 0x00000000>; /* 0MB */
 936 };
 937
 938 /*
 939 &dwc_control_usb {
 940         usb_uart {
 941                 status = "disabled";
 942         };
 943 };
 944
 945 &rk3288_cif_sensor{
 946         status = "okay";
 947 };
 948 */
 949
 950 &remotectl {
 951         handle_cpu_id = <1>;
 952         status = "okay";
 953         ir_key1{
 954                 rockchip,usercode = <0x4040>;
 955                 rockchip,key_table =
 956                         <0xf2   KEY_REPLY>,
 957                         <0xba   KEY_BACK>,
 958                         <0xf4   KEY_UP>,
 959                         <0xf1   KEY_DOWN>,
 960                         <0xef   KEY_LEFT>,
 961                         <0xee   KEY_RIGHT>,
 962                         <0xbd   KEY_HOME>,
 963                         <0xea   KEY_VOLUMEUP>,
 964                         <0xe3   KEY_VOLUMEDOWN>,
 965                         <0xe2   KEY_SEARCH>,
 966                         <0xb2   KEY_POWER>,
 967                         <0xbc   KEY_MUTE>,
 968                         <0xec   KEY_MENU>,
 969                         <0xbf   0x190>,
 970                         <0xe0   0x191>,
 971                         <0xe1   0x192>,
 972                         <0xe9   183>,
 973                         <0xe6   248>,
 974                         <0xe8   185>,
 975                         <0xe7   186>,
 976                         <0xf0   388>,
 977                         <0xbe   0x175>;
 978         };
 979         ir_key2{
 980                 rockchip,usercode = <0xff00>;
 981                 rockchip,key_table =
 982                         <0xf9   KEY_HOME>,
 983                         <0xbf   KEY_BACK>,
 984                         <0xfb   KEY_MENU>,
 985                         <0xaa   KEY_REPLY>,
 986                         <0xb9   KEY_UP>,
 987                         <0xe9   KEY_DOWN>,
 988                         <0xb8   KEY_LEFT>,
 989                         <0xea   KEY_RIGHT>,
 990                         <0xeb   KEY_VOLUMEDOWN>,
 991                         <0xef   KEY_VOLUMEUP>,
 992                         <0xf7   KEY_MUTE>,
 993                         <0xe7   KEY_POWER>,
 994                         <0xfc   KEY_POWER>,
 995                         <0xa9   KEY_VOLUMEDOWN>,
 996                         <0xa8   KEY_VOLUMEDOWN>,
 997                         <0xe0   KEY_VOLUMEDOWN>,
 998                         <0xa5   KEY_VOLUMEDOWN>,
 999                         <0xab   183>,
1000                         <0xb7   388>,
1001                         <0xf8   184>,
1002                         <0xaf   185>,
1003                         <0xed   KEY_VOLUMEDOWN>,
1004                         <0xee   186>,
1005                         <0xb3   KEY_VOLUMEDOWN>,
1006                         <0xf1   KEY_VOLUMEDOWN>,
1007                         <0xf2   KEY_VOLUMEDOWN>,
1008                         <0xf3   KEY_SEARCH>,
1009                         <0xb4   KEY_VOLUMEDOWN>,
1010                         <0xbe   KEY_SEARCH>;
1011         };
1012         ir_key3{
1013                 rockchip,usercode = <0x1dcc>;
1014                 rockchip,key_table =
1015                         <0xee   KEY_REPLY>,
1016                         <0xf0   KEY_BACK>,
1017                         <0xf8   KEY_UP>,
1018                         <0xbb   KEY_DOWN>,
1019                         <0xef   KEY_LEFT>,
1020                         <0xed   KEY_RIGHT>,
1021                         <0xfc   KEY_HOME>,
1022                         <0xf1   KEY_VOLUMEUP>,
1023                         <0xfd   KEY_VOLUMEDOWN>,
1024                         <0xb7   KEY_SEARCH>,
1025                         <0xff   KEY_POWER>,
1026                         <0xf3   KEY_MUTE>,
1027                         <0xbf   KEY_MENU>,
1028                         <0xf9   0x191>,
1029                         <0xf5   0x192>,
1030                         <0xb3   388>,
1031                         <0xbe   KEY_1>,
1032                         <0xba   KEY_2>,
1033                         <0xb2   KEY_3>,
1034                         <0xbd   KEY_4>,
1035                         <0xf9   KEY_5>,
1036                         <0xb1   KEY_6>,
1037                         <0xfc   KEY_7>,
1038                         <0xf8   KEY_8>,
1039                         <0xb0   KEY_9>,
1040                         <0xb6   KEY_0>,
1041                         <0xb5   KEY_BACKSPACE>;
1042         };
1043 };