2 * ARM Ltd. Juno Platform
4 * Copyright (c) 2015 ARM Ltd.
6 * This file is licensed under a dual GPLv2 or BSD license.
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 model = "ARM Juno development board (r1)";
15 compatible = "arm,juno-r1", "arm,juno", "arm,vexpress";
16 interrupt-parent = <&gic>;
25 stdout-path = "serial0:115200n8";
29 compatible = "arm,psci-0.2";
64 compatible = "arm,cortex-a57","arm,armv8";
67 enable-method = "psci";
68 next-level-cache = <&A57_L2>;
69 clocks = <&scpi_dvfs 0>;
73 compatible = "arm,cortex-a57","arm,armv8";
76 enable-method = "psci";
77 next-level-cache = <&A57_L2>;
78 clocks = <&scpi_dvfs 0>;
82 compatible = "arm,cortex-a53","arm,armv8";
85 enable-method = "psci";
86 next-level-cache = <&A53_L2>;
87 clocks = <&scpi_dvfs 1>;
91 compatible = "arm,cortex-a53","arm,armv8";
94 enable-method = "psci";
95 next-level-cache = <&A53_L2>;
96 clocks = <&scpi_dvfs 1>;
100 compatible = "arm,cortex-a53","arm,armv8";
103 enable-method = "psci";
104 next-level-cache = <&A53_L2>;
105 clocks = <&scpi_dvfs 1>;
109 compatible = "arm,cortex-a53","arm,armv8";
112 enable-method = "psci";
113 next-level-cache = <&A53_L2>;
114 clocks = <&scpi_dvfs 1>;
118 compatible = "cache";
122 compatible = "cache";
127 compatible = "arm,armv8-pmuv3";
128 interrupts = <GIC_SPI 02 IRQ_TYPE_LEVEL_HIGH>,
129 <GIC_SPI 06 IRQ_TYPE_LEVEL_HIGH>,
130 <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
131 <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
132 <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
133 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
134 interrupt-affinity = <&A57_0>,
142 #include "juno-base.dtsi"
144 pcie-controller@40000000 {
145 compatible = "arm,juno-r1-pcie", "plda,xpressrich3-axi", "pci-host-ecam-generic";
147 reg = <0 0x40000000 0 0x10000000>; /* ECAM config space */
149 linux,pci-domain = <0>;
150 #address-cells = <3>;
153 ranges = <0x01000000 0x00 0x5f800000 0x00 0x5f800000 0x0 0x00800000>,
154 <0x02000000 0x00 0x50000000 0x00 0x50000000 0x0 0x08000000>,
155 <0x42000000 0x40 0x00000000 0x40 0x00000000 0x1 0x00000000>;
156 #interrupt-cells = <1>;
157 interrupt-map-mask = <0 0 0 7>;
158 interrupt-map = <0 0 0 1 &gic 0 0 0 136 4>,
159 <0 0 0 2 &gic 0 0 0 137 4>,
160 <0 0 0 3 &gic 0 0 0 138 4>,
161 <0 0 0 4 &gic 0 0 0 139 4>;
162 msi-parent = <&v2m_0>;