2 * ARM Juno Platform motherboard peripherals
4 * Copyright (c) 2013-2014 ARM Ltd
6 * This file is licensed under a dual GPLv2 or BSD license.
10 mb_clk24mhz: clk24mhz {
11 compatible = "fixed-clock";
13 clock-frequency = <24000000>;
14 clock-output-names = "juno_mb:clk24mhz";
17 mb_clk25mhz: clk25mhz {
18 compatible = "fixed-clock";
20 clock-frequency = <25000000>;
21 clock-output-names = "juno_mb:clk25mhz";
25 compatible = "arm,vexpress,v2p-p1", "simple-bus";
26 #address-cells = <2>; /* SMB chipselect number and offset */
28 #interrupt-cells = <1>;
32 arm,vexpress,site = <0>;
33 arm,v2m-memory-map = "rs1";
35 mb_fixed_3v3: fixedregulator@0 {
36 compatible = "regulator-fixed";
37 regulator-name = "MCC_SB_3V3";
38 regulator-min-microvolt = <3300000>;
39 regulator-max-microvolt = <3300000>;
44 compatible = "smsc,lan9118", "smsc,lan9115";
45 reg = <2 0x00000000 0x10000>;
51 clocks = <&mb_clk25mhz>;
52 vdd33a-supply = <&mb_fixed_3v3>;
53 vddvario-supply = <&mb_fixed_3v3>;
57 compatible = "nxp,usb-isp1763";
58 reg = <5 0x00000000 0x20000>;
64 compatible = "arm,amba-bus", "simple-bus";
67 ranges = <0 3 0 0x200000>;
70 compatible = "syscon", "simple-mfd";
71 reg = <0x010000 0x1000>;
74 compatible = "register-bit-led";
78 linux,default-trigger = "heartbeat";
82 compatible = "register-bit-led";
86 linux,default-trigger = "mmc0";
87 default-state = "off";
90 compatible = "register-bit-led";
94 linux,default-trigger = "cpu0";
95 default-state = "off";
98 compatible = "register-bit-led";
101 label = "vexpress:3";
102 linux,default-trigger = "cpu1";
103 default-state = "off";
106 compatible = "register-bit-led";
109 label = "vexpress:4";
110 linux,default-trigger = "cpu2";
111 default-state = "off";
114 compatible = "register-bit-led";
117 label = "vexpress:5";
118 linux,default-trigger = "cpu3";
119 default-state = "off";
122 compatible = "register-bit-led";
125 label = "vexpress:6";
126 default-state = "off";
129 compatible = "register-bit-led";
132 label = "vexpress:7";
133 default-state = "off";
138 compatible = "arm,pl180", "arm,primecell";
139 reg = <0x050000 0x1000>;
141 /* cd-gpios = <&v2m_mmc_gpios 0 0>;
142 wp-gpios = <&v2m_mmc_gpios 1 0>; */
143 max-frequency = <12000000>;
144 vmmc-supply = <&mb_fixed_3v3>;
145 clocks = <&mb_clk24mhz>, <&soc_smc50mhz>;
146 clock-names = "mclk", "apb_pclk";
150 compatible = "arm,pl050", "arm,primecell";
151 reg = <0x060000 0x1000>;
153 clocks = <&mb_clk24mhz>, <&soc_smc50mhz>;
154 clock-names = "KMIREFCLK", "apb_pclk";
158 compatible = "arm,pl050", "arm,primecell";
159 reg = <0x070000 0x1000>;
161 clocks = <&mb_clk24mhz>, <&soc_smc50mhz>;
162 clock-names = "KMIREFCLK", "apb_pclk";
166 compatible = "arm,sp805", "arm,primecell";
167 reg = <0x0f0000 0x10000>;
169 clocks = <&mb_clk24mhz>, <&soc_smc50mhz>;
170 clock-names = "wdogclk", "apb_pclk";
173 v2m_timer01: timer@110000 {
174 compatible = "arm,sp804", "arm,primecell";
175 reg = <0x110000 0x10000>;
177 clocks = <&mb_clk24mhz>, <&soc_smc50mhz>;
178 clock-names = "timclken1", "apb_pclk";
181 v2m_timer23: timer@120000 {
182 compatible = "arm,sp804", "arm,primecell";
183 reg = <0x120000 0x10000>;
185 clocks = <&mb_clk24mhz>, <&soc_smc50mhz>;
186 clock-names = "timclken1", "apb_pclk";
190 compatible = "arm,pl031", "arm,primecell";
191 reg = <0x170000 0x10000>;
193 clocks = <&soc_smc50mhz>;
194 clock-names = "apb_pclk";