ARM: arm-soc: Merge branch 'next/pm2' into next/pm
[firefly-linux-kernel-4.4.55.git] / arch / arm / plat-samsung / devs.c
1 /* linux/arch/arm/plat-samsung/devs.c
2  *
3  * Copyright (c) 2011 Samsung Electronics Co., Ltd.
4  *              http://www.samsung.com
5  *
6  * Base SAMSUNG platform device definitions
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License version 2 as
10  * published by the Free Software Foundation.
11 */
12
13 #include <linux/kernel.h>
14 #include <linux/types.h>
15 #include <linux/interrupt.h>
16 #include <linux/list.h>
17 #include <linux/timer.h>
18 #include <linux/init.h>
19 #include <linux/serial_core.h>
20 #include <linux/platform_device.h>
21 #include <linux/io.h>
22 #include <linux/slab.h>
23 #include <linux/string.h>
24 #include <linux/dma-mapping.h>
25 #include <linux/fb.h>
26 #include <linux/gfp.h>
27 #include <linux/mtd/mtd.h>
28 #include <linux/mtd/onenand.h>
29 #include <linux/mtd/partitions.h>
30 #include <linux/mmc/host.h>
31 #include <linux/ioport.h>
32 #include <linux/platform_data/s3c-hsudc.h>
33 #include <linux/platform_data/s3c-hsotg.h>
34
35 #include <media/s5p_hdmi.h>
36
37 #include <asm/irq.h>
38 #include <asm/mach/arch.h>
39 #include <asm/mach/map.h>
40 #include <asm/mach/irq.h>
41
42 #include <mach/hardware.h>
43 #include <mach/dma.h>
44 #include <mach/irqs.h>
45 #include <mach/map.h>
46
47 #include <plat/cpu.h>
48 #include <plat/devs.h>
49 #include <plat/adc.h>
50 #include <linux/platform_data/ata-samsung_cf.h>
51 #include <linux/platform_data/usb-ehci-s5p.h>
52 #include <plat/fb.h>
53 #include <plat/fb-s3c2410.h>
54 #include <plat/hdmi.h>
55 #include <linux/platform_data/hwmon-s3c.h>
56 #include <linux/platform_data/i2c-s3c2410.h>
57 #include <plat/keypad.h>
58 #include <linux/platform_data/mmc-s3cmci.h>
59 #include <linux/platform_data/mtd-nand-s3c2410.h>
60 #include <plat/sdhci.h>
61 #include <linux/platform_data/touchscreen-s3c2410.h>
62 #include <linux/platform_data/usb-s3c2410_udc.h>
63 #include <linux/platform_data/usb-ohci-s3c2410.h>
64 #include <plat/usb-phy.h>
65 #include <plat/regs-iic.h>
66 #include <plat/regs-serial.h>
67 #include <plat/regs-spi.h>
68 #include <linux/platform_data/spi-s3c64xx.h>
69
70 static u64 samsung_device_dma_mask = DMA_BIT_MASK(32);
71
72 /* AC97 */
73 #ifdef CONFIG_CPU_S3C2440
74 static struct resource s3c_ac97_resource[] = {
75         [0] = DEFINE_RES_MEM(S3C2440_PA_AC97, S3C2440_SZ_AC97),
76         [1] = DEFINE_RES_IRQ(IRQ_S3C244X_AC97),
77         [2] = DEFINE_RES_DMA_NAMED(DMACH_PCM_OUT, "PCM out"),
78         [3] = DEFINE_RES_DMA_NAMED(DMACH_PCM_IN, "PCM in"),
79         [4] = DEFINE_RES_DMA_NAMED(DMACH_MIC_IN, "Mic in"),
80 };
81
82 struct platform_device s3c_device_ac97 = {
83         .name           = "samsung-ac97",
84         .id             = -1,
85         .num_resources  = ARRAY_SIZE(s3c_ac97_resource),
86         .resource       = s3c_ac97_resource,
87         .dev            = {
88                 .dma_mask               = &samsung_device_dma_mask,
89                 .coherent_dma_mask      = DMA_BIT_MASK(32),
90         }
91 };
92 #endif /* CONFIG_CPU_S3C2440 */
93
94 /* ADC */
95
96 #ifdef CONFIG_PLAT_S3C24XX
97 static struct resource s3c_adc_resource[] = {
98         [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
99         [1] = DEFINE_RES_IRQ(IRQ_TC),
100         [2] = DEFINE_RES_IRQ(IRQ_ADC),
101 };
102
103 struct platform_device s3c_device_adc = {
104         .name           = "s3c24xx-adc",
105         .id             = -1,
106         .num_resources  = ARRAY_SIZE(s3c_adc_resource),
107         .resource       = s3c_adc_resource,
108 };
109 #endif /* CONFIG_PLAT_S3C24XX */
110
111 #if defined(CONFIG_SAMSUNG_DEV_ADC)
112 static struct resource s3c_adc_resource[] = {
113         [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256),
114         [1] = DEFINE_RES_IRQ(IRQ_TC),
115         [2] = DEFINE_RES_IRQ(IRQ_ADC),
116 };
117
118 struct platform_device s3c_device_adc = {
119         .name           = "samsung-adc",
120         .id             = -1,
121         .num_resources  = ARRAY_SIZE(s3c_adc_resource),
122         .resource       = s3c_adc_resource,
123 };
124 #endif /* CONFIG_SAMSUNG_DEV_ADC */
125
126 /* Camif Controller */
127
128 #ifdef CONFIG_CPU_S3C2440
129 static struct resource s3c_camif_resource[] = {
130         [0] = DEFINE_RES_MEM(S3C2440_PA_CAMIF, S3C2440_SZ_CAMIF),
131         [1] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_C),
132         [2] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_P),
133 };
134
135 struct platform_device s3c_device_camif = {
136         .name           = "s3c2440-camif",
137         .id             = -1,
138         .num_resources  = ARRAY_SIZE(s3c_camif_resource),
139         .resource       = s3c_camif_resource,
140         .dev            = {
141                 .dma_mask               = &samsung_device_dma_mask,
142                 .coherent_dma_mask      = DMA_BIT_MASK(32),
143         }
144 };
145 #endif /* CONFIG_CPU_S3C2440 */
146
147 /* ASOC DMA */
148
149 struct platform_device samsung_asoc_dma = {
150         .name           = "samsung-audio",
151         .id             = -1,
152         .dev            = {
153                 .dma_mask               = &samsung_device_dma_mask,
154                 .coherent_dma_mask      = DMA_BIT_MASK(32),
155         }
156 };
157
158 struct platform_device samsung_asoc_idma = {
159         .name           = "samsung-idma",
160         .id             = -1,
161         .dev            = {
162                 .dma_mask               = &samsung_device_dma_mask,
163                 .coherent_dma_mask      = DMA_BIT_MASK(32),
164         }
165 };
166
167 /* FB */
168
169 #ifdef CONFIG_S3C_DEV_FB
170 static struct resource s3c_fb_resource[] = {
171         [0] = DEFINE_RES_MEM(S3C_PA_FB, SZ_16K),
172         [1] = DEFINE_RES_IRQ(IRQ_LCD_VSYNC),
173         [2] = DEFINE_RES_IRQ(IRQ_LCD_FIFO),
174         [3] = DEFINE_RES_IRQ(IRQ_LCD_SYSTEM),
175 };
176
177 struct platform_device s3c_device_fb = {
178         .name           = "s3c-fb",
179         .id             = -1,
180         .num_resources  = ARRAY_SIZE(s3c_fb_resource),
181         .resource       = s3c_fb_resource,
182         .dev            = {
183                 .dma_mask               = &samsung_device_dma_mask,
184                 .coherent_dma_mask      = DMA_BIT_MASK(32),
185         },
186 };
187
188 void __init s3c_fb_set_platdata(struct s3c_fb_platdata *pd)
189 {
190         s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
191                          &s3c_device_fb);
192 }
193 #endif /* CONFIG_S3C_DEV_FB */
194
195 /* FIMC */
196
197 #ifdef CONFIG_S5P_DEV_FIMC0
198 static struct resource s5p_fimc0_resource[] = {
199         [0] = DEFINE_RES_MEM(S5P_PA_FIMC0, SZ_4K),
200         [1] = DEFINE_RES_IRQ(IRQ_FIMC0),
201 };
202
203 struct platform_device s5p_device_fimc0 = {
204         .name           = "s5p-fimc",
205         .id             = 0,
206         .num_resources  = ARRAY_SIZE(s5p_fimc0_resource),
207         .resource       = s5p_fimc0_resource,
208         .dev            = {
209                 .dma_mask               = &samsung_device_dma_mask,
210                 .coherent_dma_mask      = DMA_BIT_MASK(32),
211         },
212 };
213
214 struct platform_device s5p_device_fimc_md = {
215         .name   = "s5p-fimc-md",
216         .id     = -1,
217 };
218 #endif /* CONFIG_S5P_DEV_FIMC0 */
219
220 #ifdef CONFIG_S5P_DEV_FIMC1
221 static struct resource s5p_fimc1_resource[] = {
222         [0] = DEFINE_RES_MEM(S5P_PA_FIMC1, SZ_4K),
223         [1] = DEFINE_RES_IRQ(IRQ_FIMC1),
224 };
225
226 struct platform_device s5p_device_fimc1 = {
227         .name           = "s5p-fimc",
228         .id             = 1,
229         .num_resources  = ARRAY_SIZE(s5p_fimc1_resource),
230         .resource       = s5p_fimc1_resource,
231         .dev            = {
232                 .dma_mask               = &samsung_device_dma_mask,
233                 .coherent_dma_mask      = DMA_BIT_MASK(32),
234         },
235 };
236 #endif /* CONFIG_S5P_DEV_FIMC1 */
237
238 #ifdef CONFIG_S5P_DEV_FIMC2
239 static struct resource s5p_fimc2_resource[] = {
240         [0] = DEFINE_RES_MEM(S5P_PA_FIMC2, SZ_4K),
241         [1] = DEFINE_RES_IRQ(IRQ_FIMC2),
242 };
243
244 struct platform_device s5p_device_fimc2 = {
245         .name           = "s5p-fimc",
246         .id             = 2,
247         .num_resources  = ARRAY_SIZE(s5p_fimc2_resource),
248         .resource       = s5p_fimc2_resource,
249         .dev            = {
250                 .dma_mask               = &samsung_device_dma_mask,
251                 .coherent_dma_mask      = DMA_BIT_MASK(32),
252         },
253 };
254 #endif /* CONFIG_S5P_DEV_FIMC2 */
255
256 #ifdef CONFIG_S5P_DEV_FIMC3
257 static struct resource s5p_fimc3_resource[] = {
258         [0] = DEFINE_RES_MEM(S5P_PA_FIMC3, SZ_4K),
259         [1] = DEFINE_RES_IRQ(IRQ_FIMC3),
260 };
261
262 struct platform_device s5p_device_fimc3 = {
263         .name           = "s5p-fimc",
264         .id             = 3,
265         .num_resources  = ARRAY_SIZE(s5p_fimc3_resource),
266         .resource       = s5p_fimc3_resource,
267         .dev            = {
268                 .dma_mask               = &samsung_device_dma_mask,
269                 .coherent_dma_mask      = DMA_BIT_MASK(32),
270         },
271 };
272 #endif /* CONFIG_S5P_DEV_FIMC3 */
273
274 /* G2D */
275
276 #ifdef CONFIG_S5P_DEV_G2D
277 static struct resource s5p_g2d_resource[] = {
278         [0] = DEFINE_RES_MEM(S5P_PA_G2D, SZ_4K),
279         [1] = DEFINE_RES_IRQ(IRQ_2D),
280 };
281
282 struct platform_device s5p_device_g2d = {
283         .name           = "s5p-g2d",
284         .id             = 0,
285         .num_resources  = ARRAY_SIZE(s5p_g2d_resource),
286         .resource       = s5p_g2d_resource,
287         .dev            = {
288                 .dma_mask               = &samsung_device_dma_mask,
289                 .coherent_dma_mask      = DMA_BIT_MASK(32),
290         },
291 };
292 #endif /* CONFIG_S5P_DEV_G2D */
293
294 #ifdef CONFIG_S5P_DEV_JPEG
295 static struct resource s5p_jpeg_resource[] = {
296         [0] = DEFINE_RES_MEM(S5P_PA_JPEG, SZ_4K),
297         [1] = DEFINE_RES_IRQ(IRQ_JPEG),
298 };
299
300 struct platform_device s5p_device_jpeg = {
301         .name           = "s5p-jpeg",
302         .id             = 0,
303         .num_resources  = ARRAY_SIZE(s5p_jpeg_resource),
304         .resource       = s5p_jpeg_resource,
305         .dev            = {
306                 .dma_mask               = &samsung_device_dma_mask,
307                 .coherent_dma_mask      = DMA_BIT_MASK(32),
308         },
309 };
310 #endif /*  CONFIG_S5P_DEV_JPEG */
311
312 /* FIMD0 */
313
314 #ifdef CONFIG_S5P_DEV_FIMD0
315 static struct resource s5p_fimd0_resource[] = {
316         [0] = DEFINE_RES_MEM(S5P_PA_FIMD0, SZ_32K),
317         [1] = DEFINE_RES_IRQ(IRQ_FIMD0_VSYNC),
318         [2] = DEFINE_RES_IRQ(IRQ_FIMD0_FIFO),
319         [3] = DEFINE_RES_IRQ(IRQ_FIMD0_SYSTEM),
320 };
321
322 struct platform_device s5p_device_fimd0 = {
323         .name           = "s5p-fb",
324         .id             = 0,
325         .num_resources  = ARRAY_SIZE(s5p_fimd0_resource),
326         .resource       = s5p_fimd0_resource,
327         .dev            = {
328                 .dma_mask               = &samsung_device_dma_mask,
329                 .coherent_dma_mask      = DMA_BIT_MASK(32),
330         },
331 };
332
333 void __init s5p_fimd0_set_platdata(struct s3c_fb_platdata *pd)
334 {
335         s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
336                          &s5p_device_fimd0);
337 }
338 #endif /* CONFIG_S5P_DEV_FIMD0 */
339
340 /* HWMON */
341
342 #ifdef CONFIG_S3C_DEV_HWMON
343 struct platform_device s3c_device_hwmon = {
344         .name           = "s3c-hwmon",
345         .id             = -1,
346         .dev.parent     = &s3c_device_adc.dev,
347 };
348
349 void __init s3c_hwmon_set_platdata(struct s3c_hwmon_pdata *pd)
350 {
351         s3c_set_platdata(pd, sizeof(struct s3c_hwmon_pdata),
352                          &s3c_device_hwmon);
353 }
354 #endif /* CONFIG_S3C_DEV_HWMON */
355
356 /* HSMMC */
357
358 #ifdef CONFIG_S3C_DEV_HSMMC
359 static struct resource s3c_hsmmc_resource[] = {
360         [0] = DEFINE_RES_MEM(S3C_PA_HSMMC0, SZ_4K),
361         [1] = DEFINE_RES_IRQ(IRQ_HSMMC0),
362 };
363
364 struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata = {
365         .max_width      = 4,
366         .host_caps      = (MMC_CAP_4_BIT_DATA |
367                            MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
368 };
369
370 struct platform_device s3c_device_hsmmc0 = {
371         .name           = "s3c-sdhci",
372         .id             = 0,
373         .num_resources  = ARRAY_SIZE(s3c_hsmmc_resource),
374         .resource       = s3c_hsmmc_resource,
375         .dev            = {
376                 .dma_mask               = &samsung_device_dma_mask,
377                 .coherent_dma_mask      = DMA_BIT_MASK(32),
378                 .platform_data          = &s3c_hsmmc0_def_platdata,
379         },
380 };
381
382 void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd)
383 {
384         s3c_sdhci_set_platdata(pd, &s3c_hsmmc0_def_platdata);
385 }
386 #endif /* CONFIG_S3C_DEV_HSMMC */
387
388 #ifdef CONFIG_S3C_DEV_HSMMC1
389 static struct resource s3c_hsmmc1_resource[] = {
390         [0] = DEFINE_RES_MEM(S3C_PA_HSMMC1, SZ_4K),
391         [1] = DEFINE_RES_IRQ(IRQ_HSMMC1),
392 };
393
394 struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata = {
395         .max_width      = 4,
396         .host_caps      = (MMC_CAP_4_BIT_DATA |
397                            MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
398 };
399
400 struct platform_device s3c_device_hsmmc1 = {
401         .name           = "s3c-sdhci",
402         .id             = 1,
403         .num_resources  = ARRAY_SIZE(s3c_hsmmc1_resource),
404         .resource       = s3c_hsmmc1_resource,
405         .dev            = {
406                 .dma_mask               = &samsung_device_dma_mask,
407                 .coherent_dma_mask      = DMA_BIT_MASK(32),
408                 .platform_data          = &s3c_hsmmc1_def_platdata,
409         },
410 };
411
412 void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd)
413 {
414         s3c_sdhci_set_platdata(pd, &s3c_hsmmc1_def_platdata);
415 }
416 #endif /* CONFIG_S3C_DEV_HSMMC1 */
417
418 /* HSMMC2 */
419
420 #ifdef CONFIG_S3C_DEV_HSMMC2
421 static struct resource s3c_hsmmc2_resource[] = {
422         [0] = DEFINE_RES_MEM(S3C_PA_HSMMC2, SZ_4K),
423         [1] = DEFINE_RES_IRQ(IRQ_HSMMC2),
424 };
425
426 struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata = {
427         .max_width      = 4,
428         .host_caps      = (MMC_CAP_4_BIT_DATA |
429                            MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
430 };
431
432 struct platform_device s3c_device_hsmmc2 = {
433         .name           = "s3c-sdhci",
434         .id             = 2,
435         .num_resources  = ARRAY_SIZE(s3c_hsmmc2_resource),
436         .resource       = s3c_hsmmc2_resource,
437         .dev            = {
438                 .dma_mask               = &samsung_device_dma_mask,
439                 .coherent_dma_mask      = DMA_BIT_MASK(32),
440                 .platform_data          = &s3c_hsmmc2_def_platdata,
441         },
442 };
443
444 void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd)
445 {
446         s3c_sdhci_set_platdata(pd, &s3c_hsmmc2_def_platdata);
447 }
448 #endif /* CONFIG_S3C_DEV_HSMMC2 */
449
450 #ifdef CONFIG_S3C_DEV_HSMMC3
451 static struct resource s3c_hsmmc3_resource[] = {
452         [0] = DEFINE_RES_MEM(S3C_PA_HSMMC3, SZ_4K),
453         [1] = DEFINE_RES_IRQ(IRQ_HSMMC3),
454 };
455
456 struct s3c_sdhci_platdata s3c_hsmmc3_def_platdata = {
457         .max_width      = 4,
458         .host_caps      = (MMC_CAP_4_BIT_DATA |
459                            MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
460 };
461
462 struct platform_device s3c_device_hsmmc3 = {
463         .name           = "s3c-sdhci",
464         .id             = 3,
465         .num_resources  = ARRAY_SIZE(s3c_hsmmc3_resource),
466         .resource       = s3c_hsmmc3_resource,
467         .dev            = {
468                 .dma_mask               = &samsung_device_dma_mask,
469                 .coherent_dma_mask      = DMA_BIT_MASK(32),
470                 .platform_data          = &s3c_hsmmc3_def_platdata,
471         },
472 };
473
474 void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata *pd)
475 {
476         s3c_sdhci_set_platdata(pd, &s3c_hsmmc3_def_platdata);
477 }
478 #endif /* CONFIG_S3C_DEV_HSMMC3 */
479
480 /* I2C */
481
482 static struct resource s3c_i2c0_resource[] = {
483         [0] = DEFINE_RES_MEM(S3C_PA_IIC, SZ_4K),
484         [1] = DEFINE_RES_IRQ(IRQ_IIC),
485 };
486
487 struct platform_device s3c_device_i2c0 = {
488         .name           = "s3c2410-i2c",
489         .id             = 0,
490         .num_resources  = ARRAY_SIZE(s3c_i2c0_resource),
491         .resource       = s3c_i2c0_resource,
492 };
493
494 struct s3c2410_platform_i2c default_i2c_data __initdata = {
495         .flags          = 0,
496         .slave_addr     = 0x10,
497         .frequency      = 100*1000,
498         .sda_delay      = 100,
499 };
500
501 void __init s3c_i2c0_set_platdata(struct s3c2410_platform_i2c *pd)
502 {
503         struct s3c2410_platform_i2c *npd;
504
505         if (!pd) {
506                 pd = &default_i2c_data;
507                 pd->bus_num = 0;
508         }
509
510         npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
511                                &s3c_device_i2c0);
512
513         if (!npd->cfg_gpio)
514                 npd->cfg_gpio = s3c_i2c0_cfg_gpio;
515 }
516
517 #ifdef CONFIG_S3C_DEV_I2C1
518 static struct resource s3c_i2c1_resource[] = {
519         [0] = DEFINE_RES_MEM(S3C_PA_IIC1, SZ_4K),
520         [1] = DEFINE_RES_IRQ(IRQ_IIC1),
521 };
522
523 struct platform_device s3c_device_i2c1 = {
524         .name           = "s3c2410-i2c",
525         .id             = 1,
526         .num_resources  = ARRAY_SIZE(s3c_i2c1_resource),
527         .resource       = s3c_i2c1_resource,
528 };
529
530 void __init s3c_i2c1_set_platdata(struct s3c2410_platform_i2c *pd)
531 {
532         struct s3c2410_platform_i2c *npd;
533
534         if (!pd) {
535                 pd = &default_i2c_data;
536                 pd->bus_num = 1;
537         }
538
539         npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
540                                &s3c_device_i2c1);
541
542         if (!npd->cfg_gpio)
543                 npd->cfg_gpio = s3c_i2c1_cfg_gpio;
544 }
545 #endif /* CONFIG_S3C_DEV_I2C1 */
546
547 #ifdef CONFIG_S3C_DEV_I2C2
548 static struct resource s3c_i2c2_resource[] = {
549         [0] = DEFINE_RES_MEM(S3C_PA_IIC2, SZ_4K),
550         [1] = DEFINE_RES_IRQ(IRQ_IIC2),
551 };
552
553 struct platform_device s3c_device_i2c2 = {
554         .name           = "s3c2410-i2c",
555         .id             = 2,
556         .num_resources  = ARRAY_SIZE(s3c_i2c2_resource),
557         .resource       = s3c_i2c2_resource,
558 };
559
560 void __init s3c_i2c2_set_platdata(struct s3c2410_platform_i2c *pd)
561 {
562         struct s3c2410_platform_i2c *npd;
563
564         if (!pd) {
565                 pd = &default_i2c_data;
566                 pd->bus_num = 2;
567         }
568
569         npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
570                                &s3c_device_i2c2);
571
572         if (!npd->cfg_gpio)
573                 npd->cfg_gpio = s3c_i2c2_cfg_gpio;
574 }
575 #endif /* CONFIG_S3C_DEV_I2C2 */
576
577 #ifdef CONFIG_S3C_DEV_I2C3
578 static struct resource s3c_i2c3_resource[] = {
579         [0] = DEFINE_RES_MEM(S3C_PA_IIC3, SZ_4K),
580         [1] = DEFINE_RES_IRQ(IRQ_IIC3),
581 };
582
583 struct platform_device s3c_device_i2c3 = {
584         .name           = "s3c2440-i2c",
585         .id             = 3,
586         .num_resources  = ARRAY_SIZE(s3c_i2c3_resource),
587         .resource       = s3c_i2c3_resource,
588 };
589
590 void __init s3c_i2c3_set_platdata(struct s3c2410_platform_i2c *pd)
591 {
592         struct s3c2410_platform_i2c *npd;
593
594         if (!pd) {
595                 pd = &default_i2c_data;
596                 pd->bus_num = 3;
597         }
598
599         npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
600                                &s3c_device_i2c3);
601
602         if (!npd->cfg_gpio)
603                 npd->cfg_gpio = s3c_i2c3_cfg_gpio;
604 }
605 #endif /*CONFIG_S3C_DEV_I2C3 */
606
607 #ifdef CONFIG_S3C_DEV_I2C4
608 static struct resource s3c_i2c4_resource[] = {
609         [0] = DEFINE_RES_MEM(S3C_PA_IIC4, SZ_4K),
610         [1] = DEFINE_RES_IRQ(IRQ_IIC4),
611 };
612
613 struct platform_device s3c_device_i2c4 = {
614         .name           = "s3c2440-i2c",
615         .id             = 4,
616         .num_resources  = ARRAY_SIZE(s3c_i2c4_resource),
617         .resource       = s3c_i2c4_resource,
618 };
619
620 void __init s3c_i2c4_set_platdata(struct s3c2410_platform_i2c *pd)
621 {
622         struct s3c2410_platform_i2c *npd;
623
624         if (!pd) {
625                 pd = &default_i2c_data;
626                 pd->bus_num = 4;
627         }
628
629         npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
630                                &s3c_device_i2c4);
631
632         if (!npd->cfg_gpio)
633                 npd->cfg_gpio = s3c_i2c4_cfg_gpio;
634 }
635 #endif /*CONFIG_S3C_DEV_I2C4 */
636
637 #ifdef CONFIG_S3C_DEV_I2C5
638 static struct resource s3c_i2c5_resource[] = {
639         [0] = DEFINE_RES_MEM(S3C_PA_IIC5, SZ_4K),
640         [1] = DEFINE_RES_IRQ(IRQ_IIC5),
641 };
642
643 struct platform_device s3c_device_i2c5 = {
644         .name           = "s3c2440-i2c",
645         .id             = 5,
646         .num_resources  = ARRAY_SIZE(s3c_i2c5_resource),
647         .resource       = s3c_i2c5_resource,
648 };
649
650 void __init s3c_i2c5_set_platdata(struct s3c2410_platform_i2c *pd)
651 {
652         struct s3c2410_platform_i2c *npd;
653
654         if (!pd) {
655                 pd = &default_i2c_data;
656                 pd->bus_num = 5;
657         }
658
659         npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
660                                &s3c_device_i2c5);
661
662         if (!npd->cfg_gpio)
663                 npd->cfg_gpio = s3c_i2c5_cfg_gpio;
664 }
665 #endif /*CONFIG_S3C_DEV_I2C5 */
666
667 #ifdef CONFIG_S3C_DEV_I2C6
668 static struct resource s3c_i2c6_resource[] = {
669         [0] = DEFINE_RES_MEM(S3C_PA_IIC6, SZ_4K),
670         [1] = DEFINE_RES_IRQ(IRQ_IIC6),
671 };
672
673 struct platform_device s3c_device_i2c6 = {
674         .name           = "s3c2440-i2c",
675         .id             = 6,
676         .num_resources  = ARRAY_SIZE(s3c_i2c6_resource),
677         .resource       = s3c_i2c6_resource,
678 };
679
680 void __init s3c_i2c6_set_platdata(struct s3c2410_platform_i2c *pd)
681 {
682         struct s3c2410_platform_i2c *npd;
683
684         if (!pd) {
685                 pd = &default_i2c_data;
686                 pd->bus_num = 6;
687         }
688
689         npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
690                                &s3c_device_i2c6);
691
692         if (!npd->cfg_gpio)
693                 npd->cfg_gpio = s3c_i2c6_cfg_gpio;
694 }
695 #endif /* CONFIG_S3C_DEV_I2C6 */
696
697 #ifdef CONFIG_S3C_DEV_I2C7
698 static struct resource s3c_i2c7_resource[] = {
699         [0] = DEFINE_RES_MEM(S3C_PA_IIC7, SZ_4K),
700         [1] = DEFINE_RES_IRQ(IRQ_IIC7),
701 };
702
703 struct platform_device s3c_device_i2c7 = {
704         .name           = "s3c2440-i2c",
705         .id             = 7,
706         .num_resources  = ARRAY_SIZE(s3c_i2c7_resource),
707         .resource       = s3c_i2c7_resource,
708 };
709
710 void __init s3c_i2c7_set_platdata(struct s3c2410_platform_i2c *pd)
711 {
712         struct s3c2410_platform_i2c *npd;
713
714         if (!pd) {
715                 pd = &default_i2c_data;
716                 pd->bus_num = 7;
717         }
718
719         npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
720                                &s3c_device_i2c7);
721
722         if (!npd->cfg_gpio)
723                 npd->cfg_gpio = s3c_i2c7_cfg_gpio;
724 }
725 #endif /* CONFIG_S3C_DEV_I2C7 */
726
727 /* I2C HDMIPHY */
728
729 #ifdef CONFIG_S5P_DEV_I2C_HDMIPHY
730 static struct resource s5p_i2c_resource[] = {
731         [0] = DEFINE_RES_MEM(S5P_PA_IIC_HDMIPHY, SZ_4K),
732         [1] = DEFINE_RES_IRQ(IRQ_IIC_HDMIPHY),
733 };
734
735 struct platform_device s5p_device_i2c_hdmiphy = {
736         .name           = "s3c2440-hdmiphy-i2c",
737         .id             = -1,
738         .num_resources  = ARRAY_SIZE(s5p_i2c_resource),
739         .resource       = s5p_i2c_resource,
740 };
741
742 void __init s5p_i2c_hdmiphy_set_platdata(struct s3c2410_platform_i2c *pd)
743 {
744         struct s3c2410_platform_i2c *npd;
745
746         if (!pd) {
747                 pd = &default_i2c_data;
748
749                 if (soc_is_exynos4210() ||
750                     soc_is_exynos4212() || soc_is_exynos4412())
751                         pd->bus_num = 8;
752                 else if (soc_is_s5pv210())
753                         pd->bus_num = 3;
754                 else
755                         pd->bus_num = 0;
756         }
757
758         npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
759                                &s5p_device_i2c_hdmiphy);
760 }
761
762 static struct s5p_hdmi_platform_data s5p_hdmi_def_platdata;
763
764 void __init s5p_hdmi_set_platdata(struct i2c_board_info *hdmiphy_info,
765                                   struct i2c_board_info *mhl_info, int mhl_bus)
766 {
767         struct s5p_hdmi_platform_data *pd = &s5p_hdmi_def_platdata;
768
769         if (soc_is_exynos4210() ||
770             soc_is_exynos4212() || soc_is_exynos4412())
771                 pd->hdmiphy_bus = 8;
772         else if (soc_is_s5pv210())
773                 pd->hdmiphy_bus = 3;
774         else
775                 pd->hdmiphy_bus = 0;
776
777         pd->hdmiphy_info = hdmiphy_info;
778         pd->mhl_info = mhl_info;
779         pd->mhl_bus = mhl_bus;
780
781         s3c_set_platdata(pd, sizeof(struct s5p_hdmi_platform_data),
782                          &s5p_device_hdmi);
783 }
784
785 #endif /* CONFIG_S5P_DEV_I2C_HDMIPHY */
786
787 /* I2S */
788
789 #ifdef CONFIG_PLAT_S3C24XX
790 static struct resource s3c_iis_resource[] = {
791         [0] = DEFINE_RES_MEM(S3C24XX_PA_IIS, S3C24XX_SZ_IIS),
792 };
793
794 struct platform_device s3c_device_iis = {
795         .name           = "s3c24xx-iis",
796         .id             = -1,
797         .num_resources  = ARRAY_SIZE(s3c_iis_resource),
798         .resource       = s3c_iis_resource,
799         .dev            = {
800                 .dma_mask               = &samsung_device_dma_mask,
801                 .coherent_dma_mask      = DMA_BIT_MASK(32),
802         }
803 };
804 #endif /* CONFIG_PLAT_S3C24XX */
805
806 /* IDE CFCON */
807
808 #ifdef CONFIG_SAMSUNG_DEV_IDE
809 static struct resource s3c_cfcon_resource[] = {
810         [0] = DEFINE_RES_MEM(SAMSUNG_PA_CFCON, SZ_16K),
811         [1] = DEFINE_RES_IRQ(IRQ_CFCON),
812 };
813
814 struct platform_device s3c_device_cfcon = {
815         .id             = 0,
816         .num_resources  = ARRAY_SIZE(s3c_cfcon_resource),
817         .resource       = s3c_cfcon_resource,
818 };
819
820 void __init s3c_ide_set_platdata(struct s3c_ide_platdata *pdata)
821 {
822         s3c_set_platdata(pdata, sizeof(struct s3c_ide_platdata),
823                          &s3c_device_cfcon);
824 }
825 #endif /* CONFIG_SAMSUNG_DEV_IDE */
826
827 /* KEYPAD */
828
829 #ifdef CONFIG_SAMSUNG_DEV_KEYPAD
830 static struct resource samsung_keypad_resources[] = {
831         [0] = DEFINE_RES_MEM(SAMSUNG_PA_KEYPAD, SZ_32),
832         [1] = DEFINE_RES_IRQ(IRQ_KEYPAD),
833 };
834
835 struct platform_device samsung_device_keypad = {
836         .name           = "samsung-keypad",
837         .id             = -1,
838         .num_resources  = ARRAY_SIZE(samsung_keypad_resources),
839         .resource       = samsung_keypad_resources,
840 };
841
842 void __init samsung_keypad_set_platdata(struct samsung_keypad_platdata *pd)
843 {
844         struct samsung_keypad_platdata *npd;
845
846         npd = s3c_set_platdata(pd, sizeof(struct samsung_keypad_platdata),
847                         &samsung_device_keypad);
848
849         if (!npd->cfg_gpio)
850                 npd->cfg_gpio = samsung_keypad_cfg_gpio;
851 }
852 #endif /* CONFIG_SAMSUNG_DEV_KEYPAD */
853
854 /* LCD Controller */
855
856 #ifdef CONFIG_PLAT_S3C24XX
857 static struct resource s3c_lcd_resource[] = {
858         [0] = DEFINE_RES_MEM(S3C24XX_PA_LCD, S3C24XX_SZ_LCD),
859         [1] = DEFINE_RES_IRQ(IRQ_LCD),
860 };
861
862 struct platform_device s3c_device_lcd = {
863         .name           = "s3c2410-lcd",
864         .id             = -1,
865         .num_resources  = ARRAY_SIZE(s3c_lcd_resource),
866         .resource       = s3c_lcd_resource,
867         .dev            = {
868                 .dma_mask               = &samsung_device_dma_mask,
869                 .coherent_dma_mask      = DMA_BIT_MASK(32),
870         }
871 };
872
873 void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd)
874 {
875         struct s3c2410fb_mach_info *npd;
876
877         npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_lcd);
878         if (npd) {
879                 npd->displays = kmemdup(pd->displays,
880                         sizeof(struct s3c2410fb_display) * npd->num_displays,
881                         GFP_KERNEL);
882                 if (!npd->displays)
883                         printk(KERN_ERR "no memory for LCD display data\n");
884         } else {
885                 printk(KERN_ERR "no memory for LCD platform data\n");
886         }
887 }
888 #endif /* CONFIG_PLAT_S3C24XX */
889
890 /* MFC */
891
892 #ifdef CONFIG_S5P_DEV_MFC
893 static struct resource s5p_mfc_resource[] = {
894         [0] = DEFINE_RES_MEM(S5P_PA_MFC, SZ_64K),
895         [1] = DEFINE_RES_IRQ(IRQ_MFC),
896 };
897
898 struct platform_device s5p_device_mfc = {
899         .name           = "s5p-mfc",
900         .id             = -1,
901         .num_resources  = ARRAY_SIZE(s5p_mfc_resource),
902         .resource       = s5p_mfc_resource,
903 };
904
905 /*
906  * MFC hardware has 2 memory interfaces which are modelled as two separate
907  * platform devices to let dma-mapping distinguish between them.
908  *
909  * MFC parent device (s5p_device_mfc) must be registered before memory
910  * interface specific devices (s5p_device_mfc_l and s5p_device_mfc_r).
911  */
912
913 struct platform_device s5p_device_mfc_l = {
914         .name           = "s5p-mfc-l",
915         .id             = -1,
916         .dev            = {
917                 .parent                 = &s5p_device_mfc.dev,
918                 .dma_mask               = &samsung_device_dma_mask,
919                 .coherent_dma_mask      = DMA_BIT_MASK(32),
920         },
921 };
922
923 struct platform_device s5p_device_mfc_r = {
924         .name           = "s5p-mfc-r",
925         .id             = -1,
926         .dev            = {
927                 .parent                 = &s5p_device_mfc.dev,
928                 .dma_mask               = &samsung_device_dma_mask,
929                 .coherent_dma_mask      = DMA_BIT_MASK(32),
930         },
931 };
932
933 #endif /* CONFIG_S5P_DEV_MFC */
934
935 /* MIPI CSIS */
936
937 #ifdef CONFIG_S5P_DEV_CSIS0
938 static struct resource s5p_mipi_csis0_resource[] = {
939         [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS0, SZ_16K),
940         [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS0),
941 };
942
943 struct platform_device s5p_device_mipi_csis0 = {
944         .name           = "s5p-mipi-csis",
945         .id             = 0,
946         .num_resources  = ARRAY_SIZE(s5p_mipi_csis0_resource),
947         .resource       = s5p_mipi_csis0_resource,
948 };
949 #endif /* CONFIG_S5P_DEV_CSIS0 */
950
951 #ifdef CONFIG_S5P_DEV_CSIS1
952 static struct resource s5p_mipi_csis1_resource[] = {
953         [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS1, SZ_16K),
954         [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS1),
955 };
956
957 struct platform_device s5p_device_mipi_csis1 = {
958         .name           = "s5p-mipi-csis",
959         .id             = 1,
960         .num_resources  = ARRAY_SIZE(s5p_mipi_csis1_resource),
961         .resource       = s5p_mipi_csis1_resource,
962 };
963 #endif
964
965 /* NAND */
966
967 #ifdef CONFIG_S3C_DEV_NAND
968 static struct resource s3c_nand_resource[] = {
969         [0] = DEFINE_RES_MEM(S3C_PA_NAND, SZ_1M),
970 };
971
972 struct platform_device s3c_device_nand = {
973         .name           = "s3c2410-nand",
974         .id             = -1,
975         .num_resources  = ARRAY_SIZE(s3c_nand_resource),
976         .resource       = s3c_nand_resource,
977 };
978
979 /*
980  * s3c_nand_copy_set() - copy nand set data
981  * @set: The new structure, directly copied from the old.
982  *
983  * Copy all the fields from the NAND set field from what is probably __initdata
984  * to new kernel memory. The code returns 0 if the copy happened correctly or
985  * an error code for the calling function to display.
986  *
987  * Note, we currently do not try and look to see if we've already copied the
988  * data in a previous set.
989  */
990 static int __init s3c_nand_copy_set(struct s3c2410_nand_set *set)
991 {
992         void *ptr;
993         int size;
994
995         size = sizeof(struct mtd_partition) * set->nr_partitions;
996         if (size) {
997                 ptr = kmemdup(set->partitions, size, GFP_KERNEL);
998                 set->partitions = ptr;
999
1000                 if (!ptr)
1001                         return -ENOMEM;
1002         }
1003
1004         if (set->nr_map && set->nr_chips) {
1005                 size = sizeof(int) * set->nr_chips;
1006                 ptr = kmemdup(set->nr_map, size, GFP_KERNEL);
1007                 set->nr_map = ptr;
1008
1009                 if (!ptr)
1010                         return -ENOMEM;
1011         }
1012
1013         if (set->ecc_layout) {
1014                 ptr = kmemdup(set->ecc_layout,
1015                               sizeof(struct nand_ecclayout), GFP_KERNEL);
1016                 set->ecc_layout = ptr;
1017
1018                 if (!ptr)
1019                         return -ENOMEM;
1020         }
1021
1022         return 0;
1023 }
1024
1025 void __init s3c_nand_set_platdata(struct s3c2410_platform_nand *nand)
1026 {
1027         struct s3c2410_platform_nand *npd;
1028         int size;
1029         int ret;
1030
1031         /* note, if we get a failure in allocation, we simply drop out of the
1032          * function. If there is so little memory available at initialisation
1033          * time then there is little chance the system is going to run.
1034          */
1035
1036         npd = s3c_set_platdata(nand, sizeof(struct s3c2410_platform_nand),
1037                                 &s3c_device_nand);
1038         if (!npd)
1039                 return;
1040
1041         /* now see if we need to copy any of the nand set data */
1042
1043         size = sizeof(struct s3c2410_nand_set) * npd->nr_sets;
1044         if (size) {
1045                 struct s3c2410_nand_set *from = npd->sets;
1046                 struct s3c2410_nand_set *to;
1047                 int i;
1048
1049                 to = kmemdup(from, size, GFP_KERNEL);
1050                 npd->sets = to; /* set, even if we failed */
1051
1052                 if (!to) {
1053                         printk(KERN_ERR "%s: no memory for sets\n", __func__);
1054                         return;
1055                 }
1056
1057                 for (i = 0; i < npd->nr_sets; i++) {
1058                         ret = s3c_nand_copy_set(to);
1059                         if (ret) {
1060                                 printk(KERN_ERR "%s: failed to copy set %d\n",
1061                                 __func__, i);
1062                                 return;
1063                         }
1064                         to++;
1065                 }
1066         }
1067 }
1068 #endif /* CONFIG_S3C_DEV_NAND */
1069
1070 /* ONENAND */
1071
1072 #ifdef CONFIG_S3C_DEV_ONENAND
1073 static struct resource s3c_onenand_resources[] = {
1074         [0] = DEFINE_RES_MEM(S3C_PA_ONENAND, SZ_1K),
1075         [1] = DEFINE_RES_MEM(S3C_PA_ONENAND_BUF, S3C_SZ_ONENAND_BUF),
1076         [2] = DEFINE_RES_IRQ(IRQ_ONENAND),
1077 };
1078
1079 struct platform_device s3c_device_onenand = {
1080         .name           = "samsung-onenand",
1081         .id             = 0,
1082         .num_resources  = ARRAY_SIZE(s3c_onenand_resources),
1083         .resource       = s3c_onenand_resources,
1084 };
1085 #endif /* CONFIG_S3C_DEV_ONENAND */
1086
1087 #ifdef CONFIG_S3C64XX_DEV_ONENAND1
1088 static struct resource s3c64xx_onenand1_resources[] = {
1089         [0] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1, SZ_1K),
1090         [1] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1_BUF, S3C64XX_SZ_ONENAND1_BUF),
1091         [2] = DEFINE_RES_IRQ(IRQ_ONENAND1),
1092 };
1093
1094 struct platform_device s3c64xx_device_onenand1 = {
1095         .name           = "samsung-onenand",
1096         .id             = 1,
1097         .num_resources  = ARRAY_SIZE(s3c64xx_onenand1_resources),
1098         .resource       = s3c64xx_onenand1_resources,
1099 };
1100
1101 void __init s3c64xx_onenand1_set_platdata(struct onenand_platform_data *pdata)
1102 {
1103         s3c_set_platdata(pdata, sizeof(struct onenand_platform_data),
1104                          &s3c64xx_device_onenand1);
1105 }
1106 #endif /* CONFIG_S3C64XX_DEV_ONENAND1 */
1107
1108 #ifdef CONFIG_S5P_DEV_ONENAND
1109 static struct resource s5p_onenand_resources[] = {
1110         [0] = DEFINE_RES_MEM(S5P_PA_ONENAND, SZ_128K),
1111         [1] = DEFINE_RES_MEM(S5P_PA_ONENAND_DMA, SZ_8K),
1112         [2] = DEFINE_RES_IRQ(IRQ_ONENAND_AUDI),
1113 };
1114
1115 struct platform_device s5p_device_onenand = {
1116         .name           = "s5pc110-onenand",
1117         .id             = -1,
1118         .num_resources  = ARRAY_SIZE(s5p_onenand_resources),
1119         .resource       = s5p_onenand_resources,
1120 };
1121 #endif /* CONFIG_S5P_DEV_ONENAND */
1122
1123 /* PMU */
1124
1125 #ifdef CONFIG_PLAT_S5P
1126 static struct resource s5p_pmu_resource[] = {
1127         DEFINE_RES_IRQ(IRQ_PMU)
1128 };
1129
1130 static struct platform_device s5p_device_pmu = {
1131         .name           = "arm-pmu",
1132         .id             = -1,
1133         .num_resources  = ARRAY_SIZE(s5p_pmu_resource),
1134         .resource       = s5p_pmu_resource,
1135 };
1136
1137 static int __init s5p_pmu_init(void)
1138 {
1139         platform_device_register(&s5p_device_pmu);
1140         return 0;
1141 }
1142 arch_initcall(s5p_pmu_init);
1143 #endif /* CONFIG_PLAT_S5P */
1144
1145 /* PWM Timer */
1146
1147 #ifdef CONFIG_SAMSUNG_DEV_PWM
1148
1149 #define TIMER_RESOURCE_SIZE (1)
1150
1151 #define TIMER_RESOURCE(_tmr, _irq)                      \
1152         (struct resource [TIMER_RESOURCE_SIZE]) {       \
1153                 [0] = {                                 \
1154                         .start  = _irq,                 \
1155                         .end    = _irq,                 \
1156                         .flags  = IORESOURCE_IRQ        \
1157                 }                                       \
1158         }
1159
1160 #define DEFINE_S3C_TIMER(_tmr_no, _irq)                 \
1161         .name           = "s3c24xx-pwm",                \
1162         .id             = _tmr_no,                      \
1163         .num_resources  = TIMER_RESOURCE_SIZE,          \
1164         .resource       = TIMER_RESOURCE(_tmr_no, _irq),        \
1165
1166 /*
1167  * since we already have an static mapping for the timer,
1168  * we do not bother setting any IO resource for the base.
1169  */
1170
1171 struct platform_device s3c_device_timer[] = {
1172         [0] = { DEFINE_S3C_TIMER(0, IRQ_TIMER0) },
1173         [1] = { DEFINE_S3C_TIMER(1, IRQ_TIMER1) },
1174         [2] = { DEFINE_S3C_TIMER(2, IRQ_TIMER2) },
1175         [3] = { DEFINE_S3C_TIMER(3, IRQ_TIMER3) },
1176         [4] = { DEFINE_S3C_TIMER(4, IRQ_TIMER4) },
1177 };
1178 #endif /* CONFIG_SAMSUNG_DEV_PWM */
1179
1180 /* RTC */
1181
1182 #ifdef CONFIG_PLAT_S3C24XX
1183 static struct resource s3c_rtc_resource[] = {
1184         [0] = DEFINE_RES_MEM(S3C24XX_PA_RTC, SZ_256),
1185         [1] = DEFINE_RES_IRQ(IRQ_RTC),
1186         [2] = DEFINE_RES_IRQ(IRQ_TICK),
1187 };
1188
1189 struct platform_device s3c_device_rtc = {
1190         .name           = "s3c2410-rtc",
1191         .id             = -1,
1192         .num_resources  = ARRAY_SIZE(s3c_rtc_resource),
1193         .resource       = s3c_rtc_resource,
1194 };
1195 #endif /* CONFIG_PLAT_S3C24XX */
1196
1197 #ifdef CONFIG_S3C_DEV_RTC
1198 static struct resource s3c_rtc_resource[] = {
1199         [0] = DEFINE_RES_MEM(S3C_PA_RTC, SZ_256),
1200         [1] = DEFINE_RES_IRQ(IRQ_RTC_ALARM),
1201         [2] = DEFINE_RES_IRQ(IRQ_RTC_TIC),
1202 };
1203
1204 struct platform_device s3c_device_rtc = {
1205         .name           = "s3c64xx-rtc",
1206         .id             = -1,
1207         .num_resources  = ARRAY_SIZE(s3c_rtc_resource),
1208         .resource       = s3c_rtc_resource,
1209 };
1210 #endif /* CONFIG_S3C_DEV_RTC */
1211
1212 /* SDI */
1213
1214 #ifdef CONFIG_PLAT_S3C24XX
1215 static struct resource s3c_sdi_resource[] = {
1216         [0] = DEFINE_RES_MEM(S3C24XX_PA_SDI, S3C24XX_SZ_SDI),
1217         [1] = DEFINE_RES_IRQ(IRQ_SDI),
1218 };
1219
1220 struct platform_device s3c_device_sdi = {
1221         .name           = "s3c2410-sdi",
1222         .id             = -1,
1223         .num_resources  = ARRAY_SIZE(s3c_sdi_resource),
1224         .resource       = s3c_sdi_resource,
1225 };
1226
1227 void __init s3c24xx_mci_set_platdata(struct s3c24xx_mci_pdata *pdata)
1228 {
1229         s3c_set_platdata(pdata, sizeof(struct s3c24xx_mci_pdata),
1230                          &s3c_device_sdi);
1231 }
1232 #endif /* CONFIG_PLAT_S3C24XX */
1233
1234 /* SPI */
1235
1236 #ifdef CONFIG_PLAT_S3C24XX
1237 static struct resource s3c_spi0_resource[] = {
1238         [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI, SZ_32),
1239         [1] = DEFINE_RES_IRQ(IRQ_SPI0),
1240 };
1241
1242 struct platform_device s3c_device_spi0 = {
1243         .name           = "s3c2410-spi",
1244         .id             = 0,
1245         .num_resources  = ARRAY_SIZE(s3c_spi0_resource),
1246         .resource       = s3c_spi0_resource,
1247         .dev            = {
1248                 .dma_mask               = &samsung_device_dma_mask,
1249                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1250         }
1251 };
1252
1253 static struct resource s3c_spi1_resource[] = {
1254         [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI1, SZ_32),
1255         [1] = DEFINE_RES_IRQ(IRQ_SPI1),
1256 };
1257
1258 struct platform_device s3c_device_spi1 = {
1259         .name           = "s3c2410-spi",
1260         .id             = 1,
1261         .num_resources  = ARRAY_SIZE(s3c_spi1_resource),
1262         .resource       = s3c_spi1_resource,
1263         .dev            = {
1264                 .dma_mask               = &samsung_device_dma_mask,
1265                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1266         }
1267 };
1268 #endif /* CONFIG_PLAT_S3C24XX */
1269
1270 /* Touchscreen */
1271
1272 #ifdef CONFIG_PLAT_S3C24XX
1273 static struct resource s3c_ts_resource[] = {
1274         [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
1275         [1] = DEFINE_RES_IRQ(IRQ_TC),
1276 };
1277
1278 struct platform_device s3c_device_ts = {
1279         .name           = "s3c2410-ts",
1280         .id             = -1,
1281         .dev.parent     = &s3c_device_adc.dev,
1282         .num_resources  = ARRAY_SIZE(s3c_ts_resource),
1283         .resource       = s3c_ts_resource,
1284 };
1285
1286 void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *hard_s3c2410ts_info)
1287 {
1288         s3c_set_platdata(hard_s3c2410ts_info,
1289                          sizeof(struct s3c2410_ts_mach_info), &s3c_device_ts);
1290 }
1291 #endif /* CONFIG_PLAT_S3C24XX */
1292
1293 #ifdef CONFIG_SAMSUNG_DEV_TS
1294 static struct resource s3c_ts_resource[] = {
1295         [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256),
1296         [1] = DEFINE_RES_IRQ(IRQ_TC),
1297 };
1298
1299 static struct s3c2410_ts_mach_info default_ts_data __initdata = {
1300         .delay                  = 10000,
1301         .presc                  = 49,
1302         .oversampling_shift     = 2,
1303 };
1304
1305 struct platform_device s3c_device_ts = {
1306         .name           = "s3c64xx-ts",
1307         .id             = -1,
1308         .num_resources  = ARRAY_SIZE(s3c_ts_resource),
1309         .resource       = s3c_ts_resource,
1310 };
1311
1312 void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *pd)
1313 {
1314         if (!pd)
1315                 pd = &default_ts_data;
1316
1317         s3c_set_platdata(pd, sizeof(struct s3c2410_ts_mach_info),
1318                          &s3c_device_ts);
1319 }
1320 #endif /* CONFIG_SAMSUNG_DEV_TS */
1321
1322 /* TV */
1323
1324 #ifdef CONFIG_S5P_DEV_TV
1325
1326 static struct resource s5p_hdmi_resources[] = {
1327         [0] = DEFINE_RES_MEM(S5P_PA_HDMI, SZ_1M),
1328         [1] = DEFINE_RES_IRQ(IRQ_HDMI),
1329 };
1330
1331 struct platform_device s5p_device_hdmi = {
1332         .name           = "s5p-hdmi",
1333         .id             = -1,
1334         .num_resources  = ARRAY_SIZE(s5p_hdmi_resources),
1335         .resource       = s5p_hdmi_resources,
1336 };
1337
1338 static struct resource s5p_sdo_resources[] = {
1339         [0] = DEFINE_RES_MEM(S5P_PA_SDO, SZ_64K),
1340         [1] = DEFINE_RES_IRQ(IRQ_SDO),
1341 };
1342
1343 struct platform_device s5p_device_sdo = {
1344         .name           = "s5p-sdo",
1345         .id             = -1,
1346         .num_resources  = ARRAY_SIZE(s5p_sdo_resources),
1347         .resource       = s5p_sdo_resources,
1348 };
1349
1350 static struct resource s5p_mixer_resources[] = {
1351         [0] = DEFINE_RES_MEM_NAMED(S5P_PA_MIXER, SZ_64K, "mxr"),
1352         [1] = DEFINE_RES_MEM_NAMED(S5P_PA_VP, SZ_64K, "vp"),
1353         [2] = DEFINE_RES_IRQ_NAMED(IRQ_MIXER, "irq"),
1354 };
1355
1356 struct platform_device s5p_device_mixer = {
1357         .name           = "s5p-mixer",
1358         .id             = -1,
1359         .num_resources  = ARRAY_SIZE(s5p_mixer_resources),
1360         .resource       = s5p_mixer_resources,
1361         .dev            = {
1362                 .dma_mask               = &samsung_device_dma_mask,
1363                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1364         }
1365 };
1366 #endif /* CONFIG_S5P_DEV_TV */
1367
1368 /* USB */
1369
1370 #ifdef CONFIG_S3C_DEV_USB_HOST
1371 static struct resource s3c_usb_resource[] = {
1372         [0] = DEFINE_RES_MEM(S3C_PA_USBHOST, SZ_256),
1373         [1] = DEFINE_RES_IRQ(IRQ_USBH),
1374 };
1375
1376 struct platform_device s3c_device_ohci = {
1377         .name           = "s3c2410-ohci",
1378         .id             = -1,
1379         .num_resources  = ARRAY_SIZE(s3c_usb_resource),
1380         .resource       = s3c_usb_resource,
1381         .dev            = {
1382                 .dma_mask               = &samsung_device_dma_mask,
1383                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1384         }
1385 };
1386
1387 /*
1388  * s3c_ohci_set_platdata - initialise OHCI device platform data
1389  * @info: The platform data.
1390  *
1391  * This call copies the @info passed in and sets the device .platform_data
1392  * field to that copy. The @info is copied so that the original can be marked
1393  * __initdata.
1394  */
1395
1396 void __init s3c_ohci_set_platdata(struct s3c2410_hcd_info *info)
1397 {
1398         s3c_set_platdata(info, sizeof(struct s3c2410_hcd_info),
1399                          &s3c_device_ohci);
1400 }
1401 #endif /* CONFIG_S3C_DEV_USB_HOST */
1402
1403 /* USB Device (Gadget) */
1404
1405 #ifdef CONFIG_PLAT_S3C24XX
1406 static struct resource s3c_usbgadget_resource[] = {
1407         [0] = DEFINE_RES_MEM(S3C24XX_PA_USBDEV, S3C24XX_SZ_USBDEV),
1408         [1] = DEFINE_RES_IRQ(IRQ_USBD),
1409 };
1410
1411 struct platform_device s3c_device_usbgadget = {
1412         .name           = "s3c2410-usbgadget",
1413         .id             = -1,
1414         .num_resources  = ARRAY_SIZE(s3c_usbgadget_resource),
1415         .resource       = s3c_usbgadget_resource,
1416 };
1417
1418 void __init s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info *pd)
1419 {
1420         s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usbgadget);
1421 }
1422 #endif /* CONFIG_PLAT_S3C24XX */
1423
1424 /* USB EHCI Host Controller */
1425
1426 #ifdef CONFIG_S5P_DEV_USB_EHCI
1427 static struct resource s5p_ehci_resource[] = {
1428         [0] = DEFINE_RES_MEM(S5P_PA_EHCI, SZ_256),
1429         [1] = DEFINE_RES_IRQ(IRQ_USB_HOST),
1430 };
1431
1432 struct platform_device s5p_device_ehci = {
1433         .name           = "s5p-ehci",
1434         .id             = -1,
1435         .num_resources  = ARRAY_SIZE(s5p_ehci_resource),
1436         .resource       = s5p_ehci_resource,
1437         .dev            = {
1438                 .dma_mask               = &samsung_device_dma_mask,
1439                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1440         }
1441 };
1442
1443 void __init s5p_ehci_set_platdata(struct s5p_ehci_platdata *pd)
1444 {
1445         struct s5p_ehci_platdata *npd;
1446
1447         npd = s3c_set_platdata(pd, sizeof(struct s5p_ehci_platdata),
1448                         &s5p_device_ehci);
1449
1450         if (!npd->phy_init)
1451                 npd->phy_init = s5p_usb_phy_init;
1452         if (!npd->phy_exit)
1453                 npd->phy_exit = s5p_usb_phy_exit;
1454 }
1455 #endif /* CONFIG_S5P_DEV_USB_EHCI */
1456
1457 /* USB HSOTG */
1458
1459 #ifdef CONFIG_S3C_DEV_USB_HSOTG
1460 static struct resource s3c_usb_hsotg_resources[] = {
1461         [0] = DEFINE_RES_MEM(S3C_PA_USB_HSOTG, SZ_128K),
1462         [1] = DEFINE_RES_IRQ(IRQ_OTG),
1463 };
1464
1465 struct platform_device s3c_device_usb_hsotg = {
1466         .name           = "s3c-hsotg",
1467         .id             = -1,
1468         .num_resources  = ARRAY_SIZE(s3c_usb_hsotg_resources),
1469         .resource       = s3c_usb_hsotg_resources,
1470         .dev            = {
1471                 .dma_mask               = &samsung_device_dma_mask,
1472                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1473         },
1474 };
1475
1476 void __init s3c_hsotg_set_platdata(struct s3c_hsotg_plat *pd)
1477 {
1478         struct s3c_hsotg_plat *npd;
1479
1480         npd = s3c_set_platdata(pd, sizeof(struct s3c_hsotg_plat),
1481                         &s3c_device_usb_hsotg);
1482
1483         if (!npd->phy_init)
1484                 npd->phy_init = s5p_usb_phy_init;
1485         if (!npd->phy_exit)
1486                 npd->phy_exit = s5p_usb_phy_exit;
1487 }
1488 #endif /* CONFIG_S3C_DEV_USB_HSOTG */
1489
1490 /* USB High Spped 2.0 Device (Gadget) */
1491
1492 #ifdef CONFIG_PLAT_S3C24XX
1493 static struct resource s3c_hsudc_resource[] = {
1494         [0] = DEFINE_RES_MEM(S3C2416_PA_HSUDC, S3C2416_SZ_HSUDC),
1495         [1] = DEFINE_RES_IRQ(IRQ_USBD),
1496 };
1497
1498 struct platform_device s3c_device_usb_hsudc = {
1499         .name           = "s3c-hsudc",
1500         .id             = -1,
1501         .num_resources  = ARRAY_SIZE(s3c_hsudc_resource),
1502         .resource       = s3c_hsudc_resource,
1503         .dev            = {
1504                 .dma_mask               = &samsung_device_dma_mask,
1505                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1506         },
1507 };
1508
1509 void __init s3c24xx_hsudc_set_platdata(struct s3c24xx_hsudc_platdata *pd)
1510 {
1511         s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usb_hsudc);
1512 }
1513 #endif /* CONFIG_PLAT_S3C24XX */
1514
1515 /* WDT */
1516
1517 #ifdef CONFIG_S3C_DEV_WDT
1518 static struct resource s3c_wdt_resource[] = {
1519         [0] = DEFINE_RES_MEM(S3C_PA_WDT, SZ_1K),
1520         [1] = DEFINE_RES_IRQ(IRQ_WDT),
1521 };
1522
1523 struct platform_device s3c_device_wdt = {
1524         .name           = "s3c2410-wdt",
1525         .id             = -1,
1526         .num_resources  = ARRAY_SIZE(s3c_wdt_resource),
1527         .resource       = s3c_wdt_resource,
1528 };
1529 #endif /* CONFIG_S3C_DEV_WDT */
1530
1531 #ifdef CONFIG_S3C64XX_DEV_SPI0
1532 static struct resource s3c64xx_spi0_resource[] = {
1533         [0] = DEFINE_RES_MEM(S3C_PA_SPI0, SZ_256),
1534         [1] = DEFINE_RES_DMA(DMACH_SPI0_TX),
1535         [2] = DEFINE_RES_DMA(DMACH_SPI0_RX),
1536         [3] = DEFINE_RES_IRQ(IRQ_SPI0),
1537 };
1538
1539 struct platform_device s3c64xx_device_spi0 = {
1540         .name           = "s3c6410-spi",
1541         .id             = 0,
1542         .num_resources  = ARRAY_SIZE(s3c64xx_spi0_resource),
1543         .resource       = s3c64xx_spi0_resource,
1544         .dev = {
1545                 .dma_mask               = &samsung_device_dma_mask,
1546                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1547         },
1548 };
1549
1550 void __init s3c64xx_spi0_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
1551                                                 int num_cs)
1552 {
1553         struct s3c64xx_spi_info pd;
1554
1555         /* Reject invalid configuration */
1556         if (!num_cs || src_clk_nr < 0) {
1557                 pr_err("%s: Invalid SPI configuration\n", __func__);
1558                 return;
1559         }
1560
1561         pd.num_cs = num_cs;
1562         pd.src_clk_nr = src_clk_nr;
1563         pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi0_cfg_gpio;
1564
1565         s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi0);
1566 }
1567 #endif /* CONFIG_S3C64XX_DEV_SPI0 */
1568
1569 #ifdef CONFIG_S3C64XX_DEV_SPI1
1570 static struct resource s3c64xx_spi1_resource[] = {
1571         [0] = DEFINE_RES_MEM(S3C_PA_SPI1, SZ_256),
1572         [1] = DEFINE_RES_DMA(DMACH_SPI1_TX),
1573         [2] = DEFINE_RES_DMA(DMACH_SPI1_RX),
1574         [3] = DEFINE_RES_IRQ(IRQ_SPI1),
1575 };
1576
1577 struct platform_device s3c64xx_device_spi1 = {
1578         .name           = "s3c6410-spi",
1579         .id             = 1,
1580         .num_resources  = ARRAY_SIZE(s3c64xx_spi1_resource),
1581         .resource       = s3c64xx_spi1_resource,
1582         .dev = {
1583                 .dma_mask               = &samsung_device_dma_mask,
1584                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1585         },
1586 };
1587
1588 void __init s3c64xx_spi1_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
1589                                                 int num_cs)
1590 {
1591         struct s3c64xx_spi_info pd;
1592
1593         /* Reject invalid configuration */
1594         if (!num_cs || src_clk_nr < 0) {
1595                 pr_err("%s: Invalid SPI configuration\n", __func__);
1596                 return;
1597         }
1598
1599         pd.num_cs = num_cs;
1600         pd.src_clk_nr = src_clk_nr;
1601         pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi1_cfg_gpio;
1602
1603         s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi1);
1604 }
1605 #endif /* CONFIG_S3C64XX_DEV_SPI1 */
1606
1607 #ifdef CONFIG_S3C64XX_DEV_SPI2
1608 static struct resource s3c64xx_spi2_resource[] = {
1609         [0] = DEFINE_RES_MEM(S3C_PA_SPI2, SZ_256),
1610         [1] = DEFINE_RES_DMA(DMACH_SPI2_TX),
1611         [2] = DEFINE_RES_DMA(DMACH_SPI2_RX),
1612         [3] = DEFINE_RES_IRQ(IRQ_SPI2),
1613 };
1614
1615 struct platform_device s3c64xx_device_spi2 = {
1616         .name           = "s3c6410-spi",
1617         .id             = 2,
1618         .num_resources  = ARRAY_SIZE(s3c64xx_spi2_resource),
1619         .resource       = s3c64xx_spi2_resource,
1620         .dev = {
1621                 .dma_mask               = &samsung_device_dma_mask,
1622                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1623         },
1624 };
1625
1626 void __init s3c64xx_spi2_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
1627                                                 int num_cs)
1628 {
1629         struct s3c64xx_spi_info pd;
1630
1631         /* Reject invalid configuration */
1632         if (!num_cs || src_clk_nr < 0) {
1633                 pr_err("%s: Invalid SPI configuration\n", __func__);
1634                 return;
1635         }
1636
1637         pd.num_cs = num_cs;
1638         pd.src_clk_nr = src_clk_nr;
1639         pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi2_cfg_gpio;
1640
1641         s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi2);
1642 }
1643 #endif /* CONFIG_S3C64XX_DEV_SPI2 */