1 /* linux/arch/arm/plat-samsung/devs.c
3 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
6 * Base SAMSUNG platform device definitions
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <linux/kernel.h>
14 #include <linux/types.h>
15 #include <linux/interrupt.h>
16 #include <linux/list.h>
17 #include <linux/timer.h>
18 #include <linux/init.h>
19 #include <linux/serial_core.h>
20 #include <linux/platform_device.h>
22 #include <linux/slab.h>
23 #include <linux/string.h>
24 #include <linux/dma-mapping.h>
26 #include <linux/gfp.h>
27 #include <linux/mtd/mtd.h>
28 #include <linux/mtd/onenand.h>
29 #include <linux/mtd/partitions.h>
30 #include <linux/mmc/host.h>
31 #include <linux/ioport.h>
32 #include <linux/platform_data/s3c-hsudc.h>
33 #include <linux/platform_data/s3c-hsotg.h>
35 #include <media/s5p_hdmi.h>
38 #include <asm/mach/arch.h>
39 #include <asm/mach/map.h>
40 #include <asm/mach/irq.h>
42 #include <mach/hardware.h>
44 #include <mach/irqs.h>
48 #include <plat/devs.h>
50 #include <linux/platform_data/ata-samsung_cf.h>
51 #include <linux/platform_data/usb-ehci-s5p.h>
53 #include <plat/fb-s3c2410.h>
54 #include <plat/hdmi.h>
55 #include <linux/platform_data/hwmon-s3c.h>
56 #include <linux/platform_data/i2c-s3c2410.h>
57 #include <plat/keypad.h>
58 #include <linux/platform_data/mmc-s3cmci.h>
59 #include <linux/platform_data/mtd-nand-s3c2410.h>
60 #include <plat/sdhci.h>
61 #include <linux/platform_data/touchscreen-s3c2410.h>
62 #include <linux/platform_data/usb-s3c2410_udc.h>
63 #include <linux/platform_data/usb-ohci-s3c2410.h>
64 #include <plat/usb-phy.h>
65 #include <plat/regs-iic.h>
66 #include <plat/regs-serial.h>
67 #include <plat/regs-spi.h>
68 #include <linux/platform_data/spi-s3c64xx.h>
70 static u64 samsung_device_dma_mask = DMA_BIT_MASK(32);
73 #ifdef CONFIG_CPU_S3C2440
74 static struct resource s3c_ac97_resource[] = {
75 [0] = DEFINE_RES_MEM(S3C2440_PA_AC97, S3C2440_SZ_AC97),
76 [1] = DEFINE_RES_IRQ(IRQ_S3C244X_AC97),
77 [2] = DEFINE_RES_DMA_NAMED(DMACH_PCM_OUT, "PCM out"),
78 [3] = DEFINE_RES_DMA_NAMED(DMACH_PCM_IN, "PCM in"),
79 [4] = DEFINE_RES_DMA_NAMED(DMACH_MIC_IN, "Mic in"),
82 struct platform_device s3c_device_ac97 = {
83 .name = "samsung-ac97",
85 .num_resources = ARRAY_SIZE(s3c_ac97_resource),
86 .resource = s3c_ac97_resource,
88 .dma_mask = &samsung_device_dma_mask,
89 .coherent_dma_mask = DMA_BIT_MASK(32),
92 #endif /* CONFIG_CPU_S3C2440 */
96 #ifdef CONFIG_PLAT_S3C24XX
97 static struct resource s3c_adc_resource[] = {
98 [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
99 [1] = DEFINE_RES_IRQ(IRQ_TC),
100 [2] = DEFINE_RES_IRQ(IRQ_ADC),
103 struct platform_device s3c_device_adc = {
104 .name = "s3c24xx-adc",
106 .num_resources = ARRAY_SIZE(s3c_adc_resource),
107 .resource = s3c_adc_resource,
109 #endif /* CONFIG_PLAT_S3C24XX */
111 #if defined(CONFIG_SAMSUNG_DEV_ADC)
112 static struct resource s3c_adc_resource[] = {
113 [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256),
114 [1] = DEFINE_RES_IRQ(IRQ_TC),
115 [2] = DEFINE_RES_IRQ(IRQ_ADC),
118 struct platform_device s3c_device_adc = {
119 .name = "samsung-adc",
121 .num_resources = ARRAY_SIZE(s3c_adc_resource),
122 .resource = s3c_adc_resource,
124 #endif /* CONFIG_SAMSUNG_DEV_ADC */
126 /* Camif Controller */
128 #ifdef CONFIG_CPU_S3C2440
129 static struct resource s3c_camif_resource[] = {
130 [0] = DEFINE_RES_MEM(S3C2440_PA_CAMIF, S3C2440_SZ_CAMIF),
131 [1] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_C),
132 [2] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_P),
135 struct platform_device s3c_device_camif = {
136 .name = "s3c2440-camif",
138 .num_resources = ARRAY_SIZE(s3c_camif_resource),
139 .resource = s3c_camif_resource,
141 .dma_mask = &samsung_device_dma_mask,
142 .coherent_dma_mask = DMA_BIT_MASK(32),
145 #endif /* CONFIG_CPU_S3C2440 */
149 struct platform_device samsung_asoc_idma = {
150 .name = "samsung-idma",
153 .dma_mask = &samsung_device_dma_mask,
154 .coherent_dma_mask = DMA_BIT_MASK(32),
160 #ifdef CONFIG_S3C_DEV_FB
161 static struct resource s3c_fb_resource[] = {
162 [0] = DEFINE_RES_MEM(S3C_PA_FB, SZ_16K),
163 [1] = DEFINE_RES_IRQ(IRQ_LCD_VSYNC),
164 [2] = DEFINE_RES_IRQ(IRQ_LCD_FIFO),
165 [3] = DEFINE_RES_IRQ(IRQ_LCD_SYSTEM),
168 struct platform_device s3c_device_fb = {
171 .num_resources = ARRAY_SIZE(s3c_fb_resource),
172 .resource = s3c_fb_resource,
174 .dma_mask = &samsung_device_dma_mask,
175 .coherent_dma_mask = DMA_BIT_MASK(32),
179 void __init s3c_fb_set_platdata(struct s3c_fb_platdata *pd)
181 s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
184 #endif /* CONFIG_S3C_DEV_FB */
188 #ifdef CONFIG_S5P_DEV_FIMC0
189 static struct resource s5p_fimc0_resource[] = {
190 [0] = DEFINE_RES_MEM(S5P_PA_FIMC0, SZ_4K),
191 [1] = DEFINE_RES_IRQ(IRQ_FIMC0),
194 struct platform_device s5p_device_fimc0 = {
197 .num_resources = ARRAY_SIZE(s5p_fimc0_resource),
198 .resource = s5p_fimc0_resource,
200 .dma_mask = &samsung_device_dma_mask,
201 .coherent_dma_mask = DMA_BIT_MASK(32),
205 struct platform_device s5p_device_fimc_md = {
206 .name = "s5p-fimc-md",
209 #endif /* CONFIG_S5P_DEV_FIMC0 */
211 #ifdef CONFIG_S5P_DEV_FIMC1
212 static struct resource s5p_fimc1_resource[] = {
213 [0] = DEFINE_RES_MEM(S5P_PA_FIMC1, SZ_4K),
214 [1] = DEFINE_RES_IRQ(IRQ_FIMC1),
217 struct platform_device s5p_device_fimc1 = {
220 .num_resources = ARRAY_SIZE(s5p_fimc1_resource),
221 .resource = s5p_fimc1_resource,
223 .dma_mask = &samsung_device_dma_mask,
224 .coherent_dma_mask = DMA_BIT_MASK(32),
227 #endif /* CONFIG_S5P_DEV_FIMC1 */
229 #ifdef CONFIG_S5P_DEV_FIMC2
230 static struct resource s5p_fimc2_resource[] = {
231 [0] = DEFINE_RES_MEM(S5P_PA_FIMC2, SZ_4K),
232 [1] = DEFINE_RES_IRQ(IRQ_FIMC2),
235 struct platform_device s5p_device_fimc2 = {
238 .num_resources = ARRAY_SIZE(s5p_fimc2_resource),
239 .resource = s5p_fimc2_resource,
241 .dma_mask = &samsung_device_dma_mask,
242 .coherent_dma_mask = DMA_BIT_MASK(32),
245 #endif /* CONFIG_S5P_DEV_FIMC2 */
247 #ifdef CONFIG_S5P_DEV_FIMC3
248 static struct resource s5p_fimc3_resource[] = {
249 [0] = DEFINE_RES_MEM(S5P_PA_FIMC3, SZ_4K),
250 [1] = DEFINE_RES_IRQ(IRQ_FIMC3),
253 struct platform_device s5p_device_fimc3 = {
256 .num_resources = ARRAY_SIZE(s5p_fimc3_resource),
257 .resource = s5p_fimc3_resource,
259 .dma_mask = &samsung_device_dma_mask,
260 .coherent_dma_mask = DMA_BIT_MASK(32),
263 #endif /* CONFIG_S5P_DEV_FIMC3 */
267 #ifdef CONFIG_S5P_DEV_G2D
268 static struct resource s5p_g2d_resource[] = {
269 [0] = DEFINE_RES_MEM(S5P_PA_G2D, SZ_4K),
270 [1] = DEFINE_RES_IRQ(IRQ_2D),
273 struct platform_device s5p_device_g2d = {
276 .num_resources = ARRAY_SIZE(s5p_g2d_resource),
277 .resource = s5p_g2d_resource,
279 .dma_mask = &samsung_device_dma_mask,
280 .coherent_dma_mask = DMA_BIT_MASK(32),
283 #endif /* CONFIG_S5P_DEV_G2D */
285 #ifdef CONFIG_S5P_DEV_JPEG
286 static struct resource s5p_jpeg_resource[] = {
287 [0] = DEFINE_RES_MEM(S5P_PA_JPEG, SZ_4K),
288 [1] = DEFINE_RES_IRQ(IRQ_JPEG),
291 struct platform_device s5p_device_jpeg = {
294 .num_resources = ARRAY_SIZE(s5p_jpeg_resource),
295 .resource = s5p_jpeg_resource,
297 .dma_mask = &samsung_device_dma_mask,
298 .coherent_dma_mask = DMA_BIT_MASK(32),
301 #endif /* CONFIG_S5P_DEV_JPEG */
305 #ifdef CONFIG_S5P_DEV_FIMD0
306 static struct resource s5p_fimd0_resource[] = {
307 [0] = DEFINE_RES_MEM(S5P_PA_FIMD0, SZ_32K),
308 [1] = DEFINE_RES_IRQ(IRQ_FIMD0_VSYNC),
309 [2] = DEFINE_RES_IRQ(IRQ_FIMD0_FIFO),
310 [3] = DEFINE_RES_IRQ(IRQ_FIMD0_SYSTEM),
313 struct platform_device s5p_device_fimd0 = {
316 .num_resources = ARRAY_SIZE(s5p_fimd0_resource),
317 .resource = s5p_fimd0_resource,
319 .dma_mask = &samsung_device_dma_mask,
320 .coherent_dma_mask = DMA_BIT_MASK(32),
324 void __init s5p_fimd0_set_platdata(struct s3c_fb_platdata *pd)
326 s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
329 #endif /* CONFIG_S5P_DEV_FIMD0 */
333 #ifdef CONFIG_S3C_DEV_HWMON
334 struct platform_device s3c_device_hwmon = {
337 .dev.parent = &s3c_device_adc.dev,
340 void __init s3c_hwmon_set_platdata(struct s3c_hwmon_pdata *pd)
342 s3c_set_platdata(pd, sizeof(struct s3c_hwmon_pdata),
345 #endif /* CONFIG_S3C_DEV_HWMON */
349 #ifdef CONFIG_S3C_DEV_HSMMC
350 static struct resource s3c_hsmmc_resource[] = {
351 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC0, SZ_4K),
352 [1] = DEFINE_RES_IRQ(IRQ_HSMMC0),
355 struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata = {
357 .host_caps = (MMC_CAP_4_BIT_DATA |
358 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
361 struct platform_device s3c_device_hsmmc0 = {
364 .num_resources = ARRAY_SIZE(s3c_hsmmc_resource),
365 .resource = s3c_hsmmc_resource,
367 .dma_mask = &samsung_device_dma_mask,
368 .coherent_dma_mask = DMA_BIT_MASK(32),
369 .platform_data = &s3c_hsmmc0_def_platdata,
373 void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd)
375 s3c_sdhci_set_platdata(pd, &s3c_hsmmc0_def_platdata);
377 #endif /* CONFIG_S3C_DEV_HSMMC */
379 #ifdef CONFIG_S3C_DEV_HSMMC1
380 static struct resource s3c_hsmmc1_resource[] = {
381 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC1, SZ_4K),
382 [1] = DEFINE_RES_IRQ(IRQ_HSMMC1),
385 struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata = {
387 .host_caps = (MMC_CAP_4_BIT_DATA |
388 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
391 struct platform_device s3c_device_hsmmc1 = {
394 .num_resources = ARRAY_SIZE(s3c_hsmmc1_resource),
395 .resource = s3c_hsmmc1_resource,
397 .dma_mask = &samsung_device_dma_mask,
398 .coherent_dma_mask = DMA_BIT_MASK(32),
399 .platform_data = &s3c_hsmmc1_def_platdata,
403 void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd)
405 s3c_sdhci_set_platdata(pd, &s3c_hsmmc1_def_platdata);
407 #endif /* CONFIG_S3C_DEV_HSMMC1 */
411 #ifdef CONFIG_S3C_DEV_HSMMC2
412 static struct resource s3c_hsmmc2_resource[] = {
413 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC2, SZ_4K),
414 [1] = DEFINE_RES_IRQ(IRQ_HSMMC2),
417 struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata = {
419 .host_caps = (MMC_CAP_4_BIT_DATA |
420 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
423 struct platform_device s3c_device_hsmmc2 = {
426 .num_resources = ARRAY_SIZE(s3c_hsmmc2_resource),
427 .resource = s3c_hsmmc2_resource,
429 .dma_mask = &samsung_device_dma_mask,
430 .coherent_dma_mask = DMA_BIT_MASK(32),
431 .platform_data = &s3c_hsmmc2_def_platdata,
435 void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd)
437 s3c_sdhci_set_platdata(pd, &s3c_hsmmc2_def_platdata);
439 #endif /* CONFIG_S3C_DEV_HSMMC2 */
441 #ifdef CONFIG_S3C_DEV_HSMMC3
442 static struct resource s3c_hsmmc3_resource[] = {
443 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC3, SZ_4K),
444 [1] = DEFINE_RES_IRQ(IRQ_HSMMC3),
447 struct s3c_sdhci_platdata s3c_hsmmc3_def_platdata = {
449 .host_caps = (MMC_CAP_4_BIT_DATA |
450 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
453 struct platform_device s3c_device_hsmmc3 = {
456 .num_resources = ARRAY_SIZE(s3c_hsmmc3_resource),
457 .resource = s3c_hsmmc3_resource,
459 .dma_mask = &samsung_device_dma_mask,
460 .coherent_dma_mask = DMA_BIT_MASK(32),
461 .platform_data = &s3c_hsmmc3_def_platdata,
465 void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata *pd)
467 s3c_sdhci_set_platdata(pd, &s3c_hsmmc3_def_platdata);
469 #endif /* CONFIG_S3C_DEV_HSMMC3 */
473 static struct resource s3c_i2c0_resource[] = {
474 [0] = DEFINE_RES_MEM(S3C_PA_IIC, SZ_4K),
475 [1] = DEFINE_RES_IRQ(IRQ_IIC),
478 struct platform_device s3c_device_i2c0 = {
479 .name = "s3c2410-i2c",
480 #ifdef CONFIG_S3C_DEV_I2C1
485 .num_resources = ARRAY_SIZE(s3c_i2c0_resource),
486 .resource = s3c_i2c0_resource,
489 struct s3c2410_platform_i2c default_i2c_data __initdata = {
492 .frequency = 100*1000,
496 void __init s3c_i2c0_set_platdata(struct s3c2410_platform_i2c *pd)
498 struct s3c2410_platform_i2c *npd;
501 pd = &default_i2c_data;
505 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
509 npd->cfg_gpio = s3c_i2c0_cfg_gpio;
512 #ifdef CONFIG_S3C_DEV_I2C1
513 static struct resource s3c_i2c1_resource[] = {
514 [0] = DEFINE_RES_MEM(S3C_PA_IIC1, SZ_4K),
515 [1] = DEFINE_RES_IRQ(IRQ_IIC1),
518 struct platform_device s3c_device_i2c1 = {
519 .name = "s3c2410-i2c",
521 .num_resources = ARRAY_SIZE(s3c_i2c1_resource),
522 .resource = s3c_i2c1_resource,
525 void __init s3c_i2c1_set_platdata(struct s3c2410_platform_i2c *pd)
527 struct s3c2410_platform_i2c *npd;
530 pd = &default_i2c_data;
534 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
538 npd->cfg_gpio = s3c_i2c1_cfg_gpio;
540 #endif /* CONFIG_S3C_DEV_I2C1 */
542 #ifdef CONFIG_S3C_DEV_I2C2
543 static struct resource s3c_i2c2_resource[] = {
544 [0] = DEFINE_RES_MEM(S3C_PA_IIC2, SZ_4K),
545 [1] = DEFINE_RES_IRQ(IRQ_IIC2),
548 struct platform_device s3c_device_i2c2 = {
549 .name = "s3c2410-i2c",
551 .num_resources = ARRAY_SIZE(s3c_i2c2_resource),
552 .resource = s3c_i2c2_resource,
555 void __init s3c_i2c2_set_platdata(struct s3c2410_platform_i2c *pd)
557 struct s3c2410_platform_i2c *npd;
560 pd = &default_i2c_data;
564 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
568 npd->cfg_gpio = s3c_i2c2_cfg_gpio;
570 #endif /* CONFIG_S3C_DEV_I2C2 */
572 #ifdef CONFIG_S3C_DEV_I2C3
573 static struct resource s3c_i2c3_resource[] = {
574 [0] = DEFINE_RES_MEM(S3C_PA_IIC3, SZ_4K),
575 [1] = DEFINE_RES_IRQ(IRQ_IIC3),
578 struct platform_device s3c_device_i2c3 = {
579 .name = "s3c2440-i2c",
581 .num_resources = ARRAY_SIZE(s3c_i2c3_resource),
582 .resource = s3c_i2c3_resource,
585 void __init s3c_i2c3_set_platdata(struct s3c2410_platform_i2c *pd)
587 struct s3c2410_platform_i2c *npd;
590 pd = &default_i2c_data;
594 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
598 npd->cfg_gpio = s3c_i2c3_cfg_gpio;
600 #endif /*CONFIG_S3C_DEV_I2C3 */
602 #ifdef CONFIG_S3C_DEV_I2C4
603 static struct resource s3c_i2c4_resource[] = {
604 [0] = DEFINE_RES_MEM(S3C_PA_IIC4, SZ_4K),
605 [1] = DEFINE_RES_IRQ(IRQ_IIC4),
608 struct platform_device s3c_device_i2c4 = {
609 .name = "s3c2440-i2c",
611 .num_resources = ARRAY_SIZE(s3c_i2c4_resource),
612 .resource = s3c_i2c4_resource,
615 void __init s3c_i2c4_set_platdata(struct s3c2410_platform_i2c *pd)
617 struct s3c2410_platform_i2c *npd;
620 pd = &default_i2c_data;
624 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
628 npd->cfg_gpio = s3c_i2c4_cfg_gpio;
630 #endif /*CONFIG_S3C_DEV_I2C4 */
632 #ifdef CONFIG_S3C_DEV_I2C5
633 static struct resource s3c_i2c5_resource[] = {
634 [0] = DEFINE_RES_MEM(S3C_PA_IIC5, SZ_4K),
635 [1] = DEFINE_RES_IRQ(IRQ_IIC5),
638 struct platform_device s3c_device_i2c5 = {
639 .name = "s3c2440-i2c",
641 .num_resources = ARRAY_SIZE(s3c_i2c5_resource),
642 .resource = s3c_i2c5_resource,
645 void __init s3c_i2c5_set_platdata(struct s3c2410_platform_i2c *pd)
647 struct s3c2410_platform_i2c *npd;
650 pd = &default_i2c_data;
654 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
658 npd->cfg_gpio = s3c_i2c5_cfg_gpio;
660 #endif /*CONFIG_S3C_DEV_I2C5 */
662 #ifdef CONFIG_S3C_DEV_I2C6
663 static struct resource s3c_i2c6_resource[] = {
664 [0] = DEFINE_RES_MEM(S3C_PA_IIC6, SZ_4K),
665 [1] = DEFINE_RES_IRQ(IRQ_IIC6),
668 struct platform_device s3c_device_i2c6 = {
669 .name = "s3c2440-i2c",
671 .num_resources = ARRAY_SIZE(s3c_i2c6_resource),
672 .resource = s3c_i2c6_resource,
675 void __init s3c_i2c6_set_platdata(struct s3c2410_platform_i2c *pd)
677 struct s3c2410_platform_i2c *npd;
680 pd = &default_i2c_data;
684 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
688 npd->cfg_gpio = s3c_i2c6_cfg_gpio;
690 #endif /* CONFIG_S3C_DEV_I2C6 */
692 #ifdef CONFIG_S3C_DEV_I2C7
693 static struct resource s3c_i2c7_resource[] = {
694 [0] = DEFINE_RES_MEM(S3C_PA_IIC7, SZ_4K),
695 [1] = DEFINE_RES_IRQ(IRQ_IIC7),
698 struct platform_device s3c_device_i2c7 = {
699 .name = "s3c2440-i2c",
701 .num_resources = ARRAY_SIZE(s3c_i2c7_resource),
702 .resource = s3c_i2c7_resource,
705 void __init s3c_i2c7_set_platdata(struct s3c2410_platform_i2c *pd)
707 struct s3c2410_platform_i2c *npd;
710 pd = &default_i2c_data;
714 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
718 npd->cfg_gpio = s3c_i2c7_cfg_gpio;
720 #endif /* CONFIG_S3C_DEV_I2C7 */
724 #ifdef CONFIG_S5P_DEV_I2C_HDMIPHY
725 static struct resource s5p_i2c_resource[] = {
726 [0] = DEFINE_RES_MEM(S5P_PA_IIC_HDMIPHY, SZ_4K),
727 [1] = DEFINE_RES_IRQ(IRQ_IIC_HDMIPHY),
730 struct platform_device s5p_device_i2c_hdmiphy = {
731 .name = "s3c2440-hdmiphy-i2c",
733 .num_resources = ARRAY_SIZE(s5p_i2c_resource),
734 .resource = s5p_i2c_resource,
737 void __init s5p_i2c_hdmiphy_set_platdata(struct s3c2410_platform_i2c *pd)
739 struct s3c2410_platform_i2c *npd;
742 pd = &default_i2c_data;
744 if (soc_is_exynos4210() ||
745 soc_is_exynos4212() || soc_is_exynos4412())
747 else if (soc_is_s5pv210())
753 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
754 &s5p_device_i2c_hdmiphy);
757 static struct s5p_hdmi_platform_data s5p_hdmi_def_platdata;
759 void __init s5p_hdmi_set_platdata(struct i2c_board_info *hdmiphy_info,
760 struct i2c_board_info *mhl_info, int mhl_bus)
762 struct s5p_hdmi_platform_data *pd = &s5p_hdmi_def_platdata;
764 if (soc_is_exynos4210() ||
765 soc_is_exynos4212() || soc_is_exynos4412())
767 else if (soc_is_s5pv210())
772 pd->hdmiphy_info = hdmiphy_info;
773 pd->mhl_info = mhl_info;
774 pd->mhl_bus = mhl_bus;
776 s3c_set_platdata(pd, sizeof(struct s5p_hdmi_platform_data),
780 #endif /* CONFIG_S5P_DEV_I2C_HDMIPHY */
784 #ifdef CONFIG_PLAT_S3C24XX
785 static struct resource s3c_iis_resource[] = {
786 [0] = DEFINE_RES_MEM(S3C24XX_PA_IIS, S3C24XX_SZ_IIS),
789 struct platform_device s3c_device_iis = {
790 .name = "s3c24xx-iis",
792 .num_resources = ARRAY_SIZE(s3c_iis_resource),
793 .resource = s3c_iis_resource,
795 .dma_mask = &samsung_device_dma_mask,
796 .coherent_dma_mask = DMA_BIT_MASK(32),
799 #endif /* CONFIG_PLAT_S3C24XX */
803 #ifdef CONFIG_SAMSUNG_DEV_IDE
804 static struct resource s3c_cfcon_resource[] = {
805 [0] = DEFINE_RES_MEM(SAMSUNG_PA_CFCON, SZ_16K),
806 [1] = DEFINE_RES_IRQ(IRQ_CFCON),
809 struct platform_device s3c_device_cfcon = {
811 .num_resources = ARRAY_SIZE(s3c_cfcon_resource),
812 .resource = s3c_cfcon_resource,
815 void __init s3c_ide_set_platdata(struct s3c_ide_platdata *pdata)
817 s3c_set_platdata(pdata, sizeof(struct s3c_ide_platdata),
820 #endif /* CONFIG_SAMSUNG_DEV_IDE */
824 #ifdef CONFIG_SAMSUNG_DEV_KEYPAD
825 static struct resource samsung_keypad_resources[] = {
826 [0] = DEFINE_RES_MEM(SAMSUNG_PA_KEYPAD, SZ_32),
827 [1] = DEFINE_RES_IRQ(IRQ_KEYPAD),
830 struct platform_device samsung_device_keypad = {
831 .name = "samsung-keypad",
833 .num_resources = ARRAY_SIZE(samsung_keypad_resources),
834 .resource = samsung_keypad_resources,
837 void __init samsung_keypad_set_platdata(struct samsung_keypad_platdata *pd)
839 struct samsung_keypad_platdata *npd;
841 npd = s3c_set_platdata(pd, sizeof(struct samsung_keypad_platdata),
842 &samsung_device_keypad);
845 npd->cfg_gpio = samsung_keypad_cfg_gpio;
847 #endif /* CONFIG_SAMSUNG_DEV_KEYPAD */
851 #ifdef CONFIG_PLAT_S3C24XX
852 static struct resource s3c_lcd_resource[] = {
853 [0] = DEFINE_RES_MEM(S3C24XX_PA_LCD, S3C24XX_SZ_LCD),
854 [1] = DEFINE_RES_IRQ(IRQ_LCD),
857 struct platform_device s3c_device_lcd = {
858 .name = "s3c2410-lcd",
860 .num_resources = ARRAY_SIZE(s3c_lcd_resource),
861 .resource = s3c_lcd_resource,
863 .dma_mask = &samsung_device_dma_mask,
864 .coherent_dma_mask = DMA_BIT_MASK(32),
868 void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd)
870 struct s3c2410fb_mach_info *npd;
872 npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_lcd);
874 npd->displays = kmemdup(pd->displays,
875 sizeof(struct s3c2410fb_display) * npd->num_displays,
878 printk(KERN_ERR "no memory for LCD display data\n");
880 printk(KERN_ERR "no memory for LCD platform data\n");
883 #endif /* CONFIG_PLAT_S3C24XX */
887 #ifdef CONFIG_S5P_DEV_MFC
888 static struct resource s5p_mfc_resource[] = {
889 [0] = DEFINE_RES_MEM(S5P_PA_MFC, SZ_64K),
890 [1] = DEFINE_RES_IRQ(IRQ_MFC),
893 struct platform_device s5p_device_mfc = {
896 .num_resources = ARRAY_SIZE(s5p_mfc_resource),
897 .resource = s5p_mfc_resource,
901 * MFC hardware has 2 memory interfaces which are modelled as two separate
902 * platform devices to let dma-mapping distinguish between them.
904 * MFC parent device (s5p_device_mfc) must be registered before memory
905 * interface specific devices (s5p_device_mfc_l and s5p_device_mfc_r).
908 struct platform_device s5p_device_mfc_l = {
912 .parent = &s5p_device_mfc.dev,
913 .dma_mask = &samsung_device_dma_mask,
914 .coherent_dma_mask = DMA_BIT_MASK(32),
918 struct platform_device s5p_device_mfc_r = {
922 .parent = &s5p_device_mfc.dev,
923 .dma_mask = &samsung_device_dma_mask,
924 .coherent_dma_mask = DMA_BIT_MASK(32),
927 #endif /* CONFIG_S5P_DEV_MFC */
931 #ifdef CONFIG_S5P_DEV_CSIS0
932 static struct resource s5p_mipi_csis0_resource[] = {
933 [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS0, SZ_16K),
934 [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS0),
937 struct platform_device s5p_device_mipi_csis0 = {
938 .name = "s5p-mipi-csis",
940 .num_resources = ARRAY_SIZE(s5p_mipi_csis0_resource),
941 .resource = s5p_mipi_csis0_resource,
943 #endif /* CONFIG_S5P_DEV_CSIS0 */
945 #ifdef CONFIG_S5P_DEV_CSIS1
946 static struct resource s5p_mipi_csis1_resource[] = {
947 [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS1, SZ_16K),
948 [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS1),
951 struct platform_device s5p_device_mipi_csis1 = {
952 .name = "s5p-mipi-csis",
954 .num_resources = ARRAY_SIZE(s5p_mipi_csis1_resource),
955 .resource = s5p_mipi_csis1_resource,
961 #ifdef CONFIG_S3C_DEV_NAND
962 static struct resource s3c_nand_resource[] = {
963 [0] = DEFINE_RES_MEM(S3C_PA_NAND, SZ_1M),
966 struct platform_device s3c_device_nand = {
967 .name = "s3c2410-nand",
969 .num_resources = ARRAY_SIZE(s3c_nand_resource),
970 .resource = s3c_nand_resource,
974 * s3c_nand_copy_set() - copy nand set data
975 * @set: The new structure, directly copied from the old.
977 * Copy all the fields from the NAND set field from what is probably __initdata
978 * to new kernel memory. The code returns 0 if the copy happened correctly or
979 * an error code for the calling function to display.
981 * Note, we currently do not try and look to see if we've already copied the
982 * data in a previous set.
984 static int __init s3c_nand_copy_set(struct s3c2410_nand_set *set)
989 size = sizeof(struct mtd_partition) * set->nr_partitions;
991 ptr = kmemdup(set->partitions, size, GFP_KERNEL);
992 set->partitions = ptr;
998 if (set->nr_map && set->nr_chips) {
999 size = sizeof(int) * set->nr_chips;
1000 ptr = kmemdup(set->nr_map, size, GFP_KERNEL);
1007 if (set->ecc_layout) {
1008 ptr = kmemdup(set->ecc_layout,
1009 sizeof(struct nand_ecclayout), GFP_KERNEL);
1010 set->ecc_layout = ptr;
1019 void __init s3c_nand_set_platdata(struct s3c2410_platform_nand *nand)
1021 struct s3c2410_platform_nand *npd;
1025 /* note, if we get a failure in allocation, we simply drop out of the
1026 * function. If there is so little memory available at initialisation
1027 * time then there is little chance the system is going to run.
1030 npd = s3c_set_platdata(nand, sizeof(struct s3c2410_platform_nand),
1035 /* now see if we need to copy any of the nand set data */
1037 size = sizeof(struct s3c2410_nand_set) * npd->nr_sets;
1039 struct s3c2410_nand_set *from = npd->sets;
1040 struct s3c2410_nand_set *to;
1043 to = kmemdup(from, size, GFP_KERNEL);
1044 npd->sets = to; /* set, even if we failed */
1047 printk(KERN_ERR "%s: no memory for sets\n", __func__);
1051 for (i = 0; i < npd->nr_sets; i++) {
1052 ret = s3c_nand_copy_set(to);
1054 printk(KERN_ERR "%s: failed to copy set %d\n",
1062 #endif /* CONFIG_S3C_DEV_NAND */
1066 #ifdef CONFIG_S3C_DEV_ONENAND
1067 static struct resource s3c_onenand_resources[] = {
1068 [0] = DEFINE_RES_MEM(S3C_PA_ONENAND, SZ_1K),
1069 [1] = DEFINE_RES_MEM(S3C_PA_ONENAND_BUF, S3C_SZ_ONENAND_BUF),
1070 [2] = DEFINE_RES_IRQ(IRQ_ONENAND),
1073 struct platform_device s3c_device_onenand = {
1074 .name = "samsung-onenand",
1076 .num_resources = ARRAY_SIZE(s3c_onenand_resources),
1077 .resource = s3c_onenand_resources,
1079 #endif /* CONFIG_S3C_DEV_ONENAND */
1081 #ifdef CONFIG_S3C64XX_DEV_ONENAND1
1082 static struct resource s3c64xx_onenand1_resources[] = {
1083 [0] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1, SZ_1K),
1084 [1] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1_BUF, S3C64XX_SZ_ONENAND1_BUF),
1085 [2] = DEFINE_RES_IRQ(IRQ_ONENAND1),
1088 struct platform_device s3c64xx_device_onenand1 = {
1089 .name = "samsung-onenand",
1091 .num_resources = ARRAY_SIZE(s3c64xx_onenand1_resources),
1092 .resource = s3c64xx_onenand1_resources,
1095 void __init s3c64xx_onenand1_set_platdata(struct onenand_platform_data *pdata)
1097 s3c_set_platdata(pdata, sizeof(struct onenand_platform_data),
1098 &s3c64xx_device_onenand1);
1100 #endif /* CONFIG_S3C64XX_DEV_ONENAND1 */
1102 #ifdef CONFIG_S5P_DEV_ONENAND
1103 static struct resource s5p_onenand_resources[] = {
1104 [0] = DEFINE_RES_MEM(S5P_PA_ONENAND, SZ_128K),
1105 [1] = DEFINE_RES_MEM(S5P_PA_ONENAND_DMA, SZ_8K),
1106 [2] = DEFINE_RES_IRQ(IRQ_ONENAND_AUDI),
1109 struct platform_device s5p_device_onenand = {
1110 .name = "s5pc110-onenand",
1112 .num_resources = ARRAY_SIZE(s5p_onenand_resources),
1113 .resource = s5p_onenand_resources,
1115 #endif /* CONFIG_S5P_DEV_ONENAND */
1119 #ifdef CONFIG_PLAT_S5P
1120 static struct resource s5p_pmu_resource[] = {
1121 DEFINE_RES_IRQ(IRQ_PMU)
1124 static struct platform_device s5p_device_pmu = {
1127 .num_resources = ARRAY_SIZE(s5p_pmu_resource),
1128 .resource = s5p_pmu_resource,
1131 static int __init s5p_pmu_init(void)
1133 platform_device_register(&s5p_device_pmu);
1136 arch_initcall(s5p_pmu_init);
1137 #endif /* CONFIG_PLAT_S5P */
1141 #ifdef CONFIG_SAMSUNG_DEV_PWM
1143 #define TIMER_RESOURCE_SIZE (1)
1145 #define TIMER_RESOURCE(_tmr, _irq) \
1146 (struct resource [TIMER_RESOURCE_SIZE]) { \
1150 .flags = IORESOURCE_IRQ \
1154 #define DEFINE_S3C_TIMER(_tmr_no, _irq) \
1155 .name = "s3c24xx-pwm", \
1157 .num_resources = TIMER_RESOURCE_SIZE, \
1158 .resource = TIMER_RESOURCE(_tmr_no, _irq), \
1161 * since we already have an static mapping for the timer,
1162 * we do not bother setting any IO resource for the base.
1165 struct platform_device s3c_device_timer[] = {
1166 [0] = { DEFINE_S3C_TIMER(0, IRQ_TIMER0) },
1167 [1] = { DEFINE_S3C_TIMER(1, IRQ_TIMER1) },
1168 [2] = { DEFINE_S3C_TIMER(2, IRQ_TIMER2) },
1169 [3] = { DEFINE_S3C_TIMER(3, IRQ_TIMER3) },
1170 [4] = { DEFINE_S3C_TIMER(4, IRQ_TIMER4) },
1172 #endif /* CONFIG_SAMSUNG_DEV_PWM */
1176 #ifdef CONFIG_PLAT_S3C24XX
1177 static struct resource s3c_rtc_resource[] = {
1178 [0] = DEFINE_RES_MEM(S3C24XX_PA_RTC, SZ_256),
1179 [1] = DEFINE_RES_IRQ(IRQ_RTC),
1180 [2] = DEFINE_RES_IRQ(IRQ_TICK),
1183 struct platform_device s3c_device_rtc = {
1184 .name = "s3c2410-rtc",
1186 .num_resources = ARRAY_SIZE(s3c_rtc_resource),
1187 .resource = s3c_rtc_resource,
1189 #endif /* CONFIG_PLAT_S3C24XX */
1191 #ifdef CONFIG_S3C_DEV_RTC
1192 static struct resource s3c_rtc_resource[] = {
1193 [0] = DEFINE_RES_MEM(S3C_PA_RTC, SZ_256),
1194 [1] = DEFINE_RES_IRQ(IRQ_RTC_ALARM),
1195 [2] = DEFINE_RES_IRQ(IRQ_RTC_TIC),
1198 struct platform_device s3c_device_rtc = {
1199 .name = "s3c64xx-rtc",
1201 .num_resources = ARRAY_SIZE(s3c_rtc_resource),
1202 .resource = s3c_rtc_resource,
1204 #endif /* CONFIG_S3C_DEV_RTC */
1208 #ifdef CONFIG_PLAT_S3C24XX
1209 static struct resource s3c_sdi_resource[] = {
1210 [0] = DEFINE_RES_MEM(S3C24XX_PA_SDI, S3C24XX_SZ_SDI),
1211 [1] = DEFINE_RES_IRQ(IRQ_SDI),
1214 struct platform_device s3c_device_sdi = {
1215 .name = "s3c2410-sdi",
1217 .num_resources = ARRAY_SIZE(s3c_sdi_resource),
1218 .resource = s3c_sdi_resource,
1221 void __init s3c24xx_mci_set_platdata(struct s3c24xx_mci_pdata *pdata)
1223 s3c_set_platdata(pdata, sizeof(struct s3c24xx_mci_pdata),
1226 #endif /* CONFIG_PLAT_S3C24XX */
1230 #ifdef CONFIG_PLAT_S3C24XX
1231 static struct resource s3c_spi0_resource[] = {
1232 [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI, SZ_32),
1233 [1] = DEFINE_RES_IRQ(IRQ_SPI0),
1236 struct platform_device s3c_device_spi0 = {
1237 .name = "s3c2410-spi",
1239 .num_resources = ARRAY_SIZE(s3c_spi0_resource),
1240 .resource = s3c_spi0_resource,
1242 .dma_mask = &samsung_device_dma_mask,
1243 .coherent_dma_mask = DMA_BIT_MASK(32),
1247 static struct resource s3c_spi1_resource[] = {
1248 [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI1, SZ_32),
1249 [1] = DEFINE_RES_IRQ(IRQ_SPI1),
1252 struct platform_device s3c_device_spi1 = {
1253 .name = "s3c2410-spi",
1255 .num_resources = ARRAY_SIZE(s3c_spi1_resource),
1256 .resource = s3c_spi1_resource,
1258 .dma_mask = &samsung_device_dma_mask,
1259 .coherent_dma_mask = DMA_BIT_MASK(32),
1262 #endif /* CONFIG_PLAT_S3C24XX */
1266 #ifdef CONFIG_PLAT_S3C24XX
1267 static struct resource s3c_ts_resource[] = {
1268 [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
1269 [1] = DEFINE_RES_IRQ(IRQ_TC),
1272 struct platform_device s3c_device_ts = {
1273 .name = "s3c2410-ts",
1275 .dev.parent = &s3c_device_adc.dev,
1276 .num_resources = ARRAY_SIZE(s3c_ts_resource),
1277 .resource = s3c_ts_resource,
1280 void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *hard_s3c2410ts_info)
1282 s3c_set_platdata(hard_s3c2410ts_info,
1283 sizeof(struct s3c2410_ts_mach_info), &s3c_device_ts);
1285 #endif /* CONFIG_PLAT_S3C24XX */
1287 #ifdef CONFIG_SAMSUNG_DEV_TS
1288 static struct resource s3c_ts_resource[] = {
1289 [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256),
1290 [1] = DEFINE_RES_IRQ(IRQ_TC),
1293 static struct s3c2410_ts_mach_info default_ts_data __initdata = {
1296 .oversampling_shift = 2,
1299 struct platform_device s3c_device_ts = {
1300 .name = "s3c64xx-ts",
1302 .num_resources = ARRAY_SIZE(s3c_ts_resource),
1303 .resource = s3c_ts_resource,
1306 void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *pd)
1309 pd = &default_ts_data;
1311 s3c_set_platdata(pd, sizeof(struct s3c2410_ts_mach_info),
1314 #endif /* CONFIG_SAMSUNG_DEV_TS */
1318 #ifdef CONFIG_S5P_DEV_TV
1320 static struct resource s5p_hdmi_resources[] = {
1321 [0] = DEFINE_RES_MEM(S5P_PA_HDMI, SZ_1M),
1322 [1] = DEFINE_RES_IRQ(IRQ_HDMI),
1325 struct platform_device s5p_device_hdmi = {
1328 .num_resources = ARRAY_SIZE(s5p_hdmi_resources),
1329 .resource = s5p_hdmi_resources,
1332 static struct resource s5p_sdo_resources[] = {
1333 [0] = DEFINE_RES_MEM(S5P_PA_SDO, SZ_64K),
1334 [1] = DEFINE_RES_IRQ(IRQ_SDO),
1337 struct platform_device s5p_device_sdo = {
1340 .num_resources = ARRAY_SIZE(s5p_sdo_resources),
1341 .resource = s5p_sdo_resources,
1344 static struct resource s5p_mixer_resources[] = {
1345 [0] = DEFINE_RES_MEM_NAMED(S5P_PA_MIXER, SZ_64K, "mxr"),
1346 [1] = DEFINE_RES_MEM_NAMED(S5P_PA_VP, SZ_64K, "vp"),
1347 [2] = DEFINE_RES_IRQ_NAMED(IRQ_MIXER, "irq"),
1350 struct platform_device s5p_device_mixer = {
1351 .name = "s5p-mixer",
1353 .num_resources = ARRAY_SIZE(s5p_mixer_resources),
1354 .resource = s5p_mixer_resources,
1356 .dma_mask = &samsung_device_dma_mask,
1357 .coherent_dma_mask = DMA_BIT_MASK(32),
1360 #endif /* CONFIG_S5P_DEV_TV */
1364 #ifdef CONFIG_S3C_DEV_USB_HOST
1365 static struct resource s3c_usb_resource[] = {
1366 [0] = DEFINE_RES_MEM(S3C_PA_USBHOST, SZ_256),
1367 [1] = DEFINE_RES_IRQ(IRQ_USBH),
1370 struct platform_device s3c_device_ohci = {
1371 .name = "s3c2410-ohci",
1373 .num_resources = ARRAY_SIZE(s3c_usb_resource),
1374 .resource = s3c_usb_resource,
1376 .dma_mask = &samsung_device_dma_mask,
1377 .coherent_dma_mask = DMA_BIT_MASK(32),
1382 * s3c_ohci_set_platdata - initialise OHCI device platform data
1383 * @info: The platform data.
1385 * This call copies the @info passed in and sets the device .platform_data
1386 * field to that copy. The @info is copied so that the original can be marked
1390 void __init s3c_ohci_set_platdata(struct s3c2410_hcd_info *info)
1392 s3c_set_platdata(info, sizeof(struct s3c2410_hcd_info),
1395 #endif /* CONFIG_S3C_DEV_USB_HOST */
1397 /* USB Device (Gadget) */
1399 #ifdef CONFIG_PLAT_S3C24XX
1400 static struct resource s3c_usbgadget_resource[] = {
1401 [0] = DEFINE_RES_MEM(S3C24XX_PA_USBDEV, S3C24XX_SZ_USBDEV),
1402 [1] = DEFINE_RES_IRQ(IRQ_USBD),
1405 struct platform_device s3c_device_usbgadget = {
1406 .name = "s3c2410-usbgadget",
1408 .num_resources = ARRAY_SIZE(s3c_usbgadget_resource),
1409 .resource = s3c_usbgadget_resource,
1412 void __init s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info *pd)
1414 s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usbgadget);
1416 #endif /* CONFIG_PLAT_S3C24XX */
1418 /* USB EHCI Host Controller */
1420 #ifdef CONFIG_S5P_DEV_USB_EHCI
1421 static struct resource s5p_ehci_resource[] = {
1422 [0] = DEFINE_RES_MEM(S5P_PA_EHCI, SZ_256),
1423 [1] = DEFINE_RES_IRQ(IRQ_USB_HOST),
1426 struct platform_device s5p_device_ehci = {
1429 .num_resources = ARRAY_SIZE(s5p_ehci_resource),
1430 .resource = s5p_ehci_resource,
1432 .dma_mask = &samsung_device_dma_mask,
1433 .coherent_dma_mask = DMA_BIT_MASK(32),
1437 void __init s5p_ehci_set_platdata(struct s5p_ehci_platdata *pd)
1439 struct s5p_ehci_platdata *npd;
1441 npd = s3c_set_platdata(pd, sizeof(struct s5p_ehci_platdata),
1445 npd->phy_init = s5p_usb_phy_init;
1447 npd->phy_exit = s5p_usb_phy_exit;
1449 #endif /* CONFIG_S5P_DEV_USB_EHCI */
1453 #ifdef CONFIG_S3C_DEV_USB_HSOTG
1454 static struct resource s3c_usb_hsotg_resources[] = {
1455 [0] = DEFINE_RES_MEM(S3C_PA_USB_HSOTG, SZ_128K),
1456 [1] = DEFINE_RES_IRQ(IRQ_OTG),
1459 struct platform_device s3c_device_usb_hsotg = {
1460 .name = "s3c-hsotg",
1462 .num_resources = ARRAY_SIZE(s3c_usb_hsotg_resources),
1463 .resource = s3c_usb_hsotg_resources,
1465 .dma_mask = &samsung_device_dma_mask,
1466 .coherent_dma_mask = DMA_BIT_MASK(32),
1470 void __init s3c_hsotg_set_platdata(struct s3c_hsotg_plat *pd)
1472 struct s3c_hsotg_plat *npd;
1474 npd = s3c_set_platdata(pd, sizeof(struct s3c_hsotg_plat),
1475 &s3c_device_usb_hsotg);
1478 npd->phy_init = s5p_usb_phy_init;
1480 npd->phy_exit = s5p_usb_phy_exit;
1482 #endif /* CONFIG_S3C_DEV_USB_HSOTG */
1484 /* USB High Spped 2.0 Device (Gadget) */
1486 #ifdef CONFIG_PLAT_S3C24XX
1487 static struct resource s3c_hsudc_resource[] = {
1488 [0] = DEFINE_RES_MEM(S3C2416_PA_HSUDC, S3C2416_SZ_HSUDC),
1489 [1] = DEFINE_RES_IRQ(IRQ_USBD),
1492 struct platform_device s3c_device_usb_hsudc = {
1493 .name = "s3c-hsudc",
1495 .num_resources = ARRAY_SIZE(s3c_hsudc_resource),
1496 .resource = s3c_hsudc_resource,
1498 .dma_mask = &samsung_device_dma_mask,
1499 .coherent_dma_mask = DMA_BIT_MASK(32),
1503 void __init s3c24xx_hsudc_set_platdata(struct s3c24xx_hsudc_platdata *pd)
1505 s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usb_hsudc);
1507 #endif /* CONFIG_PLAT_S3C24XX */
1511 #ifdef CONFIG_S3C_DEV_WDT
1512 static struct resource s3c_wdt_resource[] = {
1513 [0] = DEFINE_RES_MEM(S3C_PA_WDT, SZ_1K),
1514 [1] = DEFINE_RES_IRQ(IRQ_WDT),
1517 struct platform_device s3c_device_wdt = {
1518 .name = "s3c2410-wdt",
1520 .num_resources = ARRAY_SIZE(s3c_wdt_resource),
1521 .resource = s3c_wdt_resource,
1523 #endif /* CONFIG_S3C_DEV_WDT */
1525 #ifdef CONFIG_S3C64XX_DEV_SPI0
1526 static struct resource s3c64xx_spi0_resource[] = {
1527 [0] = DEFINE_RES_MEM(S3C_PA_SPI0, SZ_256),
1528 [1] = DEFINE_RES_DMA(DMACH_SPI0_TX),
1529 [2] = DEFINE_RES_DMA(DMACH_SPI0_RX),
1530 [3] = DEFINE_RES_IRQ(IRQ_SPI0),
1533 struct platform_device s3c64xx_device_spi0 = {
1534 .name = "s3c6410-spi",
1536 .num_resources = ARRAY_SIZE(s3c64xx_spi0_resource),
1537 .resource = s3c64xx_spi0_resource,
1539 .dma_mask = &samsung_device_dma_mask,
1540 .coherent_dma_mask = DMA_BIT_MASK(32),
1544 void __init s3c64xx_spi0_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
1547 struct s3c64xx_spi_info pd;
1549 /* Reject invalid configuration */
1550 if (!num_cs || src_clk_nr < 0) {
1551 pr_err("%s: Invalid SPI configuration\n", __func__);
1556 pd.src_clk_nr = src_clk_nr;
1557 pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi0_cfg_gpio;
1559 s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi0);
1561 #endif /* CONFIG_S3C64XX_DEV_SPI0 */
1563 #ifdef CONFIG_S3C64XX_DEV_SPI1
1564 static struct resource s3c64xx_spi1_resource[] = {
1565 [0] = DEFINE_RES_MEM(S3C_PA_SPI1, SZ_256),
1566 [1] = DEFINE_RES_DMA(DMACH_SPI1_TX),
1567 [2] = DEFINE_RES_DMA(DMACH_SPI1_RX),
1568 [3] = DEFINE_RES_IRQ(IRQ_SPI1),
1571 struct platform_device s3c64xx_device_spi1 = {
1572 .name = "s3c6410-spi",
1574 .num_resources = ARRAY_SIZE(s3c64xx_spi1_resource),
1575 .resource = s3c64xx_spi1_resource,
1577 .dma_mask = &samsung_device_dma_mask,
1578 .coherent_dma_mask = DMA_BIT_MASK(32),
1582 void __init s3c64xx_spi1_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
1585 struct s3c64xx_spi_info pd;
1587 /* Reject invalid configuration */
1588 if (!num_cs || src_clk_nr < 0) {
1589 pr_err("%s: Invalid SPI configuration\n", __func__);
1594 pd.src_clk_nr = src_clk_nr;
1595 pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi1_cfg_gpio;
1597 s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi1);
1599 #endif /* CONFIG_S3C64XX_DEV_SPI1 */
1601 #ifdef CONFIG_S3C64XX_DEV_SPI2
1602 static struct resource s3c64xx_spi2_resource[] = {
1603 [0] = DEFINE_RES_MEM(S3C_PA_SPI2, SZ_256),
1604 [1] = DEFINE_RES_DMA(DMACH_SPI2_TX),
1605 [2] = DEFINE_RES_DMA(DMACH_SPI2_RX),
1606 [3] = DEFINE_RES_IRQ(IRQ_SPI2),
1609 struct platform_device s3c64xx_device_spi2 = {
1610 .name = "s3c6410-spi",
1612 .num_resources = ARRAY_SIZE(s3c64xx_spi2_resource),
1613 .resource = s3c64xx_spi2_resource,
1615 .dma_mask = &samsung_device_dma_mask,
1616 .coherent_dma_mask = DMA_BIT_MASK(32),
1620 void __init s3c64xx_spi2_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
1623 struct s3c64xx_spi_info pd;
1625 /* Reject invalid configuration */
1626 if (!num_cs || src_clk_nr < 0) {
1627 pr_err("%s: Invalid SPI configuration\n", __func__);
1632 pd.src_clk_nr = src_clk_nr;
1633 pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi2_cfg_gpio;
1635 s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi2);
1637 #endif /* CONFIG_S3C64XX_DEV_SPI2 */