1 /* linux/arch/arm/plat-samsung/devs.c
3 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
6 * Base SAMSUNG platform device definitions
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <linux/kernel.h>
14 #include <linux/types.h>
15 #include <linux/interrupt.h>
16 #include <linux/list.h>
17 #include <linux/timer.h>
18 #include <linux/init.h>
19 #include <linux/serial_core.h>
20 #include <linux/platform_device.h>
22 #include <linux/slab.h>
23 #include <linux/string.h>
24 #include <linux/dma-mapping.h>
26 #include <linux/gfp.h>
27 #include <linux/mtd/mtd.h>
28 #include <linux/mtd/onenand.h>
29 #include <linux/mtd/partitions.h>
30 #include <linux/mmc/host.h>
31 #include <linux/ioport.h>
32 #include <linux/platform_data/s3c-hsudc.h>
33 #include <linux/platform_data/s3c-hsotg.h>
35 #include <media/s5p_hdmi.h>
38 #include <asm/mach/arch.h>
39 #include <asm/mach/map.h>
40 #include <asm/mach/irq.h>
42 #include <mach/hardware.h>
44 #include <mach/irqs.h>
48 #include <plat/devs.h>
50 #include <linux/platform_data/ata-samsung_cf.h>
51 #include <linux/platform_data/usb-ehci-s5p.h>
53 #include <plat/fb-s3c2410.h>
54 #include <plat/hdmi.h>
55 #include <linux/platform_data/hwmon-s3c.h>
56 #include <linux/platform_data/i2c-s3c2410.h>
57 #include <plat/keypad.h>
58 #include <linux/platform_data/mmc-s3cmci.h>
59 #include <linux/platform_data/mtd-nand-s3c2410.h>
60 #include <plat/sdhci.h>
61 #include <linux/platform_data/touchscreen-s3c2410.h>
62 #include <linux/platform_data/usb-s3c2410_udc.h>
63 #include <linux/platform_data/usb-ohci-s3c2410.h>
64 #include <plat/usb-phy.h>
65 #include <plat/regs-iic.h>
66 #include <plat/regs-serial.h>
67 #include <plat/regs-spi.h>
68 #include <linux/platform_data/spi-s3c64xx.h>
70 static u64 samsung_device_dma_mask = DMA_BIT_MASK(32);
73 #ifdef CONFIG_CPU_S3C2440
74 static struct resource s3c_ac97_resource[] = {
75 [0] = DEFINE_RES_MEM(S3C2440_PA_AC97, S3C2440_SZ_AC97),
76 [1] = DEFINE_RES_IRQ(IRQ_S3C244X_AC97),
77 [2] = DEFINE_RES_DMA_NAMED(DMACH_PCM_OUT, "PCM out"),
78 [3] = DEFINE_RES_DMA_NAMED(DMACH_PCM_IN, "PCM in"),
79 [4] = DEFINE_RES_DMA_NAMED(DMACH_MIC_IN, "Mic in"),
82 struct platform_device s3c_device_ac97 = {
83 .name = "samsung-ac97",
85 .num_resources = ARRAY_SIZE(s3c_ac97_resource),
86 .resource = s3c_ac97_resource,
88 .dma_mask = &samsung_device_dma_mask,
89 .coherent_dma_mask = DMA_BIT_MASK(32),
92 #endif /* CONFIG_CPU_S3C2440 */
96 #ifdef CONFIG_PLAT_S3C24XX
97 static struct resource s3c_adc_resource[] = {
98 [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
99 [1] = DEFINE_RES_IRQ(IRQ_TC),
100 [2] = DEFINE_RES_IRQ(IRQ_ADC),
103 struct platform_device s3c_device_adc = {
104 .name = "s3c24xx-adc",
106 .num_resources = ARRAY_SIZE(s3c_adc_resource),
107 .resource = s3c_adc_resource,
109 #endif /* CONFIG_PLAT_S3C24XX */
111 #if defined(CONFIG_SAMSUNG_DEV_ADC)
112 static struct resource s3c_adc_resource[] = {
113 [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256),
114 [1] = DEFINE_RES_IRQ(IRQ_TC),
115 [2] = DEFINE_RES_IRQ(IRQ_ADC),
118 struct platform_device s3c_device_adc = {
119 .name = "samsung-adc",
121 .num_resources = ARRAY_SIZE(s3c_adc_resource),
122 .resource = s3c_adc_resource,
124 #endif /* CONFIG_SAMSUNG_DEV_ADC */
126 /* Camif Controller */
128 #ifdef CONFIG_CPU_S3C2440
129 static struct resource s3c_camif_resource[] = {
130 [0] = DEFINE_RES_MEM(S3C2440_PA_CAMIF, S3C2440_SZ_CAMIF),
131 [1] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_C),
132 [2] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_P),
135 struct platform_device s3c_device_camif = {
136 .name = "s3c2440-camif",
138 .num_resources = ARRAY_SIZE(s3c_camif_resource),
139 .resource = s3c_camif_resource,
141 .dma_mask = &samsung_device_dma_mask,
142 .coherent_dma_mask = DMA_BIT_MASK(32),
145 #endif /* CONFIG_CPU_S3C2440 */
149 struct platform_device samsung_asoc_dma = {
150 .name = "samsung-audio",
153 .dma_mask = &samsung_device_dma_mask,
154 .coherent_dma_mask = DMA_BIT_MASK(32),
158 struct platform_device samsung_asoc_idma = {
159 .name = "samsung-idma",
162 .dma_mask = &samsung_device_dma_mask,
163 .coherent_dma_mask = DMA_BIT_MASK(32),
169 #ifdef CONFIG_S3C_DEV_FB
170 static struct resource s3c_fb_resource[] = {
171 [0] = DEFINE_RES_MEM(S3C_PA_FB, SZ_16K),
172 [1] = DEFINE_RES_IRQ(IRQ_LCD_VSYNC),
173 [2] = DEFINE_RES_IRQ(IRQ_LCD_FIFO),
174 [3] = DEFINE_RES_IRQ(IRQ_LCD_SYSTEM),
177 struct platform_device s3c_device_fb = {
180 .num_resources = ARRAY_SIZE(s3c_fb_resource),
181 .resource = s3c_fb_resource,
183 .dma_mask = &samsung_device_dma_mask,
184 .coherent_dma_mask = DMA_BIT_MASK(32),
188 void __init s3c_fb_set_platdata(struct s3c_fb_platdata *pd)
190 s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
193 #endif /* CONFIG_S3C_DEV_FB */
197 #ifdef CONFIG_S5P_DEV_FIMC0
198 static struct resource s5p_fimc0_resource[] = {
199 [0] = DEFINE_RES_MEM(S5P_PA_FIMC0, SZ_4K),
200 [1] = DEFINE_RES_IRQ(IRQ_FIMC0),
203 struct platform_device s5p_device_fimc0 = {
206 .num_resources = ARRAY_SIZE(s5p_fimc0_resource),
207 .resource = s5p_fimc0_resource,
209 .dma_mask = &samsung_device_dma_mask,
210 .coherent_dma_mask = DMA_BIT_MASK(32),
214 struct platform_device s5p_device_fimc_md = {
215 .name = "s5p-fimc-md",
218 #endif /* CONFIG_S5P_DEV_FIMC0 */
220 #ifdef CONFIG_S5P_DEV_FIMC1
221 static struct resource s5p_fimc1_resource[] = {
222 [0] = DEFINE_RES_MEM(S5P_PA_FIMC1, SZ_4K),
223 [1] = DEFINE_RES_IRQ(IRQ_FIMC1),
226 struct platform_device s5p_device_fimc1 = {
229 .num_resources = ARRAY_SIZE(s5p_fimc1_resource),
230 .resource = s5p_fimc1_resource,
232 .dma_mask = &samsung_device_dma_mask,
233 .coherent_dma_mask = DMA_BIT_MASK(32),
236 #endif /* CONFIG_S5P_DEV_FIMC1 */
238 #ifdef CONFIG_S5P_DEV_FIMC2
239 static struct resource s5p_fimc2_resource[] = {
240 [0] = DEFINE_RES_MEM(S5P_PA_FIMC2, SZ_4K),
241 [1] = DEFINE_RES_IRQ(IRQ_FIMC2),
244 struct platform_device s5p_device_fimc2 = {
247 .num_resources = ARRAY_SIZE(s5p_fimc2_resource),
248 .resource = s5p_fimc2_resource,
250 .dma_mask = &samsung_device_dma_mask,
251 .coherent_dma_mask = DMA_BIT_MASK(32),
254 #endif /* CONFIG_S5P_DEV_FIMC2 */
256 #ifdef CONFIG_S5P_DEV_FIMC3
257 static struct resource s5p_fimc3_resource[] = {
258 [0] = DEFINE_RES_MEM(S5P_PA_FIMC3, SZ_4K),
259 [1] = DEFINE_RES_IRQ(IRQ_FIMC3),
262 struct platform_device s5p_device_fimc3 = {
265 .num_resources = ARRAY_SIZE(s5p_fimc3_resource),
266 .resource = s5p_fimc3_resource,
268 .dma_mask = &samsung_device_dma_mask,
269 .coherent_dma_mask = DMA_BIT_MASK(32),
272 #endif /* CONFIG_S5P_DEV_FIMC3 */
276 #ifdef CONFIG_S5P_DEV_G2D
277 static struct resource s5p_g2d_resource[] = {
278 [0] = DEFINE_RES_MEM(S5P_PA_G2D, SZ_4K),
279 [1] = DEFINE_RES_IRQ(IRQ_2D),
282 struct platform_device s5p_device_g2d = {
285 .num_resources = ARRAY_SIZE(s5p_g2d_resource),
286 .resource = s5p_g2d_resource,
288 .dma_mask = &samsung_device_dma_mask,
289 .coherent_dma_mask = DMA_BIT_MASK(32),
292 #endif /* CONFIG_S5P_DEV_G2D */
294 #ifdef CONFIG_S5P_DEV_JPEG
295 static struct resource s5p_jpeg_resource[] = {
296 [0] = DEFINE_RES_MEM(S5P_PA_JPEG, SZ_4K),
297 [1] = DEFINE_RES_IRQ(IRQ_JPEG),
300 struct platform_device s5p_device_jpeg = {
303 .num_resources = ARRAY_SIZE(s5p_jpeg_resource),
304 .resource = s5p_jpeg_resource,
306 .dma_mask = &samsung_device_dma_mask,
307 .coherent_dma_mask = DMA_BIT_MASK(32),
310 #endif /* CONFIG_S5P_DEV_JPEG */
314 #ifdef CONFIG_S5P_DEV_FIMD0
315 static struct resource s5p_fimd0_resource[] = {
316 [0] = DEFINE_RES_MEM(S5P_PA_FIMD0, SZ_32K),
317 [1] = DEFINE_RES_IRQ(IRQ_FIMD0_VSYNC),
318 [2] = DEFINE_RES_IRQ(IRQ_FIMD0_FIFO),
319 [3] = DEFINE_RES_IRQ(IRQ_FIMD0_SYSTEM),
322 struct platform_device s5p_device_fimd0 = {
325 .num_resources = ARRAY_SIZE(s5p_fimd0_resource),
326 .resource = s5p_fimd0_resource,
328 .dma_mask = &samsung_device_dma_mask,
329 .coherent_dma_mask = DMA_BIT_MASK(32),
333 void __init s5p_fimd0_set_platdata(struct s3c_fb_platdata *pd)
335 s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
338 #endif /* CONFIG_S5P_DEV_FIMD0 */
342 #ifdef CONFIG_S3C_DEV_HWMON
343 struct platform_device s3c_device_hwmon = {
346 .dev.parent = &s3c_device_adc.dev,
349 void __init s3c_hwmon_set_platdata(struct s3c_hwmon_pdata *pd)
351 s3c_set_platdata(pd, sizeof(struct s3c_hwmon_pdata),
354 #endif /* CONFIG_S3C_DEV_HWMON */
358 #ifdef CONFIG_S3C_DEV_HSMMC
359 static struct resource s3c_hsmmc_resource[] = {
360 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC0, SZ_4K),
361 [1] = DEFINE_RES_IRQ(IRQ_HSMMC0),
364 struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata = {
366 .host_caps = (MMC_CAP_4_BIT_DATA |
367 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
370 struct platform_device s3c_device_hsmmc0 = {
373 .num_resources = ARRAY_SIZE(s3c_hsmmc_resource),
374 .resource = s3c_hsmmc_resource,
376 .dma_mask = &samsung_device_dma_mask,
377 .coherent_dma_mask = DMA_BIT_MASK(32),
378 .platform_data = &s3c_hsmmc0_def_platdata,
382 void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd)
384 s3c_sdhci_set_platdata(pd, &s3c_hsmmc0_def_platdata);
386 #endif /* CONFIG_S3C_DEV_HSMMC */
388 #ifdef CONFIG_S3C_DEV_HSMMC1
389 static struct resource s3c_hsmmc1_resource[] = {
390 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC1, SZ_4K),
391 [1] = DEFINE_RES_IRQ(IRQ_HSMMC1),
394 struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata = {
396 .host_caps = (MMC_CAP_4_BIT_DATA |
397 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
400 struct platform_device s3c_device_hsmmc1 = {
403 .num_resources = ARRAY_SIZE(s3c_hsmmc1_resource),
404 .resource = s3c_hsmmc1_resource,
406 .dma_mask = &samsung_device_dma_mask,
407 .coherent_dma_mask = DMA_BIT_MASK(32),
408 .platform_data = &s3c_hsmmc1_def_platdata,
412 void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd)
414 s3c_sdhci_set_platdata(pd, &s3c_hsmmc1_def_platdata);
416 #endif /* CONFIG_S3C_DEV_HSMMC1 */
420 #ifdef CONFIG_S3C_DEV_HSMMC2
421 static struct resource s3c_hsmmc2_resource[] = {
422 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC2, SZ_4K),
423 [1] = DEFINE_RES_IRQ(IRQ_HSMMC2),
426 struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata = {
428 .host_caps = (MMC_CAP_4_BIT_DATA |
429 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
432 struct platform_device s3c_device_hsmmc2 = {
435 .num_resources = ARRAY_SIZE(s3c_hsmmc2_resource),
436 .resource = s3c_hsmmc2_resource,
438 .dma_mask = &samsung_device_dma_mask,
439 .coherent_dma_mask = DMA_BIT_MASK(32),
440 .platform_data = &s3c_hsmmc2_def_platdata,
444 void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd)
446 s3c_sdhci_set_platdata(pd, &s3c_hsmmc2_def_platdata);
448 #endif /* CONFIG_S3C_DEV_HSMMC2 */
450 #ifdef CONFIG_S3C_DEV_HSMMC3
451 static struct resource s3c_hsmmc3_resource[] = {
452 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC3, SZ_4K),
453 [1] = DEFINE_RES_IRQ(IRQ_HSMMC3),
456 struct s3c_sdhci_platdata s3c_hsmmc3_def_platdata = {
458 .host_caps = (MMC_CAP_4_BIT_DATA |
459 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
462 struct platform_device s3c_device_hsmmc3 = {
465 .num_resources = ARRAY_SIZE(s3c_hsmmc3_resource),
466 .resource = s3c_hsmmc3_resource,
468 .dma_mask = &samsung_device_dma_mask,
469 .coherent_dma_mask = DMA_BIT_MASK(32),
470 .platform_data = &s3c_hsmmc3_def_platdata,
474 void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata *pd)
476 s3c_sdhci_set_platdata(pd, &s3c_hsmmc3_def_platdata);
478 #endif /* CONFIG_S3C_DEV_HSMMC3 */
482 static struct resource s3c_i2c0_resource[] = {
483 [0] = DEFINE_RES_MEM(S3C_PA_IIC, SZ_4K),
484 [1] = DEFINE_RES_IRQ(IRQ_IIC),
487 struct platform_device s3c_device_i2c0 = {
488 .name = "s3c2410-i2c",
490 .num_resources = ARRAY_SIZE(s3c_i2c0_resource),
491 .resource = s3c_i2c0_resource,
494 struct s3c2410_platform_i2c default_i2c_data __initdata = {
497 .frequency = 100*1000,
501 void __init s3c_i2c0_set_platdata(struct s3c2410_platform_i2c *pd)
503 struct s3c2410_platform_i2c *npd;
506 pd = &default_i2c_data;
510 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
514 npd->cfg_gpio = s3c_i2c0_cfg_gpio;
517 #ifdef CONFIG_S3C_DEV_I2C1
518 static struct resource s3c_i2c1_resource[] = {
519 [0] = DEFINE_RES_MEM(S3C_PA_IIC1, SZ_4K),
520 [1] = DEFINE_RES_IRQ(IRQ_IIC1),
523 struct platform_device s3c_device_i2c1 = {
524 .name = "s3c2410-i2c",
526 .num_resources = ARRAY_SIZE(s3c_i2c1_resource),
527 .resource = s3c_i2c1_resource,
530 void __init s3c_i2c1_set_platdata(struct s3c2410_platform_i2c *pd)
532 struct s3c2410_platform_i2c *npd;
535 pd = &default_i2c_data;
539 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
543 npd->cfg_gpio = s3c_i2c1_cfg_gpio;
545 #endif /* CONFIG_S3C_DEV_I2C1 */
547 #ifdef CONFIG_S3C_DEV_I2C2
548 static struct resource s3c_i2c2_resource[] = {
549 [0] = DEFINE_RES_MEM(S3C_PA_IIC2, SZ_4K),
550 [1] = DEFINE_RES_IRQ(IRQ_IIC2),
553 struct platform_device s3c_device_i2c2 = {
554 .name = "s3c2410-i2c",
556 .num_resources = ARRAY_SIZE(s3c_i2c2_resource),
557 .resource = s3c_i2c2_resource,
560 void __init s3c_i2c2_set_platdata(struct s3c2410_platform_i2c *pd)
562 struct s3c2410_platform_i2c *npd;
565 pd = &default_i2c_data;
569 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
573 npd->cfg_gpio = s3c_i2c2_cfg_gpio;
575 #endif /* CONFIG_S3C_DEV_I2C2 */
577 #ifdef CONFIG_S3C_DEV_I2C3
578 static struct resource s3c_i2c3_resource[] = {
579 [0] = DEFINE_RES_MEM(S3C_PA_IIC3, SZ_4K),
580 [1] = DEFINE_RES_IRQ(IRQ_IIC3),
583 struct platform_device s3c_device_i2c3 = {
584 .name = "s3c2440-i2c",
586 .num_resources = ARRAY_SIZE(s3c_i2c3_resource),
587 .resource = s3c_i2c3_resource,
590 void __init s3c_i2c3_set_platdata(struct s3c2410_platform_i2c *pd)
592 struct s3c2410_platform_i2c *npd;
595 pd = &default_i2c_data;
599 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
603 npd->cfg_gpio = s3c_i2c3_cfg_gpio;
605 #endif /*CONFIG_S3C_DEV_I2C3 */
607 #ifdef CONFIG_S3C_DEV_I2C4
608 static struct resource s3c_i2c4_resource[] = {
609 [0] = DEFINE_RES_MEM(S3C_PA_IIC4, SZ_4K),
610 [1] = DEFINE_RES_IRQ(IRQ_IIC4),
613 struct platform_device s3c_device_i2c4 = {
614 .name = "s3c2440-i2c",
616 .num_resources = ARRAY_SIZE(s3c_i2c4_resource),
617 .resource = s3c_i2c4_resource,
620 void __init s3c_i2c4_set_platdata(struct s3c2410_platform_i2c *pd)
622 struct s3c2410_platform_i2c *npd;
625 pd = &default_i2c_data;
629 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
633 npd->cfg_gpio = s3c_i2c4_cfg_gpio;
635 #endif /*CONFIG_S3C_DEV_I2C4 */
637 #ifdef CONFIG_S3C_DEV_I2C5
638 static struct resource s3c_i2c5_resource[] = {
639 [0] = DEFINE_RES_MEM(S3C_PA_IIC5, SZ_4K),
640 [1] = DEFINE_RES_IRQ(IRQ_IIC5),
643 struct platform_device s3c_device_i2c5 = {
644 .name = "s3c2440-i2c",
646 .num_resources = ARRAY_SIZE(s3c_i2c5_resource),
647 .resource = s3c_i2c5_resource,
650 void __init s3c_i2c5_set_platdata(struct s3c2410_platform_i2c *pd)
652 struct s3c2410_platform_i2c *npd;
655 pd = &default_i2c_data;
659 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
663 npd->cfg_gpio = s3c_i2c5_cfg_gpio;
665 #endif /*CONFIG_S3C_DEV_I2C5 */
667 #ifdef CONFIG_S3C_DEV_I2C6
668 static struct resource s3c_i2c6_resource[] = {
669 [0] = DEFINE_RES_MEM(S3C_PA_IIC6, SZ_4K),
670 [1] = DEFINE_RES_IRQ(IRQ_IIC6),
673 struct platform_device s3c_device_i2c6 = {
674 .name = "s3c2440-i2c",
676 .num_resources = ARRAY_SIZE(s3c_i2c6_resource),
677 .resource = s3c_i2c6_resource,
680 void __init s3c_i2c6_set_platdata(struct s3c2410_platform_i2c *pd)
682 struct s3c2410_platform_i2c *npd;
685 pd = &default_i2c_data;
689 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
693 npd->cfg_gpio = s3c_i2c6_cfg_gpio;
695 #endif /* CONFIG_S3C_DEV_I2C6 */
697 #ifdef CONFIG_S3C_DEV_I2C7
698 static struct resource s3c_i2c7_resource[] = {
699 [0] = DEFINE_RES_MEM(S3C_PA_IIC7, SZ_4K),
700 [1] = DEFINE_RES_IRQ(IRQ_IIC7),
703 struct platform_device s3c_device_i2c7 = {
704 .name = "s3c2440-i2c",
706 .num_resources = ARRAY_SIZE(s3c_i2c7_resource),
707 .resource = s3c_i2c7_resource,
710 void __init s3c_i2c7_set_platdata(struct s3c2410_platform_i2c *pd)
712 struct s3c2410_platform_i2c *npd;
715 pd = &default_i2c_data;
719 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
723 npd->cfg_gpio = s3c_i2c7_cfg_gpio;
725 #endif /* CONFIG_S3C_DEV_I2C7 */
729 #ifdef CONFIG_S5P_DEV_I2C_HDMIPHY
730 static struct resource s5p_i2c_resource[] = {
731 [0] = DEFINE_RES_MEM(S5P_PA_IIC_HDMIPHY, SZ_4K),
732 [1] = DEFINE_RES_IRQ(IRQ_IIC_HDMIPHY),
735 struct platform_device s5p_device_i2c_hdmiphy = {
736 .name = "s3c2440-hdmiphy-i2c",
738 .num_resources = ARRAY_SIZE(s5p_i2c_resource),
739 .resource = s5p_i2c_resource,
742 void __init s5p_i2c_hdmiphy_set_platdata(struct s3c2410_platform_i2c *pd)
744 struct s3c2410_platform_i2c *npd;
747 pd = &default_i2c_data;
749 if (soc_is_exynos4210() ||
750 soc_is_exynos4212() || soc_is_exynos4412())
752 else if (soc_is_s5pv210())
758 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
759 &s5p_device_i2c_hdmiphy);
762 static struct s5p_hdmi_platform_data s5p_hdmi_def_platdata;
764 void __init s5p_hdmi_set_platdata(struct i2c_board_info *hdmiphy_info,
765 struct i2c_board_info *mhl_info, int mhl_bus)
767 struct s5p_hdmi_platform_data *pd = &s5p_hdmi_def_platdata;
769 if (soc_is_exynos4210() ||
770 soc_is_exynos4212() || soc_is_exynos4412())
772 else if (soc_is_s5pv210())
777 pd->hdmiphy_info = hdmiphy_info;
778 pd->mhl_info = mhl_info;
779 pd->mhl_bus = mhl_bus;
781 s3c_set_platdata(pd, sizeof(struct s5p_hdmi_platform_data),
785 #endif /* CONFIG_S5P_DEV_I2C_HDMIPHY */
789 #ifdef CONFIG_PLAT_S3C24XX
790 static struct resource s3c_iis_resource[] = {
791 [0] = DEFINE_RES_MEM(S3C24XX_PA_IIS, S3C24XX_SZ_IIS),
794 struct platform_device s3c_device_iis = {
795 .name = "s3c24xx-iis",
797 .num_resources = ARRAY_SIZE(s3c_iis_resource),
798 .resource = s3c_iis_resource,
800 .dma_mask = &samsung_device_dma_mask,
801 .coherent_dma_mask = DMA_BIT_MASK(32),
804 #endif /* CONFIG_PLAT_S3C24XX */
808 #ifdef CONFIG_SAMSUNG_DEV_IDE
809 static struct resource s3c_cfcon_resource[] = {
810 [0] = DEFINE_RES_MEM(SAMSUNG_PA_CFCON, SZ_16K),
811 [1] = DEFINE_RES_IRQ(IRQ_CFCON),
814 struct platform_device s3c_device_cfcon = {
816 .num_resources = ARRAY_SIZE(s3c_cfcon_resource),
817 .resource = s3c_cfcon_resource,
820 void __init s3c_ide_set_platdata(struct s3c_ide_platdata *pdata)
822 s3c_set_platdata(pdata, sizeof(struct s3c_ide_platdata),
825 #endif /* CONFIG_SAMSUNG_DEV_IDE */
829 #ifdef CONFIG_SAMSUNG_DEV_KEYPAD
830 static struct resource samsung_keypad_resources[] = {
831 [0] = DEFINE_RES_MEM(SAMSUNG_PA_KEYPAD, SZ_32),
832 [1] = DEFINE_RES_IRQ(IRQ_KEYPAD),
835 struct platform_device samsung_device_keypad = {
836 .name = "samsung-keypad",
838 .num_resources = ARRAY_SIZE(samsung_keypad_resources),
839 .resource = samsung_keypad_resources,
842 void __init samsung_keypad_set_platdata(struct samsung_keypad_platdata *pd)
844 struct samsung_keypad_platdata *npd;
846 npd = s3c_set_platdata(pd, sizeof(struct samsung_keypad_platdata),
847 &samsung_device_keypad);
850 npd->cfg_gpio = samsung_keypad_cfg_gpio;
852 #endif /* CONFIG_SAMSUNG_DEV_KEYPAD */
856 #ifdef CONFIG_PLAT_S3C24XX
857 static struct resource s3c_lcd_resource[] = {
858 [0] = DEFINE_RES_MEM(S3C24XX_PA_LCD, S3C24XX_SZ_LCD),
859 [1] = DEFINE_RES_IRQ(IRQ_LCD),
862 struct platform_device s3c_device_lcd = {
863 .name = "s3c2410-lcd",
865 .num_resources = ARRAY_SIZE(s3c_lcd_resource),
866 .resource = s3c_lcd_resource,
868 .dma_mask = &samsung_device_dma_mask,
869 .coherent_dma_mask = DMA_BIT_MASK(32),
873 void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd)
875 struct s3c2410fb_mach_info *npd;
877 npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_lcd);
879 npd->displays = kmemdup(pd->displays,
880 sizeof(struct s3c2410fb_display) * npd->num_displays,
883 printk(KERN_ERR "no memory for LCD display data\n");
885 printk(KERN_ERR "no memory for LCD platform data\n");
888 #endif /* CONFIG_PLAT_S3C24XX */
892 #ifdef CONFIG_S5P_DEV_MFC
893 static struct resource s5p_mfc_resource[] = {
894 [0] = DEFINE_RES_MEM(S5P_PA_MFC, SZ_64K),
895 [1] = DEFINE_RES_IRQ(IRQ_MFC),
898 struct platform_device s5p_device_mfc = {
901 .num_resources = ARRAY_SIZE(s5p_mfc_resource),
902 .resource = s5p_mfc_resource,
906 * MFC hardware has 2 memory interfaces which are modelled as two separate
907 * platform devices to let dma-mapping distinguish between them.
909 * MFC parent device (s5p_device_mfc) must be registered before memory
910 * interface specific devices (s5p_device_mfc_l and s5p_device_mfc_r).
913 struct platform_device s5p_device_mfc_l = {
917 .parent = &s5p_device_mfc.dev,
918 .dma_mask = &samsung_device_dma_mask,
919 .coherent_dma_mask = DMA_BIT_MASK(32),
923 struct platform_device s5p_device_mfc_r = {
927 .parent = &s5p_device_mfc.dev,
928 .dma_mask = &samsung_device_dma_mask,
929 .coherent_dma_mask = DMA_BIT_MASK(32),
933 #endif /* CONFIG_S5P_DEV_MFC */
937 #ifdef CONFIG_S5P_DEV_CSIS0
938 static struct resource s5p_mipi_csis0_resource[] = {
939 [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS0, SZ_16K),
940 [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS0),
943 struct platform_device s5p_device_mipi_csis0 = {
944 .name = "s5p-mipi-csis",
946 .num_resources = ARRAY_SIZE(s5p_mipi_csis0_resource),
947 .resource = s5p_mipi_csis0_resource,
949 #endif /* CONFIG_S5P_DEV_CSIS0 */
951 #ifdef CONFIG_S5P_DEV_CSIS1
952 static struct resource s5p_mipi_csis1_resource[] = {
953 [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS1, SZ_16K),
954 [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS1),
957 struct platform_device s5p_device_mipi_csis1 = {
958 .name = "s5p-mipi-csis",
960 .num_resources = ARRAY_SIZE(s5p_mipi_csis1_resource),
961 .resource = s5p_mipi_csis1_resource,
967 #ifdef CONFIG_S3C_DEV_NAND
968 static struct resource s3c_nand_resource[] = {
969 [0] = DEFINE_RES_MEM(S3C_PA_NAND, SZ_1M),
972 struct platform_device s3c_device_nand = {
973 .name = "s3c2410-nand",
975 .num_resources = ARRAY_SIZE(s3c_nand_resource),
976 .resource = s3c_nand_resource,
980 * s3c_nand_copy_set() - copy nand set data
981 * @set: The new structure, directly copied from the old.
983 * Copy all the fields from the NAND set field from what is probably __initdata
984 * to new kernel memory. The code returns 0 if the copy happened correctly or
985 * an error code for the calling function to display.
987 * Note, we currently do not try and look to see if we've already copied the
988 * data in a previous set.
990 static int __init s3c_nand_copy_set(struct s3c2410_nand_set *set)
995 size = sizeof(struct mtd_partition) * set->nr_partitions;
997 ptr = kmemdup(set->partitions, size, GFP_KERNEL);
998 set->partitions = ptr;
1004 if (set->nr_map && set->nr_chips) {
1005 size = sizeof(int) * set->nr_chips;
1006 ptr = kmemdup(set->nr_map, size, GFP_KERNEL);
1013 if (set->ecc_layout) {
1014 ptr = kmemdup(set->ecc_layout,
1015 sizeof(struct nand_ecclayout), GFP_KERNEL);
1016 set->ecc_layout = ptr;
1025 void __init s3c_nand_set_platdata(struct s3c2410_platform_nand *nand)
1027 struct s3c2410_platform_nand *npd;
1031 /* note, if we get a failure in allocation, we simply drop out of the
1032 * function. If there is so little memory available at initialisation
1033 * time then there is little chance the system is going to run.
1036 npd = s3c_set_platdata(nand, sizeof(struct s3c2410_platform_nand),
1041 /* now see if we need to copy any of the nand set data */
1043 size = sizeof(struct s3c2410_nand_set) * npd->nr_sets;
1045 struct s3c2410_nand_set *from = npd->sets;
1046 struct s3c2410_nand_set *to;
1049 to = kmemdup(from, size, GFP_KERNEL);
1050 npd->sets = to; /* set, even if we failed */
1053 printk(KERN_ERR "%s: no memory for sets\n", __func__);
1057 for (i = 0; i < npd->nr_sets; i++) {
1058 ret = s3c_nand_copy_set(to);
1060 printk(KERN_ERR "%s: failed to copy set %d\n",
1068 #endif /* CONFIG_S3C_DEV_NAND */
1072 #ifdef CONFIG_S3C_DEV_ONENAND
1073 static struct resource s3c_onenand_resources[] = {
1074 [0] = DEFINE_RES_MEM(S3C_PA_ONENAND, SZ_1K),
1075 [1] = DEFINE_RES_MEM(S3C_PA_ONENAND_BUF, S3C_SZ_ONENAND_BUF),
1076 [2] = DEFINE_RES_IRQ(IRQ_ONENAND),
1079 struct platform_device s3c_device_onenand = {
1080 .name = "samsung-onenand",
1082 .num_resources = ARRAY_SIZE(s3c_onenand_resources),
1083 .resource = s3c_onenand_resources,
1085 #endif /* CONFIG_S3C_DEV_ONENAND */
1087 #ifdef CONFIG_S3C64XX_DEV_ONENAND1
1088 static struct resource s3c64xx_onenand1_resources[] = {
1089 [0] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1, SZ_1K),
1090 [1] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1_BUF, S3C64XX_SZ_ONENAND1_BUF),
1091 [2] = DEFINE_RES_IRQ(IRQ_ONENAND1),
1094 struct platform_device s3c64xx_device_onenand1 = {
1095 .name = "samsung-onenand",
1097 .num_resources = ARRAY_SIZE(s3c64xx_onenand1_resources),
1098 .resource = s3c64xx_onenand1_resources,
1101 void __init s3c64xx_onenand1_set_platdata(struct onenand_platform_data *pdata)
1103 s3c_set_platdata(pdata, sizeof(struct onenand_platform_data),
1104 &s3c64xx_device_onenand1);
1106 #endif /* CONFIG_S3C64XX_DEV_ONENAND1 */
1108 #ifdef CONFIG_S5P_DEV_ONENAND
1109 static struct resource s5p_onenand_resources[] = {
1110 [0] = DEFINE_RES_MEM(S5P_PA_ONENAND, SZ_128K),
1111 [1] = DEFINE_RES_MEM(S5P_PA_ONENAND_DMA, SZ_8K),
1112 [2] = DEFINE_RES_IRQ(IRQ_ONENAND_AUDI),
1115 struct platform_device s5p_device_onenand = {
1116 .name = "s5pc110-onenand",
1118 .num_resources = ARRAY_SIZE(s5p_onenand_resources),
1119 .resource = s5p_onenand_resources,
1121 #endif /* CONFIG_S5P_DEV_ONENAND */
1125 #ifdef CONFIG_PLAT_S5P
1126 static struct resource s5p_pmu_resource[] = {
1127 DEFINE_RES_IRQ(IRQ_PMU)
1130 static struct platform_device s5p_device_pmu = {
1133 .num_resources = ARRAY_SIZE(s5p_pmu_resource),
1134 .resource = s5p_pmu_resource,
1137 static int __init s5p_pmu_init(void)
1139 platform_device_register(&s5p_device_pmu);
1142 arch_initcall(s5p_pmu_init);
1143 #endif /* CONFIG_PLAT_S5P */
1147 #ifdef CONFIG_SAMSUNG_DEV_PWM
1149 #define TIMER_RESOURCE_SIZE (1)
1151 #define TIMER_RESOURCE(_tmr, _irq) \
1152 (struct resource [TIMER_RESOURCE_SIZE]) { \
1156 .flags = IORESOURCE_IRQ \
1160 #define DEFINE_S3C_TIMER(_tmr_no, _irq) \
1161 .name = "s3c24xx-pwm", \
1163 .num_resources = TIMER_RESOURCE_SIZE, \
1164 .resource = TIMER_RESOURCE(_tmr_no, _irq), \
1167 * since we already have an static mapping for the timer,
1168 * we do not bother setting any IO resource for the base.
1171 struct platform_device s3c_device_timer[] = {
1172 [0] = { DEFINE_S3C_TIMER(0, IRQ_TIMER0) },
1173 [1] = { DEFINE_S3C_TIMER(1, IRQ_TIMER1) },
1174 [2] = { DEFINE_S3C_TIMER(2, IRQ_TIMER2) },
1175 [3] = { DEFINE_S3C_TIMER(3, IRQ_TIMER3) },
1176 [4] = { DEFINE_S3C_TIMER(4, IRQ_TIMER4) },
1178 #endif /* CONFIG_SAMSUNG_DEV_PWM */
1182 #ifdef CONFIG_PLAT_S3C24XX
1183 static struct resource s3c_rtc_resource[] = {
1184 [0] = DEFINE_RES_MEM(S3C24XX_PA_RTC, SZ_256),
1185 [1] = DEFINE_RES_IRQ(IRQ_RTC),
1186 [2] = DEFINE_RES_IRQ(IRQ_TICK),
1189 struct platform_device s3c_device_rtc = {
1190 .name = "s3c2410-rtc",
1192 .num_resources = ARRAY_SIZE(s3c_rtc_resource),
1193 .resource = s3c_rtc_resource,
1195 #endif /* CONFIG_PLAT_S3C24XX */
1197 #ifdef CONFIG_S3C_DEV_RTC
1198 static struct resource s3c_rtc_resource[] = {
1199 [0] = DEFINE_RES_MEM(S3C_PA_RTC, SZ_256),
1200 [1] = DEFINE_RES_IRQ(IRQ_RTC_ALARM),
1201 [2] = DEFINE_RES_IRQ(IRQ_RTC_TIC),
1204 struct platform_device s3c_device_rtc = {
1205 .name = "s3c64xx-rtc",
1207 .num_resources = ARRAY_SIZE(s3c_rtc_resource),
1208 .resource = s3c_rtc_resource,
1210 #endif /* CONFIG_S3C_DEV_RTC */
1214 #ifdef CONFIG_PLAT_S3C24XX
1215 static struct resource s3c_sdi_resource[] = {
1216 [0] = DEFINE_RES_MEM(S3C24XX_PA_SDI, S3C24XX_SZ_SDI),
1217 [1] = DEFINE_RES_IRQ(IRQ_SDI),
1220 struct platform_device s3c_device_sdi = {
1221 .name = "s3c2410-sdi",
1223 .num_resources = ARRAY_SIZE(s3c_sdi_resource),
1224 .resource = s3c_sdi_resource,
1227 void __init s3c24xx_mci_set_platdata(struct s3c24xx_mci_pdata *pdata)
1229 s3c_set_platdata(pdata, sizeof(struct s3c24xx_mci_pdata),
1232 #endif /* CONFIG_PLAT_S3C24XX */
1236 #ifdef CONFIG_PLAT_S3C24XX
1237 static struct resource s3c_spi0_resource[] = {
1238 [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI, SZ_32),
1239 [1] = DEFINE_RES_IRQ(IRQ_SPI0),
1242 struct platform_device s3c_device_spi0 = {
1243 .name = "s3c2410-spi",
1245 .num_resources = ARRAY_SIZE(s3c_spi0_resource),
1246 .resource = s3c_spi0_resource,
1248 .dma_mask = &samsung_device_dma_mask,
1249 .coherent_dma_mask = DMA_BIT_MASK(32),
1253 static struct resource s3c_spi1_resource[] = {
1254 [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI1, SZ_32),
1255 [1] = DEFINE_RES_IRQ(IRQ_SPI1),
1258 struct platform_device s3c_device_spi1 = {
1259 .name = "s3c2410-spi",
1261 .num_resources = ARRAY_SIZE(s3c_spi1_resource),
1262 .resource = s3c_spi1_resource,
1264 .dma_mask = &samsung_device_dma_mask,
1265 .coherent_dma_mask = DMA_BIT_MASK(32),
1268 #endif /* CONFIG_PLAT_S3C24XX */
1272 #ifdef CONFIG_PLAT_S3C24XX
1273 static struct resource s3c_ts_resource[] = {
1274 [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
1275 [1] = DEFINE_RES_IRQ(IRQ_TC),
1278 struct platform_device s3c_device_ts = {
1279 .name = "s3c2410-ts",
1281 .dev.parent = &s3c_device_adc.dev,
1282 .num_resources = ARRAY_SIZE(s3c_ts_resource),
1283 .resource = s3c_ts_resource,
1286 void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *hard_s3c2410ts_info)
1288 s3c_set_platdata(hard_s3c2410ts_info,
1289 sizeof(struct s3c2410_ts_mach_info), &s3c_device_ts);
1291 #endif /* CONFIG_PLAT_S3C24XX */
1293 #ifdef CONFIG_SAMSUNG_DEV_TS
1294 static struct resource s3c_ts_resource[] = {
1295 [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256),
1296 [1] = DEFINE_RES_IRQ(IRQ_TC),
1299 static struct s3c2410_ts_mach_info default_ts_data __initdata = {
1302 .oversampling_shift = 2,
1305 struct platform_device s3c_device_ts = {
1306 .name = "s3c64xx-ts",
1308 .num_resources = ARRAY_SIZE(s3c_ts_resource),
1309 .resource = s3c_ts_resource,
1312 void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *pd)
1315 pd = &default_ts_data;
1317 s3c_set_platdata(pd, sizeof(struct s3c2410_ts_mach_info),
1320 #endif /* CONFIG_SAMSUNG_DEV_TS */
1324 #ifdef CONFIG_S5P_DEV_TV
1326 static struct resource s5p_hdmi_resources[] = {
1327 [0] = DEFINE_RES_MEM(S5P_PA_HDMI, SZ_1M),
1328 [1] = DEFINE_RES_IRQ(IRQ_HDMI),
1331 struct platform_device s5p_device_hdmi = {
1334 .num_resources = ARRAY_SIZE(s5p_hdmi_resources),
1335 .resource = s5p_hdmi_resources,
1338 static struct resource s5p_sdo_resources[] = {
1339 [0] = DEFINE_RES_MEM(S5P_PA_SDO, SZ_64K),
1340 [1] = DEFINE_RES_IRQ(IRQ_SDO),
1343 struct platform_device s5p_device_sdo = {
1346 .num_resources = ARRAY_SIZE(s5p_sdo_resources),
1347 .resource = s5p_sdo_resources,
1350 static struct resource s5p_mixer_resources[] = {
1351 [0] = DEFINE_RES_MEM_NAMED(S5P_PA_MIXER, SZ_64K, "mxr"),
1352 [1] = DEFINE_RES_MEM_NAMED(S5P_PA_VP, SZ_64K, "vp"),
1353 [2] = DEFINE_RES_IRQ_NAMED(IRQ_MIXER, "irq"),
1356 struct platform_device s5p_device_mixer = {
1357 .name = "s5p-mixer",
1359 .num_resources = ARRAY_SIZE(s5p_mixer_resources),
1360 .resource = s5p_mixer_resources,
1362 .dma_mask = &samsung_device_dma_mask,
1363 .coherent_dma_mask = DMA_BIT_MASK(32),
1366 #endif /* CONFIG_S5P_DEV_TV */
1370 #ifdef CONFIG_S3C_DEV_USB_HOST
1371 static struct resource s3c_usb_resource[] = {
1372 [0] = DEFINE_RES_MEM(S3C_PA_USBHOST, SZ_256),
1373 [1] = DEFINE_RES_IRQ(IRQ_USBH),
1376 struct platform_device s3c_device_ohci = {
1377 .name = "s3c2410-ohci",
1379 .num_resources = ARRAY_SIZE(s3c_usb_resource),
1380 .resource = s3c_usb_resource,
1382 .dma_mask = &samsung_device_dma_mask,
1383 .coherent_dma_mask = DMA_BIT_MASK(32),
1388 * s3c_ohci_set_platdata - initialise OHCI device platform data
1389 * @info: The platform data.
1391 * This call copies the @info passed in and sets the device .platform_data
1392 * field to that copy. The @info is copied so that the original can be marked
1396 void __init s3c_ohci_set_platdata(struct s3c2410_hcd_info *info)
1398 s3c_set_platdata(info, sizeof(struct s3c2410_hcd_info),
1401 #endif /* CONFIG_S3C_DEV_USB_HOST */
1403 /* USB Device (Gadget) */
1405 #ifdef CONFIG_PLAT_S3C24XX
1406 static struct resource s3c_usbgadget_resource[] = {
1407 [0] = DEFINE_RES_MEM(S3C24XX_PA_USBDEV, S3C24XX_SZ_USBDEV),
1408 [1] = DEFINE_RES_IRQ(IRQ_USBD),
1411 struct platform_device s3c_device_usbgadget = {
1412 .name = "s3c2410-usbgadget",
1414 .num_resources = ARRAY_SIZE(s3c_usbgadget_resource),
1415 .resource = s3c_usbgadget_resource,
1418 void __init s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info *pd)
1420 s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usbgadget);
1422 #endif /* CONFIG_PLAT_S3C24XX */
1424 /* USB EHCI Host Controller */
1426 #ifdef CONFIG_S5P_DEV_USB_EHCI
1427 static struct resource s5p_ehci_resource[] = {
1428 [0] = DEFINE_RES_MEM(S5P_PA_EHCI, SZ_256),
1429 [1] = DEFINE_RES_IRQ(IRQ_USB_HOST),
1432 struct platform_device s5p_device_ehci = {
1435 .num_resources = ARRAY_SIZE(s5p_ehci_resource),
1436 .resource = s5p_ehci_resource,
1438 .dma_mask = &samsung_device_dma_mask,
1439 .coherent_dma_mask = DMA_BIT_MASK(32),
1443 void __init s5p_ehci_set_platdata(struct s5p_ehci_platdata *pd)
1445 struct s5p_ehci_platdata *npd;
1447 npd = s3c_set_platdata(pd, sizeof(struct s5p_ehci_platdata),
1451 npd->phy_init = s5p_usb_phy_init;
1453 npd->phy_exit = s5p_usb_phy_exit;
1455 #endif /* CONFIG_S5P_DEV_USB_EHCI */
1459 #ifdef CONFIG_S3C_DEV_USB_HSOTG
1460 static struct resource s3c_usb_hsotg_resources[] = {
1461 [0] = DEFINE_RES_MEM(S3C_PA_USB_HSOTG, SZ_128K),
1462 [1] = DEFINE_RES_IRQ(IRQ_OTG),
1465 struct platform_device s3c_device_usb_hsotg = {
1466 .name = "s3c-hsotg",
1468 .num_resources = ARRAY_SIZE(s3c_usb_hsotg_resources),
1469 .resource = s3c_usb_hsotg_resources,
1471 .dma_mask = &samsung_device_dma_mask,
1472 .coherent_dma_mask = DMA_BIT_MASK(32),
1476 void __init s3c_hsotg_set_platdata(struct s3c_hsotg_plat *pd)
1478 struct s3c_hsotg_plat *npd;
1480 npd = s3c_set_platdata(pd, sizeof(struct s3c_hsotg_plat),
1481 &s3c_device_usb_hsotg);
1484 npd->phy_init = s5p_usb_phy_init;
1486 npd->phy_exit = s5p_usb_phy_exit;
1488 #endif /* CONFIG_S3C_DEV_USB_HSOTG */
1490 /* USB High Spped 2.0 Device (Gadget) */
1492 #ifdef CONFIG_PLAT_S3C24XX
1493 static struct resource s3c_hsudc_resource[] = {
1494 [0] = DEFINE_RES_MEM(S3C2416_PA_HSUDC, S3C2416_SZ_HSUDC),
1495 [1] = DEFINE_RES_IRQ(IRQ_USBD),
1498 struct platform_device s3c_device_usb_hsudc = {
1499 .name = "s3c-hsudc",
1501 .num_resources = ARRAY_SIZE(s3c_hsudc_resource),
1502 .resource = s3c_hsudc_resource,
1504 .dma_mask = &samsung_device_dma_mask,
1505 .coherent_dma_mask = DMA_BIT_MASK(32),
1509 void __init s3c24xx_hsudc_set_platdata(struct s3c24xx_hsudc_platdata *pd)
1511 s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usb_hsudc);
1513 #endif /* CONFIG_PLAT_S3C24XX */
1517 #ifdef CONFIG_S3C_DEV_WDT
1518 static struct resource s3c_wdt_resource[] = {
1519 [0] = DEFINE_RES_MEM(S3C_PA_WDT, SZ_1K),
1520 [1] = DEFINE_RES_IRQ(IRQ_WDT),
1523 struct platform_device s3c_device_wdt = {
1524 .name = "s3c2410-wdt",
1526 .num_resources = ARRAY_SIZE(s3c_wdt_resource),
1527 .resource = s3c_wdt_resource,
1529 #endif /* CONFIG_S3C_DEV_WDT */
1531 #ifdef CONFIG_S3C64XX_DEV_SPI0
1532 static struct resource s3c64xx_spi0_resource[] = {
1533 [0] = DEFINE_RES_MEM(S3C_PA_SPI0, SZ_256),
1534 [1] = DEFINE_RES_DMA(DMACH_SPI0_TX),
1535 [2] = DEFINE_RES_DMA(DMACH_SPI0_RX),
1536 [3] = DEFINE_RES_IRQ(IRQ_SPI0),
1539 struct platform_device s3c64xx_device_spi0 = {
1540 .name = "s3c6410-spi",
1542 .num_resources = ARRAY_SIZE(s3c64xx_spi0_resource),
1543 .resource = s3c64xx_spi0_resource,
1545 .dma_mask = &samsung_device_dma_mask,
1546 .coherent_dma_mask = DMA_BIT_MASK(32),
1550 void __init s3c64xx_spi0_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
1553 struct s3c64xx_spi_info pd;
1555 /* Reject invalid configuration */
1556 if (!num_cs || src_clk_nr < 0) {
1557 pr_err("%s: Invalid SPI configuration\n", __func__);
1562 pd.src_clk_nr = src_clk_nr;
1563 pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi0_cfg_gpio;
1565 s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi0);
1567 #endif /* CONFIG_S3C64XX_DEV_SPI0 */
1569 #ifdef CONFIG_S3C64XX_DEV_SPI1
1570 static struct resource s3c64xx_spi1_resource[] = {
1571 [0] = DEFINE_RES_MEM(S3C_PA_SPI1, SZ_256),
1572 [1] = DEFINE_RES_DMA(DMACH_SPI1_TX),
1573 [2] = DEFINE_RES_DMA(DMACH_SPI1_RX),
1574 [3] = DEFINE_RES_IRQ(IRQ_SPI1),
1577 struct platform_device s3c64xx_device_spi1 = {
1578 .name = "s3c6410-spi",
1580 .num_resources = ARRAY_SIZE(s3c64xx_spi1_resource),
1581 .resource = s3c64xx_spi1_resource,
1583 .dma_mask = &samsung_device_dma_mask,
1584 .coherent_dma_mask = DMA_BIT_MASK(32),
1588 void __init s3c64xx_spi1_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
1591 struct s3c64xx_spi_info pd;
1593 /* Reject invalid configuration */
1594 if (!num_cs || src_clk_nr < 0) {
1595 pr_err("%s: Invalid SPI configuration\n", __func__);
1600 pd.src_clk_nr = src_clk_nr;
1601 pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi1_cfg_gpio;
1603 s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi1);
1605 #endif /* CONFIG_S3C64XX_DEV_SPI1 */
1607 #ifdef CONFIG_S3C64XX_DEV_SPI2
1608 static struct resource s3c64xx_spi2_resource[] = {
1609 [0] = DEFINE_RES_MEM(S3C_PA_SPI2, SZ_256),
1610 [1] = DEFINE_RES_DMA(DMACH_SPI2_TX),
1611 [2] = DEFINE_RES_DMA(DMACH_SPI2_RX),
1612 [3] = DEFINE_RES_IRQ(IRQ_SPI2),
1615 struct platform_device s3c64xx_device_spi2 = {
1616 .name = "s3c6410-spi",
1618 .num_resources = ARRAY_SIZE(s3c64xx_spi2_resource),
1619 .resource = s3c64xx_spi2_resource,
1621 .dma_mask = &samsung_device_dma_mask,
1622 .coherent_dma_mask = DMA_BIT_MASK(32),
1626 void __init s3c64xx_spi2_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
1629 struct s3c64xx_spi_info pd;
1631 /* Reject invalid configuration */
1632 if (!num_cs || src_clk_nr < 0) {
1633 pr_err("%s: Invalid SPI configuration\n", __func__);
1638 pd.src_clk_nr = src_clk_nr;
1639 pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi2_cfg_gpio;
1641 s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi2);
1643 #endif /* CONFIG_S3C64XX_DEV_SPI2 */