1 /* linux/arch/arm/plat-samsung/devs.c
3 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
6 * Base SAMSUNG platform device definitions
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <linux/kernel.h>
14 #include <linux/types.h>
15 #include <linux/interrupt.h>
16 #include <linux/list.h>
17 #include <linux/timer.h>
18 #include <linux/init.h>
19 #include <linux/serial_core.h>
20 #include <linux/platform_device.h>
22 #include <linux/slab.h>
23 #include <linux/string.h>
24 #include <linux/dma-mapping.h>
26 #include <linux/gfp.h>
27 #include <linux/mtd/mtd.h>
28 #include <linux/mtd/onenand.h>
29 #include <linux/mtd/partitions.h>
30 #include <linux/mmc/host.h>
31 #include <linux/ioport.h>
32 #include <linux/platform_data/s3c-hsudc.h>
33 #include <linux/platform_data/s3c-hsotg.h>
35 #include <media/s5p_hdmi.h>
38 #include <asm/mach/arch.h>
39 #include <asm/mach/map.h>
40 #include <asm/mach/irq.h>
42 #include <mach/hardware.h>
44 #include <mach/irqs.h>
48 #include <plat/devs.h>
50 #include <linux/platform_data/ata-samsung_cf.h>
51 #include <linux/platform_data/usb-ehci-s5p.h>
53 #include <plat/fb-s3c2410.h>
54 #include <plat/hdmi.h>
55 #include <linux/platform_data/hwmon-s3c.h>
56 #include <linux/platform_data/i2c-s3c2410.h>
57 #include <plat/keypad.h>
58 #include <linux/platform_data/mmc-s3cmci.h>
59 #include <linux/platform_data/mtd-nand-s3c2410.h>
60 #include <plat/sdhci.h>
61 #include <linux/platform_data/touchscreen-s3c2410.h>
62 #include <linux/platform_data/usb-s3c2410_udc.h>
63 #include <linux/platform_data/usb-ohci-s3c2410.h>
64 #include <plat/usb-phy.h>
65 #include <plat/regs-iic.h>
66 #include <plat/regs-serial.h>
67 #include <plat/regs-spi.h>
68 #include <linux/platform_data/spi-s3c64xx.h>
70 static u64 samsung_device_dma_mask = DMA_BIT_MASK(32);
73 #ifdef CONFIG_CPU_S3C2440
74 static struct resource s3c_ac97_resource[] = {
75 [0] = DEFINE_RES_MEM(S3C2440_PA_AC97, S3C2440_SZ_AC97),
76 [1] = DEFINE_RES_IRQ(IRQ_S3C244X_AC97),
77 [2] = DEFINE_RES_DMA_NAMED(DMACH_PCM_OUT, "PCM out"),
78 [3] = DEFINE_RES_DMA_NAMED(DMACH_PCM_IN, "PCM in"),
79 [4] = DEFINE_RES_DMA_NAMED(DMACH_MIC_IN, "Mic in"),
82 struct platform_device s3c_device_ac97 = {
83 .name = "samsung-ac97",
85 .num_resources = ARRAY_SIZE(s3c_ac97_resource),
86 .resource = s3c_ac97_resource,
88 .dma_mask = &samsung_device_dma_mask,
89 .coherent_dma_mask = DMA_BIT_MASK(32),
92 #endif /* CONFIG_CPU_S3C2440 */
96 #ifdef CONFIG_PLAT_S3C24XX
97 static struct resource s3c_adc_resource[] = {
98 [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
99 [1] = DEFINE_RES_IRQ(IRQ_TC),
100 [2] = DEFINE_RES_IRQ(IRQ_ADC),
103 struct platform_device s3c_device_adc = {
104 .name = "s3c24xx-adc",
106 .num_resources = ARRAY_SIZE(s3c_adc_resource),
107 .resource = s3c_adc_resource,
109 #endif /* CONFIG_PLAT_S3C24XX */
111 #if defined(CONFIG_SAMSUNG_DEV_ADC)
112 static struct resource s3c_adc_resource[] = {
113 [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256),
114 [1] = DEFINE_RES_IRQ(IRQ_TC),
115 [2] = DEFINE_RES_IRQ(IRQ_ADC),
118 struct platform_device s3c_device_adc = {
119 .name = "samsung-adc",
121 .num_resources = ARRAY_SIZE(s3c_adc_resource),
122 .resource = s3c_adc_resource,
124 #endif /* CONFIG_SAMSUNG_DEV_ADC */
126 /* Camif Controller */
128 #ifdef CONFIG_CPU_S3C2440
129 static struct resource s3c_camif_resource[] = {
130 [0] = DEFINE_RES_MEM(S3C2440_PA_CAMIF, S3C2440_SZ_CAMIF),
131 [1] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_C),
132 [2] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_P),
135 struct platform_device s3c_device_camif = {
136 .name = "s3c2440-camif",
138 .num_resources = ARRAY_SIZE(s3c_camif_resource),
139 .resource = s3c_camif_resource,
141 .dma_mask = &samsung_device_dma_mask,
142 .coherent_dma_mask = DMA_BIT_MASK(32),
145 #endif /* CONFIG_CPU_S3C2440 */
149 struct platform_device samsung_asoc_dma = {
150 .name = "samsung-audio",
153 .dma_mask = &samsung_device_dma_mask,
154 .coherent_dma_mask = DMA_BIT_MASK(32),
158 struct platform_device samsung_asoc_idma = {
159 .name = "samsung-idma",
162 .dma_mask = &samsung_device_dma_mask,
163 .coherent_dma_mask = DMA_BIT_MASK(32),
169 #ifdef CONFIG_S3C_DEV_FB
170 static struct resource s3c_fb_resource[] = {
171 [0] = DEFINE_RES_MEM(S3C_PA_FB, SZ_16K),
172 [1] = DEFINE_RES_IRQ(IRQ_LCD_VSYNC),
173 [2] = DEFINE_RES_IRQ(IRQ_LCD_FIFO),
174 [3] = DEFINE_RES_IRQ(IRQ_LCD_SYSTEM),
177 struct platform_device s3c_device_fb = {
180 .num_resources = ARRAY_SIZE(s3c_fb_resource),
181 .resource = s3c_fb_resource,
183 .dma_mask = &samsung_device_dma_mask,
184 .coherent_dma_mask = DMA_BIT_MASK(32),
188 void __init s3c_fb_set_platdata(struct s3c_fb_platdata *pd)
190 s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
193 #endif /* CONFIG_S3C_DEV_FB */
197 #ifdef CONFIG_S5P_DEV_FIMC0
198 static struct resource s5p_fimc0_resource[] = {
199 [0] = DEFINE_RES_MEM(S5P_PA_FIMC0, SZ_4K),
200 [1] = DEFINE_RES_IRQ(IRQ_FIMC0),
203 struct platform_device s5p_device_fimc0 = {
206 .num_resources = ARRAY_SIZE(s5p_fimc0_resource),
207 .resource = s5p_fimc0_resource,
209 .dma_mask = &samsung_device_dma_mask,
210 .coherent_dma_mask = DMA_BIT_MASK(32),
214 struct platform_device s5p_device_fimc_md = {
215 .name = "s5p-fimc-md",
218 #endif /* CONFIG_S5P_DEV_FIMC0 */
220 #ifdef CONFIG_S5P_DEV_FIMC1
221 static struct resource s5p_fimc1_resource[] = {
222 [0] = DEFINE_RES_MEM(S5P_PA_FIMC1, SZ_4K),
223 [1] = DEFINE_RES_IRQ(IRQ_FIMC1),
226 struct platform_device s5p_device_fimc1 = {
229 .num_resources = ARRAY_SIZE(s5p_fimc1_resource),
230 .resource = s5p_fimc1_resource,
232 .dma_mask = &samsung_device_dma_mask,
233 .coherent_dma_mask = DMA_BIT_MASK(32),
236 #endif /* CONFIG_S5P_DEV_FIMC1 */
238 #ifdef CONFIG_S5P_DEV_FIMC2
239 static struct resource s5p_fimc2_resource[] = {
240 [0] = DEFINE_RES_MEM(S5P_PA_FIMC2, SZ_4K),
241 [1] = DEFINE_RES_IRQ(IRQ_FIMC2),
244 struct platform_device s5p_device_fimc2 = {
247 .num_resources = ARRAY_SIZE(s5p_fimc2_resource),
248 .resource = s5p_fimc2_resource,
250 .dma_mask = &samsung_device_dma_mask,
251 .coherent_dma_mask = DMA_BIT_MASK(32),
254 #endif /* CONFIG_S5P_DEV_FIMC2 */
256 #ifdef CONFIG_S5P_DEV_FIMC3
257 static struct resource s5p_fimc3_resource[] = {
258 [0] = DEFINE_RES_MEM(S5P_PA_FIMC3, SZ_4K),
259 [1] = DEFINE_RES_IRQ(IRQ_FIMC3),
262 struct platform_device s5p_device_fimc3 = {
265 .num_resources = ARRAY_SIZE(s5p_fimc3_resource),
266 .resource = s5p_fimc3_resource,
268 .dma_mask = &samsung_device_dma_mask,
269 .coherent_dma_mask = DMA_BIT_MASK(32),
272 #endif /* CONFIG_S5P_DEV_FIMC3 */
276 #ifdef CONFIG_S5P_DEV_G2D
277 static struct resource s5p_g2d_resource[] = {
278 [0] = DEFINE_RES_MEM(S5P_PA_G2D, SZ_4K),
279 [1] = DEFINE_RES_IRQ(IRQ_2D),
282 struct platform_device s5p_device_g2d = {
285 .num_resources = ARRAY_SIZE(s5p_g2d_resource),
286 .resource = s5p_g2d_resource,
288 .dma_mask = &samsung_device_dma_mask,
289 .coherent_dma_mask = DMA_BIT_MASK(32),
292 #endif /* CONFIG_S5P_DEV_G2D */
294 #ifdef CONFIG_S5P_DEV_JPEG
295 static struct resource s5p_jpeg_resource[] = {
296 [0] = DEFINE_RES_MEM(S5P_PA_JPEG, SZ_4K),
297 [1] = DEFINE_RES_IRQ(IRQ_JPEG),
300 struct platform_device s5p_device_jpeg = {
303 .num_resources = ARRAY_SIZE(s5p_jpeg_resource),
304 .resource = s5p_jpeg_resource,
306 .dma_mask = &samsung_device_dma_mask,
307 .coherent_dma_mask = DMA_BIT_MASK(32),
310 #endif /* CONFIG_S5P_DEV_JPEG */
314 #ifdef CONFIG_S5P_DEV_FIMD0
315 static struct resource s5p_fimd0_resource[] = {
316 [0] = DEFINE_RES_MEM(S5P_PA_FIMD0, SZ_32K),
317 [1] = DEFINE_RES_IRQ(IRQ_FIMD0_VSYNC),
318 [2] = DEFINE_RES_IRQ(IRQ_FIMD0_FIFO),
319 [3] = DEFINE_RES_IRQ(IRQ_FIMD0_SYSTEM),
322 struct platform_device s5p_device_fimd0 = {
325 .num_resources = ARRAY_SIZE(s5p_fimd0_resource),
326 .resource = s5p_fimd0_resource,
328 .dma_mask = &samsung_device_dma_mask,
329 .coherent_dma_mask = DMA_BIT_MASK(32),
333 void __init s5p_fimd0_set_platdata(struct s3c_fb_platdata *pd)
335 s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
338 #endif /* CONFIG_S5P_DEV_FIMD0 */
342 #ifdef CONFIG_S3C_DEV_HWMON
343 struct platform_device s3c_device_hwmon = {
346 .dev.parent = &s3c_device_adc.dev,
349 void __init s3c_hwmon_set_platdata(struct s3c_hwmon_pdata *pd)
351 s3c_set_platdata(pd, sizeof(struct s3c_hwmon_pdata),
354 #endif /* CONFIG_S3C_DEV_HWMON */
358 #ifdef CONFIG_S3C_DEV_HSMMC
359 static struct resource s3c_hsmmc_resource[] = {
360 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC0, SZ_4K),
361 [1] = DEFINE_RES_IRQ(IRQ_HSMMC0),
364 struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata = {
366 .host_caps = (MMC_CAP_4_BIT_DATA |
367 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
370 struct platform_device s3c_device_hsmmc0 = {
373 .num_resources = ARRAY_SIZE(s3c_hsmmc_resource),
374 .resource = s3c_hsmmc_resource,
376 .dma_mask = &samsung_device_dma_mask,
377 .coherent_dma_mask = DMA_BIT_MASK(32),
378 .platform_data = &s3c_hsmmc0_def_platdata,
382 void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd)
384 s3c_sdhci_set_platdata(pd, &s3c_hsmmc0_def_platdata);
386 #endif /* CONFIG_S3C_DEV_HSMMC */
388 #ifdef CONFIG_S3C_DEV_HSMMC1
389 static struct resource s3c_hsmmc1_resource[] = {
390 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC1, SZ_4K),
391 [1] = DEFINE_RES_IRQ(IRQ_HSMMC1),
394 struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata = {
396 .host_caps = (MMC_CAP_4_BIT_DATA |
397 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
400 struct platform_device s3c_device_hsmmc1 = {
403 .num_resources = ARRAY_SIZE(s3c_hsmmc1_resource),
404 .resource = s3c_hsmmc1_resource,
406 .dma_mask = &samsung_device_dma_mask,
407 .coherent_dma_mask = DMA_BIT_MASK(32),
408 .platform_data = &s3c_hsmmc1_def_platdata,
412 void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd)
414 s3c_sdhci_set_platdata(pd, &s3c_hsmmc1_def_platdata);
416 #endif /* CONFIG_S3C_DEV_HSMMC1 */
420 #ifdef CONFIG_S3C_DEV_HSMMC2
421 static struct resource s3c_hsmmc2_resource[] = {
422 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC2, SZ_4K),
423 [1] = DEFINE_RES_IRQ(IRQ_HSMMC2),
426 struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata = {
428 .host_caps = (MMC_CAP_4_BIT_DATA |
429 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
432 struct platform_device s3c_device_hsmmc2 = {
435 .num_resources = ARRAY_SIZE(s3c_hsmmc2_resource),
436 .resource = s3c_hsmmc2_resource,
438 .dma_mask = &samsung_device_dma_mask,
439 .coherent_dma_mask = DMA_BIT_MASK(32),
440 .platform_data = &s3c_hsmmc2_def_platdata,
444 void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd)
446 s3c_sdhci_set_platdata(pd, &s3c_hsmmc2_def_platdata);
448 #endif /* CONFIG_S3C_DEV_HSMMC2 */
450 #ifdef CONFIG_S3C_DEV_HSMMC3
451 static struct resource s3c_hsmmc3_resource[] = {
452 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC3, SZ_4K),
453 [1] = DEFINE_RES_IRQ(IRQ_HSMMC3),
456 struct s3c_sdhci_platdata s3c_hsmmc3_def_platdata = {
458 .host_caps = (MMC_CAP_4_BIT_DATA |
459 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
462 struct platform_device s3c_device_hsmmc3 = {
465 .num_resources = ARRAY_SIZE(s3c_hsmmc3_resource),
466 .resource = s3c_hsmmc3_resource,
468 .dma_mask = &samsung_device_dma_mask,
469 .coherent_dma_mask = DMA_BIT_MASK(32),
470 .platform_data = &s3c_hsmmc3_def_platdata,
474 void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata *pd)
476 s3c_sdhci_set_platdata(pd, &s3c_hsmmc3_def_platdata);
478 #endif /* CONFIG_S3C_DEV_HSMMC3 */
482 static struct resource s3c_i2c0_resource[] = {
483 [0] = DEFINE_RES_MEM(S3C_PA_IIC, SZ_4K),
484 [1] = DEFINE_RES_IRQ(IRQ_IIC),
487 struct platform_device s3c_device_i2c0 = {
488 .name = "s3c2410-i2c",
490 .num_resources = ARRAY_SIZE(s3c_i2c0_resource),
491 .resource = s3c_i2c0_resource,
494 struct s3c2410_platform_i2c default_i2c_data __initdata = {
497 .frequency = 100*1000,
501 void __init s3c_i2c0_set_platdata(struct s3c2410_platform_i2c *pd)
503 struct s3c2410_platform_i2c *npd;
506 pd = &default_i2c_data;
510 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
514 npd->cfg_gpio = s3c_i2c0_cfg_gpio;
517 #ifdef CONFIG_S3C_DEV_I2C1
518 static struct resource s3c_i2c1_resource[] = {
519 [0] = DEFINE_RES_MEM(S3C_PA_IIC1, SZ_4K),
520 [1] = DEFINE_RES_IRQ(IRQ_IIC1),
523 struct platform_device s3c_device_i2c1 = {
524 .name = "s3c2410-i2c",
526 .num_resources = ARRAY_SIZE(s3c_i2c1_resource),
527 .resource = s3c_i2c1_resource,
530 void __init s3c_i2c1_set_platdata(struct s3c2410_platform_i2c *pd)
532 struct s3c2410_platform_i2c *npd;
535 pd = &default_i2c_data;
539 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
543 npd->cfg_gpio = s3c_i2c1_cfg_gpio;
545 #endif /* CONFIG_S3C_DEV_I2C1 */
547 #ifdef CONFIG_S3C_DEV_I2C2
548 static struct resource s3c_i2c2_resource[] = {
549 [0] = DEFINE_RES_MEM(S3C_PA_IIC2, SZ_4K),
550 [1] = DEFINE_RES_IRQ(IRQ_IIC2),
553 struct platform_device s3c_device_i2c2 = {
554 .name = "s3c2410-i2c",
556 .num_resources = ARRAY_SIZE(s3c_i2c2_resource),
557 .resource = s3c_i2c2_resource,
560 void __init s3c_i2c2_set_platdata(struct s3c2410_platform_i2c *pd)
562 struct s3c2410_platform_i2c *npd;
565 pd = &default_i2c_data;
569 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
573 npd->cfg_gpio = s3c_i2c2_cfg_gpio;
575 #endif /* CONFIG_S3C_DEV_I2C2 */
577 #ifdef CONFIG_S3C_DEV_I2C3
578 static struct resource s3c_i2c3_resource[] = {
579 [0] = DEFINE_RES_MEM(S3C_PA_IIC3, SZ_4K),
580 [1] = DEFINE_RES_IRQ(IRQ_IIC3),
583 struct platform_device s3c_device_i2c3 = {
584 .name = "s3c2440-i2c",
586 .num_resources = ARRAY_SIZE(s3c_i2c3_resource),
587 .resource = s3c_i2c3_resource,
590 void __init s3c_i2c3_set_platdata(struct s3c2410_platform_i2c *pd)
592 struct s3c2410_platform_i2c *npd;
595 pd = &default_i2c_data;
599 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
603 npd->cfg_gpio = s3c_i2c3_cfg_gpio;
605 #endif /*CONFIG_S3C_DEV_I2C3 */
607 #ifdef CONFIG_S3C_DEV_I2C4
608 static struct resource s3c_i2c4_resource[] = {
609 [0] = DEFINE_RES_MEM(S3C_PA_IIC4, SZ_4K),
610 [1] = DEFINE_RES_IRQ(IRQ_IIC4),
613 struct platform_device s3c_device_i2c4 = {
614 .name = "s3c2440-i2c",
616 .num_resources = ARRAY_SIZE(s3c_i2c4_resource),
617 .resource = s3c_i2c4_resource,
620 void __init s3c_i2c4_set_platdata(struct s3c2410_platform_i2c *pd)
622 struct s3c2410_platform_i2c *npd;
625 pd = &default_i2c_data;
629 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
633 npd->cfg_gpio = s3c_i2c4_cfg_gpio;
635 #endif /*CONFIG_S3C_DEV_I2C4 */
637 #ifdef CONFIG_S3C_DEV_I2C5
638 static struct resource s3c_i2c5_resource[] = {
639 [0] = DEFINE_RES_MEM(S3C_PA_IIC5, SZ_4K),
640 [1] = DEFINE_RES_IRQ(IRQ_IIC5),
643 struct platform_device s3c_device_i2c5 = {
644 .name = "s3c2440-i2c",
646 .num_resources = ARRAY_SIZE(s3c_i2c5_resource),
647 .resource = s3c_i2c5_resource,
650 void __init s3c_i2c5_set_platdata(struct s3c2410_platform_i2c *pd)
652 struct s3c2410_platform_i2c *npd;
655 pd = &default_i2c_data;
659 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
663 npd->cfg_gpio = s3c_i2c5_cfg_gpio;
665 #endif /*CONFIG_S3C_DEV_I2C5 */
667 #ifdef CONFIG_S3C_DEV_I2C6
668 static struct resource s3c_i2c6_resource[] = {
669 [0] = DEFINE_RES_MEM(S3C_PA_IIC6, SZ_4K),
670 [1] = DEFINE_RES_IRQ(IRQ_IIC6),
673 struct platform_device s3c_device_i2c6 = {
674 .name = "s3c2440-i2c",
676 .num_resources = ARRAY_SIZE(s3c_i2c6_resource),
677 .resource = s3c_i2c6_resource,
680 void __init s3c_i2c6_set_platdata(struct s3c2410_platform_i2c *pd)
682 struct s3c2410_platform_i2c *npd;
685 pd = &default_i2c_data;
689 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
693 npd->cfg_gpio = s3c_i2c6_cfg_gpio;
695 #endif /* CONFIG_S3C_DEV_I2C6 */
697 #ifdef CONFIG_S3C_DEV_I2C7
698 static struct resource s3c_i2c7_resource[] = {
699 [0] = DEFINE_RES_MEM(S3C_PA_IIC7, SZ_4K),
700 [1] = DEFINE_RES_IRQ(IRQ_IIC7),
703 struct platform_device s3c_device_i2c7 = {
704 .name = "s3c2440-i2c",
706 .num_resources = ARRAY_SIZE(s3c_i2c7_resource),
707 .resource = s3c_i2c7_resource,
710 void __init s3c_i2c7_set_platdata(struct s3c2410_platform_i2c *pd)
712 struct s3c2410_platform_i2c *npd;
715 pd = &default_i2c_data;
719 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
723 npd->cfg_gpio = s3c_i2c7_cfg_gpio;
725 #endif /* CONFIG_S3C_DEV_I2C7 */
729 #ifdef CONFIG_S5P_DEV_I2C_HDMIPHY
730 static struct resource s5p_i2c_resource[] = {
731 [0] = DEFINE_RES_MEM(S5P_PA_IIC_HDMIPHY, SZ_4K),
732 [1] = DEFINE_RES_IRQ(IRQ_IIC_HDMIPHY),
735 struct platform_device s5p_device_i2c_hdmiphy = {
736 .name = "s3c2440-hdmiphy-i2c",
738 .num_resources = ARRAY_SIZE(s5p_i2c_resource),
739 .resource = s5p_i2c_resource,
742 void __init s5p_i2c_hdmiphy_set_platdata(struct s3c2410_platform_i2c *pd)
744 struct s3c2410_platform_i2c *npd;
747 pd = &default_i2c_data;
749 if (soc_is_exynos4210() ||
750 soc_is_exynos4212() || soc_is_exynos4412())
752 else if (soc_is_s5pv210())
758 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
759 &s5p_device_i2c_hdmiphy);
762 static struct s5p_hdmi_platform_data s5p_hdmi_def_platdata;
764 void __init s5p_hdmi_set_platdata(struct i2c_board_info *hdmiphy_info,
765 struct i2c_board_info *mhl_info, int mhl_bus)
767 struct s5p_hdmi_platform_data *pd = &s5p_hdmi_def_platdata;
769 if (soc_is_exynos4210() ||
770 soc_is_exynos4212() || soc_is_exynos4412())
772 else if (soc_is_s5pv210())
777 pd->hdmiphy_info = hdmiphy_info;
778 pd->mhl_info = mhl_info;
779 pd->mhl_bus = mhl_bus;
781 s3c_set_platdata(pd, sizeof(struct s5p_hdmi_platform_data),
785 #endif /* CONFIG_S5P_DEV_I2C_HDMIPHY */
789 #ifdef CONFIG_PLAT_S3C24XX
790 static struct resource s3c_iis_resource[] = {
791 [0] = DEFINE_RES_MEM(S3C24XX_PA_IIS, S3C24XX_SZ_IIS),
794 struct platform_device s3c_device_iis = {
795 .name = "s3c24xx-iis",
797 .num_resources = ARRAY_SIZE(s3c_iis_resource),
798 .resource = s3c_iis_resource,
800 .dma_mask = &samsung_device_dma_mask,
801 .coherent_dma_mask = DMA_BIT_MASK(32),
804 #endif /* CONFIG_PLAT_S3C24XX */
808 #ifdef CONFIG_SAMSUNG_DEV_IDE
809 static struct resource s3c_cfcon_resource[] = {
810 [0] = DEFINE_RES_MEM(SAMSUNG_PA_CFCON, SZ_16K),
811 [1] = DEFINE_RES_IRQ(IRQ_CFCON),
814 struct platform_device s3c_device_cfcon = {
816 .num_resources = ARRAY_SIZE(s3c_cfcon_resource),
817 .resource = s3c_cfcon_resource,
820 void __init s3c_ide_set_platdata(struct s3c_ide_platdata *pdata)
822 s3c_set_platdata(pdata, sizeof(struct s3c_ide_platdata),
825 #endif /* CONFIG_SAMSUNG_DEV_IDE */
829 #ifdef CONFIG_SAMSUNG_DEV_KEYPAD
830 static struct resource samsung_keypad_resources[] = {
831 [0] = DEFINE_RES_MEM(SAMSUNG_PA_KEYPAD, SZ_32),
832 [1] = DEFINE_RES_IRQ(IRQ_KEYPAD),
835 struct platform_device samsung_device_keypad = {
836 .name = "samsung-keypad",
838 .num_resources = ARRAY_SIZE(samsung_keypad_resources),
839 .resource = samsung_keypad_resources,
842 void __init samsung_keypad_set_platdata(struct samsung_keypad_platdata *pd)
844 struct samsung_keypad_platdata *npd;
846 npd = s3c_set_platdata(pd, sizeof(struct samsung_keypad_platdata),
847 &samsung_device_keypad);
850 npd->cfg_gpio = samsung_keypad_cfg_gpio;
852 #endif /* CONFIG_SAMSUNG_DEV_KEYPAD */
856 #ifdef CONFIG_PLAT_S3C24XX
857 static struct resource s3c_lcd_resource[] = {
858 [0] = DEFINE_RES_MEM(S3C24XX_PA_LCD, S3C24XX_SZ_LCD),
859 [1] = DEFINE_RES_IRQ(IRQ_LCD),
862 struct platform_device s3c_device_lcd = {
863 .name = "s3c2410-lcd",
865 .num_resources = ARRAY_SIZE(s3c_lcd_resource),
866 .resource = s3c_lcd_resource,
868 .dma_mask = &samsung_device_dma_mask,
869 .coherent_dma_mask = DMA_BIT_MASK(32),
873 void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd)
875 struct s3c2410fb_mach_info *npd;
877 npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_lcd);
879 npd->displays = kmemdup(pd->displays,
880 sizeof(struct s3c2410fb_display) * npd->num_displays,
883 printk(KERN_ERR "no memory for LCD display data\n");
885 printk(KERN_ERR "no memory for LCD platform data\n");
888 #endif /* CONFIG_PLAT_S3C24XX */
892 #ifdef CONFIG_S5P_DEV_MFC
893 static struct resource s5p_mfc_resource[] = {
894 [0] = DEFINE_RES_MEM(S5P_PA_MFC, SZ_64K),
895 [1] = DEFINE_RES_IRQ(IRQ_MFC),
898 struct platform_device s5p_device_mfc = {
901 .num_resources = ARRAY_SIZE(s5p_mfc_resource),
902 .resource = s5p_mfc_resource,
906 * MFC hardware has 2 memory interfaces which are modelled as two separate
907 * platform devices to let dma-mapping distinguish between them.
909 * MFC parent device (s5p_device_mfc) must be registered before memory
910 * interface specific devices (s5p_device_mfc_l and s5p_device_mfc_r).
913 struct platform_device s5p_device_mfc_l = {
917 .parent = &s5p_device_mfc.dev,
918 .dma_mask = &samsung_device_dma_mask,
919 .coherent_dma_mask = DMA_BIT_MASK(32),
923 struct platform_device s5p_device_mfc_r = {
927 .parent = &s5p_device_mfc.dev,
928 .dma_mask = &samsung_device_dma_mask,
929 .coherent_dma_mask = DMA_BIT_MASK(32),
932 #endif /* CONFIG_S5P_DEV_MFC */
936 #ifdef CONFIG_S5P_DEV_CSIS0
937 static struct resource s5p_mipi_csis0_resource[] = {
938 [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS0, SZ_16K),
939 [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS0),
942 struct platform_device s5p_device_mipi_csis0 = {
943 .name = "s5p-mipi-csis",
945 .num_resources = ARRAY_SIZE(s5p_mipi_csis0_resource),
946 .resource = s5p_mipi_csis0_resource,
948 #endif /* CONFIG_S5P_DEV_CSIS0 */
950 #ifdef CONFIG_S5P_DEV_CSIS1
951 static struct resource s5p_mipi_csis1_resource[] = {
952 [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS1, SZ_16K),
953 [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS1),
956 struct platform_device s5p_device_mipi_csis1 = {
957 .name = "s5p-mipi-csis",
959 .num_resources = ARRAY_SIZE(s5p_mipi_csis1_resource),
960 .resource = s5p_mipi_csis1_resource,
966 #ifdef CONFIG_S3C_DEV_NAND
967 static struct resource s3c_nand_resource[] = {
968 [0] = DEFINE_RES_MEM(S3C_PA_NAND, SZ_1M),
971 struct platform_device s3c_device_nand = {
972 .name = "s3c2410-nand",
974 .num_resources = ARRAY_SIZE(s3c_nand_resource),
975 .resource = s3c_nand_resource,
979 * s3c_nand_copy_set() - copy nand set data
980 * @set: The new structure, directly copied from the old.
982 * Copy all the fields from the NAND set field from what is probably __initdata
983 * to new kernel memory. The code returns 0 if the copy happened correctly or
984 * an error code for the calling function to display.
986 * Note, we currently do not try and look to see if we've already copied the
987 * data in a previous set.
989 static int __init s3c_nand_copy_set(struct s3c2410_nand_set *set)
994 size = sizeof(struct mtd_partition) * set->nr_partitions;
996 ptr = kmemdup(set->partitions, size, GFP_KERNEL);
997 set->partitions = ptr;
1003 if (set->nr_map && set->nr_chips) {
1004 size = sizeof(int) * set->nr_chips;
1005 ptr = kmemdup(set->nr_map, size, GFP_KERNEL);
1012 if (set->ecc_layout) {
1013 ptr = kmemdup(set->ecc_layout,
1014 sizeof(struct nand_ecclayout), GFP_KERNEL);
1015 set->ecc_layout = ptr;
1024 void __init s3c_nand_set_platdata(struct s3c2410_platform_nand *nand)
1026 struct s3c2410_platform_nand *npd;
1030 /* note, if we get a failure in allocation, we simply drop out of the
1031 * function. If there is so little memory available at initialisation
1032 * time then there is little chance the system is going to run.
1035 npd = s3c_set_platdata(nand, sizeof(struct s3c2410_platform_nand),
1040 /* now see if we need to copy any of the nand set data */
1042 size = sizeof(struct s3c2410_nand_set) * npd->nr_sets;
1044 struct s3c2410_nand_set *from = npd->sets;
1045 struct s3c2410_nand_set *to;
1048 to = kmemdup(from, size, GFP_KERNEL);
1049 npd->sets = to; /* set, even if we failed */
1052 printk(KERN_ERR "%s: no memory for sets\n", __func__);
1056 for (i = 0; i < npd->nr_sets; i++) {
1057 ret = s3c_nand_copy_set(to);
1059 printk(KERN_ERR "%s: failed to copy set %d\n",
1067 #endif /* CONFIG_S3C_DEV_NAND */
1071 #ifdef CONFIG_S3C_DEV_ONENAND
1072 static struct resource s3c_onenand_resources[] = {
1073 [0] = DEFINE_RES_MEM(S3C_PA_ONENAND, SZ_1K),
1074 [1] = DEFINE_RES_MEM(S3C_PA_ONENAND_BUF, S3C_SZ_ONENAND_BUF),
1075 [2] = DEFINE_RES_IRQ(IRQ_ONENAND),
1078 struct platform_device s3c_device_onenand = {
1079 .name = "samsung-onenand",
1081 .num_resources = ARRAY_SIZE(s3c_onenand_resources),
1082 .resource = s3c_onenand_resources,
1084 #endif /* CONFIG_S3C_DEV_ONENAND */
1086 #ifdef CONFIG_S3C64XX_DEV_ONENAND1
1087 static struct resource s3c64xx_onenand1_resources[] = {
1088 [0] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1, SZ_1K),
1089 [1] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1_BUF, S3C64XX_SZ_ONENAND1_BUF),
1090 [2] = DEFINE_RES_IRQ(IRQ_ONENAND1),
1093 struct platform_device s3c64xx_device_onenand1 = {
1094 .name = "samsung-onenand",
1096 .num_resources = ARRAY_SIZE(s3c64xx_onenand1_resources),
1097 .resource = s3c64xx_onenand1_resources,
1100 void __init s3c64xx_onenand1_set_platdata(struct onenand_platform_data *pdata)
1102 s3c_set_platdata(pdata, sizeof(struct onenand_platform_data),
1103 &s3c64xx_device_onenand1);
1105 #endif /* CONFIG_S3C64XX_DEV_ONENAND1 */
1107 #ifdef CONFIG_S5P_DEV_ONENAND
1108 static struct resource s5p_onenand_resources[] = {
1109 [0] = DEFINE_RES_MEM(S5P_PA_ONENAND, SZ_128K),
1110 [1] = DEFINE_RES_MEM(S5P_PA_ONENAND_DMA, SZ_8K),
1111 [2] = DEFINE_RES_IRQ(IRQ_ONENAND_AUDI),
1114 struct platform_device s5p_device_onenand = {
1115 .name = "s5pc110-onenand",
1117 .num_resources = ARRAY_SIZE(s5p_onenand_resources),
1118 .resource = s5p_onenand_resources,
1120 #endif /* CONFIG_S5P_DEV_ONENAND */
1124 #ifdef CONFIG_PLAT_S5P
1125 static struct resource s5p_pmu_resource[] = {
1126 DEFINE_RES_IRQ(IRQ_PMU)
1129 static struct platform_device s5p_device_pmu = {
1132 .num_resources = ARRAY_SIZE(s5p_pmu_resource),
1133 .resource = s5p_pmu_resource,
1136 static int __init s5p_pmu_init(void)
1138 platform_device_register(&s5p_device_pmu);
1141 arch_initcall(s5p_pmu_init);
1142 #endif /* CONFIG_PLAT_S5P */
1146 #ifdef CONFIG_SAMSUNG_DEV_PWM
1148 #define TIMER_RESOURCE_SIZE (1)
1150 #define TIMER_RESOURCE(_tmr, _irq) \
1151 (struct resource [TIMER_RESOURCE_SIZE]) { \
1155 .flags = IORESOURCE_IRQ \
1159 #define DEFINE_S3C_TIMER(_tmr_no, _irq) \
1160 .name = "s3c24xx-pwm", \
1162 .num_resources = TIMER_RESOURCE_SIZE, \
1163 .resource = TIMER_RESOURCE(_tmr_no, _irq), \
1166 * since we already have an static mapping for the timer,
1167 * we do not bother setting any IO resource for the base.
1170 struct platform_device s3c_device_timer[] = {
1171 [0] = { DEFINE_S3C_TIMER(0, IRQ_TIMER0) },
1172 [1] = { DEFINE_S3C_TIMER(1, IRQ_TIMER1) },
1173 [2] = { DEFINE_S3C_TIMER(2, IRQ_TIMER2) },
1174 [3] = { DEFINE_S3C_TIMER(3, IRQ_TIMER3) },
1175 [4] = { DEFINE_S3C_TIMER(4, IRQ_TIMER4) },
1177 #endif /* CONFIG_SAMSUNG_DEV_PWM */
1181 #ifdef CONFIG_PLAT_S3C24XX
1182 static struct resource s3c_rtc_resource[] = {
1183 [0] = DEFINE_RES_MEM(S3C24XX_PA_RTC, SZ_256),
1184 [1] = DEFINE_RES_IRQ(IRQ_RTC),
1185 [2] = DEFINE_RES_IRQ(IRQ_TICK),
1188 struct platform_device s3c_device_rtc = {
1189 .name = "s3c2410-rtc",
1191 .num_resources = ARRAY_SIZE(s3c_rtc_resource),
1192 .resource = s3c_rtc_resource,
1194 #endif /* CONFIG_PLAT_S3C24XX */
1196 #ifdef CONFIG_S3C_DEV_RTC
1197 static struct resource s3c_rtc_resource[] = {
1198 [0] = DEFINE_RES_MEM(S3C_PA_RTC, SZ_256),
1199 [1] = DEFINE_RES_IRQ(IRQ_RTC_ALARM),
1200 [2] = DEFINE_RES_IRQ(IRQ_RTC_TIC),
1203 struct platform_device s3c_device_rtc = {
1204 .name = "s3c64xx-rtc",
1206 .num_resources = ARRAY_SIZE(s3c_rtc_resource),
1207 .resource = s3c_rtc_resource,
1209 #endif /* CONFIG_S3C_DEV_RTC */
1213 #ifdef CONFIG_PLAT_S3C24XX
1214 static struct resource s3c_sdi_resource[] = {
1215 [0] = DEFINE_RES_MEM(S3C24XX_PA_SDI, S3C24XX_SZ_SDI),
1216 [1] = DEFINE_RES_IRQ(IRQ_SDI),
1219 struct platform_device s3c_device_sdi = {
1220 .name = "s3c2410-sdi",
1222 .num_resources = ARRAY_SIZE(s3c_sdi_resource),
1223 .resource = s3c_sdi_resource,
1226 void __init s3c24xx_mci_set_platdata(struct s3c24xx_mci_pdata *pdata)
1228 s3c_set_platdata(pdata, sizeof(struct s3c24xx_mci_pdata),
1231 #endif /* CONFIG_PLAT_S3C24XX */
1235 #ifdef CONFIG_PLAT_S3C24XX
1236 static struct resource s3c_spi0_resource[] = {
1237 [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI, SZ_32),
1238 [1] = DEFINE_RES_IRQ(IRQ_SPI0),
1241 struct platform_device s3c_device_spi0 = {
1242 .name = "s3c2410-spi",
1244 .num_resources = ARRAY_SIZE(s3c_spi0_resource),
1245 .resource = s3c_spi0_resource,
1247 .dma_mask = &samsung_device_dma_mask,
1248 .coherent_dma_mask = DMA_BIT_MASK(32),
1252 static struct resource s3c_spi1_resource[] = {
1253 [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI1, SZ_32),
1254 [1] = DEFINE_RES_IRQ(IRQ_SPI1),
1257 struct platform_device s3c_device_spi1 = {
1258 .name = "s3c2410-spi",
1260 .num_resources = ARRAY_SIZE(s3c_spi1_resource),
1261 .resource = s3c_spi1_resource,
1263 .dma_mask = &samsung_device_dma_mask,
1264 .coherent_dma_mask = DMA_BIT_MASK(32),
1267 #endif /* CONFIG_PLAT_S3C24XX */
1271 #ifdef CONFIG_PLAT_S3C24XX
1272 static struct resource s3c_ts_resource[] = {
1273 [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
1274 [1] = DEFINE_RES_IRQ(IRQ_TC),
1277 struct platform_device s3c_device_ts = {
1278 .name = "s3c2410-ts",
1280 .dev.parent = &s3c_device_adc.dev,
1281 .num_resources = ARRAY_SIZE(s3c_ts_resource),
1282 .resource = s3c_ts_resource,
1285 void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *hard_s3c2410ts_info)
1287 s3c_set_platdata(hard_s3c2410ts_info,
1288 sizeof(struct s3c2410_ts_mach_info), &s3c_device_ts);
1290 #endif /* CONFIG_PLAT_S3C24XX */
1292 #ifdef CONFIG_SAMSUNG_DEV_TS
1293 static struct resource s3c_ts_resource[] = {
1294 [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256),
1295 [1] = DEFINE_RES_IRQ(IRQ_TC),
1298 static struct s3c2410_ts_mach_info default_ts_data __initdata = {
1301 .oversampling_shift = 2,
1304 struct platform_device s3c_device_ts = {
1305 .name = "s3c64xx-ts",
1307 .num_resources = ARRAY_SIZE(s3c_ts_resource),
1308 .resource = s3c_ts_resource,
1311 void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *pd)
1314 pd = &default_ts_data;
1316 s3c_set_platdata(pd, sizeof(struct s3c2410_ts_mach_info),
1319 #endif /* CONFIG_SAMSUNG_DEV_TS */
1323 #ifdef CONFIG_S5P_DEV_TV
1325 static struct resource s5p_hdmi_resources[] = {
1326 [0] = DEFINE_RES_MEM(S5P_PA_HDMI, SZ_1M),
1327 [1] = DEFINE_RES_IRQ(IRQ_HDMI),
1330 struct platform_device s5p_device_hdmi = {
1333 .num_resources = ARRAY_SIZE(s5p_hdmi_resources),
1334 .resource = s5p_hdmi_resources,
1337 static struct resource s5p_sdo_resources[] = {
1338 [0] = DEFINE_RES_MEM(S5P_PA_SDO, SZ_64K),
1339 [1] = DEFINE_RES_IRQ(IRQ_SDO),
1342 struct platform_device s5p_device_sdo = {
1345 .num_resources = ARRAY_SIZE(s5p_sdo_resources),
1346 .resource = s5p_sdo_resources,
1349 static struct resource s5p_mixer_resources[] = {
1350 [0] = DEFINE_RES_MEM_NAMED(S5P_PA_MIXER, SZ_64K, "mxr"),
1351 [1] = DEFINE_RES_MEM_NAMED(S5P_PA_VP, SZ_64K, "vp"),
1352 [2] = DEFINE_RES_IRQ_NAMED(IRQ_MIXER, "irq"),
1355 struct platform_device s5p_device_mixer = {
1356 .name = "s5p-mixer",
1358 .num_resources = ARRAY_SIZE(s5p_mixer_resources),
1359 .resource = s5p_mixer_resources,
1361 .dma_mask = &samsung_device_dma_mask,
1362 .coherent_dma_mask = DMA_BIT_MASK(32),
1365 #endif /* CONFIG_S5P_DEV_TV */
1369 #ifdef CONFIG_S3C_DEV_USB_HOST
1370 static struct resource s3c_usb_resource[] = {
1371 [0] = DEFINE_RES_MEM(S3C_PA_USBHOST, SZ_256),
1372 [1] = DEFINE_RES_IRQ(IRQ_USBH),
1375 struct platform_device s3c_device_ohci = {
1376 .name = "s3c2410-ohci",
1378 .num_resources = ARRAY_SIZE(s3c_usb_resource),
1379 .resource = s3c_usb_resource,
1381 .dma_mask = &samsung_device_dma_mask,
1382 .coherent_dma_mask = DMA_BIT_MASK(32),
1387 * s3c_ohci_set_platdata - initialise OHCI device platform data
1388 * @info: The platform data.
1390 * This call copies the @info passed in and sets the device .platform_data
1391 * field to that copy. The @info is copied so that the original can be marked
1395 void __init s3c_ohci_set_platdata(struct s3c2410_hcd_info *info)
1397 s3c_set_platdata(info, sizeof(struct s3c2410_hcd_info),
1400 #endif /* CONFIG_S3C_DEV_USB_HOST */
1402 /* USB Device (Gadget) */
1404 #ifdef CONFIG_PLAT_S3C24XX
1405 static struct resource s3c_usbgadget_resource[] = {
1406 [0] = DEFINE_RES_MEM(S3C24XX_PA_USBDEV, S3C24XX_SZ_USBDEV),
1407 [1] = DEFINE_RES_IRQ(IRQ_USBD),
1410 struct platform_device s3c_device_usbgadget = {
1411 .name = "s3c2410-usbgadget",
1413 .num_resources = ARRAY_SIZE(s3c_usbgadget_resource),
1414 .resource = s3c_usbgadget_resource,
1417 void __init s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info *pd)
1419 s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usbgadget);
1421 #endif /* CONFIG_PLAT_S3C24XX */
1423 /* USB EHCI Host Controller */
1425 #ifdef CONFIG_S5P_DEV_USB_EHCI
1426 static struct resource s5p_ehci_resource[] = {
1427 [0] = DEFINE_RES_MEM(S5P_PA_EHCI, SZ_256),
1428 [1] = DEFINE_RES_IRQ(IRQ_USB_HOST),
1431 struct platform_device s5p_device_ehci = {
1434 .num_resources = ARRAY_SIZE(s5p_ehci_resource),
1435 .resource = s5p_ehci_resource,
1437 .dma_mask = &samsung_device_dma_mask,
1438 .coherent_dma_mask = DMA_BIT_MASK(32),
1442 void __init s5p_ehci_set_platdata(struct s5p_ehci_platdata *pd)
1444 struct s5p_ehci_platdata *npd;
1446 npd = s3c_set_platdata(pd, sizeof(struct s5p_ehci_platdata),
1450 npd->phy_init = s5p_usb_phy_init;
1452 npd->phy_exit = s5p_usb_phy_exit;
1454 #endif /* CONFIG_S5P_DEV_USB_EHCI */
1458 #ifdef CONFIG_S3C_DEV_USB_HSOTG
1459 static struct resource s3c_usb_hsotg_resources[] = {
1460 [0] = DEFINE_RES_MEM(S3C_PA_USB_HSOTG, SZ_128K),
1461 [1] = DEFINE_RES_IRQ(IRQ_OTG),
1464 struct platform_device s3c_device_usb_hsotg = {
1465 .name = "s3c-hsotg",
1467 .num_resources = ARRAY_SIZE(s3c_usb_hsotg_resources),
1468 .resource = s3c_usb_hsotg_resources,
1470 .dma_mask = &samsung_device_dma_mask,
1471 .coherent_dma_mask = DMA_BIT_MASK(32),
1475 void __init s3c_hsotg_set_platdata(struct s3c_hsotg_plat *pd)
1477 struct s3c_hsotg_plat *npd;
1479 npd = s3c_set_platdata(pd, sizeof(struct s3c_hsotg_plat),
1480 &s3c_device_usb_hsotg);
1483 npd->phy_init = s5p_usb_phy_init;
1485 npd->phy_exit = s5p_usb_phy_exit;
1487 #endif /* CONFIG_S3C_DEV_USB_HSOTG */
1489 /* USB High Spped 2.0 Device (Gadget) */
1491 #ifdef CONFIG_PLAT_S3C24XX
1492 static struct resource s3c_hsudc_resource[] = {
1493 [0] = DEFINE_RES_MEM(S3C2416_PA_HSUDC, S3C2416_SZ_HSUDC),
1494 [1] = DEFINE_RES_IRQ(IRQ_USBD),
1497 struct platform_device s3c_device_usb_hsudc = {
1498 .name = "s3c-hsudc",
1500 .num_resources = ARRAY_SIZE(s3c_hsudc_resource),
1501 .resource = s3c_hsudc_resource,
1503 .dma_mask = &samsung_device_dma_mask,
1504 .coherent_dma_mask = DMA_BIT_MASK(32),
1508 void __init s3c24xx_hsudc_set_platdata(struct s3c24xx_hsudc_platdata *pd)
1510 s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usb_hsudc);
1512 #endif /* CONFIG_PLAT_S3C24XX */
1516 #ifdef CONFIG_S3C_DEV_WDT
1517 static struct resource s3c_wdt_resource[] = {
1518 [0] = DEFINE_RES_MEM(S3C_PA_WDT, SZ_1K),
1519 [1] = DEFINE_RES_IRQ(IRQ_WDT),
1522 struct platform_device s3c_device_wdt = {
1523 .name = "s3c2410-wdt",
1525 .num_resources = ARRAY_SIZE(s3c_wdt_resource),
1526 .resource = s3c_wdt_resource,
1528 #endif /* CONFIG_S3C_DEV_WDT */
1530 #ifdef CONFIG_S3C64XX_DEV_SPI0
1531 static struct resource s3c64xx_spi0_resource[] = {
1532 [0] = DEFINE_RES_MEM(S3C_PA_SPI0, SZ_256),
1533 [1] = DEFINE_RES_DMA(DMACH_SPI0_TX),
1534 [2] = DEFINE_RES_DMA(DMACH_SPI0_RX),
1535 [3] = DEFINE_RES_IRQ(IRQ_SPI0),
1538 struct platform_device s3c64xx_device_spi0 = {
1539 .name = "s3c6410-spi",
1541 .num_resources = ARRAY_SIZE(s3c64xx_spi0_resource),
1542 .resource = s3c64xx_spi0_resource,
1544 .dma_mask = &samsung_device_dma_mask,
1545 .coherent_dma_mask = DMA_BIT_MASK(32),
1549 void __init s3c64xx_spi0_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
1552 struct s3c64xx_spi_info pd;
1554 /* Reject invalid configuration */
1555 if (!num_cs || src_clk_nr < 0) {
1556 pr_err("%s: Invalid SPI configuration\n", __func__);
1561 pd.src_clk_nr = src_clk_nr;
1562 pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi0_cfg_gpio;
1564 s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi0);
1566 #endif /* CONFIG_S3C64XX_DEV_SPI0 */
1568 #ifdef CONFIG_S3C64XX_DEV_SPI1
1569 static struct resource s3c64xx_spi1_resource[] = {
1570 [0] = DEFINE_RES_MEM(S3C_PA_SPI1, SZ_256),
1571 [1] = DEFINE_RES_DMA(DMACH_SPI1_TX),
1572 [2] = DEFINE_RES_DMA(DMACH_SPI1_RX),
1573 [3] = DEFINE_RES_IRQ(IRQ_SPI1),
1576 struct platform_device s3c64xx_device_spi1 = {
1577 .name = "s3c6410-spi",
1579 .num_resources = ARRAY_SIZE(s3c64xx_spi1_resource),
1580 .resource = s3c64xx_spi1_resource,
1582 .dma_mask = &samsung_device_dma_mask,
1583 .coherent_dma_mask = DMA_BIT_MASK(32),
1587 void __init s3c64xx_spi1_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
1590 struct s3c64xx_spi_info pd;
1592 /* Reject invalid configuration */
1593 if (!num_cs || src_clk_nr < 0) {
1594 pr_err("%s: Invalid SPI configuration\n", __func__);
1599 pd.src_clk_nr = src_clk_nr;
1600 pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi1_cfg_gpio;
1602 s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi1);
1604 #endif /* CONFIG_S3C64XX_DEV_SPI1 */
1606 #ifdef CONFIG_S3C64XX_DEV_SPI2
1607 static struct resource s3c64xx_spi2_resource[] = {
1608 [0] = DEFINE_RES_MEM(S3C_PA_SPI2, SZ_256),
1609 [1] = DEFINE_RES_DMA(DMACH_SPI2_TX),
1610 [2] = DEFINE_RES_DMA(DMACH_SPI2_RX),
1611 [3] = DEFINE_RES_IRQ(IRQ_SPI2),
1614 struct platform_device s3c64xx_device_spi2 = {
1615 .name = "s3c6410-spi",
1617 .num_resources = ARRAY_SIZE(s3c64xx_spi2_resource),
1618 .resource = s3c64xx_spi2_resource,
1620 .dma_mask = &samsung_device_dma_mask,
1621 .coherent_dma_mask = DMA_BIT_MASK(32),
1625 void __init s3c64xx_spi2_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
1628 struct s3c64xx_spi_info pd;
1630 /* Reject invalid configuration */
1631 if (!num_cs || src_clk_nr < 0) {
1632 pr_err("%s: Invalid SPI configuration\n", __func__);
1637 pd.src_clk_nr = src_clk_nr;
1638 pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi2_cfg_gpio;
1640 s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi2);
1642 #endif /* CONFIG_S3C64XX_DEV_SPI2 */