1 /* linux/arch/arm/plat-s3c24xx/clock.c
3 * Copyright 2004-2005 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
6 * S3C24XX Core clock control support
8 * Based on, and code from linux/arch/arm/mach-versatile/clock.c
10 ** Copyright (C) 2004 ARM Limited.
11 ** Written by Deep Blue Solutions Limited.
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or
17 * (at your option) any later version.
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, write to the Free Software
26 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
29 #include <linux/init.h>
30 #include <linux/module.h>
31 #include <linux/kernel.h>
32 #include <linux/list.h>
33 #include <linux/errno.h>
34 #include <linux/err.h>
35 #include <linux/platform_device.h>
36 #include <linux/sysdev.h>
37 #include <linux/interrupt.h>
38 #include <linux/ioport.h>
39 #include <linux/clk.h>
40 #include <linux/spinlock.h>
43 #include <mach/hardware.h>
46 #include <plat/cpu-freq.h>
48 #include <plat/clock.h>
51 /* clock information */
53 static LIST_HEAD(clocks);
55 /* We originally used an mutex here, but some contexts (see resume)
56 * are calling functions such as clk_set_parent() with IRQs disabled
57 * causing an BUG to be triggered.
59 DEFINE_SPINLOCK(clocks_lock);
61 /* enable and disable calls for use with the clk struct */
63 static int clk_null_enable(struct clk *clk, int enable)
70 struct clk *clk_get(struct device *dev, const char *id)
73 struct clk *clk = ERR_PTR(-ENOENT);
76 if (dev == NULL || dev->bus != &platform_bus_type)
79 idno = to_platform_device(dev)->id;
81 spin_lock(&clocks_lock);
83 list_for_each_entry(p, &clocks, list) {
85 strcmp(id, p->name) == 0 &&
86 try_module_get(p->owner)) {
92 /* check for the case where a device was supplied, but the
93 * clock that was being searched for is not device specific */
96 list_for_each_entry(p, &clocks, list) {
97 if (p->id == -1 && strcmp(id, p->name) == 0 &&
98 try_module_get(p->owner)) {
105 spin_unlock(&clocks_lock);
109 void clk_put(struct clk *clk)
111 module_put(clk->owner);
114 int clk_enable(struct clk *clk)
116 if (IS_ERR(clk) || clk == NULL)
119 clk_enable(clk->parent);
121 spin_lock(&clocks_lock);
123 if ((clk->usage++) == 0)
124 (clk->enable)(clk, 1);
126 spin_unlock(&clocks_lock);
130 void clk_disable(struct clk *clk)
132 if (IS_ERR(clk) || clk == NULL)
135 spin_lock(&clocks_lock);
137 if ((--clk->usage) == 0)
138 (clk->enable)(clk, 0);
140 spin_unlock(&clocks_lock);
141 clk_disable(clk->parent);
145 unsigned long clk_get_rate(struct clk *clk)
153 if (clk->ops != NULL && clk->ops->get_rate != NULL)
154 return (clk->ops->get_rate)(clk);
156 if (clk->parent != NULL)
157 return clk_get_rate(clk->parent);
162 long clk_round_rate(struct clk *clk, unsigned long rate)
164 if (!IS_ERR(clk) && clk->ops && clk->ops->round_rate)
165 return (clk->ops->round_rate)(clk, rate);
170 int clk_set_rate(struct clk *clk, unsigned long rate)
177 /* We do not default just do a clk->rate = rate as
178 * the clock may have been made this way by choice.
181 WARN_ON(clk->ops == NULL);
182 WARN_ON(clk->ops && clk->ops->set_rate == NULL);
184 if (clk->ops == NULL || clk->ops->set_rate == NULL)
187 spin_lock(&clocks_lock);
188 ret = (clk->ops->set_rate)(clk, rate);
189 spin_unlock(&clocks_lock);
194 struct clk *clk_get_parent(struct clk *clk)
199 int clk_set_parent(struct clk *clk, struct clk *parent)
206 spin_lock(&clocks_lock);
208 if (clk->ops && clk->ops->set_parent)
209 ret = (clk->ops->set_parent)(clk, parent);
211 spin_unlock(&clocks_lock);
216 EXPORT_SYMBOL(clk_get);
217 EXPORT_SYMBOL(clk_put);
218 EXPORT_SYMBOL(clk_enable);
219 EXPORT_SYMBOL(clk_disable);
220 EXPORT_SYMBOL(clk_get_rate);
221 EXPORT_SYMBOL(clk_round_rate);
222 EXPORT_SYMBOL(clk_set_rate);
223 EXPORT_SYMBOL(clk_get_parent);
224 EXPORT_SYMBOL(clk_set_parent);
228 int clk_default_setrate(struct clk *clk, unsigned long rate)
234 struct clk_ops clk_ops_def_setrate = {
235 .set_rate = clk_default_setrate,
238 struct clk clk_xtal = {
246 struct clk clk_ext = {
251 struct clk clk_epll = {
256 struct clk clk_mpll = {
259 .ops = &clk_ops_def_setrate,
262 struct clk clk_upll = {
283 .ops = &clk_ops_def_setrate,
292 .ops = &clk_ops_def_setrate,
295 struct clk clk_usb_bus = {
303 struct clk s3c24xx_uclk = {
308 /* initialise the clock system */
311 * s3c24xx_register_clock() - register a clock
312 * @clk: The clock to register
314 * Add the specified clock to the list of clocks known by the system.
316 int s3c24xx_register_clock(struct clk *clk)
318 if (clk->enable == NULL)
319 clk->enable = clk_null_enable;
321 /* add to the list of available clocks */
323 /* Quick check to see if this clock has already been registered. */
324 BUG_ON(clk->list.prev != clk->list.next);
326 spin_lock(&clocks_lock);
327 list_add(&clk->list, &clocks);
328 spin_unlock(&clocks_lock);
334 * s3c24xx_register_clocks() - register an array of clock pointers
335 * @clks: Pointer to an array of struct clk pointers
336 * @nr_clks: The number of clocks in the @clks array.
338 * Call s3c24xx_register_clock() for all the clock pointers contained
339 * in the @clks list. Returns the number of failures.
341 int s3c24xx_register_clocks(struct clk **clks, int nr_clks)
345 for (; nr_clks > 0; nr_clks--, clks++) {
346 if (s3c24xx_register_clock(*clks) < 0) {
347 struct clk *clk = *clks;
348 printk(KERN_ERR "%s: failed to register %p: %s\n",
349 __func__, clk, clk->name);
358 * s3c_register_clocks() - register an array of clocks
359 * @clkp: Pointer to the first clock in the array.
360 * @nr_clks: Number of clocks to register.
362 * Call s3c24xx_register_clock() on the @clkp array given, printing an
363 * error if it fails to register the clock (unlikely).
365 void __init s3c_register_clocks(struct clk *clkp, int nr_clks)
369 for (; nr_clks > 0; nr_clks--, clkp++) {
370 ret = s3c24xx_register_clock(clkp);
373 printk(KERN_ERR "Failed to register clock %s (%d)\n",
380 * s3c_disable_clocks() - disable an array of clocks
381 * @clkp: Pointer to the first clock in the array.
382 * @nr_clks: Number of clocks to register.
384 * for internal use only at initialisation time. disable the clocks in the
388 void __init s3c_disable_clocks(struct clk *clkp, int nr_clks)
390 for (; nr_clks > 0; nr_clks--, clkp++)
391 (clkp->enable)(clkp, 0);
394 /* initialise all the clocks */
396 int __init s3c24xx_register_baseclocks(unsigned long xtal)
398 printk(KERN_INFO "S3C24XX Clocks, Copyright 2004 Simtec Electronics\n");
400 clk_xtal.rate = xtal;
402 /* register our clocks */
404 if (s3c24xx_register_clock(&clk_xtal) < 0)
405 printk(KERN_ERR "failed to register master xtal\n");
407 if (s3c24xx_register_clock(&clk_mpll) < 0)
408 printk(KERN_ERR "failed to register mpll clock\n");
410 if (s3c24xx_register_clock(&clk_upll) < 0)
411 printk(KERN_ERR "failed to register upll clock\n");
413 if (s3c24xx_register_clock(&clk_f) < 0)
414 printk(KERN_ERR "failed to register cpu fclk\n");
416 if (s3c24xx_register_clock(&clk_h) < 0)
417 printk(KERN_ERR "failed to register cpu hclk\n");
419 if (s3c24xx_register_clock(&clk_p) < 0)
420 printk(KERN_ERR "failed to register cpu pclk\n");