1 /* linux/arch/arm/plat-s3c24xx/clock.c
3 * Copyright 2004-2005 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
6 * S3C24XX Core clock control support
8 * Based on, and code from linux/arch/arm/mach-versatile/clock.c
10 ** Copyright (C) 2004 ARM Limited.
11 ** Written by Deep Blue Solutions Limited.
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or
17 * (at your option) any later version.
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, write to the Free Software
26 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
29 #include <linux/init.h>
30 #include <linux/module.h>
31 #include <linux/kernel.h>
32 #include <linux/list.h>
33 #include <linux/errno.h>
34 #include <linux/err.h>
35 #include <linux/platform_device.h>
36 #include <linux/sysdev.h>
37 #include <linux/interrupt.h>
38 #include <linux/ioport.h>
39 #include <linux/clk.h>
40 #include <linux/spinlock.h>
43 #include <mach/hardware.h>
46 #include <plat/cpu-freq.h>
48 #include <plat/clock.h>
51 #include <linux/serial_core.h>
52 #include <plat/regs-serial.h> /* for s3c24xx_uart_devs */
54 /* clock information */
56 static LIST_HEAD(clocks);
58 /* We originally used an mutex here, but some contexts (see resume)
59 * are calling functions such as clk_set_parent() with IRQs disabled
60 * causing an BUG to be triggered.
62 DEFINE_SPINLOCK(clocks_lock);
64 /* enable and disable calls for use with the clk struct */
66 static int clk_null_enable(struct clk *clk, int enable)
71 static int dev_is_s3c_uart(struct device *dev)
73 struct platform_device **pdev = s3c24xx_uart_devs;
75 for (i = 0; i < ARRAY_SIZE(s3c24xx_uart_devs); i++, pdev++)
76 if (*pdev && dev == &(*pdev)->dev)
82 * Serial drivers call get_clock() very early, before platform bus
83 * has been set up, this requires a special check to let them get
87 static int dev_is_platform_device(struct device *dev)
89 return dev->bus == &platform_bus_type ||
90 (dev->bus == NULL && dev_is_s3c_uart(dev));
95 struct clk *clk_get(struct device *dev, const char *id)
98 struct clk *clk = ERR_PTR(-ENOENT);
101 if (dev == NULL || !dev_is_platform_device(dev))
104 idno = to_platform_device(dev)->id;
106 spin_lock(&clocks_lock);
108 list_for_each_entry(p, &clocks, list) {
110 strcmp(id, p->name) == 0 &&
111 try_module_get(p->owner)) {
117 /* check for the case where a device was supplied, but the
118 * clock that was being searched for is not device specific */
121 list_for_each_entry(p, &clocks, list) {
122 if (p->id == -1 && strcmp(id, p->name) == 0 &&
123 try_module_get(p->owner)) {
130 spin_unlock(&clocks_lock);
134 void clk_put(struct clk *clk)
136 module_put(clk->owner);
139 int clk_enable(struct clk *clk)
141 if (IS_ERR(clk) || clk == NULL)
144 clk_enable(clk->parent);
146 spin_lock(&clocks_lock);
148 if ((clk->usage++) == 0)
149 (clk->enable)(clk, 1);
151 spin_unlock(&clocks_lock);
155 void clk_disable(struct clk *clk)
157 if (IS_ERR(clk) || clk == NULL)
160 spin_lock(&clocks_lock);
162 if ((--clk->usage) == 0)
163 (clk->enable)(clk, 0);
165 spin_unlock(&clocks_lock);
166 clk_disable(clk->parent);
170 unsigned long clk_get_rate(struct clk *clk)
178 if (clk->ops != NULL && clk->ops->get_rate != NULL)
179 return (clk->ops->get_rate)(clk);
181 if (clk->parent != NULL)
182 return clk_get_rate(clk->parent);
187 long clk_round_rate(struct clk *clk, unsigned long rate)
189 if (!IS_ERR(clk) && clk->ops && clk->ops->round_rate)
190 return (clk->ops->round_rate)(clk, rate);
195 int clk_set_rate(struct clk *clk, unsigned long rate)
202 /* We do not default just do a clk->rate = rate as
203 * the clock may have been made this way by choice.
206 WARN_ON(clk->ops == NULL);
207 WARN_ON(clk->ops && clk->ops->set_rate == NULL);
209 if (clk->ops == NULL || clk->ops->set_rate == NULL)
212 spin_lock(&clocks_lock);
213 ret = (clk->ops->set_rate)(clk, rate);
214 spin_unlock(&clocks_lock);
219 struct clk *clk_get_parent(struct clk *clk)
224 int clk_set_parent(struct clk *clk, struct clk *parent)
231 spin_lock(&clocks_lock);
233 if (clk->ops && clk->ops->set_parent)
234 ret = (clk->ops->set_parent)(clk, parent);
236 spin_unlock(&clocks_lock);
241 EXPORT_SYMBOL(clk_get);
242 EXPORT_SYMBOL(clk_put);
243 EXPORT_SYMBOL(clk_enable);
244 EXPORT_SYMBOL(clk_disable);
245 EXPORT_SYMBOL(clk_get_rate);
246 EXPORT_SYMBOL(clk_round_rate);
247 EXPORT_SYMBOL(clk_set_rate);
248 EXPORT_SYMBOL(clk_get_parent);
249 EXPORT_SYMBOL(clk_set_parent);
253 int clk_default_setrate(struct clk *clk, unsigned long rate)
259 struct clk_ops clk_ops_def_setrate = {
260 .set_rate = clk_default_setrate,
263 struct clk clk_xtal = {
271 struct clk clk_ext = {
276 struct clk clk_epll = {
281 struct clk clk_mpll = {
284 .ops = &clk_ops_def_setrate,
287 struct clk clk_upll = {
308 .ops = &clk_ops_def_setrate,
317 .ops = &clk_ops_def_setrate,
320 struct clk clk_usb_bus = {
328 struct clk s3c24xx_uclk = {
333 /* initialise the clock system */
336 * s3c24xx_register_clock() - register a clock
337 * @clk: The clock to register
339 * Add the specified clock to the list of clocks known by the system.
341 int s3c24xx_register_clock(struct clk *clk)
343 if (clk->enable == NULL)
344 clk->enable = clk_null_enable;
346 /* add to the list of available clocks */
348 /* Quick check to see if this clock has already been registered. */
349 BUG_ON(clk->list.prev != clk->list.next);
351 spin_lock(&clocks_lock);
352 list_add(&clk->list, &clocks);
353 spin_unlock(&clocks_lock);
359 * s3c24xx_register_clocks() - register an array of clock pointers
360 * @clks: Pointer to an array of struct clk pointers
361 * @nr_clks: The number of clocks in the @clks array.
363 * Call s3c24xx_register_clock() for all the clock pointers contained
364 * in the @clks list. Returns the number of failures.
366 int s3c24xx_register_clocks(struct clk **clks, int nr_clks)
370 for (; nr_clks > 0; nr_clks--, clks++) {
371 if (s3c24xx_register_clock(*clks) < 0) {
372 struct clk *clk = *clks;
373 printk(KERN_ERR "%s: failed to register %p: %s\n",
374 __func__, clk, clk->name);
383 * s3c_register_clocks() - register an array of clocks
384 * @clkp: Pointer to the first clock in the array.
385 * @nr_clks: Number of clocks to register.
387 * Call s3c24xx_register_clock() on the @clkp array given, printing an
388 * error if it fails to register the clock (unlikely).
390 void __init s3c_register_clocks(struct clk *clkp, int nr_clks)
394 for (; nr_clks > 0; nr_clks--, clkp++) {
395 ret = s3c24xx_register_clock(clkp);
398 printk(KERN_ERR "Failed to register clock %s (%d)\n",
405 * s3c_disable_clocks() - disable an array of clocks
406 * @clkp: Pointer to the first clock in the array.
407 * @nr_clks: Number of clocks to register.
409 * for internal use only at initialisation time. disable the clocks in the
413 void __init s3c_disable_clocks(struct clk *clkp, int nr_clks)
415 for (; nr_clks > 0; nr_clks--, clkp++)
416 (clkp->enable)(clkp, 0);
419 /* initialise all the clocks */
421 int __init s3c24xx_register_baseclocks(unsigned long xtal)
423 printk(KERN_INFO "S3C24XX Clocks, Copyright 2004 Simtec Electronics\n");
425 clk_xtal.rate = xtal;
427 /* register our clocks */
429 if (s3c24xx_register_clock(&clk_xtal) < 0)
430 printk(KERN_ERR "failed to register master xtal\n");
432 if (s3c24xx_register_clock(&clk_mpll) < 0)
433 printk(KERN_ERR "failed to register mpll clock\n");
435 if (s3c24xx_register_clock(&clk_upll) < 0)
436 printk(KERN_ERR "failed to register upll clock\n");
438 if (s3c24xx_register_clock(&clk_f) < 0)
439 printk(KERN_ERR "failed to register cpu fclk\n");
441 if (s3c24xx_register_clock(&clk_h) < 0)
442 printk(KERN_ERR "failed to register cpu hclk\n");
444 if (s3c24xx_register_clock(&clk_p) < 0)
445 printk(KERN_ERR "failed to register cpu pclk\n");