3 * Copyright (C) 2011 ROCKCHIP, Inc.
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
19 #include <linux/types.h>
20 #include <mach/sram.h>
22 #ifdef CONFIG_DDR_SDRAM_FREQ
23 #define DDR_FREQ (CONFIG_DDR_SDRAM_FREQ)
28 #define DDR3_800D (0) // 5-5-5
29 #define DDR3_800E (1) // 6-6-6
30 #define DDR3_1066E (2) // 6-6-6
31 #define DDR3_1066F (3) // 7-7-7
32 #define DDR3_1066G (4) // 8-8-8
33 #define DDR3_1333F (5) // 7-7-7
34 #define DDR3_1333G (6) // 8-8-8
35 #define DDR3_1333H (7) // 9-9-9
36 #define DDR3_1333J (8) // 10-10-10
37 #define DDR3_1600G (9) // 8-8-8
38 #define DDR3_1600H (10) // 9-9-9
39 #define DDR3_1600J (11) // 10-10-10
40 #define DDR3_1600K (12) // 11-11-11
41 #define DDR3_1866J (13) // 10-10-10
42 #define DDR3_1866K (14) // 11-11-11
43 #define DDR3_1866L (15) // 12-12-12
44 #define DDR3_1866M (16) // 13-13-13
45 #define DDR3_2133K (17) // 11-11-11
46 #define DDR3_2133L (18) // 12-12-12
47 #define DDR3_2133M (19) // 13-13-13
48 #define DDR3_2133N (20) // 14-14-14
49 #define DDR3_DEFAULT (21)
51 #define DDR_LPDDR (23)
52 #define DDR_LPDDR2 (24)
54 #ifdef CONFIG_DDR_TYPE_DDR3_800D
55 #define DDR_TYPE DDR3_800D
58 #ifdef CONFIG_DDR_TYPE_DDR3_800E
59 #define DDR_TYPE DDR3_800E
62 #ifdef CONFIG_DDR_TYPE_DDR3_1066E
63 #define DDR_TYPE DDR3_1066E
66 #ifdef CONFIG_DDR_TYPE_DDR3_1066F
67 #define DDR_TYPE DDR3_1066F
70 #ifdef CONFIG_DDR_TYPE_DDR3_1066G
71 #define DDR_TYPE DDR3_1066G
74 #ifdef CONFIG_DDR_TYPE_DDR3_1333F
75 #define DDR_TYPE DDR3_1333F
78 #ifdef CONFIG_DDR_TYPE_DDR3_1333G
79 #define DDR_TYPE DDR3_1333G
82 #ifdef CONFIG_DDR_TYPE_DDR3_1333H
83 #define DDR_TYPE DDR3_1333H
86 #ifdef CONFIG_DDR_TYPE_DDR3_1333J
87 #define DDR_TYPE DDR3_1333J
90 #ifdef CONFIG_DDR_TYPE_DDR3_1600G
91 #define DDR_TYPE DDR3_1600G
94 #ifdef CONFIG_DDR_TYPE_DDR3_1600H
95 #define DDR_TYPE DDR3_1600H
98 #ifdef CONFIG_DDR_TYPE_DDR3_1600J
99 #define DDR_TYPE DDR3_1600J
102 #ifdef CONFIG_DDR_TYPE_DDR3_1866J
103 #define DDR_TYPE DDR3_1866J
106 #ifdef CONFIG_DDR_TYPE_DDR3_1866K
107 #define DDR_TYPE DDR3_1866K
110 #ifdef CONFIG_DDR_TYPE_DDR3_1866L
111 #define DDR_TYPE DDR3_1866L
114 #ifdef CONFIG_DDR_TYPE_DDR3_1866M
115 #define DDR_TYPE DDR3_1866M
118 #ifdef CONFIG_DDR_TYPE_DDR3_2133K
119 #define DDR_TYPE DDR3_2133K
122 #ifdef CONFIG_DDR_TYPE_DDR3_2133L
123 #define DDR_TYPE DDR3_2133L
126 #ifdef CONFIG_DDR_TYPE_DDR3_2133M
127 #define DDR_TYPE DDR3_2133M
130 #ifdef CONFIG_DDR_TYPE_DDR3_2133N
131 #define DDR_TYPE DDR3_2133N
134 #ifdef CONFIG_DDR_TYPE_DDR3_DEFAULT
135 #define DDR_TYPE DDR3_DEFAULT
138 #ifdef CONFIG_DDR_TYPE_DDRII
139 #define DDR_TYPE DDR_DDRII
142 #ifdef CONFIG_DDR_TYPE_LPDDR
143 #define DDR_TYPE DDR_LPDDR
147 unsigned long screen_ft_us;
148 unsigned long long t0;
149 unsigned long long t1;
153 void __sramfunc ddr_suspend(void);
154 void __sramfunc ddr_resume(void);
155 //void __sramlocalfunc delayus(uint32_t us);
156 uint32_t ddr_change_freq(uint32_t nMHz);
157 uint32_t __sramfunc ddr_change_freq_sram(uint32_t nMHz , struct ddr_freq_t ddr_freq_t);
158 uint32_t ddr_get_cap(void);
159 int ddr_init(uint32_t dram_type, uint32_t freq);
160 void ddr_set_auto_self_refresh(bool en);
161 uint32_t __sramlocalfunc ddr_set_pll(uint32_t nMHz, uint32_t set);
162 uint32_t __sramlocalfunc ddr_set_pll_rk3066b(uint32_t nMHz, uint32_t set);
163 #if defined(CONFIG_ARCH_RK3066B)
164 int ddr_get_datatraing_value_3168(bool end_flag,uint32_t dqstr_value,uint32_t min_freq);
167 #if defined(CONFIG_ARCH_RK3066B) || defined(CONFIG_ARCH_RK3188) || defined(CONFIG_ARCH_RK3026)
168 #if !defined(CONFIG_MACH_RK3188_FT)&&!defined(CONFIG_MACH_RK3168_FT) && !defined(CONFIG_MACH_RK3026_FT)
169 #define DDR_CHANGE_FREQ_IN_LCDC_VSYNC