arch/arm/plat-omap/i2c.c

   1 /*
   2  * linux/arch/arm/plat-omap/i2c.c
   3  *
   4  * Helper module for board specific I2C bus registration
   5  *
   6  * Copyright (C) 2007 Nokia Corporation.
   7  *
   8  * Contact: Jarkko Nikula <jhnikula@gmail.com>
   9  *
  10  * This program is free software; you can redistribute it and/or
  11  * modify it under the terms of the GNU General Public License
  12  * version 2 as published by the Free Software Foundation.
  13  *
  14  * This program is distributed in the hope that it will be useful, but
  15  * WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  17  * General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software
  21  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  22  * 02110-1301 USA
  23  *
  24  */
  25
  26 #include <linux/kernel.h>
  27 #include <linux/platform_device.h>
  28 #include <linux/i2c.h>
  29 #include <linux/slab.h>
  30 #include <linux/err.h>
  31 #include <linux/clk.h>
  32
  33 #include <mach/irqs.h>
  34 #include <plat/i2c.h>
  35 #include <plat/omap_device.h>
  36
  37 #define OMAP_I2C_SIZE           0x3f
  38 #define OMAP1_I2C_BASE          0xfffb3800
  39 #define OMAP1_INT_I2C           (32 + 4)
  40
  41 static const char name[] = "omap_i2c";
  42
  43 #define I2C_RESOURCE_BUILDER(base, irq)                 \
  44         {                                               \
  45                 .start  = (base),                       \
  46                 .end    = (base) + OMAP_I2C_SIZE,       \
  47                 .flags  = IORESOURCE_MEM,               \
  48         },                                              \
  49         {                                               \
  50                 .start  = (irq),                        \
  51                 .flags  = IORESOURCE_IRQ,               \
  52         },
  53
  54 static struct resource i2c_resources[][2] = {
  55         { I2C_RESOURCE_BUILDER(0, 0) },
  56 };
  57
  58 #define I2C_DEV_BUILDER(bus_id, res, data)              \
  59         {                                               \
  60                 .id     = (bus_id),                     \
  61                 .name   = name,                         \
  62                 .num_resources  = ARRAY_SIZE(res),      \
  63                 .resource       = (res),                \
  64                 .dev            = {                     \
  65                         .platform_data  = (data),       \
  66                 },                                      \
  67         }
  68
  69 #define MAX_OMAP_I2C_HWMOD_NAME_LEN     16
  70 #define OMAP_I2C_MAX_CONTROLLERS 4
  71 static struct omap_i2c_bus_platform_data i2c_pdata[OMAP_I2C_MAX_CONTROLLERS];
  72 static struct platform_device omap_i2c_devices[] = {
  73         I2C_DEV_BUILDER(1, i2c_resources[0], &i2c_pdata[0]),
  74 };
  75
  76 #define OMAP_I2C_CMDLINE_SETUP  (BIT(31))
  77
  78 static int __init omap_i2c_nr_ports(void)
  79 {
  80         int ports = 0;
  81
  82         if (cpu_class_is_omap1())
  83                 ports = 1;
  84         else if (cpu_is_omap24xx())
  85                 ports = 2;
  86         else if (cpu_is_omap34xx())
  87                 ports = 3;
  88         else if (cpu_is_omap44xx())
  89                 ports = 4;
  90
  91         return ports;
  92 }
  93
  94 static inline int omap1_i2c_add_bus(int bus_id)
  95 {
  96         struct platform_device *pdev;
  97         struct omap_i2c_bus_platform_data *pdata;
  98         struct resource *res;
  99
 100         omap1_i2c_mux_pins(bus_id);
 101
 102         pdev = &omap_i2c_devices[bus_id - 1];
 103         res = pdev->resource;
 104         res[0].start = OMAP1_I2C_BASE;
 105         res[0].end = res[0].start + OMAP_I2C_SIZE;
 106         res[1].start = OMAP1_INT_I2C;
 107         pdata = &i2c_pdata[bus_id - 1];
 108
 109         /* all OMAP1 have IP version 1 register set */
 110         pdata->rev = OMAP_I2C_IP_VERSION_1;
 111
 112         /* all OMAP1 I2C are implemented like this */
 113         pdata->flags = OMAP_I2C_FLAG_NO_FIFO |
 114                        OMAP_I2C_FLAG_SIMPLE_CLOCK |
 115                        OMAP_I2C_FLAG_16BIT_DATA_REG |
 116                        OMAP_I2C_FLAG_ALWAYS_ARMXOR_CLK;
 117
 118         /* how the cpu bus is wired up differs for 7xx only */
 119
 120         if (cpu_is_omap7xx())
 121                 pdata->flags |= OMAP_I2C_FLAG_BUS_SHIFT_1;
 122         else
 123                 pdata->flags |= OMAP_I2C_FLAG_BUS_SHIFT_2;
 124
 125         return platform_device_register(pdev);
 126 }
 127
 128
 129 #ifdef CONFIG_ARCH_OMAP2PLUS
 130 static inline int omap2_i2c_add_bus(int bus_id)
 131 {
 132         int l;
 133         struct omap_hwmod *oh;
 134         struct platform_device *pdev;
 135         char oh_name[MAX_OMAP_I2C_HWMOD_NAME_LEN];
 136         struct omap_i2c_bus_platform_data *pdata;
 137         struct omap_i2c_dev_attr *dev_attr;
 138
 139         omap2_i2c_mux_pins(bus_id);
 140
 141         l = snprintf(oh_name, MAX_OMAP_I2C_HWMOD_NAME_LEN, "i2c%d", bus_id);
 142         WARN(l >= MAX_OMAP_I2C_HWMOD_NAME_LEN,
 143                 "String buffer overflow in I2C%d device setup\n", bus_id);
 144         oh = omap_hwmod_lookup(oh_name);
 145         if (!oh) {
 146                         pr_err("Could not look up %s\n", oh_name);
 147                         return -EEXIST;
 148         }
 149
 150         pdata = &i2c_pdata[bus_id - 1];
 151         /*
 152          * pass the hwmod class's CPU-specific knowledge of I2C IP revision in
 153          * use, and functionality implementation flags, up to the OMAP I2C
 154          * driver via platform data
 155          */
 156         pdata->rev = oh->class->rev;
 157
 158         dev_attr = (struct omap_i2c_dev_attr *)oh->dev_attr;
 159         pdata->flags = dev_attr->flags;
 160
 161         pdev = omap_device_build(name, bus_id, oh, pdata,
 162                         sizeof(struct omap_i2c_bus_platform_data),
 163                         NULL, 0, 0);
 164         WARN(IS_ERR(pdev), "Could not build omap_device for %s\n", name);
 165
 166         return PTR_RET(pdev);
 167 }
 168 #else
 169 static inline int omap2_i2c_add_bus(int bus_id)
 170 {
 171         return 0;
 172 }
 173 #endif
 174
 175 static int __init omap_i2c_add_bus(int bus_id)
 176 {
 177         if (cpu_class_is_omap1())
 178                 return omap1_i2c_add_bus(bus_id);
 179         else
 180                 return omap2_i2c_add_bus(bus_id);
 181 }
 182
 183 /**
 184  * omap_i2c_bus_setup - Process command line options for the I2C bus speed
 185  * @str: String of options
 186  *
 187  * This function allow to override the default I2C bus speed for given I2C
 188  * bus with a command line option.
 189  *
 190  * Format: i2c_bus=bus_id,clkrate (in kHz)
 191  *
 192  * Returns 1 on success, 0 otherwise.
 193  */
 194 static int __init omap_i2c_bus_setup(char *str)
 195 {
 196         int ports;
 197         int ints[3];
 198
 199         ports = omap_i2c_nr_ports();
 200         get_options(str, 3, ints);
 201         if (ints[0] < 2 || ints[1] < 1 || ints[1] > ports)
 202                 return 0;
 203         i2c_pdata[ints[1] - 1].clkrate = ints[2];
 204         i2c_pdata[ints[1] - 1].clkrate |= OMAP_I2C_CMDLINE_SETUP;
 205
 206         return 1;
 207 }
 208 __setup("i2c_bus=", omap_i2c_bus_setup);
 209
 210 /*
 211  * Register busses defined in command line but that are not registered with
 212  * omap_register_i2c_bus from board initialization code.
 213  */
 214 static int __init omap_register_i2c_bus_cmdline(void)
 215 {
 216         int i, err = 0;
 217
 218         for (i = 0; i < ARRAY_SIZE(i2c_pdata); i++)
 219                 if (i2c_pdata[i].clkrate & OMAP_I2C_CMDLINE_SETUP) {
 220                         i2c_pdata[i].clkrate &= ~OMAP_I2C_CMDLINE_SETUP;
 221                         err = omap_i2c_add_bus(i + 1);
 222                         if (err)
 223                                 goto out;
 224                 }
 225
 226 out:
 227         return err;
 228 }
 229 subsys_initcall(omap_register_i2c_bus_cmdline);
 230
 231 /**
 232  * omap_register_i2c_bus - register I2C bus with device descriptors
 233  * @bus_id: bus id counting from number 1
 234  * @clkrate: clock rate of the bus in kHz
 235  * @info: pointer into I2C device descriptor table or NULL
 236  * @len: number of descriptors in the table
 237  *
 238  * Returns 0 on success or an error code.
 239  */
 240 int __init omap_register_i2c_bus(int bus_id, u32 clkrate,
 241                           struct i2c_board_info const *info,
 242                           unsigned len)
 243 {
 244         int err;
 245
 246         BUG_ON(bus_id < 1 || bus_id > omap_i2c_nr_ports());
 247
 248         if (info) {
 249                 err = i2c_register_board_info(bus_id, info, len);
 250                 if (err)
 251                         return err;
 252         }
 253
 254         if (!i2c_pdata[bus_id - 1].clkrate)
 255                 i2c_pdata[bus_id - 1].clkrate = clkrate;
 256
 257         i2c_pdata[bus_id - 1].clkrate &= ~OMAP_I2C_CMDLINE_SETUP;
 258
 259         return omap_i2c_add_bus(bus_id);
 260 }