2 * Just-In-Time compiler for BPF filters on 32bit ARM
4 * Copyright (c) 2011 Mircea Gherzan <mgherzan@gmail.com>
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; version 2 of the License.
11 #include <linux/bitops.h>
12 #include <linux/compiler.h>
13 #include <linux/errno.h>
14 #include <linux/filter.h>
15 #include <linux/moduleloader.h>
16 #include <linux/netdevice.h>
17 #include <linux/string.h>
18 #include <linux/slab.h>
19 #include <linux/if_vlan.h>
20 #include <asm/cacheflush.h>
21 #include <asm/hwcap.h>
22 #include <asm/opcodes.h>
24 #include "bpf_jit_32.h"
32 * r6 pointer to the skb
37 #define r_scratch ARM_R0
38 /* r1-r3 are (also) used for the unaligned loads on the non-ARMv7 slowpath */
43 #define r_skb_data ARM_R7
44 #define r_skb_hl ARM_R8
46 #define SCRATCH_SP_OFFSET 0
47 #define SCRATCH_OFF(k) (SCRATCH_SP_OFFSET + 4 * (k))
49 #define SEEN_MEM ((1 << BPF_MEMWORDS) - 1)
50 #define SEEN_MEM_WORD(k) (1 << (k))
51 #define SEEN_X (1 << BPF_MEMWORDS)
52 #define SEEN_CALL (1 << (BPF_MEMWORDS + 1))
53 #define SEEN_SKB (1 << (BPF_MEMWORDS + 2))
54 #define SEEN_DATA (1 << (BPF_MEMWORDS + 3))
56 #define FLAG_NEED_X_RESET (1 << 0)
59 const struct sk_filter *skf;
61 unsigned prologue_bytes;
67 #if __LINUX_ARM_ARCH__ < 7
74 int bpf_jit_enable __read_mostly;
76 static u64 jit_get_skb_b(struct sk_buff *skb, unsigned offset)
81 err = skb_copy_bits(skb, offset, &ret, 1);
83 return (u64)err << 32 | ret;
86 static u64 jit_get_skb_h(struct sk_buff *skb, unsigned offset)
91 err = skb_copy_bits(skb, offset, &ret, 2);
93 return (u64)err << 32 | ntohs(ret);
96 static u64 jit_get_skb_w(struct sk_buff *skb, unsigned offset)
101 err = skb_copy_bits(skb, offset, &ret, 4);
103 return (u64)err << 32 | ntohl(ret);
107 * Wrapper that handles both OABI and EABI and assures Thumb2 interworking
108 * (where the assembly routines like __aeabi_uidiv could cause problems).
110 static u32 jit_udiv(u32 dividend, u32 divisor)
112 return dividend / divisor;
115 static inline void _emit(int cond, u32 inst, struct jit_ctx *ctx)
117 inst |= (cond << 28);
118 inst = __opcode_to_mem_arm(inst);
120 if (ctx->target != NULL)
121 ctx->target[ctx->idx] = inst;
127 * Emit an instruction that will be executed unconditionally.
129 static inline void emit(u32 inst, struct jit_ctx *ctx)
131 _emit(ARM_COND_AL, inst, ctx);
134 static u16 saved_regs(struct jit_ctx *ctx)
138 if ((ctx->skf->len > 1) ||
139 (ctx->skf->insns[0].code == BPF_S_RET_A))
142 #ifdef CONFIG_FRAME_POINTER
143 ret |= (1 << ARM_FP) | (1 << ARM_IP) | (1 << ARM_LR) | (1 << ARM_PC);
145 if (ctx->seen & SEEN_CALL)
148 if (ctx->seen & (SEEN_DATA | SEEN_SKB))
150 if (ctx->seen & SEEN_DATA)
151 ret |= (1 << r_skb_data) | (1 << r_skb_hl);
152 if (ctx->seen & SEEN_X)
158 static inline int mem_words_used(struct jit_ctx *ctx)
160 /* yes, we do waste some stack space IF there are "holes" in the set" */
161 return fls(ctx->seen & SEEN_MEM);
164 static inline bool is_load_to_a(u16 inst)
172 case BPF_S_ANC_IFINDEX:
174 case BPF_S_ANC_PROTOCOL:
175 case BPF_S_ANC_RXHASH:
176 case BPF_S_ANC_VLAN_TAG:
177 case BPF_S_ANC_VLAN_TAG_PRESENT:
178 case BPF_S_ANC_QUEUE:
185 static void build_prologue(struct jit_ctx *ctx)
187 u16 reg_set = saved_regs(ctx);
188 u16 first_inst = ctx->skf->insns[0].code;
191 #ifdef CONFIG_FRAME_POINTER
192 emit(ARM_MOV_R(ARM_IP, ARM_SP), ctx);
193 emit(ARM_PUSH(reg_set), ctx);
194 emit(ARM_SUB_I(ARM_FP, ARM_IP, 4), ctx);
197 emit(ARM_PUSH(reg_set), ctx);
200 if (ctx->seen & (SEEN_DATA | SEEN_SKB))
201 emit(ARM_MOV_R(r_skb, ARM_R0), ctx);
203 if (ctx->seen & SEEN_DATA) {
204 off = offsetof(struct sk_buff, data);
205 emit(ARM_LDR_I(r_skb_data, r_skb, off), ctx);
206 /* headlen = len - data_len */
207 off = offsetof(struct sk_buff, len);
208 emit(ARM_LDR_I(r_skb_hl, r_skb, off), ctx);
209 off = offsetof(struct sk_buff, data_len);
210 emit(ARM_LDR_I(r_scratch, r_skb, off), ctx);
211 emit(ARM_SUB_R(r_skb_hl, r_skb_hl, r_scratch), ctx);
214 if (ctx->flags & FLAG_NEED_X_RESET)
215 emit(ARM_MOV_I(r_X, 0), ctx);
217 /* do not leak kernel data to userspace */
218 if ((first_inst != BPF_S_RET_K) && !(is_load_to_a(first_inst)))
219 emit(ARM_MOV_I(r_A, 0), ctx);
221 /* stack space for the BPF_MEM words */
222 if (ctx->seen & SEEN_MEM)
223 emit(ARM_SUB_I(ARM_SP, ARM_SP, mem_words_used(ctx) * 4), ctx);
226 static void build_epilogue(struct jit_ctx *ctx)
228 u16 reg_set = saved_regs(ctx);
230 if (ctx->seen & SEEN_MEM)
231 emit(ARM_ADD_I(ARM_SP, ARM_SP, mem_words_used(ctx) * 4), ctx);
233 reg_set &= ~(1 << ARM_LR);
235 #ifdef CONFIG_FRAME_POINTER
236 /* the first instruction of the prologue was: mov ip, sp */
237 reg_set &= ~(1 << ARM_IP);
238 reg_set |= (1 << ARM_SP);
239 emit(ARM_LDM(ARM_SP, reg_set), ctx);
242 if (ctx->seen & SEEN_CALL)
243 reg_set |= 1 << ARM_PC;
244 emit(ARM_POP(reg_set), ctx);
247 if (!(ctx->seen & SEEN_CALL))
248 emit(ARM_BX(ARM_LR), ctx);
252 static int16_t imm8m(u32 x)
256 for (rot = 0; rot < 16; rot++)
257 if ((x & ~ror32(0xff, 2 * rot)) == 0)
258 return rol32(x, 2 * rot) | (rot << 8);
263 #if __LINUX_ARM_ARCH__ < 7
265 static u16 imm_offset(u32 k, struct jit_ctx *ctx)
267 unsigned i = 0, offset;
270 /* on the "fake" run we just count them (duplicates included) */
271 if (ctx->target == NULL) {
276 while ((i < ctx->imm_count) && ctx->imms[i]) {
277 if (ctx->imms[i] == k)
282 if (ctx->imms[i] == 0)
285 /* constants go just after the epilogue */
286 offset = ctx->offsets[ctx->skf->len];
287 offset += ctx->prologue_bytes;
288 offset += ctx->epilogue_bytes;
291 ctx->target[offset / 4] = k;
293 /* PC in ARM mode == address of the instruction + 8 */
294 imm = offset - (8 + ctx->idx * 4);
299 #endif /* __LINUX_ARM_ARCH__ */
302 * Move an immediate that's not an imm8m to a core register.
304 static inline void emit_mov_i_no8m(int rd, u32 val, struct jit_ctx *ctx)
306 #if __LINUX_ARM_ARCH__ < 7
307 emit(ARM_LDR_I(rd, ARM_PC, imm_offset(val, ctx)), ctx);
309 emit(ARM_MOVW(rd, val & 0xffff), ctx);
311 emit(ARM_MOVT(rd, val >> 16), ctx);
315 static inline void emit_mov_i(int rd, u32 val, struct jit_ctx *ctx)
317 int imm12 = imm8m(val);
320 emit(ARM_MOV_I(rd, imm12), ctx);
322 emit_mov_i_no8m(rd, val, ctx);
325 #if __LINUX_ARM_ARCH__ < 6
327 static void emit_load_be32(u8 cond, u8 r_res, u8 r_addr, struct jit_ctx *ctx)
329 _emit(cond, ARM_LDRB_I(ARM_R3, r_addr, 1), ctx);
330 _emit(cond, ARM_LDRB_I(ARM_R1, r_addr, 0), ctx);
331 _emit(cond, ARM_LDRB_I(ARM_R2, r_addr, 3), ctx);
332 _emit(cond, ARM_LSL_I(ARM_R3, ARM_R3, 16), ctx);
333 _emit(cond, ARM_LDRB_I(ARM_R0, r_addr, 2), ctx);
334 _emit(cond, ARM_ORR_S(ARM_R3, ARM_R3, ARM_R1, SRTYPE_LSL, 24), ctx);
335 _emit(cond, ARM_ORR_R(ARM_R3, ARM_R3, ARM_R2), ctx);
336 _emit(cond, ARM_ORR_S(r_res, ARM_R3, ARM_R0, SRTYPE_LSL, 8), ctx);
339 static void emit_load_be16(u8 cond, u8 r_res, u8 r_addr, struct jit_ctx *ctx)
341 _emit(cond, ARM_LDRB_I(ARM_R1, r_addr, 0), ctx);
342 _emit(cond, ARM_LDRB_I(ARM_R2, r_addr, 1), ctx);
343 _emit(cond, ARM_ORR_S(r_res, ARM_R2, ARM_R1, SRTYPE_LSL, 8), ctx);
346 static inline void emit_swap16(u8 r_dst, u8 r_src, struct jit_ctx *ctx)
348 /* r_dst = (r_src << 8) | (r_src >> 8) */
349 emit(ARM_LSL_I(ARM_R1, r_src, 8), ctx);
350 emit(ARM_ORR_S(r_dst, ARM_R1, r_src, SRTYPE_LSR, 8), ctx);
353 * we need to mask out the bits set in r_dst[23:16] due to
354 * the first shift instruction.
356 * note that 0x8ff is the encoded immediate 0x00ff0000.
358 emit(ARM_BIC_I(r_dst, r_dst, 0x8ff), ctx);
363 static void emit_load_be32(u8 cond, u8 r_res, u8 r_addr, struct jit_ctx *ctx)
365 _emit(cond, ARM_LDR_I(r_res, r_addr, 0), ctx);
366 #ifdef __LITTLE_ENDIAN
367 _emit(cond, ARM_REV(r_res, r_res), ctx);
371 static void emit_load_be16(u8 cond, u8 r_res, u8 r_addr, struct jit_ctx *ctx)
373 _emit(cond, ARM_LDRH_I(r_res, r_addr, 0), ctx);
374 #ifdef __LITTLE_ENDIAN
375 _emit(cond, ARM_REV16(r_res, r_res), ctx);
379 static inline void emit_swap16(u8 r_dst __maybe_unused,
380 u8 r_src __maybe_unused,
381 struct jit_ctx *ctx __maybe_unused)
383 #ifdef __LITTLE_ENDIAN
384 emit(ARM_REV16(r_dst, r_src), ctx);
388 #endif /* __LINUX_ARM_ARCH__ < 6 */
391 /* Compute the immediate value for a PC-relative branch. */
392 static inline u32 b_imm(unsigned tgt, struct jit_ctx *ctx)
396 if (ctx->target == NULL)
399 * BPF allows only forward jumps and the offset of the target is
400 * still the one computed during the first pass.
402 imm = ctx->offsets[tgt] + ctx->prologue_bytes - (ctx->idx * 4 + 8);
407 #define OP_IMM3(op, r1, r2, imm_val, ctx) \
409 imm12 = imm8m(imm_val); \
411 emit_mov_i_no8m(r_scratch, imm_val, ctx); \
412 emit(op ## _R((r1), (r2), r_scratch), ctx); \
414 emit(op ## _I((r1), (r2), imm12), ctx); \
418 static inline void emit_err_ret(u8 cond, struct jit_ctx *ctx)
420 if (ctx->ret0_fp_idx >= 0) {
421 _emit(cond, ARM_B(b_imm(ctx->ret0_fp_idx, ctx)), ctx);
422 /* NOP to keep the size constant between passes */
423 emit(ARM_MOV_R(ARM_R0, ARM_R0), ctx);
425 _emit(cond, ARM_MOV_I(ARM_R0, 0), ctx);
426 _emit(cond, ARM_B(b_imm(ctx->skf->len, ctx)), ctx);
430 static inline void emit_blx_r(u8 tgt_reg, struct jit_ctx *ctx)
432 #if __LINUX_ARM_ARCH__ < 5
433 emit(ARM_MOV_R(ARM_LR, ARM_PC), ctx);
435 if (elf_hwcap & HWCAP_THUMB)
436 emit(ARM_BX(tgt_reg), ctx);
438 emit(ARM_MOV_R(ARM_PC, tgt_reg), ctx);
440 emit(ARM_BLX_R(tgt_reg), ctx);
444 static inline void emit_udiv(u8 rd, u8 rm, u8 rn, struct jit_ctx *ctx)
446 #if __LINUX_ARM_ARCH__ == 7
447 if (elf_hwcap & HWCAP_IDIVA) {
448 emit(ARM_UDIV(rd, rm, rn), ctx);
453 emit(ARM_MOV_R(ARM_R0, rm), ctx);
455 emit(ARM_MOV_R(ARM_R1, rn), ctx);
457 ctx->seen |= SEEN_CALL;
458 emit_mov_i(ARM_R3, (u32)jit_udiv, ctx);
459 emit_blx_r(ARM_R3, ctx);
462 emit(ARM_MOV_R(rd, ARM_R0), ctx);
465 static inline void update_on_xread(struct jit_ctx *ctx)
467 if (!(ctx->seen & SEEN_X))
468 ctx->flags |= FLAG_NEED_X_RESET;
473 static int build_body(struct jit_ctx *ctx)
475 void *load_func[] = {jit_get_skb_b, jit_get_skb_h, jit_get_skb_w};
476 const struct sk_filter *prog = ctx->skf;
477 const struct sock_filter *inst;
478 unsigned i, load_order, off, condt;
482 for (i = 0; i < prog->len; i++) {
483 inst = &(prog->insns[i]);
484 /* K as an immediate value operand */
487 /* compute offsets only in the fake pass */
488 if (ctx->target == NULL)
489 ctx->offsets[i] = ctx->idx * 4;
491 switch (inst->code) {
493 emit_mov_i(r_A, k, ctx);
496 ctx->seen |= SEEN_SKB;
497 BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, len) != 4);
498 emit(ARM_LDR_I(r_A, r_skb,
499 offsetof(struct sk_buff, len)), ctx);
503 ctx->seen |= SEEN_MEM_WORD(k);
504 emit(ARM_LDR_I(r_A, ARM_SP, SCRATCH_OFF(k)), ctx);
515 /* the interpreter will deal with the negative K */
518 emit_mov_i(r_off, k, ctx);
520 ctx->seen |= SEEN_DATA | SEEN_CALL;
522 if (load_order > 0) {
523 emit(ARM_SUB_I(r_scratch, r_skb_hl,
524 1 << load_order), ctx);
525 emit(ARM_CMP_R(r_scratch, r_off), ctx);
528 emit(ARM_CMP_R(r_skb_hl, r_off), ctx);
532 _emit(condt, ARM_ADD_R(r_scratch, r_off, r_skb_data),
536 _emit(condt, ARM_LDRB_I(r_A, r_scratch, 0),
538 else if (load_order == 1)
539 emit_load_be16(condt, r_A, r_scratch, ctx);
540 else if (load_order == 2)
541 emit_load_be32(condt, r_A, r_scratch, ctx);
543 _emit(condt, ARM_B(b_imm(i + 1, ctx)), ctx);
546 emit_mov_i(ARM_R3, (u32)load_func[load_order], ctx);
547 emit(ARM_MOV_R(ARM_R0, r_skb), ctx);
548 /* the offset is already in R1 */
549 emit_blx_r(ARM_R3, ctx);
550 /* check the result of skb_copy_bits */
551 emit(ARM_CMP_I(ARM_R1, 0), ctx);
552 emit_err_ret(ARM_COND_NE, ctx);
553 emit(ARM_MOV_R(r_A, ARM_R0), ctx);
564 OP_IMM3(ARM_ADD, r_off, r_X, k, ctx);
568 emit_mov_i(r_X, k, ctx);
570 case BPF_S_LDX_W_LEN:
571 ctx->seen |= SEEN_X | SEEN_SKB;
572 emit(ARM_LDR_I(r_X, r_skb,
573 offsetof(struct sk_buff, len)), ctx);
576 ctx->seen |= SEEN_X | SEEN_MEM_WORD(k);
577 emit(ARM_LDR_I(r_X, ARM_SP, SCRATCH_OFF(k)), ctx);
579 case BPF_S_LDX_B_MSH:
580 /* x = ((*(frame + k)) & 0xf) << 2; */
581 ctx->seen |= SEEN_X | SEEN_DATA | SEEN_CALL;
582 /* the interpreter should deal with the negative K */
585 /* offset in r1: we might have to take the slow path */
586 emit_mov_i(r_off, k, ctx);
587 emit(ARM_CMP_R(r_skb_hl, r_off), ctx);
589 /* load in r0: common with the slowpath */
590 _emit(ARM_COND_HI, ARM_LDRB_R(ARM_R0, r_skb_data,
593 * emit_mov_i() might generate one or two instructions,
594 * the same holds for emit_blx_r()
596 _emit(ARM_COND_HI, ARM_B(b_imm(i + 1, ctx) - 2), ctx);
598 emit(ARM_MOV_R(ARM_R0, r_skb), ctx);
600 emit_mov_i(ARM_R3, (u32)jit_get_skb_b, ctx);
601 emit_blx_r(ARM_R3, ctx);
602 /* check the return value of skb_copy_bits */
603 emit(ARM_CMP_I(ARM_R1, 0), ctx);
604 emit_err_ret(ARM_COND_NE, ctx);
606 emit(ARM_AND_I(r_X, ARM_R0, 0x00f), ctx);
607 emit(ARM_LSL_I(r_X, r_X, 2), ctx);
610 ctx->seen |= SEEN_MEM_WORD(k);
611 emit(ARM_STR_I(r_A, ARM_SP, SCRATCH_OFF(k)), ctx);
614 update_on_xread(ctx);
615 ctx->seen |= SEEN_MEM_WORD(k);
616 emit(ARM_STR_I(r_X, ARM_SP, SCRATCH_OFF(k)), ctx);
618 case BPF_S_ALU_ADD_K:
620 OP_IMM3(ARM_ADD, r_A, r_A, k, ctx);
622 case BPF_S_ALU_ADD_X:
623 update_on_xread(ctx);
624 emit(ARM_ADD_R(r_A, r_A, r_X), ctx);
626 case BPF_S_ALU_SUB_K:
628 OP_IMM3(ARM_SUB, r_A, r_A, k, ctx);
630 case BPF_S_ALU_SUB_X:
631 update_on_xread(ctx);
632 emit(ARM_SUB_R(r_A, r_A, r_X), ctx);
634 case BPF_S_ALU_MUL_K:
636 emit_mov_i(r_scratch, k, ctx);
637 emit(ARM_MUL(r_A, r_A, r_scratch), ctx);
639 case BPF_S_ALU_MUL_X:
640 update_on_xread(ctx);
641 emit(ARM_MUL(r_A, r_A, r_X), ctx);
643 case BPF_S_ALU_DIV_K:
644 /* current k == reciprocal_value(userspace k) */
645 emit_mov_i(r_scratch, k, ctx);
646 /* A = top 32 bits of the product */
647 emit(ARM_UMULL(r_scratch, r_A, r_A, r_scratch), ctx);
649 case BPF_S_ALU_DIV_X:
650 update_on_xread(ctx);
651 emit(ARM_CMP_I(r_X, 0), ctx);
652 emit_err_ret(ARM_COND_EQ, ctx);
653 emit_udiv(r_A, r_A, r_X, ctx);
657 OP_IMM3(ARM_ORR, r_A, r_A, k, ctx);
660 update_on_xread(ctx);
661 emit(ARM_ORR_R(r_A, r_A, r_X), ctx);
663 case BPF_S_ALU_XOR_K:
665 OP_IMM3(ARM_EOR, r_A, r_A, k, ctx);
667 case BPF_S_ANC_ALU_XOR_X:
668 case BPF_S_ALU_XOR_X:
670 update_on_xread(ctx);
671 emit(ARM_EOR_R(r_A, r_A, r_X), ctx);
673 case BPF_S_ALU_AND_K:
675 OP_IMM3(ARM_AND, r_A, r_A, k, ctx);
677 case BPF_S_ALU_AND_X:
678 update_on_xread(ctx);
679 emit(ARM_AND_R(r_A, r_A, r_X), ctx);
681 case BPF_S_ALU_LSH_K:
682 if (unlikely(k > 31))
684 emit(ARM_LSL_I(r_A, r_A, k), ctx);
686 case BPF_S_ALU_LSH_X:
687 update_on_xread(ctx);
688 emit(ARM_LSL_R(r_A, r_A, r_X), ctx);
690 case BPF_S_ALU_RSH_K:
691 if (unlikely(k > 31))
693 emit(ARM_LSR_I(r_A, r_A, k), ctx);
695 case BPF_S_ALU_RSH_X:
696 update_on_xread(ctx);
697 emit(ARM_LSR_R(r_A, r_A, r_X), ctx);
701 emit(ARM_RSB_I(r_A, r_A, 0), ctx);
705 emit(ARM_B(b_imm(i + k + 1, ctx)), ctx);
707 case BPF_S_JMP_JEQ_K:
708 /* pc += (A == K) ? pc->jt : pc->jf */
711 case BPF_S_JMP_JGT_K:
712 /* pc += (A > K) ? pc->jt : pc->jf */
715 case BPF_S_JMP_JGE_K:
716 /* pc += (A >= K) ? pc->jt : pc->jf */
721 emit_mov_i_no8m(r_scratch, k, ctx);
722 emit(ARM_CMP_R(r_A, r_scratch), ctx);
724 emit(ARM_CMP_I(r_A, imm12), ctx);
728 _emit(condt, ARM_B(b_imm(i + inst->jt + 1,
731 _emit(condt ^ 1, ARM_B(b_imm(i + inst->jf + 1,
734 case BPF_S_JMP_JEQ_X:
735 /* pc += (A == X) ? pc->jt : pc->jf */
738 case BPF_S_JMP_JGT_X:
739 /* pc += (A > X) ? pc->jt : pc->jf */
742 case BPF_S_JMP_JGE_X:
743 /* pc += (A >= X) ? pc->jt : pc->jf */
746 update_on_xread(ctx);
747 emit(ARM_CMP_R(r_A, r_X), ctx);
749 case BPF_S_JMP_JSET_K:
750 /* pc += (A & K) ? pc->jt : pc->jf */
752 /* not set iff all zeroes iff Z==1 iff EQ */
756 emit_mov_i_no8m(r_scratch, k, ctx);
757 emit(ARM_TST_R(r_A, r_scratch), ctx);
759 emit(ARM_TST_I(r_A, imm12), ctx);
762 case BPF_S_JMP_JSET_X:
763 /* pc += (A & X) ? pc->jt : pc->jf */
764 update_on_xread(ctx);
766 emit(ARM_TST_R(r_A, r_X), ctx);
769 emit(ARM_MOV_R(ARM_R0, r_A), ctx);
772 if ((k == 0) && (ctx->ret0_fp_idx < 0))
773 ctx->ret0_fp_idx = i;
774 emit_mov_i(ARM_R0, k, ctx);
776 if (i != ctx->skf->len - 1)
777 emit(ARM_B(b_imm(prog->len, ctx)), ctx);
782 emit(ARM_MOV_R(r_X, r_A), ctx);
786 update_on_xread(ctx);
787 emit(ARM_MOV_R(r_A, r_X), ctx);
789 case BPF_S_ANC_PROTOCOL:
790 /* A = ntohs(skb->protocol) */
791 ctx->seen |= SEEN_SKB;
792 BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff,
794 off = offsetof(struct sk_buff, protocol);
795 emit(ARM_LDRH_I(r_scratch, r_skb, off), ctx);
796 emit_swap16(r_A, r_scratch, ctx);
799 /* r_scratch = current_thread_info() */
800 OP_IMM3(ARM_BIC, r_scratch, ARM_SP, THREAD_SIZE - 1, ctx);
801 /* A = current_thread_info()->cpu */
802 BUILD_BUG_ON(FIELD_SIZEOF(struct thread_info, cpu) != 4);
803 off = offsetof(struct thread_info, cpu);
804 emit(ARM_LDR_I(r_A, r_scratch, off), ctx);
806 case BPF_S_ANC_IFINDEX:
807 /* A = skb->dev->ifindex */
808 ctx->seen |= SEEN_SKB;
809 off = offsetof(struct sk_buff, dev);
810 emit(ARM_LDR_I(r_scratch, r_skb, off), ctx);
812 emit(ARM_CMP_I(r_scratch, 0), ctx);
813 emit_err_ret(ARM_COND_EQ, ctx);
815 BUILD_BUG_ON(FIELD_SIZEOF(struct net_device,
817 off = offsetof(struct net_device, ifindex);
818 emit(ARM_LDR_I(r_A, r_scratch, off), ctx);
821 ctx->seen |= SEEN_SKB;
822 BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, mark) != 4);
823 off = offsetof(struct sk_buff, mark);
824 emit(ARM_LDR_I(r_A, r_skb, off), ctx);
826 case BPF_S_ANC_RXHASH:
827 ctx->seen |= SEEN_SKB;
828 BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, rxhash) != 4);
829 off = offsetof(struct sk_buff, rxhash);
830 emit(ARM_LDR_I(r_A, r_skb, off), ctx);
832 case BPF_S_ANC_VLAN_TAG:
833 case BPF_S_ANC_VLAN_TAG_PRESENT:
834 ctx->seen |= SEEN_SKB;
835 BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, vlan_tci) != 2);
836 off = offsetof(struct sk_buff, vlan_tci);
837 emit(ARM_LDRH_I(r_A, r_skb, off), ctx);
838 if (inst->code == BPF_S_ANC_VLAN_TAG)
839 OP_IMM3(ARM_AND, r_A, r_A, VLAN_VID_MASK, ctx);
841 OP_IMM3(ARM_AND, r_A, r_A, VLAN_TAG_PRESENT, ctx);
843 case BPF_S_ANC_QUEUE:
844 ctx->seen |= SEEN_SKB;
845 BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff,
846 queue_mapping) != 2);
847 BUILD_BUG_ON(offsetof(struct sk_buff,
848 queue_mapping) > 0xff);
849 off = offsetof(struct sk_buff, queue_mapping);
850 emit(ARM_LDRH_I(r_A, r_skb, off), ctx);
857 /* compute offsets only during the first pass */
858 if (ctx->target == NULL)
859 ctx->offsets[i] = ctx->idx * 4;
865 void bpf_jit_compile(struct sk_filter *fp)
874 memset(&ctx, 0, sizeof(ctx));
876 ctx.ret0_fp_idx = -1;
878 ctx.offsets = kzalloc(4 * (ctx.skf->len + 1), GFP_KERNEL);
879 if (ctx.offsets == NULL)
882 /* fake pass to fill in the ctx->seen */
883 if (unlikely(build_body(&ctx)))
887 build_prologue(&ctx);
888 ctx.prologue_bytes = (ctx.idx - tmp_idx) * 4;
890 #if __LINUX_ARM_ARCH__ < 7
892 build_epilogue(&ctx);
893 ctx.epilogue_bytes = (ctx.idx - tmp_idx) * 4;
895 ctx.idx += ctx.imm_count;
897 ctx.imms = kzalloc(4 * ctx.imm_count, GFP_KERNEL);
898 if (ctx.imms == NULL)
902 /* there's nothing after the epilogue on ARMv7 */
903 build_epilogue(&ctx);
906 alloc_size = 4 * ctx.idx;
907 ctx.target = module_alloc(alloc_size);
908 if (unlikely(ctx.target == NULL))
912 build_prologue(&ctx);
914 build_epilogue(&ctx);
916 flush_icache_range((u32)ctx.target, (u32)(ctx.target + ctx.idx));
918 #if __LINUX_ARM_ARCH__ < 7
923 if (bpf_jit_enable > 1)
924 /* there are 2 passes here */
925 bpf_jit_dump(fp->len, alloc_size, 2, ctx.target);
927 fp->bpf_func = (void *)ctx.target;
933 void bpf_jit_free(struct sk_filter *fp)
935 if (fp->bpf_func != sk_run_filter)
936 module_free(NULL, fp->bpf_func);