2 * linux/arch/arm/mm/dma-mapping.c
4 * Copyright (C) 2000-2004 Russell King
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * DMA uncached mapping support.
12 #include <linux/module.h>
14 #include <linux/gfp.h>
15 #include <linux/errno.h>
16 #include <linux/list.h>
17 #include <linux/init.h>
18 #include <linux/device.h>
19 #include <linux/dma-mapping.h>
20 #include <linux/dma-contiguous.h>
21 #include <linux/highmem.h>
22 #include <linux/memblock.h>
23 #include <linux/slab.h>
24 #include <linux/iommu.h>
26 #include <linux/vmalloc.h>
27 #include <linux/sizes.h>
29 #include <asm/memory.h>
30 #include <asm/highmem.h>
31 #include <asm/cacheflush.h>
32 #include <asm/tlbflush.h>
33 #include <asm/mach/arch.h>
34 #include <asm/dma-iommu.h>
35 #include <asm/mach/map.h>
36 #include <asm/system_info.h>
37 #include <asm/dma-contiguous.h>
42 * The DMA API is built upon the notion of "buffer ownership". A buffer
43 * is either exclusively owned by the CPU (and therefore may be accessed
44 * by it) or exclusively owned by the DMA device. These helper functions
45 * represent the transitions between these two ownership states.
47 * Note, however, that on later ARMs, this notion does not work due to
48 * speculative prefetches. We model our approach on the assumption that
49 * the CPU does do speculative prefetches, which means we clean caches
50 * before transfers and delay cache invalidation until transfer completion.
53 static void __dma_page_cpu_to_dev(struct page *, unsigned long,
54 size_t, enum dma_data_direction);
55 static void __dma_page_dev_to_cpu(struct page *, unsigned long,
56 size_t, enum dma_data_direction);
59 * arm_dma_map_page - map a portion of a page for streaming DMA
60 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
61 * @page: page that buffer resides in
62 * @offset: offset into page for start of buffer
63 * @size: size of buffer to map
64 * @dir: DMA transfer direction
66 * Ensure that any data held in the cache is appropriately discarded
69 * The device owns this memory once this call has completed. The CPU
70 * can regain ownership by calling dma_unmap_page().
72 static dma_addr_t arm_dma_map_page(struct device *dev, struct page *page,
73 unsigned long offset, size_t size, enum dma_data_direction dir,
74 struct dma_attrs *attrs)
76 if (!arch_is_coherent() && !dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
77 __dma_page_cpu_to_dev(page, offset, size, dir);
78 return pfn_to_dma(dev, page_to_pfn(page)) + offset;
82 * arm_dma_unmap_page - unmap a buffer previously mapped through dma_map_page()
83 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
84 * @handle: DMA address of buffer
85 * @size: size of buffer (same as passed to dma_map_page)
86 * @dir: DMA transfer direction (same as passed to dma_map_page)
88 * Unmap a page streaming mode DMA translation. The handle and size
89 * must match what was provided in the previous dma_map_page() call.
90 * All other usages are undefined.
92 * After this call, reads by the CPU to the buffer are guaranteed to see
93 * whatever the device wrote there.
95 static void arm_dma_unmap_page(struct device *dev, dma_addr_t handle,
96 size_t size, enum dma_data_direction dir,
97 struct dma_attrs *attrs)
99 if (!arch_is_coherent() && !dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
100 __dma_page_dev_to_cpu(pfn_to_page(dma_to_pfn(dev, handle)),
101 handle & ~PAGE_MASK, size, dir);
104 static void arm_dma_sync_single_for_cpu(struct device *dev,
105 dma_addr_t handle, size_t size, enum dma_data_direction dir)
107 unsigned int offset = handle & (PAGE_SIZE - 1);
108 struct page *page = pfn_to_page(dma_to_pfn(dev, handle-offset));
109 if (!arch_is_coherent())
110 __dma_page_dev_to_cpu(page, offset, size, dir);
113 static void arm_dma_sync_single_for_device(struct device *dev,
114 dma_addr_t handle, size_t size, enum dma_data_direction dir)
116 unsigned int offset = handle & (PAGE_SIZE - 1);
117 struct page *page = pfn_to_page(dma_to_pfn(dev, handle-offset));
118 if (!arch_is_coherent())
119 __dma_page_cpu_to_dev(page, offset, size, dir);
122 static int arm_dma_set_mask(struct device *dev, u64 dma_mask);
124 struct dma_map_ops arm_dma_ops = {
125 .alloc = arm_dma_alloc,
126 .free = arm_dma_free,
127 .mmap = arm_dma_mmap,
128 .get_sgtable = arm_dma_get_sgtable,
129 .map_page = arm_dma_map_page,
130 .unmap_page = arm_dma_unmap_page,
131 .map_sg = arm_dma_map_sg,
132 .unmap_sg = arm_dma_unmap_sg,
133 .sync_single_for_cpu = arm_dma_sync_single_for_cpu,
134 .sync_single_for_device = arm_dma_sync_single_for_device,
135 .sync_sg_for_cpu = arm_dma_sync_sg_for_cpu,
136 .sync_sg_for_device = arm_dma_sync_sg_for_device,
137 .set_dma_mask = arm_dma_set_mask,
139 EXPORT_SYMBOL(arm_dma_ops);
141 static u64 get_coherent_dma_mask(struct device *dev)
143 u64 mask = (u64)arm_dma_limit;
146 mask = dev->coherent_dma_mask;
149 * Sanity check the DMA mask - it must be non-zero, and
150 * must be able to be satisfied by a DMA allocation.
153 dev_warn(dev, "coherent DMA mask is unset\n");
157 if ((~mask) & (u64)arm_dma_limit) {
158 dev_warn(dev, "coherent DMA mask %#llx is smaller "
159 "than system GFP_DMA mask %#llx\n",
160 mask, (u64)arm_dma_limit);
168 static void __dma_clear_buffer(struct page *page, size_t size)
172 * Ensure that the allocated pages are zeroed, and that any data
173 * lurking in the kernel direct-mapped region is invalidated.
175 ptr = page_address(page);
177 memset(ptr, 0, size);
178 dmac_flush_range(ptr, ptr + size);
179 outer_flush_range(__pa(ptr), __pa(ptr) + size);
184 * Allocate a DMA buffer for 'dev' of size 'size' using the
185 * specified gfp mask. Note that 'size' must be page aligned.
187 static struct page *__dma_alloc_buffer(struct device *dev, size_t size, gfp_t gfp)
189 unsigned long order = get_order(size);
190 struct page *page, *p, *e;
192 page = alloc_pages(gfp, order);
197 * Now split the huge page and free the excess pages
199 split_page(page, order);
200 for (p = page + (size >> PAGE_SHIFT), e = page + (1 << order); p < e; p++)
203 __dma_clear_buffer(page, size);
209 * Free a DMA buffer. 'size' must be page aligned.
211 static void __dma_free_buffer(struct page *page, size_t size)
213 struct page *e = page + (size >> PAGE_SHIFT);
222 #ifdef CONFIG_HUGETLB_PAGE
223 #error ARM Coherent DMA allocator does not (yet) support huge TLB
226 static void *__alloc_from_contiguous(struct device *dev, size_t size,
227 pgprot_t prot, struct page **ret_page);
229 static void *__alloc_remap_buffer(struct device *dev, size_t size, gfp_t gfp,
230 pgprot_t prot, struct page **ret_page,
234 __dma_alloc_remap(struct page *page, size_t size, gfp_t gfp, pgprot_t prot,
237 struct vm_struct *area;
241 * DMA allocation can be mapped to user space, so lets
242 * set VM_USERMAP flags too.
244 area = get_vm_area_caller(size, VM_ARM_DMA_CONSISTENT | VM_USERMAP,
248 addr = (unsigned long)area->addr;
249 area->phys_addr = __pfn_to_phys(page_to_pfn(page));
251 if (ioremap_page_range(addr, addr + size, area->phys_addr, prot)) {
252 vunmap((void *)addr);
258 static void __dma_free_remap(void *cpu_addr, size_t size)
260 unsigned int flags = VM_ARM_DMA_CONSISTENT | VM_USERMAP;
261 struct vm_struct *area = find_vm_area(cpu_addr);
262 if (!area || (area->flags & flags) != flags) {
263 WARN(1, "trying to free invalid coherent area: %p\n", cpu_addr);
266 unmap_kernel_range((unsigned long)cpu_addr, size);
270 #define DEFAULT_DMA_COHERENT_POOL_SIZE SZ_256K
275 unsigned long *bitmap;
276 unsigned long nr_pages;
281 static struct dma_pool atomic_pool = {
282 .size = DEFAULT_DMA_COHERENT_POOL_SIZE,
285 static int __init early_coherent_pool(char *p)
287 atomic_pool.size = memparse(p, &p);
290 early_param("coherent_pool", early_coherent_pool);
292 void __init init_dma_coherent_pool_size(unsigned long size)
295 * Catch any attempt to set the pool size too late.
297 BUG_ON(atomic_pool.vaddr);
300 * Set architecture specific coherent pool size only if
301 * it has not been changed by kernel command line parameter.
303 if (atomic_pool.size == DEFAULT_DMA_COHERENT_POOL_SIZE)
304 atomic_pool.size = size;
308 * Initialise the coherent pool for atomic allocations.
310 static int __init atomic_pool_init(void)
312 struct dma_pool *pool = &atomic_pool;
313 pgprot_t prot = pgprot_dmacoherent(pgprot_kernel);
314 unsigned long nr_pages = pool->size >> PAGE_SHIFT;
315 unsigned long *bitmap;
319 int bitmap_size = BITS_TO_LONGS(nr_pages) * sizeof(long);
321 bitmap = kzalloc(bitmap_size, GFP_KERNEL);
325 pages = kzalloc(nr_pages * sizeof(struct page *), GFP_KERNEL);
329 if (IS_ENABLED(CONFIG_CMA))
330 ptr = __alloc_from_contiguous(NULL, pool->size, prot, &page);
332 ptr = __alloc_remap_buffer(NULL, pool->size, GFP_KERNEL, prot,
337 for (i = 0; i < nr_pages; i++)
340 spin_lock_init(&pool->lock);
343 pool->bitmap = bitmap;
344 pool->nr_pages = nr_pages;
345 pr_info("DMA: preallocated %u KiB pool for atomic coherent allocations\n",
346 (unsigned)pool->size / 1024);
354 pr_err("DMA: failed to allocate %u KiB pool for atomic coherent allocation\n",
355 (unsigned)pool->size / 1024);
359 * CMA is activated by core_initcall, so we must be called after it.
361 postcore_initcall(atomic_pool_init);
363 struct dma_contig_early_reserve {
368 static struct dma_contig_early_reserve dma_mmu_remap[MAX_CMA_AREAS] __initdata;
370 static int dma_mmu_remap_num __initdata;
372 void __init dma_contiguous_early_fixup(phys_addr_t base, unsigned long size)
374 dma_mmu_remap[dma_mmu_remap_num].base = base;
375 dma_mmu_remap[dma_mmu_remap_num].size = size;
379 void __init dma_contiguous_remap(void)
382 for (i = 0; i < dma_mmu_remap_num; i++) {
383 phys_addr_t start = dma_mmu_remap[i].base;
384 phys_addr_t end = start + dma_mmu_remap[i].size;
388 if (end > arm_lowmem_limit)
389 end = arm_lowmem_limit;
393 map.pfn = __phys_to_pfn(start);
394 map.virtual = __phys_to_virt(start);
395 map.length = end - start;
396 map.type = MT_MEMORY_DMA_READY;
399 * Clear previous low-memory mapping
401 for (addr = __phys_to_virt(start); addr < __phys_to_virt(end);
403 pmd_clear(pmd_off_k(addr));
405 iotable_init(&map, 1);
409 static int __dma_update_pte(pte_t *pte, pgtable_t token, unsigned long addr,
412 struct page *page = virt_to_page(addr);
413 pgprot_t prot = *(pgprot_t *)data;
415 set_pte_ext(pte, mk_pte(page, prot), 0);
419 static void __dma_remap(struct page *page, size_t size, pgprot_t prot)
421 unsigned long start = (unsigned long) page_address(page);
422 unsigned end = start + size;
424 apply_to_page_range(&init_mm, start, size, __dma_update_pte, &prot);
426 flush_tlb_kernel_range(start, end);
429 static void *__alloc_remap_buffer(struct device *dev, size_t size, gfp_t gfp,
430 pgprot_t prot, struct page **ret_page,
435 page = __dma_alloc_buffer(dev, size, gfp);
439 ptr = __dma_alloc_remap(page, size, gfp, prot, caller);
441 __dma_free_buffer(page, size);
449 static void *__alloc_from_pool(size_t size, struct page **ret_page)
451 struct dma_pool *pool = &atomic_pool;
452 unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT;
456 unsigned long align_mask;
459 WARN(1, "coherent pool not initialised!\n");
464 * Align the region allocation - allocations from pool are rather
465 * small, so align them to their order in pages, minimum is a page
466 * size. This helps reduce fragmentation of the DMA space.
468 align_mask = (1 << get_order(size)) - 1;
470 spin_lock_irqsave(&pool->lock, flags);
471 pageno = bitmap_find_next_zero_area(pool->bitmap, pool->nr_pages,
472 0, count, align_mask);
473 if (pageno < pool->nr_pages) {
474 bitmap_set(pool->bitmap, pageno, count);
475 ptr = pool->vaddr + PAGE_SIZE * pageno;
476 *ret_page = pool->pages[pageno];
478 pr_err_once("ERROR: %u KiB atomic DMA coherent pool is too small!\n"
479 "Please increase it with coherent_pool= kernel parameter!\n",
480 (unsigned)pool->size / 1024);
482 spin_unlock_irqrestore(&pool->lock, flags);
487 static bool __in_atomic_pool(void *start, size_t size)
489 struct dma_pool *pool = &atomic_pool;
490 void *end = start + size;
491 void *pool_start = pool->vaddr;
492 void *pool_end = pool->vaddr + pool->size;
494 if (start < pool_start || start >= pool_end)
500 WARN(1, "Wrong coherent size(%p-%p) from atomic pool(%p-%p)\n",
501 start, end - 1, pool_start, pool_end - 1);
506 static int __free_from_pool(void *start, size_t size)
508 struct dma_pool *pool = &atomic_pool;
509 unsigned long pageno, count;
512 if (!__in_atomic_pool(start, size))
515 pageno = (start - pool->vaddr) >> PAGE_SHIFT;
516 count = size >> PAGE_SHIFT;
518 spin_lock_irqsave(&pool->lock, flags);
519 bitmap_clear(pool->bitmap, pageno, count);
520 spin_unlock_irqrestore(&pool->lock, flags);
525 static void *__alloc_from_contiguous(struct device *dev, size_t size,
526 pgprot_t prot, struct page **ret_page)
528 unsigned long order = get_order(size);
529 size_t count = size >> PAGE_SHIFT;
532 page = dma_alloc_from_contiguous(dev, count, order);
536 __dma_clear_buffer(page, size);
537 __dma_remap(page, size, prot);
540 return page_address(page);
543 static void __free_from_contiguous(struct device *dev, struct page *page,
546 __dma_remap(page, size, pgprot_kernel);
547 dma_release_from_contiguous(dev, page, size >> PAGE_SHIFT);
550 static inline pgprot_t __get_dma_pgprot(struct dma_attrs *attrs, pgprot_t prot)
552 prot = dma_get_attr(DMA_ATTR_WRITE_COMBINE, attrs) ?
553 pgprot_writecombine(prot) :
554 pgprot_dmacoherent(prot);
560 #else /* !CONFIG_MMU */
564 #define __get_dma_pgprot(attrs, prot) __pgprot(0)
565 #define __alloc_remap_buffer(dev, size, gfp, prot, ret, c) NULL
566 #define __alloc_from_pool(size, ret_page) NULL
567 #define __alloc_from_contiguous(dev, size, prot, ret) NULL
568 #define __free_from_pool(cpu_addr, size) 0
569 #define __free_from_contiguous(dev, page, size) do { } while (0)
570 #define __dma_free_remap(cpu_addr, size) do { } while (0)
572 #endif /* CONFIG_MMU */
574 static void *__alloc_simple_buffer(struct device *dev, size_t size, gfp_t gfp,
575 struct page **ret_page)
578 page = __dma_alloc_buffer(dev, size, gfp);
583 return page_address(page);
588 static void *__dma_alloc(struct device *dev, size_t size, dma_addr_t *handle,
589 gfp_t gfp, pgprot_t prot, const void *caller)
591 u64 mask = get_coherent_dma_mask(dev);
595 #ifdef CONFIG_DMA_API_DEBUG
596 u64 limit = (mask + 1) & ~mask;
597 if (limit && size >= limit) {
598 dev_warn(dev, "coherent allocation too big (requested %#x mask %#llx)\n",
607 if (mask < 0xffffffffULL)
611 * Following is a work-around (a.k.a. hack) to prevent pages
612 * with __GFP_COMP being passed to split_page() which cannot
613 * handle them. The real problem is that this flag probably
614 * should be 0 on ARM as it is not supported on this
615 * platform; see CONFIG_HUGETLBFS.
617 gfp &= ~(__GFP_COMP);
619 *handle = DMA_ERROR_CODE;
620 size = PAGE_ALIGN(size);
622 if (arch_is_coherent() || nommu())
623 addr = __alloc_simple_buffer(dev, size, gfp, &page);
624 else if (gfp & GFP_ATOMIC)
625 addr = __alloc_from_pool(size, &page);
626 else if (!IS_ENABLED(CONFIG_CMA))
627 addr = __alloc_remap_buffer(dev, size, gfp, prot, &page, caller);
629 addr = __alloc_from_contiguous(dev, size, prot, &page);
632 *handle = pfn_to_dma(dev, page_to_pfn(page));
638 * Allocate DMA-coherent memory space and return both the kernel remapped
639 * virtual and bus address for that space.
641 void *arm_dma_alloc(struct device *dev, size_t size, dma_addr_t *handle,
642 gfp_t gfp, struct dma_attrs *attrs)
644 pgprot_t prot = __get_dma_pgprot(attrs, pgprot_kernel);
647 if (dma_alloc_from_coherent(dev, size, handle, &memory))
650 return __dma_alloc(dev, size, handle, gfp, prot,
651 __builtin_return_address(0));
655 * Create userspace mapping for the DMA-coherent memory.
657 int arm_dma_mmap(struct device *dev, struct vm_area_struct *vma,
658 void *cpu_addr, dma_addr_t dma_addr, size_t size,
659 struct dma_attrs *attrs)
663 unsigned long nr_vma_pages = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT;
664 unsigned long nr_pages = PAGE_ALIGN(size) >> PAGE_SHIFT;
665 unsigned long pfn = dma_to_pfn(dev, dma_addr);
666 unsigned long off = vma->vm_pgoff;
668 vma->vm_page_prot = __get_dma_pgprot(attrs, vma->vm_page_prot);
670 if (dma_mmap_from_coherent(dev, vma, cpu_addr, size, &ret))
673 if (off < nr_pages && nr_vma_pages <= (nr_pages - off)) {
674 ret = remap_pfn_range(vma, vma->vm_start,
676 vma->vm_end - vma->vm_start,
679 #endif /* CONFIG_MMU */
685 * Free a buffer as defined by the above mapping.
687 void arm_dma_free(struct device *dev, size_t size, void *cpu_addr,
688 dma_addr_t handle, struct dma_attrs *attrs)
690 struct page *page = pfn_to_page(dma_to_pfn(dev, handle));
692 if (dma_release_from_coherent(dev, get_order(size), cpu_addr))
695 size = PAGE_ALIGN(size);
697 if (arch_is_coherent() || nommu()) {
698 __dma_free_buffer(page, size);
699 } else if (__free_from_pool(cpu_addr, size)) {
701 } else if (!IS_ENABLED(CONFIG_CMA)) {
702 __dma_free_remap(cpu_addr, size);
703 __dma_free_buffer(page, size);
706 * Non-atomic allocations cannot be freed with IRQs disabled
708 WARN_ON(irqs_disabled());
709 __free_from_contiguous(dev, page, size);
713 int arm_dma_get_sgtable(struct device *dev, struct sg_table *sgt,
714 void *cpu_addr, dma_addr_t handle, size_t size,
715 struct dma_attrs *attrs)
717 struct page *page = pfn_to_page(dma_to_pfn(dev, handle));
720 ret = sg_alloc_table(sgt, 1, GFP_KERNEL);
724 sg_set_page(sgt->sgl, page, PAGE_ALIGN(size), 0);
728 static void dma_cache_maint_page(struct page *page, unsigned long offset,
729 size_t size, enum dma_data_direction dir,
730 void (*op)(const void *, size_t, int))
733 * A single sg entry may refer to multiple physically contiguous
734 * pages. But we still need to process highmem pages individually.
735 * If highmem is not configured then the bulk of this loop gets
743 if (PageHighMem(page)) {
744 if (len + offset > PAGE_SIZE) {
745 if (offset >= PAGE_SIZE) {
746 page += offset / PAGE_SIZE;
749 len = PAGE_SIZE - offset;
751 vaddr = kmap_high_get(page);
756 } else if (cache_is_vipt()) {
757 /* unmapped pages might still be cached */
758 vaddr = kmap_atomic(page);
759 op(vaddr + offset, len, dir);
760 kunmap_atomic(vaddr);
763 vaddr = page_address(page) + offset;
773 * Make an area consistent for devices.
774 * Note: Drivers should NOT use this function directly, as it will break
775 * platforms with CONFIG_DMABOUNCE.
776 * Use the driver DMA support - see dma-mapping.h (dma_sync_*)
778 static void __dma_page_cpu_to_dev(struct page *page, unsigned long off,
779 size_t size, enum dma_data_direction dir)
783 dma_cache_maint_page(page, off, size, dir, dmac_map_area);
785 paddr = page_to_phys(page) + off;
786 if (dir == DMA_FROM_DEVICE) {
787 outer_inv_range(paddr, paddr + size);
789 outer_clean_range(paddr, paddr + size);
791 /* FIXME: non-speculating: flush on bidirectional mappings? */
794 static void __dma_page_dev_to_cpu(struct page *page, unsigned long off,
795 size_t size, enum dma_data_direction dir)
797 unsigned long paddr = page_to_phys(page) + off;
799 /* FIXME: non-speculating: not required */
800 /* don't bother invalidating if DMA to device */
801 if (dir != DMA_TO_DEVICE)
802 outer_inv_range(paddr, paddr + size);
804 dma_cache_maint_page(page, off, size, dir, dmac_unmap_area);
807 * Mark the D-cache clean for this page to avoid extra flushing.
809 if (dir != DMA_TO_DEVICE && off == 0 && size >= PAGE_SIZE)
810 set_bit(PG_dcache_clean, &page->flags);
814 * arm_dma_map_sg - map a set of SG buffers for streaming mode DMA
815 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
816 * @sg: list of buffers
817 * @nents: number of buffers to map
818 * @dir: DMA transfer direction
820 * Map a set of buffers described by scatterlist in streaming mode for DMA.
821 * This is the scatter-gather version of the dma_map_single interface.
822 * Here the scatter gather list elements are each tagged with the
823 * appropriate dma address and length. They are obtained via
824 * sg_dma_{address,length}.
826 * Device ownership issues as mentioned for dma_map_single are the same
829 int arm_dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
830 enum dma_data_direction dir, struct dma_attrs *attrs)
832 struct dma_map_ops *ops = get_dma_ops(dev);
833 struct scatterlist *s;
836 for_each_sg(sg, s, nents, i) {
837 #ifdef CONFIG_NEED_SG_DMA_LENGTH
838 s->dma_length = s->length;
840 s->dma_address = ops->map_page(dev, sg_page(s), s->offset,
841 s->length, dir, attrs);
842 if (dma_mapping_error(dev, s->dma_address))
848 for_each_sg(sg, s, i, j)
849 ops->unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir, attrs);
854 * arm_dma_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
855 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
856 * @sg: list of buffers
857 * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
858 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
860 * Unmap a set of streaming mode DMA translations. Again, CPU access
861 * rules concerning calls here are the same as for dma_unmap_single().
863 void arm_dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
864 enum dma_data_direction dir, struct dma_attrs *attrs)
866 struct dma_map_ops *ops = get_dma_ops(dev);
867 struct scatterlist *s;
871 for_each_sg(sg, s, nents, i)
872 ops->unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir, attrs);
876 * arm_dma_sync_sg_for_cpu
877 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
878 * @sg: list of buffers
879 * @nents: number of buffers to map (returned from dma_map_sg)
880 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
882 void arm_dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
883 int nents, enum dma_data_direction dir)
885 struct dma_map_ops *ops = get_dma_ops(dev);
886 struct scatterlist *s;
889 for_each_sg(sg, s, nents, i)
890 ops->sync_single_for_cpu(dev, sg_dma_address(s), s->length,
895 * arm_dma_sync_sg_for_device
896 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
897 * @sg: list of buffers
898 * @nents: number of buffers to map (returned from dma_map_sg)
899 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
901 void arm_dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
902 int nents, enum dma_data_direction dir)
904 struct dma_map_ops *ops = get_dma_ops(dev);
905 struct scatterlist *s;
908 for_each_sg(sg, s, nents, i)
909 ops->sync_single_for_device(dev, sg_dma_address(s), s->length,
914 * Return whether the given device DMA address mask can be supported
915 * properly. For example, if your device can only drive the low 24-bits
916 * during bus mastering, then you would pass 0x00ffffff as the mask
919 int dma_supported(struct device *dev, u64 mask)
921 if (mask < (u64)arm_dma_limit)
925 EXPORT_SYMBOL(dma_supported);
927 static int arm_dma_set_mask(struct device *dev, u64 dma_mask)
929 if (!dev->dma_mask || !dma_supported(dev, dma_mask))
932 *dev->dma_mask = dma_mask;
937 #define PREALLOC_DMA_DEBUG_ENTRIES 4096
939 static int __init dma_debug_do_init(void)
941 dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES);
944 fs_initcall(dma_debug_do_init);
946 #ifdef CONFIG_ARM_DMA_USE_IOMMU
950 static inline dma_addr_t __alloc_iova(struct dma_iommu_mapping *mapping,
953 unsigned int order = get_order(size);
954 unsigned int align = 0;
955 unsigned int count, start;
958 count = ((PAGE_ALIGN(size) >> PAGE_SHIFT) +
959 (1 << mapping->order) - 1) >> mapping->order;
961 if (order > mapping->order)
962 align = (1 << (order - mapping->order)) - 1;
964 spin_lock_irqsave(&mapping->lock, flags);
965 start = bitmap_find_next_zero_area(mapping->bitmap, mapping->bits, 0,
967 if (start > mapping->bits) {
968 spin_unlock_irqrestore(&mapping->lock, flags);
969 return DMA_ERROR_CODE;
972 bitmap_set(mapping->bitmap, start, count);
973 spin_unlock_irqrestore(&mapping->lock, flags);
975 return mapping->base + (start << (mapping->order + PAGE_SHIFT));
978 static inline void __free_iova(struct dma_iommu_mapping *mapping,
979 dma_addr_t addr, size_t size)
981 unsigned int start = (addr - mapping->base) >>
982 (mapping->order + PAGE_SHIFT);
983 unsigned int count = ((size >> PAGE_SHIFT) +
984 (1 << mapping->order) - 1) >> mapping->order;
987 spin_lock_irqsave(&mapping->lock, flags);
988 bitmap_clear(mapping->bitmap, start, count);
989 spin_unlock_irqrestore(&mapping->lock, flags);
992 static struct page **__iommu_alloc_buffer(struct device *dev, size_t size, gfp_t gfp)
995 int count = size >> PAGE_SHIFT;
996 int array_size = count * sizeof(struct page *);
999 if (array_size <= PAGE_SIZE)
1000 pages = kzalloc(array_size, gfp);
1002 pages = vzalloc(array_size);
1007 int j, order = __fls(count);
1009 pages[i] = alloc_pages(gfp | __GFP_NOWARN, order);
1010 while (!pages[i] && order)
1011 pages[i] = alloc_pages(gfp | __GFP_NOWARN, --order);
1016 split_page(pages[i], order);
1019 pages[i + j] = pages[i] + j;
1021 __dma_clear_buffer(pages[i], PAGE_SIZE << order);
1023 count -= 1 << order;
1030 __free_pages(pages[i], 0);
1031 if (array_size <= PAGE_SIZE)
1038 static int __iommu_free_buffer(struct device *dev, struct page **pages, size_t size)
1040 int count = size >> PAGE_SHIFT;
1041 int array_size = count * sizeof(struct page *);
1043 for (i = 0; i < count; i++)
1045 __free_pages(pages[i], 0);
1046 if (array_size <= PAGE_SIZE)
1054 * Create a CPU mapping for a specified pages
1057 __iommu_alloc_remap(struct page **pages, size_t size, gfp_t gfp, pgprot_t prot,
1060 unsigned int i, nr_pages = PAGE_ALIGN(size) >> PAGE_SHIFT;
1061 struct vm_struct *area;
1064 area = get_vm_area_caller(size, VM_ARM_DMA_CONSISTENT | VM_USERMAP,
1069 area->pages = pages;
1070 area->nr_pages = nr_pages;
1071 p = (unsigned long)area->addr;
1073 for (i = 0; i < nr_pages; i++) {
1074 phys_addr_t phys = __pfn_to_phys(page_to_pfn(pages[i]));
1075 if (ioremap_page_range(p, p + PAGE_SIZE, phys, prot))
1081 unmap_kernel_range((unsigned long)area->addr, size);
1087 * Create a mapping in device IO address space for specified pages
1090 __iommu_create_mapping(struct device *dev, struct page **pages, size_t size)
1092 struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1093 unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT;
1094 dma_addr_t dma_addr, iova;
1095 int i, ret = DMA_ERROR_CODE;
1097 dma_addr = __alloc_iova(mapping, size);
1098 if (dma_addr == DMA_ERROR_CODE)
1102 for (i = 0; i < count; ) {
1103 unsigned int next_pfn = page_to_pfn(pages[i]) + 1;
1104 phys_addr_t phys = page_to_phys(pages[i]);
1105 unsigned int len, j;
1107 for (j = i + 1; j < count; j++, next_pfn++)
1108 if (page_to_pfn(pages[j]) != next_pfn)
1111 len = (j - i) << PAGE_SHIFT;
1112 ret = iommu_map(mapping->domain, iova, phys, len, 0);
1120 iommu_unmap(mapping->domain, dma_addr, iova-dma_addr);
1121 __free_iova(mapping, dma_addr, size);
1122 return DMA_ERROR_CODE;
1125 static int __iommu_remove_mapping(struct device *dev, dma_addr_t iova, size_t size)
1127 struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1130 * add optional in-page offset from iova to size and align
1131 * result to page size
1133 size = PAGE_ALIGN((iova & ~PAGE_MASK) + size);
1136 iommu_unmap(mapping->domain, iova, size);
1137 __free_iova(mapping, iova, size);
1141 static struct page **__atomic_get_pages(void *addr)
1143 struct dma_pool *pool = &atomic_pool;
1144 struct page **pages = pool->pages;
1145 int offs = (addr - pool->vaddr) >> PAGE_SHIFT;
1147 return pages + offs;
1150 static struct page **__iommu_get_pages(void *cpu_addr, struct dma_attrs *attrs)
1152 struct vm_struct *area;
1154 if (__in_atomic_pool(cpu_addr, PAGE_SIZE))
1155 return __atomic_get_pages(cpu_addr);
1157 if (dma_get_attr(DMA_ATTR_NO_KERNEL_MAPPING, attrs))
1160 area = find_vm_area(cpu_addr);
1161 if (area && (area->flags & VM_ARM_DMA_CONSISTENT))
1166 static void *__iommu_alloc_atomic(struct device *dev, size_t size,
1172 addr = __alloc_from_pool(size, &page);
1176 *handle = __iommu_create_mapping(dev, &page, size);
1177 if (*handle == DMA_ERROR_CODE)
1183 __free_from_pool(addr, size);
1187 static void __iommu_free_atomic(struct device *dev, struct page **pages,
1188 dma_addr_t handle, size_t size)
1190 __iommu_remove_mapping(dev, handle, size);
1191 __free_from_pool(page_address(pages[0]), size);
1194 static void *arm_iommu_alloc_attrs(struct device *dev, size_t size,
1195 dma_addr_t *handle, gfp_t gfp, struct dma_attrs *attrs)
1197 pgprot_t prot = __get_dma_pgprot(attrs, pgprot_kernel);
1198 struct page **pages;
1201 *handle = DMA_ERROR_CODE;
1202 size = PAGE_ALIGN(size);
1204 if (gfp & GFP_ATOMIC)
1205 return __iommu_alloc_atomic(dev, size, handle);
1207 pages = __iommu_alloc_buffer(dev, size, gfp);
1211 *handle = __iommu_create_mapping(dev, pages, size);
1212 if (*handle == DMA_ERROR_CODE)
1215 if (dma_get_attr(DMA_ATTR_NO_KERNEL_MAPPING, attrs))
1218 addr = __iommu_alloc_remap(pages, size, gfp, prot,
1219 __builtin_return_address(0));
1226 __iommu_remove_mapping(dev, *handle, size);
1228 __iommu_free_buffer(dev, pages, size);
1232 static int arm_iommu_mmap_attrs(struct device *dev, struct vm_area_struct *vma,
1233 void *cpu_addr, dma_addr_t dma_addr, size_t size,
1234 struct dma_attrs *attrs)
1236 unsigned long uaddr = vma->vm_start;
1237 unsigned long usize = vma->vm_end - vma->vm_start;
1238 struct page **pages = __iommu_get_pages(cpu_addr, attrs);
1240 vma->vm_page_prot = __get_dma_pgprot(attrs, vma->vm_page_prot);
1246 int ret = vm_insert_page(vma, uaddr, *pages++);
1248 pr_err("Remapping memory failed: %d\n", ret);
1253 } while (usize > 0);
1259 * free a page as defined by the above mapping.
1260 * Must not be called with IRQs disabled.
1262 void arm_iommu_free_attrs(struct device *dev, size_t size, void *cpu_addr,
1263 dma_addr_t handle, struct dma_attrs *attrs)
1265 struct page **pages = __iommu_get_pages(cpu_addr, attrs);
1266 size = PAGE_ALIGN(size);
1269 WARN(1, "trying to free invalid coherent area: %p\n", cpu_addr);
1273 if (__in_atomic_pool(cpu_addr, size)) {
1274 __iommu_free_atomic(dev, pages, handle, size);
1278 if (!dma_get_attr(DMA_ATTR_NO_KERNEL_MAPPING, attrs)) {
1279 unmap_kernel_range((unsigned long)cpu_addr, size);
1283 __iommu_remove_mapping(dev, handle, size);
1284 __iommu_free_buffer(dev, pages, size);
1287 static int arm_iommu_get_sgtable(struct device *dev, struct sg_table *sgt,
1288 void *cpu_addr, dma_addr_t dma_addr,
1289 size_t size, struct dma_attrs *attrs)
1291 unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT;
1292 struct page **pages = __iommu_get_pages(cpu_addr, attrs);
1297 return sg_alloc_table_from_pages(sgt, pages, count, 0, size,
1302 * Map a part of the scatter-gather list into contiguous io address space
1304 static int __map_sg_chunk(struct device *dev, struct scatterlist *sg,
1305 size_t size, dma_addr_t *handle,
1306 enum dma_data_direction dir, struct dma_attrs *attrs)
1308 struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1309 dma_addr_t iova, iova_base;
1312 struct scatterlist *s;
1314 size = PAGE_ALIGN(size);
1315 *handle = DMA_ERROR_CODE;
1317 iova_base = iova = __alloc_iova(mapping, size);
1318 if (iova == DMA_ERROR_CODE)
1321 for (count = 0, s = sg; count < (size >> PAGE_SHIFT); s = sg_next(s)) {
1322 phys_addr_t phys = page_to_phys(sg_page(s));
1323 unsigned int len = PAGE_ALIGN(s->offset + s->length);
1325 if (!arch_is_coherent() &&
1326 !dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
1327 __dma_page_cpu_to_dev(sg_page(s), s->offset, s->length, dir);
1329 ret = iommu_map(mapping->domain, iova, phys, len, 0);
1332 count += len >> PAGE_SHIFT;
1335 *handle = iova_base;
1339 iommu_unmap(mapping->domain, iova_base, count * PAGE_SIZE);
1340 __free_iova(mapping, iova_base, size);
1345 * arm_iommu_map_sg - map a set of SG buffers for streaming mode DMA
1346 * @dev: valid struct device pointer
1347 * @sg: list of buffers
1348 * @nents: number of buffers to map
1349 * @dir: DMA transfer direction
1351 * Map a set of buffers described by scatterlist in streaming mode for DMA.
1352 * The scatter gather list elements are merged together (if possible) and
1353 * tagged with the appropriate dma address and length. They are obtained via
1354 * sg_dma_{address,length}.
1356 int arm_iommu_map_sg(struct device *dev, struct scatterlist *sg, int nents,
1357 enum dma_data_direction dir, struct dma_attrs *attrs)
1359 struct scatterlist *s = sg, *dma = sg, *start = sg;
1361 unsigned int offset = s->offset;
1362 unsigned int size = s->offset + s->length;
1363 unsigned int max = dma_get_max_seg_size(dev);
1365 for (i = 1; i < nents; i++) {
1368 s->dma_address = DMA_ERROR_CODE;
1371 if (s->offset || (size & ~PAGE_MASK) || size + s->length > max) {
1372 if (__map_sg_chunk(dev, start, size, &dma->dma_address,
1376 dma->dma_address += offset;
1377 dma->dma_length = size - offset;
1379 size = offset = s->offset;
1386 if (__map_sg_chunk(dev, start, size, &dma->dma_address, dir, attrs) < 0)
1389 dma->dma_address += offset;
1390 dma->dma_length = size - offset;
1395 for_each_sg(sg, s, count, i)
1396 __iommu_remove_mapping(dev, sg_dma_address(s), sg_dma_len(s));
1401 * arm_iommu_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
1402 * @dev: valid struct device pointer
1403 * @sg: list of buffers
1404 * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
1405 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1407 * Unmap a set of streaming mode DMA translations. Again, CPU access
1408 * rules concerning calls here are the same as for dma_unmap_single().
1410 void arm_iommu_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
1411 enum dma_data_direction dir, struct dma_attrs *attrs)
1413 struct scatterlist *s;
1416 for_each_sg(sg, s, nents, i) {
1418 __iommu_remove_mapping(dev, sg_dma_address(s),
1420 if (!arch_is_coherent() &&
1421 !dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
1422 __dma_page_dev_to_cpu(sg_page(s), s->offset,
1428 * arm_iommu_sync_sg_for_cpu
1429 * @dev: valid struct device pointer
1430 * @sg: list of buffers
1431 * @nents: number of buffers to map (returned from dma_map_sg)
1432 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1434 void arm_iommu_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
1435 int nents, enum dma_data_direction dir)
1437 struct scatterlist *s;
1440 for_each_sg(sg, s, nents, i)
1441 if (!arch_is_coherent())
1442 __dma_page_dev_to_cpu(sg_page(s), s->offset, s->length, dir);
1447 * arm_iommu_sync_sg_for_device
1448 * @dev: valid struct device pointer
1449 * @sg: list of buffers
1450 * @nents: number of buffers to map (returned from dma_map_sg)
1451 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1453 void arm_iommu_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
1454 int nents, enum dma_data_direction dir)
1456 struct scatterlist *s;
1459 for_each_sg(sg, s, nents, i)
1460 if (!arch_is_coherent())
1461 __dma_page_cpu_to_dev(sg_page(s), s->offset, s->length, dir);
1466 * arm_iommu_map_page
1467 * @dev: valid struct device pointer
1468 * @page: page that buffer resides in
1469 * @offset: offset into page for start of buffer
1470 * @size: size of buffer to map
1471 * @dir: DMA transfer direction
1473 * IOMMU aware version of arm_dma_map_page()
1475 static dma_addr_t arm_iommu_map_page(struct device *dev, struct page *page,
1476 unsigned long offset, size_t size, enum dma_data_direction dir,
1477 struct dma_attrs *attrs)
1479 struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1480 dma_addr_t dma_addr;
1481 int ret, len = PAGE_ALIGN(size + offset);
1483 if (!arch_is_coherent() && !dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
1484 __dma_page_cpu_to_dev(page, offset, size, dir);
1486 dma_addr = __alloc_iova(mapping, len);
1487 if (dma_addr == DMA_ERROR_CODE)
1490 ret = iommu_map(mapping->domain, dma_addr, page_to_phys(page), len, 0);
1494 return dma_addr + offset;
1496 __free_iova(mapping, dma_addr, len);
1497 return DMA_ERROR_CODE;
1501 * arm_iommu_unmap_page
1502 * @dev: valid struct device pointer
1503 * @handle: DMA address of buffer
1504 * @size: size of buffer (same as passed to dma_map_page)
1505 * @dir: DMA transfer direction (same as passed to dma_map_page)
1507 * IOMMU aware version of arm_dma_unmap_page()
1509 static void arm_iommu_unmap_page(struct device *dev, dma_addr_t handle,
1510 size_t size, enum dma_data_direction dir,
1511 struct dma_attrs *attrs)
1513 struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1514 dma_addr_t iova = handle & PAGE_MASK;
1515 struct page *page = phys_to_page(iommu_iova_to_phys(mapping->domain, iova));
1516 int offset = handle & ~PAGE_MASK;
1517 int len = PAGE_ALIGN(size + offset);
1522 if (!arch_is_coherent() && !dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
1523 __dma_page_dev_to_cpu(page, offset, size, dir);
1525 iommu_unmap(mapping->domain, iova, len);
1526 __free_iova(mapping, iova, len);
1529 static void arm_iommu_sync_single_for_cpu(struct device *dev,
1530 dma_addr_t handle, size_t size, enum dma_data_direction dir)
1532 struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1533 dma_addr_t iova = handle & PAGE_MASK;
1534 struct page *page = phys_to_page(iommu_iova_to_phys(mapping->domain, iova));
1535 unsigned int offset = handle & ~PAGE_MASK;
1540 if (!arch_is_coherent())
1541 __dma_page_dev_to_cpu(page, offset, size, dir);
1544 static void arm_iommu_sync_single_for_device(struct device *dev,
1545 dma_addr_t handle, size_t size, enum dma_data_direction dir)
1547 struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1548 dma_addr_t iova = handle & PAGE_MASK;
1549 struct page *page = phys_to_page(iommu_iova_to_phys(mapping->domain, iova));
1550 unsigned int offset = handle & ~PAGE_MASK;
1555 __dma_page_cpu_to_dev(page, offset, size, dir);
1558 struct dma_map_ops iommu_ops = {
1559 .alloc = arm_iommu_alloc_attrs,
1560 .free = arm_iommu_free_attrs,
1561 .mmap = arm_iommu_mmap_attrs,
1562 .get_sgtable = arm_iommu_get_sgtable,
1564 .map_page = arm_iommu_map_page,
1565 .unmap_page = arm_iommu_unmap_page,
1566 .sync_single_for_cpu = arm_iommu_sync_single_for_cpu,
1567 .sync_single_for_device = arm_iommu_sync_single_for_device,
1569 .map_sg = arm_iommu_map_sg,
1570 .unmap_sg = arm_iommu_unmap_sg,
1571 .sync_sg_for_cpu = arm_iommu_sync_sg_for_cpu,
1572 .sync_sg_for_device = arm_iommu_sync_sg_for_device,
1576 * arm_iommu_create_mapping
1577 * @bus: pointer to the bus holding the client device (for IOMMU calls)
1578 * @base: start address of the valid IO address space
1579 * @size: size of the valid IO address space
1580 * @order: accuracy of the IO addresses allocations
1582 * Creates a mapping structure which holds information about used/unused
1583 * IO address ranges, which is required to perform memory allocation and
1584 * mapping with IOMMU aware functions.
1586 * The client device need to be attached to the mapping with
1587 * arm_iommu_attach_device function.
1589 struct dma_iommu_mapping *
1590 arm_iommu_create_mapping(struct bus_type *bus, dma_addr_t base, size_t size,
1593 unsigned int count = size >> (PAGE_SHIFT + order);
1594 unsigned int bitmap_size = BITS_TO_LONGS(count) * sizeof(long);
1595 struct dma_iommu_mapping *mapping;
1599 return ERR_PTR(-EINVAL);
1601 mapping = kzalloc(sizeof(struct dma_iommu_mapping), GFP_KERNEL);
1605 mapping->bitmap = kzalloc(bitmap_size, GFP_KERNEL);
1606 if (!mapping->bitmap)
1609 mapping->base = base;
1610 mapping->bits = BITS_PER_BYTE * bitmap_size;
1611 mapping->order = order;
1612 spin_lock_init(&mapping->lock);
1614 mapping->domain = iommu_domain_alloc(bus);
1615 if (!mapping->domain)
1618 kref_init(&mapping->kref);
1621 kfree(mapping->bitmap);
1625 return ERR_PTR(err);
1628 static void release_iommu_mapping(struct kref *kref)
1630 struct dma_iommu_mapping *mapping =
1631 container_of(kref, struct dma_iommu_mapping, kref);
1633 iommu_domain_free(mapping->domain);
1634 kfree(mapping->bitmap);
1638 void arm_iommu_release_mapping(struct dma_iommu_mapping *mapping)
1641 kref_put(&mapping->kref, release_iommu_mapping);
1645 * arm_iommu_attach_device
1646 * @dev: valid struct device pointer
1647 * @mapping: io address space mapping structure (returned from
1648 * arm_iommu_create_mapping)
1650 * Attaches specified io address space mapping to the provided device,
1651 * this replaces the dma operations (dma_map_ops pointer) with the
1652 * IOMMU aware version. More than one client might be attached to
1653 * the same io address space mapping.
1655 int arm_iommu_attach_device(struct device *dev,
1656 struct dma_iommu_mapping *mapping)
1660 err = iommu_attach_device(mapping->domain, dev);
1664 kref_get(&mapping->kref);
1665 dev->archdata.mapping = mapping;
1666 set_dma_ops(dev, &iommu_ops);
1668 pr_info("Attached IOMMU controller to %s device.\n", dev_name(dev));