2 * linux/arch/arm/mm/dma-mapping.c
4 * Copyright (C) 2000-2004 Russell King
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * DMA uncached mapping support.
12 #include <linux/module.h>
14 #include <linux/gfp.h>
15 #include <linux/errno.h>
16 #include <linux/list.h>
17 #include <linux/init.h>
18 #include <linux/device.h>
19 #include <linux/dma-mapping.h>
20 #include <linux/dma-contiguous.h>
21 #include <linux/highmem.h>
22 #include <linux/memblock.h>
23 #include <linux/slab.h>
24 #include <linux/iommu.h>
26 #include <linux/vmalloc.h>
27 #include <linux/sizes.h>
29 #include <asm/memory.h>
30 #include <asm/highmem.h>
31 #include <asm/cacheflush.h>
32 #include <asm/tlbflush.h>
33 #include <asm/mach/arch.h>
34 #include <asm/dma-iommu.h>
35 #include <asm/mach/map.h>
36 #include <asm/system_info.h>
37 #include <asm/dma-contiguous.h>
42 * The DMA API is built upon the notion of "buffer ownership". A buffer
43 * is either exclusively owned by the CPU (and therefore may be accessed
44 * by it) or exclusively owned by the DMA device. These helper functions
45 * represent the transitions between these two ownership states.
47 * Note, however, that on later ARMs, this notion does not work due to
48 * speculative prefetches. We model our approach on the assumption that
49 * the CPU does do speculative prefetches, which means we clean caches
50 * before transfers and delay cache invalidation until transfer completion.
53 static void __dma_page_cpu_to_dev(struct page *, unsigned long,
54 size_t, enum dma_data_direction);
55 static void __dma_page_dev_to_cpu(struct page *, unsigned long,
56 size_t, enum dma_data_direction);
59 * arm_dma_map_page - map a portion of a page for streaming DMA
60 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
61 * @page: page that buffer resides in
62 * @offset: offset into page for start of buffer
63 * @size: size of buffer to map
64 * @dir: DMA transfer direction
66 * Ensure that any data held in the cache is appropriately discarded
69 * The device owns this memory once this call has completed. The CPU
70 * can regain ownership by calling dma_unmap_page().
72 static dma_addr_t arm_dma_map_page(struct device *dev, struct page *page,
73 unsigned long offset, size_t size, enum dma_data_direction dir,
74 struct dma_attrs *attrs)
76 if (!dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
77 __dma_page_cpu_to_dev(page, offset, size, dir);
78 return pfn_to_dma(dev, page_to_pfn(page)) + offset;
81 static dma_addr_t arm_coherent_dma_map_page(struct device *dev, struct page *page,
82 unsigned long offset, size_t size, enum dma_data_direction dir,
83 struct dma_attrs *attrs)
85 return pfn_to_dma(dev, page_to_pfn(page)) + offset;
89 * arm_dma_unmap_page - unmap a buffer previously mapped through dma_map_page()
90 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
91 * @handle: DMA address of buffer
92 * @size: size of buffer (same as passed to dma_map_page)
93 * @dir: DMA transfer direction (same as passed to dma_map_page)
95 * Unmap a page streaming mode DMA translation. The handle and size
96 * must match what was provided in the previous dma_map_page() call.
97 * All other usages are undefined.
99 * After this call, reads by the CPU to the buffer are guaranteed to see
100 * whatever the device wrote there.
102 static void arm_dma_unmap_page(struct device *dev, dma_addr_t handle,
103 size_t size, enum dma_data_direction dir,
104 struct dma_attrs *attrs)
106 if (!dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
107 __dma_page_dev_to_cpu(pfn_to_page(dma_to_pfn(dev, handle)),
108 handle & ~PAGE_MASK, size, dir);
111 static void arm_dma_sync_single_for_cpu(struct device *dev,
112 dma_addr_t handle, size_t size, enum dma_data_direction dir)
114 unsigned int offset = handle & (PAGE_SIZE - 1);
115 struct page *page = pfn_to_page(dma_to_pfn(dev, handle-offset));
116 __dma_page_dev_to_cpu(page, offset, size, dir);
119 static void arm_dma_sync_single_for_device(struct device *dev,
120 dma_addr_t handle, size_t size, enum dma_data_direction dir)
122 unsigned int offset = handle & (PAGE_SIZE - 1);
123 struct page *page = pfn_to_page(dma_to_pfn(dev, handle-offset));
124 __dma_page_cpu_to_dev(page, offset, size, dir);
127 static int arm_dma_set_mask(struct device *dev, u64 dma_mask);
129 struct dma_map_ops arm_dma_ops = {
130 .alloc = arm_dma_alloc,
131 .free = arm_dma_free,
132 .mmap = arm_dma_mmap,
133 .get_sgtable = arm_dma_get_sgtable,
134 .map_page = arm_dma_map_page,
135 .unmap_page = arm_dma_unmap_page,
136 .map_sg = arm_dma_map_sg,
137 .unmap_sg = arm_dma_unmap_sg,
138 .sync_single_for_cpu = arm_dma_sync_single_for_cpu,
139 .sync_single_for_device = arm_dma_sync_single_for_device,
140 .sync_sg_for_cpu = arm_dma_sync_sg_for_cpu,
141 .sync_sg_for_device = arm_dma_sync_sg_for_device,
142 .set_dma_mask = arm_dma_set_mask,
144 EXPORT_SYMBOL(arm_dma_ops);
146 static void *arm_coherent_dma_alloc(struct device *dev, size_t size,
147 dma_addr_t *handle, gfp_t gfp, struct dma_attrs *attrs);
148 static void arm_coherent_dma_free(struct device *dev, size_t size, void *cpu_addr,
149 dma_addr_t handle, struct dma_attrs *attrs);
151 struct dma_map_ops arm_coherent_dma_ops = {
152 .alloc = arm_coherent_dma_alloc,
153 .free = arm_coherent_dma_free,
154 .mmap = arm_dma_mmap,
155 .get_sgtable = arm_dma_get_sgtable,
156 .map_page = arm_coherent_dma_map_page,
157 .map_sg = arm_dma_map_sg,
158 .set_dma_mask = arm_dma_set_mask,
160 EXPORT_SYMBOL(arm_coherent_dma_ops);
162 static u64 get_coherent_dma_mask(struct device *dev)
164 u64 mask = (u64)arm_dma_limit;
167 mask = dev->coherent_dma_mask;
170 * Sanity check the DMA mask - it must be non-zero, and
171 * must be able to be satisfied by a DMA allocation.
174 dev_warn(dev, "coherent DMA mask is unset\n");
178 if ((~mask) & (u64)arm_dma_limit) {
179 dev_warn(dev, "coherent DMA mask %#llx is smaller "
180 "than system GFP_DMA mask %#llx\n",
181 mask, (u64)arm_dma_limit);
189 static void __dma_clear_buffer(struct page *page, size_t size)
193 * Ensure that the allocated pages are zeroed, and that any data
194 * lurking in the kernel direct-mapped region is invalidated.
196 ptr = page_address(page);
198 memset(ptr, 0, size);
199 dmac_flush_range(ptr, ptr + size);
200 outer_flush_range(__pa(ptr), __pa(ptr) + size);
205 * Allocate a DMA buffer for 'dev' of size 'size' using the
206 * specified gfp mask. Note that 'size' must be page aligned.
208 static struct page *__dma_alloc_buffer(struct device *dev, size_t size, gfp_t gfp)
210 unsigned long order = get_order(size);
211 struct page *page, *p, *e;
213 page = alloc_pages(gfp, order);
218 * Now split the huge page and free the excess pages
220 split_page(page, order);
221 for (p = page + (size >> PAGE_SHIFT), e = page + (1 << order); p < e; p++)
224 __dma_clear_buffer(page, size);
230 * Free a DMA buffer. 'size' must be page aligned.
232 static void __dma_free_buffer(struct page *page, size_t size)
234 struct page *e = page + (size >> PAGE_SHIFT);
243 #ifdef CONFIG_HUGETLB_PAGE
244 #error ARM Coherent DMA allocator does not (yet) support huge TLB
247 static void *__alloc_from_contiguous(struct device *dev, size_t size,
248 pgprot_t prot, struct page **ret_page);
250 static void *__alloc_remap_buffer(struct device *dev, size_t size, gfp_t gfp,
251 pgprot_t prot, struct page **ret_page,
255 __dma_alloc_remap(struct page *page, size_t size, gfp_t gfp, pgprot_t prot,
258 struct vm_struct *area;
262 * DMA allocation can be mapped to user space, so lets
263 * set VM_USERMAP flags too.
265 area = get_vm_area_caller(size, VM_ARM_DMA_CONSISTENT | VM_USERMAP,
269 addr = (unsigned long)area->addr;
270 area->phys_addr = __pfn_to_phys(page_to_pfn(page));
272 if (ioremap_page_range(addr, addr + size, area->phys_addr, prot)) {
273 vunmap((void *)addr);
279 static void __dma_free_remap(void *cpu_addr, size_t size)
281 unsigned int flags = VM_ARM_DMA_CONSISTENT | VM_USERMAP;
282 struct vm_struct *area = find_vm_area(cpu_addr);
283 if (!area || (area->flags & flags) != flags) {
284 WARN(1, "trying to free invalid coherent area: %p\n", cpu_addr);
287 unmap_kernel_range((unsigned long)cpu_addr, size);
291 #define DEFAULT_DMA_COHERENT_POOL_SIZE SZ_256K
296 unsigned long *bitmap;
297 unsigned long nr_pages;
302 static struct dma_pool atomic_pool = {
303 .size = DEFAULT_DMA_COHERENT_POOL_SIZE,
306 static int __init early_coherent_pool(char *p)
308 atomic_pool.size = memparse(p, &p);
311 early_param("coherent_pool", early_coherent_pool);
313 void __init init_dma_coherent_pool_size(unsigned long size)
316 * Catch any attempt to set the pool size too late.
318 BUG_ON(atomic_pool.vaddr);
321 * Set architecture specific coherent pool size only if
322 * it has not been changed by kernel command line parameter.
324 if (atomic_pool.size == DEFAULT_DMA_COHERENT_POOL_SIZE)
325 atomic_pool.size = size;
329 * Initialise the coherent pool for atomic allocations.
331 static int __init atomic_pool_init(void)
333 struct dma_pool *pool = &atomic_pool;
334 pgprot_t prot = pgprot_dmacoherent(pgprot_kernel);
335 unsigned long nr_pages = pool->size >> PAGE_SHIFT;
336 unsigned long *bitmap;
340 int bitmap_size = BITS_TO_LONGS(nr_pages) * sizeof(long);
342 bitmap = kzalloc(bitmap_size, GFP_KERNEL);
346 pages = kzalloc(nr_pages * sizeof(struct page *), GFP_KERNEL);
350 if (IS_ENABLED(CONFIG_CMA))
351 ptr = __alloc_from_contiguous(NULL, pool->size, prot, &page);
353 ptr = __alloc_remap_buffer(NULL, pool->size, GFP_KERNEL, prot,
358 for (i = 0; i < nr_pages; i++)
361 spin_lock_init(&pool->lock);
364 pool->bitmap = bitmap;
365 pool->nr_pages = nr_pages;
366 pr_info("DMA: preallocated %u KiB pool for atomic coherent allocations\n",
367 (unsigned)pool->size / 1024);
375 pr_err("DMA: failed to allocate %u KiB pool for atomic coherent allocation\n",
376 (unsigned)pool->size / 1024);
380 * CMA is activated by core_initcall, so we must be called after it.
382 postcore_initcall(atomic_pool_init);
384 struct dma_contig_early_reserve {
389 static struct dma_contig_early_reserve dma_mmu_remap[MAX_CMA_AREAS] __initdata;
391 static int dma_mmu_remap_num __initdata;
393 void __init dma_contiguous_early_fixup(phys_addr_t base, unsigned long size)
395 dma_mmu_remap[dma_mmu_remap_num].base = base;
396 dma_mmu_remap[dma_mmu_remap_num].size = size;
400 void __init dma_contiguous_remap(void)
403 for (i = 0; i < dma_mmu_remap_num; i++) {
404 phys_addr_t start = dma_mmu_remap[i].base;
405 phys_addr_t end = start + dma_mmu_remap[i].size;
409 if (end > arm_lowmem_limit)
410 end = arm_lowmem_limit;
414 map.pfn = __phys_to_pfn(start);
415 map.virtual = __phys_to_virt(start);
416 map.length = end - start;
417 map.type = MT_MEMORY_DMA_READY;
420 * Clear previous low-memory mapping
422 for (addr = __phys_to_virt(start); addr < __phys_to_virt(end);
424 pmd_clear(pmd_off_k(addr));
426 iotable_init(&map, 1);
430 static int __dma_update_pte(pte_t *pte, pgtable_t token, unsigned long addr,
433 struct page *page = virt_to_page(addr);
434 pgprot_t prot = *(pgprot_t *)data;
436 set_pte_ext(pte, mk_pte(page, prot), 0);
440 static void __dma_remap(struct page *page, size_t size, pgprot_t prot)
442 unsigned long start = (unsigned long) page_address(page);
443 unsigned end = start + size;
445 apply_to_page_range(&init_mm, start, size, __dma_update_pte, &prot);
447 flush_tlb_kernel_range(start, end);
450 static void *__alloc_remap_buffer(struct device *dev, size_t size, gfp_t gfp,
451 pgprot_t prot, struct page **ret_page,
456 page = __dma_alloc_buffer(dev, size, gfp);
460 ptr = __dma_alloc_remap(page, size, gfp, prot, caller);
462 __dma_free_buffer(page, size);
470 static void *__alloc_from_pool(size_t size, struct page **ret_page)
472 struct dma_pool *pool = &atomic_pool;
473 unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT;
477 unsigned long align_mask;
480 WARN(1, "coherent pool not initialised!\n");
485 * Align the region allocation - allocations from pool are rather
486 * small, so align them to their order in pages, minimum is a page
487 * size. This helps reduce fragmentation of the DMA space.
489 align_mask = (1 << get_order(size)) - 1;
491 spin_lock_irqsave(&pool->lock, flags);
492 pageno = bitmap_find_next_zero_area(pool->bitmap, pool->nr_pages,
493 0, count, align_mask);
494 if (pageno < pool->nr_pages) {
495 bitmap_set(pool->bitmap, pageno, count);
496 ptr = pool->vaddr + PAGE_SIZE * pageno;
497 *ret_page = pool->pages[pageno];
499 pr_err_once("ERROR: %u KiB atomic DMA coherent pool is too small!\n"
500 "Please increase it with coherent_pool= kernel parameter!\n",
501 (unsigned)pool->size / 1024);
503 spin_unlock_irqrestore(&pool->lock, flags);
508 static bool __in_atomic_pool(void *start, size_t size)
510 struct dma_pool *pool = &atomic_pool;
511 void *end = start + size;
512 void *pool_start = pool->vaddr;
513 void *pool_end = pool->vaddr + pool->size;
515 if (start < pool_start || start >= pool_end)
521 WARN(1, "Wrong coherent size(%p-%p) from atomic pool(%p-%p)\n",
522 start, end - 1, pool_start, pool_end - 1);
527 static int __free_from_pool(void *start, size_t size)
529 struct dma_pool *pool = &atomic_pool;
530 unsigned long pageno, count;
533 if (!__in_atomic_pool(start, size))
536 pageno = (start - pool->vaddr) >> PAGE_SHIFT;
537 count = size >> PAGE_SHIFT;
539 spin_lock_irqsave(&pool->lock, flags);
540 bitmap_clear(pool->bitmap, pageno, count);
541 spin_unlock_irqrestore(&pool->lock, flags);
546 static void *__alloc_from_contiguous(struct device *dev, size_t size,
547 pgprot_t prot, struct page **ret_page)
549 unsigned long order = get_order(size);
550 size_t count = size >> PAGE_SHIFT;
553 page = dma_alloc_from_contiguous(dev, count, order);
557 __dma_clear_buffer(page, size);
558 __dma_remap(page, size, prot);
561 return page_address(page);
564 static void __free_from_contiguous(struct device *dev, struct page *page,
567 __dma_remap(page, size, pgprot_kernel);
568 dma_release_from_contiguous(dev, page, size >> PAGE_SHIFT);
571 static inline pgprot_t __get_dma_pgprot(struct dma_attrs *attrs, pgprot_t prot)
573 prot = dma_get_attr(DMA_ATTR_WRITE_COMBINE, attrs) ?
574 pgprot_writecombine(prot) :
575 pgprot_dmacoherent(prot);
581 #else /* !CONFIG_MMU */
585 #define __get_dma_pgprot(attrs, prot) __pgprot(0)
586 #define __alloc_remap_buffer(dev, size, gfp, prot, ret, c) NULL
587 #define __alloc_from_pool(size, ret_page) NULL
588 #define __alloc_from_contiguous(dev, size, prot, ret) NULL
589 #define __free_from_pool(cpu_addr, size) 0
590 #define __free_from_contiguous(dev, page, size) do { } while (0)
591 #define __dma_free_remap(cpu_addr, size) do { } while (0)
593 #endif /* CONFIG_MMU */
595 static void *__alloc_simple_buffer(struct device *dev, size_t size, gfp_t gfp,
596 struct page **ret_page)
599 page = __dma_alloc_buffer(dev, size, gfp);
604 return page_address(page);
609 static void *__dma_alloc(struct device *dev, size_t size, dma_addr_t *handle,
610 gfp_t gfp, pgprot_t prot, bool is_coherent, const void *caller)
612 u64 mask = get_coherent_dma_mask(dev);
613 struct page *page = NULL;
616 #ifdef CONFIG_DMA_API_DEBUG
617 u64 limit = (mask + 1) & ~mask;
618 if (limit && size >= limit) {
619 dev_warn(dev, "coherent allocation too big (requested %#x mask %#llx)\n",
628 if (mask < 0xffffffffULL)
632 * Following is a work-around (a.k.a. hack) to prevent pages
633 * with __GFP_COMP being passed to split_page() which cannot
634 * handle them. The real problem is that this flag probably
635 * should be 0 on ARM as it is not supported on this
636 * platform; see CONFIG_HUGETLBFS.
638 gfp &= ~(__GFP_COMP);
640 *handle = DMA_ERROR_CODE;
641 size = PAGE_ALIGN(size);
643 if (is_coherent || nommu())
644 addr = __alloc_simple_buffer(dev, size, gfp, &page);
645 else if (gfp & GFP_ATOMIC)
646 addr = __alloc_from_pool(size, &page);
647 else if (!IS_ENABLED(CONFIG_CMA))
648 addr = __alloc_remap_buffer(dev, size, gfp, prot, &page, caller);
650 addr = __alloc_from_contiguous(dev, size, prot, &page);
653 *handle = pfn_to_dma(dev, page_to_pfn(page));
659 * Allocate DMA-coherent memory space and return both the kernel remapped
660 * virtual and bus address for that space.
662 void *arm_dma_alloc(struct device *dev, size_t size, dma_addr_t *handle,
663 gfp_t gfp, struct dma_attrs *attrs)
665 pgprot_t prot = __get_dma_pgprot(attrs, pgprot_kernel);
668 if (dma_alloc_from_coherent(dev, size, handle, &memory))
671 return __dma_alloc(dev, size, handle, gfp, prot, false,
672 __builtin_return_address(0));
675 static void *arm_coherent_dma_alloc(struct device *dev, size_t size,
676 dma_addr_t *handle, gfp_t gfp, struct dma_attrs *attrs)
678 pgprot_t prot = __get_dma_pgprot(attrs, pgprot_kernel);
681 if (dma_alloc_from_coherent(dev, size, handle, &memory))
684 return __dma_alloc(dev, size, handle, gfp, prot, true,
685 __builtin_return_address(0));
689 * Create userspace mapping for the DMA-coherent memory.
691 int arm_dma_mmap(struct device *dev, struct vm_area_struct *vma,
692 void *cpu_addr, dma_addr_t dma_addr, size_t size,
693 struct dma_attrs *attrs)
697 unsigned long nr_vma_pages = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT;
698 unsigned long nr_pages = PAGE_ALIGN(size) >> PAGE_SHIFT;
699 unsigned long pfn = dma_to_pfn(dev, dma_addr);
700 unsigned long off = vma->vm_pgoff;
702 vma->vm_page_prot = __get_dma_pgprot(attrs, vma->vm_page_prot);
704 if (dma_mmap_from_coherent(dev, vma, cpu_addr, size, &ret))
707 if (off < nr_pages && nr_vma_pages <= (nr_pages - off)) {
708 ret = remap_pfn_range(vma, vma->vm_start,
710 vma->vm_end - vma->vm_start,
713 #endif /* CONFIG_MMU */
719 * Free a buffer as defined by the above mapping.
721 static void __arm_dma_free(struct device *dev, size_t size, void *cpu_addr,
722 dma_addr_t handle, struct dma_attrs *attrs,
725 struct page *page = pfn_to_page(dma_to_pfn(dev, handle));
727 if (dma_release_from_coherent(dev, get_order(size), cpu_addr))
730 size = PAGE_ALIGN(size);
732 if (is_coherent || nommu()) {
733 __dma_free_buffer(page, size);
734 } else if (__free_from_pool(cpu_addr, size)) {
736 } else if (!IS_ENABLED(CONFIG_CMA)) {
737 __dma_free_remap(cpu_addr, size);
738 __dma_free_buffer(page, size);
741 * Non-atomic allocations cannot be freed with IRQs disabled
743 WARN_ON(irqs_disabled());
744 __free_from_contiguous(dev, page, size);
748 void arm_dma_free(struct device *dev, size_t size, void *cpu_addr,
749 dma_addr_t handle, struct dma_attrs *attrs)
751 __arm_dma_free(dev, size, cpu_addr, handle, attrs, false);
754 static void arm_coherent_dma_free(struct device *dev, size_t size, void *cpu_addr,
755 dma_addr_t handle, struct dma_attrs *attrs)
757 __arm_dma_free(dev, size, cpu_addr, handle, attrs, true);
760 int arm_dma_get_sgtable(struct device *dev, struct sg_table *sgt,
761 void *cpu_addr, dma_addr_t handle, size_t size,
762 struct dma_attrs *attrs)
764 struct page *page = pfn_to_page(dma_to_pfn(dev, handle));
767 ret = sg_alloc_table(sgt, 1, GFP_KERNEL);
771 sg_set_page(sgt->sgl, page, PAGE_ALIGN(size), 0);
775 static void dma_cache_maint_page(struct page *page, unsigned long offset,
776 size_t size, enum dma_data_direction dir,
777 void (*op)(const void *, size_t, int))
780 * A single sg entry may refer to multiple physically contiguous
781 * pages. But we still need to process highmem pages individually.
782 * If highmem is not configured then the bulk of this loop gets
790 if (PageHighMem(page)) {
791 if (len + offset > PAGE_SIZE) {
792 if (offset >= PAGE_SIZE) {
793 page += offset / PAGE_SIZE;
796 len = PAGE_SIZE - offset;
798 vaddr = kmap_high_get(page);
803 } else if (cache_is_vipt()) {
804 /* unmapped pages might still be cached */
805 vaddr = kmap_atomic(page);
806 op(vaddr + offset, len, dir);
807 kunmap_atomic(vaddr);
810 vaddr = page_address(page) + offset;
820 * Make an area consistent for devices.
821 * Note: Drivers should NOT use this function directly, as it will break
822 * platforms with CONFIG_DMABOUNCE.
823 * Use the driver DMA support - see dma-mapping.h (dma_sync_*)
825 static void __dma_page_cpu_to_dev(struct page *page, unsigned long off,
826 size_t size, enum dma_data_direction dir)
830 dma_cache_maint_page(page, off, size, dir, dmac_map_area);
832 paddr = page_to_phys(page) + off;
833 if (dir == DMA_FROM_DEVICE) {
834 outer_inv_range(paddr, paddr + size);
836 outer_clean_range(paddr, paddr + size);
838 /* FIXME: non-speculating: flush on bidirectional mappings? */
841 static void __dma_page_dev_to_cpu(struct page *page, unsigned long off,
842 size_t size, enum dma_data_direction dir)
844 unsigned long paddr = page_to_phys(page) + off;
846 /* FIXME: non-speculating: not required */
847 /* don't bother invalidating if DMA to device */
848 if (dir != DMA_TO_DEVICE)
849 outer_inv_range(paddr, paddr + size);
851 dma_cache_maint_page(page, off, size, dir, dmac_unmap_area);
854 * Mark the D-cache clean for this page to avoid extra flushing.
856 if (dir != DMA_TO_DEVICE && off == 0 && size >= PAGE_SIZE)
857 set_bit(PG_dcache_clean, &page->flags);
861 * arm_dma_map_sg - map a set of SG buffers for streaming mode DMA
862 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
863 * @sg: list of buffers
864 * @nents: number of buffers to map
865 * @dir: DMA transfer direction
867 * Map a set of buffers described by scatterlist in streaming mode for DMA.
868 * This is the scatter-gather version of the dma_map_single interface.
869 * Here the scatter gather list elements are each tagged with the
870 * appropriate dma address and length. They are obtained via
871 * sg_dma_{address,length}.
873 * Device ownership issues as mentioned for dma_map_single are the same
876 int arm_dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
877 enum dma_data_direction dir, struct dma_attrs *attrs)
879 struct dma_map_ops *ops = get_dma_ops(dev);
880 struct scatterlist *s;
883 for_each_sg(sg, s, nents, i) {
884 #ifdef CONFIG_NEED_SG_DMA_LENGTH
885 s->dma_length = s->length;
887 s->dma_address = ops->map_page(dev, sg_page(s), s->offset,
888 s->length, dir, attrs);
889 if (dma_mapping_error(dev, s->dma_address))
895 for_each_sg(sg, s, i, j)
896 ops->unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir, attrs);
901 * arm_dma_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
902 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
903 * @sg: list of buffers
904 * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
905 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
907 * Unmap a set of streaming mode DMA translations. Again, CPU access
908 * rules concerning calls here are the same as for dma_unmap_single().
910 void arm_dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
911 enum dma_data_direction dir, struct dma_attrs *attrs)
913 struct dma_map_ops *ops = get_dma_ops(dev);
914 struct scatterlist *s;
918 for_each_sg(sg, s, nents, i)
919 ops->unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir, attrs);
923 * arm_dma_sync_sg_for_cpu
924 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
925 * @sg: list of buffers
926 * @nents: number of buffers to map (returned from dma_map_sg)
927 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
929 void arm_dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
930 int nents, enum dma_data_direction dir)
932 struct dma_map_ops *ops = get_dma_ops(dev);
933 struct scatterlist *s;
936 for_each_sg(sg, s, nents, i)
937 ops->sync_single_for_cpu(dev, sg_dma_address(s), s->length,
942 * arm_dma_sync_sg_for_device
943 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
944 * @sg: list of buffers
945 * @nents: number of buffers to map (returned from dma_map_sg)
946 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
948 void arm_dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
949 int nents, enum dma_data_direction dir)
951 struct dma_map_ops *ops = get_dma_ops(dev);
952 struct scatterlist *s;
955 for_each_sg(sg, s, nents, i)
956 ops->sync_single_for_device(dev, sg_dma_address(s), s->length,
961 * Return whether the given device DMA address mask can be supported
962 * properly. For example, if your device can only drive the low 24-bits
963 * during bus mastering, then you would pass 0x00ffffff as the mask
966 int dma_supported(struct device *dev, u64 mask)
968 if (mask < (u64)arm_dma_limit)
972 EXPORT_SYMBOL(dma_supported);
974 static int arm_dma_set_mask(struct device *dev, u64 dma_mask)
976 if (!dev->dma_mask || !dma_supported(dev, dma_mask))
979 *dev->dma_mask = dma_mask;
984 #define PREALLOC_DMA_DEBUG_ENTRIES 4096
986 static int __init dma_debug_do_init(void)
988 dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES);
991 fs_initcall(dma_debug_do_init);
993 #ifdef CONFIG_ARM_DMA_USE_IOMMU
997 static inline dma_addr_t __alloc_iova(struct dma_iommu_mapping *mapping,
1000 unsigned int order = get_order(size);
1001 unsigned int align = 0;
1002 unsigned int count, start;
1003 unsigned long flags;
1005 count = ((PAGE_ALIGN(size) >> PAGE_SHIFT) +
1006 (1 << mapping->order) - 1) >> mapping->order;
1008 if (order > mapping->order)
1009 align = (1 << (order - mapping->order)) - 1;
1011 spin_lock_irqsave(&mapping->lock, flags);
1012 start = bitmap_find_next_zero_area(mapping->bitmap, mapping->bits, 0,
1014 if (start > mapping->bits) {
1015 spin_unlock_irqrestore(&mapping->lock, flags);
1016 return DMA_ERROR_CODE;
1019 bitmap_set(mapping->bitmap, start, count);
1020 spin_unlock_irqrestore(&mapping->lock, flags);
1022 return mapping->base + (start << (mapping->order + PAGE_SHIFT));
1025 static inline void __free_iova(struct dma_iommu_mapping *mapping,
1026 dma_addr_t addr, size_t size)
1028 unsigned int start = (addr - mapping->base) >>
1029 (mapping->order + PAGE_SHIFT);
1030 unsigned int count = ((size >> PAGE_SHIFT) +
1031 (1 << mapping->order) - 1) >> mapping->order;
1032 unsigned long flags;
1034 spin_lock_irqsave(&mapping->lock, flags);
1035 bitmap_clear(mapping->bitmap, start, count);
1036 spin_unlock_irqrestore(&mapping->lock, flags);
1039 static struct page **__iommu_alloc_buffer(struct device *dev, size_t size, gfp_t gfp)
1041 struct page **pages;
1042 int count = size >> PAGE_SHIFT;
1043 int array_size = count * sizeof(struct page *);
1046 if (array_size <= PAGE_SIZE)
1047 pages = kzalloc(array_size, gfp);
1049 pages = vzalloc(array_size);
1054 int j, order = __fls(count);
1056 pages[i] = alloc_pages(gfp | __GFP_NOWARN, order);
1057 while (!pages[i] && order)
1058 pages[i] = alloc_pages(gfp | __GFP_NOWARN, --order);
1063 split_page(pages[i], order);
1066 pages[i + j] = pages[i] + j;
1069 __dma_clear_buffer(pages[i], PAGE_SIZE << order);
1071 count -= 1 << order;
1078 __free_pages(pages[i], 0);
1079 if (array_size <= PAGE_SIZE)
1086 static int __iommu_free_buffer(struct device *dev, struct page **pages, size_t size)
1088 int count = size >> PAGE_SHIFT;
1089 int array_size = count * sizeof(struct page *);
1091 for (i = 0; i < count; i++)
1093 __free_pages(pages[i], 0);
1094 if (array_size <= PAGE_SIZE)
1102 * Create a CPU mapping for a specified pages
1105 __iommu_alloc_remap(struct page **pages, size_t size, gfp_t gfp, pgprot_t prot,
1108 unsigned int i, nr_pages = PAGE_ALIGN(size) >> PAGE_SHIFT;
1109 struct vm_struct *area;
1112 area = get_vm_area_caller(size, VM_ARM_DMA_CONSISTENT | VM_USERMAP,
1117 area->pages = pages;
1118 area->nr_pages = nr_pages;
1119 p = (unsigned long)area->addr;
1121 for (i = 0; i < nr_pages; i++) {
1122 phys_addr_t phys = __pfn_to_phys(page_to_pfn(pages[i]));
1123 if (ioremap_page_range(p, p + PAGE_SIZE, phys, prot))
1129 unmap_kernel_range((unsigned long)area->addr, size);
1135 * Create a mapping in device IO address space for specified pages
1138 __iommu_create_mapping(struct device *dev, struct page **pages, size_t size)
1140 struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1141 unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT;
1142 dma_addr_t dma_addr, iova;
1143 int i, ret = DMA_ERROR_CODE;
1145 dma_addr = __alloc_iova(mapping, size);
1146 if (dma_addr == DMA_ERROR_CODE)
1150 for (i = 0; i < count; ) {
1151 unsigned int next_pfn = page_to_pfn(pages[i]) + 1;
1152 phys_addr_t phys = page_to_phys(pages[i]);
1153 unsigned int len, j;
1155 for (j = i + 1; j < count; j++, next_pfn++)
1156 if (page_to_pfn(pages[j]) != next_pfn)
1159 len = (j - i) << PAGE_SHIFT;
1160 ret = iommu_map(mapping->domain, iova, phys, len, 0);
1168 iommu_unmap(mapping->domain, dma_addr, iova-dma_addr);
1169 __free_iova(mapping, dma_addr, size);
1170 return DMA_ERROR_CODE;
1173 static int __iommu_remove_mapping(struct device *dev, dma_addr_t iova, size_t size)
1175 struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1178 * add optional in-page offset from iova to size and align
1179 * result to page size
1181 size = PAGE_ALIGN((iova & ~PAGE_MASK) + size);
1184 iommu_unmap(mapping->domain, iova, size);
1185 __free_iova(mapping, iova, size);
1189 static struct page **__atomic_get_pages(void *addr)
1191 struct dma_pool *pool = &atomic_pool;
1192 struct page **pages = pool->pages;
1193 int offs = (addr - pool->vaddr) >> PAGE_SHIFT;
1195 return pages + offs;
1198 static struct page **__iommu_get_pages(void *cpu_addr, struct dma_attrs *attrs)
1200 struct vm_struct *area;
1202 if (__in_atomic_pool(cpu_addr, PAGE_SIZE))
1203 return __atomic_get_pages(cpu_addr);
1205 if (dma_get_attr(DMA_ATTR_NO_KERNEL_MAPPING, attrs))
1208 area = find_vm_area(cpu_addr);
1209 if (area && (area->flags & VM_ARM_DMA_CONSISTENT))
1214 static void *__iommu_alloc_atomic(struct device *dev, size_t size,
1220 addr = __alloc_from_pool(size, &page);
1224 *handle = __iommu_create_mapping(dev, &page, size);
1225 if (*handle == DMA_ERROR_CODE)
1231 __free_from_pool(addr, size);
1235 static void __iommu_free_atomic(struct device *dev, struct page **pages,
1236 dma_addr_t handle, size_t size)
1238 __iommu_remove_mapping(dev, handle, size);
1239 __free_from_pool(page_address(pages[0]), size);
1242 static void *arm_iommu_alloc_attrs(struct device *dev, size_t size,
1243 dma_addr_t *handle, gfp_t gfp, struct dma_attrs *attrs)
1245 pgprot_t prot = __get_dma_pgprot(attrs, pgprot_kernel);
1246 struct page **pages;
1249 *handle = DMA_ERROR_CODE;
1250 size = PAGE_ALIGN(size);
1252 if (gfp & GFP_ATOMIC)
1253 return __iommu_alloc_atomic(dev, size, handle);
1255 pages = __iommu_alloc_buffer(dev, size, gfp);
1259 *handle = __iommu_create_mapping(dev, pages, size);
1260 if (*handle == DMA_ERROR_CODE)
1263 if (dma_get_attr(DMA_ATTR_NO_KERNEL_MAPPING, attrs))
1266 addr = __iommu_alloc_remap(pages, size, gfp, prot,
1267 __builtin_return_address(0));
1274 __iommu_remove_mapping(dev, *handle, size);
1276 __iommu_free_buffer(dev, pages, size);
1280 static int arm_iommu_mmap_attrs(struct device *dev, struct vm_area_struct *vma,
1281 void *cpu_addr, dma_addr_t dma_addr, size_t size,
1282 struct dma_attrs *attrs)
1284 unsigned long uaddr = vma->vm_start;
1285 unsigned long usize = vma->vm_end - vma->vm_start;
1286 struct page **pages = __iommu_get_pages(cpu_addr, attrs);
1288 vma->vm_page_prot = __get_dma_pgprot(attrs, vma->vm_page_prot);
1294 int ret = vm_insert_page(vma, uaddr, *pages++);
1296 pr_err("Remapping memory failed: %d\n", ret);
1301 } while (usize > 0);
1307 * free a page as defined by the above mapping.
1308 * Must not be called with IRQs disabled.
1310 void arm_iommu_free_attrs(struct device *dev, size_t size, void *cpu_addr,
1311 dma_addr_t handle, struct dma_attrs *attrs)
1313 struct page **pages = __iommu_get_pages(cpu_addr, attrs);
1314 size = PAGE_ALIGN(size);
1317 WARN(1, "trying to free invalid coherent area: %p\n", cpu_addr);
1321 if (__in_atomic_pool(cpu_addr, size)) {
1322 __iommu_free_atomic(dev, pages, handle, size);
1326 if (!dma_get_attr(DMA_ATTR_NO_KERNEL_MAPPING, attrs)) {
1327 unmap_kernel_range((unsigned long)cpu_addr, size);
1331 __iommu_remove_mapping(dev, handle, size);
1332 __iommu_free_buffer(dev, pages, size);
1335 static int arm_iommu_get_sgtable(struct device *dev, struct sg_table *sgt,
1336 void *cpu_addr, dma_addr_t dma_addr,
1337 size_t size, struct dma_attrs *attrs)
1339 unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT;
1340 struct page **pages = __iommu_get_pages(cpu_addr, attrs);
1345 return sg_alloc_table_from_pages(sgt, pages, count, 0, size,
1350 * Map a part of the scatter-gather list into contiguous io address space
1352 static int __map_sg_chunk(struct device *dev, struct scatterlist *sg,
1353 size_t size, dma_addr_t *handle,
1354 enum dma_data_direction dir, struct dma_attrs *attrs,
1357 struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1358 dma_addr_t iova, iova_base;
1361 struct scatterlist *s;
1363 size = PAGE_ALIGN(size);
1364 *handle = DMA_ERROR_CODE;
1366 iova_base = iova = __alloc_iova(mapping, size);
1367 if (iova == DMA_ERROR_CODE)
1370 for (count = 0, s = sg; count < (size >> PAGE_SHIFT); s = sg_next(s)) {
1371 phys_addr_t phys = page_to_phys(sg_page(s));
1372 unsigned int len = PAGE_ALIGN(s->offset + s->length);
1375 !dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
1376 __dma_page_cpu_to_dev(sg_page(s), s->offset, s->length, dir);
1378 ret = iommu_map(mapping->domain, iova, phys, len, 0);
1381 count += len >> PAGE_SHIFT;
1384 *handle = iova_base;
1388 iommu_unmap(mapping->domain, iova_base, count * PAGE_SIZE);
1389 __free_iova(mapping, iova_base, size);
1393 static int __iommu_map_sg(struct device *dev, struct scatterlist *sg, int nents,
1394 enum dma_data_direction dir, struct dma_attrs *attrs,
1397 struct scatterlist *s = sg, *dma = sg, *start = sg;
1399 unsigned int offset = s->offset;
1400 unsigned int size = s->offset + s->length;
1401 unsigned int max = dma_get_max_seg_size(dev);
1403 for (i = 1; i < nents; i++) {
1406 s->dma_address = DMA_ERROR_CODE;
1409 if (s->offset || (size & ~PAGE_MASK) || size + s->length > max) {
1410 if (__map_sg_chunk(dev, start, size, &dma->dma_address,
1411 dir, attrs, is_coherent) < 0)
1414 dma->dma_address += offset;
1415 dma->dma_length = size - offset;
1417 size = offset = s->offset;
1424 if (__map_sg_chunk(dev, start, size, &dma->dma_address, dir, attrs,
1428 dma->dma_address += offset;
1429 dma->dma_length = size - offset;
1434 for_each_sg(sg, s, count, i)
1435 __iommu_remove_mapping(dev, sg_dma_address(s), sg_dma_len(s));
1440 * arm_coherent_iommu_map_sg - map a set of SG buffers for streaming mode DMA
1441 * @dev: valid struct device pointer
1442 * @sg: list of buffers
1443 * @nents: number of buffers to map
1444 * @dir: DMA transfer direction
1446 * Map a set of i/o coherent buffers described by scatterlist in streaming
1447 * mode for DMA. The scatter gather list elements are merged together (if
1448 * possible) and tagged with the appropriate dma address and length. They are
1449 * obtained via sg_dma_{address,length}.
1451 int arm_coherent_iommu_map_sg(struct device *dev, struct scatterlist *sg,
1452 int nents, enum dma_data_direction dir, struct dma_attrs *attrs)
1454 return __iommu_map_sg(dev, sg, nents, dir, attrs, true);
1458 * arm_iommu_map_sg - map a set of SG buffers for streaming mode DMA
1459 * @dev: valid struct device pointer
1460 * @sg: list of buffers
1461 * @nents: number of buffers to map
1462 * @dir: DMA transfer direction
1464 * Map a set of buffers described by scatterlist in streaming mode for DMA.
1465 * The scatter gather list elements are merged together (if possible) and
1466 * tagged with the appropriate dma address and length. They are obtained via
1467 * sg_dma_{address,length}.
1469 int arm_iommu_map_sg(struct device *dev, struct scatterlist *sg,
1470 int nents, enum dma_data_direction dir, struct dma_attrs *attrs)
1472 return __iommu_map_sg(dev, sg, nents, dir, attrs, false);
1475 static void __iommu_unmap_sg(struct device *dev, struct scatterlist *sg,
1476 int nents, enum dma_data_direction dir, struct dma_attrs *attrs,
1479 struct scatterlist *s;
1482 for_each_sg(sg, s, nents, i) {
1484 __iommu_remove_mapping(dev, sg_dma_address(s),
1487 !dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
1488 __dma_page_dev_to_cpu(sg_page(s), s->offset,
1494 * arm_coherent_iommu_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
1495 * @dev: valid struct device pointer
1496 * @sg: list of buffers
1497 * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
1498 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1500 * Unmap a set of streaming mode DMA translations. Again, CPU access
1501 * rules concerning calls here are the same as for dma_unmap_single().
1503 void arm_coherent_iommu_unmap_sg(struct device *dev, struct scatterlist *sg,
1504 int nents, enum dma_data_direction dir, struct dma_attrs *attrs)
1506 __iommu_unmap_sg(dev, sg, nents, dir, attrs, true);
1510 * arm_iommu_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
1511 * @dev: valid struct device pointer
1512 * @sg: list of buffers
1513 * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
1514 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1516 * Unmap a set of streaming mode DMA translations. Again, CPU access
1517 * rules concerning calls here are the same as for dma_unmap_single().
1519 void arm_iommu_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
1520 enum dma_data_direction dir, struct dma_attrs *attrs)
1522 __iommu_unmap_sg(dev, sg, nents, dir, attrs, false);
1526 * arm_iommu_sync_sg_for_cpu
1527 * @dev: valid struct device pointer
1528 * @sg: list of buffers
1529 * @nents: number of buffers to map (returned from dma_map_sg)
1530 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1532 void arm_iommu_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
1533 int nents, enum dma_data_direction dir)
1535 struct scatterlist *s;
1538 for_each_sg(sg, s, nents, i)
1539 __dma_page_dev_to_cpu(sg_page(s), s->offset, s->length, dir);
1544 * arm_iommu_sync_sg_for_device
1545 * @dev: valid struct device pointer
1546 * @sg: list of buffers
1547 * @nents: number of buffers to map (returned from dma_map_sg)
1548 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1550 void arm_iommu_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
1551 int nents, enum dma_data_direction dir)
1553 struct scatterlist *s;
1556 for_each_sg(sg, s, nents, i)
1557 __dma_page_cpu_to_dev(sg_page(s), s->offset, s->length, dir);
1562 * arm_coherent_iommu_map_page
1563 * @dev: valid struct device pointer
1564 * @page: page that buffer resides in
1565 * @offset: offset into page for start of buffer
1566 * @size: size of buffer to map
1567 * @dir: DMA transfer direction
1569 * Coherent IOMMU aware version of arm_dma_map_page()
1571 static dma_addr_t arm_coherent_iommu_map_page(struct device *dev, struct page *page,
1572 unsigned long offset, size_t size, enum dma_data_direction dir,
1573 struct dma_attrs *attrs)
1575 struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1576 dma_addr_t dma_addr;
1577 int ret, len = PAGE_ALIGN(size + offset);
1579 dma_addr = __alloc_iova(mapping, len);
1580 if (dma_addr == DMA_ERROR_CODE)
1583 ret = iommu_map(mapping->domain, dma_addr, page_to_phys(page), len, 0);
1587 return dma_addr + offset;
1589 __free_iova(mapping, dma_addr, len);
1590 return DMA_ERROR_CODE;
1594 * arm_iommu_map_page
1595 * @dev: valid struct device pointer
1596 * @page: page that buffer resides in
1597 * @offset: offset into page for start of buffer
1598 * @size: size of buffer to map
1599 * @dir: DMA transfer direction
1601 * IOMMU aware version of arm_dma_map_page()
1603 static dma_addr_t arm_iommu_map_page(struct device *dev, struct page *page,
1604 unsigned long offset, size_t size, enum dma_data_direction dir,
1605 struct dma_attrs *attrs)
1607 if (!dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
1608 __dma_page_cpu_to_dev(page, offset, size, dir);
1610 return arm_coherent_iommu_map_page(dev, page, offset, size, dir, attrs);
1614 * arm_coherent_iommu_unmap_page
1615 * @dev: valid struct device pointer
1616 * @handle: DMA address of buffer
1617 * @size: size of buffer (same as passed to dma_map_page)
1618 * @dir: DMA transfer direction (same as passed to dma_map_page)
1620 * Coherent IOMMU aware version of arm_dma_unmap_page()
1622 static void arm_coherent_iommu_unmap_page(struct device *dev, dma_addr_t handle,
1623 size_t size, enum dma_data_direction dir,
1624 struct dma_attrs *attrs)
1626 struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1627 dma_addr_t iova = handle & PAGE_MASK;
1628 int offset = handle & ~PAGE_MASK;
1629 int len = PAGE_ALIGN(size + offset);
1634 iommu_unmap(mapping->domain, iova, len);
1635 __free_iova(mapping, iova, len);
1639 * arm_iommu_unmap_page
1640 * @dev: valid struct device pointer
1641 * @handle: DMA address of buffer
1642 * @size: size of buffer (same as passed to dma_map_page)
1643 * @dir: DMA transfer direction (same as passed to dma_map_page)
1645 * IOMMU aware version of arm_dma_unmap_page()
1647 static void arm_iommu_unmap_page(struct device *dev, dma_addr_t handle,
1648 size_t size, enum dma_data_direction dir,
1649 struct dma_attrs *attrs)
1651 struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1652 dma_addr_t iova = handle & PAGE_MASK;
1653 struct page *page = phys_to_page(iommu_iova_to_phys(mapping->domain, iova));
1654 int offset = handle & ~PAGE_MASK;
1655 int len = PAGE_ALIGN(size + offset);
1660 if (!dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
1661 __dma_page_dev_to_cpu(page, offset, size, dir);
1663 iommu_unmap(mapping->domain, iova, len);
1664 __free_iova(mapping, iova, len);
1667 static void arm_iommu_sync_single_for_cpu(struct device *dev,
1668 dma_addr_t handle, size_t size, enum dma_data_direction dir)
1670 struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1671 dma_addr_t iova = handle & PAGE_MASK;
1672 struct page *page = phys_to_page(iommu_iova_to_phys(mapping->domain, iova));
1673 unsigned int offset = handle & ~PAGE_MASK;
1678 __dma_page_dev_to_cpu(page, offset, size, dir);
1681 static void arm_iommu_sync_single_for_device(struct device *dev,
1682 dma_addr_t handle, size_t size, enum dma_data_direction dir)
1684 struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1685 dma_addr_t iova = handle & PAGE_MASK;
1686 struct page *page = phys_to_page(iommu_iova_to_phys(mapping->domain, iova));
1687 unsigned int offset = handle & ~PAGE_MASK;
1692 __dma_page_cpu_to_dev(page, offset, size, dir);
1695 struct dma_map_ops iommu_ops = {
1696 .alloc = arm_iommu_alloc_attrs,
1697 .free = arm_iommu_free_attrs,
1698 .mmap = arm_iommu_mmap_attrs,
1699 .get_sgtable = arm_iommu_get_sgtable,
1701 .map_page = arm_iommu_map_page,
1702 .unmap_page = arm_iommu_unmap_page,
1703 .sync_single_for_cpu = arm_iommu_sync_single_for_cpu,
1704 .sync_single_for_device = arm_iommu_sync_single_for_device,
1706 .map_sg = arm_iommu_map_sg,
1707 .unmap_sg = arm_iommu_unmap_sg,
1708 .sync_sg_for_cpu = arm_iommu_sync_sg_for_cpu,
1709 .sync_sg_for_device = arm_iommu_sync_sg_for_device,
1712 struct dma_map_ops iommu_coherent_ops = {
1713 .alloc = arm_iommu_alloc_attrs,
1714 .free = arm_iommu_free_attrs,
1715 .mmap = arm_iommu_mmap_attrs,
1716 .get_sgtable = arm_iommu_get_sgtable,
1718 .map_page = arm_coherent_iommu_map_page,
1719 .unmap_page = arm_coherent_iommu_unmap_page,
1721 .map_sg = arm_coherent_iommu_map_sg,
1722 .unmap_sg = arm_coherent_iommu_unmap_sg,
1726 * arm_iommu_create_mapping
1727 * @bus: pointer to the bus holding the client device (for IOMMU calls)
1728 * @base: start address of the valid IO address space
1729 * @size: size of the valid IO address space
1730 * @order: accuracy of the IO addresses allocations
1732 * Creates a mapping structure which holds information about used/unused
1733 * IO address ranges, which is required to perform memory allocation and
1734 * mapping with IOMMU aware functions.
1736 * The client device need to be attached to the mapping with
1737 * arm_iommu_attach_device function.
1739 struct dma_iommu_mapping *
1740 arm_iommu_create_mapping(struct bus_type *bus, dma_addr_t base, size_t size,
1743 unsigned int count = size >> (PAGE_SHIFT + order);
1744 unsigned int bitmap_size = BITS_TO_LONGS(count) * sizeof(long);
1745 struct dma_iommu_mapping *mapping;
1749 return ERR_PTR(-EINVAL);
1751 mapping = kzalloc(sizeof(struct dma_iommu_mapping), GFP_KERNEL);
1755 mapping->bitmap = kzalloc(bitmap_size, GFP_KERNEL);
1756 if (!mapping->bitmap)
1759 mapping->base = base;
1760 mapping->bits = BITS_PER_BYTE * bitmap_size;
1761 mapping->order = order;
1762 spin_lock_init(&mapping->lock);
1764 mapping->domain = iommu_domain_alloc(bus);
1765 if (!mapping->domain)
1768 kref_init(&mapping->kref);
1771 kfree(mapping->bitmap);
1775 return ERR_PTR(err);
1778 static void release_iommu_mapping(struct kref *kref)
1780 struct dma_iommu_mapping *mapping =
1781 container_of(kref, struct dma_iommu_mapping, kref);
1783 iommu_domain_free(mapping->domain);
1784 kfree(mapping->bitmap);
1788 void arm_iommu_release_mapping(struct dma_iommu_mapping *mapping)
1791 kref_put(&mapping->kref, release_iommu_mapping);
1795 * arm_iommu_attach_device
1796 * @dev: valid struct device pointer
1797 * @mapping: io address space mapping structure (returned from
1798 * arm_iommu_create_mapping)
1800 * Attaches specified io address space mapping to the provided device,
1801 * this replaces the dma operations (dma_map_ops pointer) with the
1802 * IOMMU aware version. More than one client might be attached to
1803 * the same io address space mapping.
1805 int arm_iommu_attach_device(struct device *dev,
1806 struct dma_iommu_mapping *mapping)
1810 err = iommu_attach_device(mapping->domain, dev);
1814 kref_get(&mapping->kref);
1815 dev->archdata.mapping = mapping;
1816 set_dma_ops(dev, &iommu_ops);
1818 pr_debug("Attached IOMMU controller to %s device.\n", dev_name(dev));