arch/arm/mach-vexpress/v2m.c

   1 /*
   2  * Versatile Express V2M Motherboard Support
   3  */
   4 #include <linux/device.h>
   5 #include <linux/amba/bus.h>
   6 #include <linux/amba/mmci.h>
   7 #include <linux/io.h>
   8 #include <linux/init.h>
   9 #include <linux/of_address.h>
  10 #include <linux/of_fdt.h>
  11 #include <linux/of_irq.h>
  12 #include <linux/of_platform.h>
  13 #include <linux/platform_device.h>
  14 #include <linux/ata_platform.h>
  15 #include <linux/smsc911x.h>
  16 #include <linux/spinlock.h>
  17 #include <linux/usb/isp1760.h>
  18 #include <linux/clkdev.h>
  19 #include <linux/clk-provider.h>
  20 #include <linux/mtd/physmap.h>
  21 #include <linux/regulator/fixed.h>
  22 #include <linux/regulator/machine.h>
  23
  24 #include <asm/arch_timer.h>
  25 #include <asm/mach-types.h>
  26 #include <asm/sizes.h>
  27 #include <asm/smp_twd.h>
  28 #include <asm/mach/arch.h>
  29 #include <asm/mach/map.h>
  30 #include <asm/mach/time.h>
  31 #include <asm/hardware/arm_timer.h>
  32 #include <asm/hardware/cache-l2x0.h>
  33 #include <asm/hardware/gic.h>
  34 #include <asm/hardware/timer-sp.h>
  35 #include <asm/hardware/sp810.h>
  36
  37 #include <mach/ct-ca9x4.h>
  38 #include <mach/motherboard.h>
  39
  40 #include <plat/sched_clock.h>
  41
  42 #include "core.h"
  43
  44 #define V2M_PA_CS0      0x40000000
  45 #define V2M_PA_CS1      0x44000000
  46 #define V2M_PA_CS2      0x48000000
  47 #define V2M_PA_CS3      0x4c000000
  48 #define V2M_PA_CS7      0x10000000
  49
  50 static struct map_desc v2m_io_desc[] __initdata = {
  51         {
  52                 .virtual        = V2M_PERIPH,
  53                 .pfn            = __phys_to_pfn(V2M_PA_CS7),
  54                 .length         = SZ_128K,
  55                 .type           = MT_DEVICE,
  56         },
  57 };
  58
  59 static void __iomem *v2m_sysreg_base;
  60
  61 static void __init v2m_sysctl_init(void __iomem *base)
  62 {
  63         u32 scctrl;
  64
  65         if (WARN_ON(!base))
  66                 return;
  67
  68         /* Select 1MHz TIMCLK as the reference clock for SP804 timers */
  69         scctrl = readl(base + SCCTRL);
  70         scctrl |= SCCTRL_TIMEREN0SEL_TIMCLK;
  71         scctrl |= SCCTRL_TIMEREN1SEL_TIMCLK;
  72         writel(scctrl, base + SCCTRL);
  73 }
  74
  75 static void __init v2m_sp804_init(void __iomem *base, unsigned int irq)
  76 {
  77         if (WARN_ON(!base || irq == NO_IRQ))
  78                 return;
  79
  80         writel(0, base + TIMER_1_BASE + TIMER_CTRL);
  81         writel(0, base + TIMER_2_BASE + TIMER_CTRL);
  82
  83         sp804_clocksource_init(base + TIMER_2_BASE, "v2m-timer1");
  84         sp804_clockevents_init(base + TIMER_1_BASE, irq, "v2m-timer0");
  85 }
  86
  87
  88 static DEFINE_SPINLOCK(v2m_cfg_lock);
  89
  90 int v2m_cfg_write(u32 devfn, u32 data)
  91 {
  92         /* Configuration interface broken? */
  93         u32 val;
  94
  95         printk("%s: writing %08x to %08x\n", __func__, data, devfn);
  96
  97         devfn |= SYS_CFG_START | SYS_CFG_WRITE;
  98
  99         spin_lock(&v2m_cfg_lock);
 100         val = readl(v2m_sysreg_base + V2M_SYS_CFGSTAT);
 101         writel(val & ~SYS_CFG_COMPLETE, v2m_sysreg_base + V2M_SYS_CFGSTAT);
 102
 103         writel(data, v2m_sysreg_base +  V2M_SYS_CFGDATA);
 104         writel(devfn, v2m_sysreg_base + V2M_SYS_CFGCTRL);
 105
 106         do {
 107                 val = readl(v2m_sysreg_base + V2M_SYS_CFGSTAT);
 108         } while (val == 0);
 109         spin_unlock(&v2m_cfg_lock);
 110
 111         return !!(val & SYS_CFG_ERR);
 112 }
 113
 114 int v2m_cfg_read(u32 devfn, u32 *data)
 115 {
 116         u32 val;
 117
 118         devfn |= SYS_CFG_START;
 119
 120         spin_lock(&v2m_cfg_lock);
 121         writel(0, v2m_sysreg_base + V2M_SYS_CFGSTAT);
 122         writel(devfn, v2m_sysreg_base + V2M_SYS_CFGCTRL);
 123
 124         mb();
 125
 126         do {
 127                 cpu_relax();
 128                 val = readl(v2m_sysreg_base + V2M_SYS_CFGSTAT);
 129         } while (val == 0);
 130
 131         *data = readl(v2m_sysreg_base + V2M_SYS_CFGDATA);
 132         spin_unlock(&v2m_cfg_lock);
 133
 134         return !!(val & SYS_CFG_ERR);
 135 }
 136
 137 void __init v2m_flags_set(u32 data)
 138 {
 139         writel(~0, v2m_sysreg_base + V2M_SYS_FLAGSCLR);
 140         writel(data, v2m_sysreg_base + V2M_SYS_FLAGSSET);
 141 }
 142
 143 int v2m_get_master_site(void)
 144 {
 145         u32 misc = readl(v2m_sysreg_base + V2M_SYS_MISC);
 146
 147         return misc & SYS_MISC_MASTERSITE ? SYS_CFG_SITE_DB2 : SYS_CFG_SITE_DB1;
 148 }
 149
 150
 151 static struct resource v2m_pcie_i2c_resource = {
 152         .start  = V2M_SERIAL_BUS_PCI,
 153         .end    = V2M_SERIAL_BUS_PCI + SZ_4K - 1,
 154         .flags  = IORESOURCE_MEM,
 155 };
 156
 157 static struct platform_device v2m_pcie_i2c_device = {
 158         .name           = "versatile-i2c",
 159         .id             = 0,
 160         .num_resources  = 1,
 161         .resource       = &v2m_pcie_i2c_resource,
 162 };
 163
 164 static struct resource v2m_ddc_i2c_resource = {
 165         .start  = V2M_SERIAL_BUS_DVI,
 166         .end    = V2M_SERIAL_BUS_DVI + SZ_4K - 1,
 167         .flags  = IORESOURCE_MEM,
 168 };
 169
 170 static struct platform_device v2m_ddc_i2c_device = {
 171         .name           = "versatile-i2c",
 172         .id             = 1,
 173         .num_resources  = 1,
 174         .resource       = &v2m_ddc_i2c_resource,
 175 };
 176
 177 static struct resource v2m_eth_resources[] = {
 178         {
 179                 .start  = V2M_LAN9118,
 180                 .end    = V2M_LAN9118 + SZ_64K - 1,
 181                 .flags  = IORESOURCE_MEM,
 182         }, {
 183                 .start  = IRQ_V2M_LAN9118,
 184                 .end    = IRQ_V2M_LAN9118,
 185                 .flags  = IORESOURCE_IRQ,
 186         },
 187 };
 188
 189 static struct smsc911x_platform_config v2m_eth_config = {
 190         .flags          = SMSC911X_USE_32BIT,
 191         .irq_polarity   = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH,
 192         .irq_type       = SMSC911X_IRQ_TYPE_PUSH_PULL,
 193         .phy_interface  = PHY_INTERFACE_MODE_MII,
 194 };
 195
 196 static struct platform_device v2m_eth_device = {
 197         .name           = "smsc911x",
 198         .id             = -1,
 199         .resource       = v2m_eth_resources,
 200         .num_resources  = ARRAY_SIZE(v2m_eth_resources),
 201         .dev.platform_data = &v2m_eth_config,
 202 };
 203
 204 static struct regulator_consumer_supply v2m_eth_supplies[] = {
 205         REGULATOR_SUPPLY("vddvario", "smsc911x"),
 206         REGULATOR_SUPPLY("vdd33a", "smsc911x"),
 207 };
 208
 209 static struct resource v2m_usb_resources[] = {
 210         {
 211                 .start  = V2M_ISP1761,
 212                 .end    = V2M_ISP1761 + SZ_128K - 1,
 213                 .flags  = IORESOURCE_MEM,
 214         }, {
 215                 .start  = IRQ_V2M_ISP1761,
 216                 .end    = IRQ_V2M_ISP1761,
 217                 .flags  = IORESOURCE_IRQ,
 218         },
 219 };
 220
 221 static struct isp1760_platform_data v2m_usb_config = {
 222         .is_isp1761             = true,
 223         .bus_width_16           = false,
 224         .port1_otg              = true,
 225         .analog_oc              = false,
 226         .dack_polarity_high     = false,
 227         .dreq_polarity_high     = false,
 228 };
 229
 230 static struct platform_device v2m_usb_device = {
 231         .name           = "isp1760",
 232         .id             = -1,
 233         .resource       = v2m_usb_resources,
 234         .num_resources  = ARRAY_SIZE(v2m_usb_resources),
 235         .dev.platform_data = &v2m_usb_config,
 236 };
 237
 238 static void v2m_flash_set_vpp(struct platform_device *pdev, int on)
 239 {
 240         writel(on != 0, v2m_sysreg_base + V2M_SYS_FLASH);
 241 }
 242
 243 static struct physmap_flash_data v2m_flash_data = {
 244         .width          = 4,
 245         .set_vpp        = v2m_flash_set_vpp,
 246 };
 247
 248 static struct resource v2m_flash_resources[] = {
 249         {
 250                 .start  = V2M_NOR0,
 251                 .end    = V2M_NOR0 + SZ_64M - 1,
 252                 .flags  = IORESOURCE_MEM,
 253         }, {
 254                 .start  = V2M_NOR1,
 255                 .end    = V2M_NOR1 + SZ_64M - 1,
 256                 .flags  = IORESOURCE_MEM,
 257         },
 258 };
 259
 260 static struct platform_device v2m_flash_device = {
 261         .name           = "physmap-flash",
 262         .id             = -1,
 263         .resource       = v2m_flash_resources,
 264         .num_resources  = ARRAY_SIZE(v2m_flash_resources),
 265         .dev.platform_data = &v2m_flash_data,
 266 };
 267
 268 static struct pata_platform_info v2m_pata_data = {
 269         .ioport_shift   = 2,
 270 };
 271
 272 static struct resource v2m_pata_resources[] = {
 273         {
 274                 .start  = V2M_CF,
 275                 .end    = V2M_CF + 0xff,
 276                 .flags  = IORESOURCE_MEM,
 277         }, {
 278                 .start  = V2M_CF + 0x100,
 279                 .end    = V2M_CF + SZ_4K - 1,
 280                 .flags  = IORESOURCE_MEM,
 281         },
 282 };
 283
 284 static struct platform_device v2m_cf_device = {
 285         .name           = "pata_platform",
 286         .id             = -1,
 287         .resource       = v2m_pata_resources,
 288         .num_resources  = ARRAY_SIZE(v2m_pata_resources),
 289         .dev.platform_data = &v2m_pata_data,
 290 };
 291
 292 static unsigned int v2m_mmci_status(struct device *dev)
 293 {
 294         return readl(v2m_sysreg_base + V2M_SYS_MCI) & (1 << 0);
 295 }
 296
 297 static struct mmci_platform_data v2m_mmci_data = {
 298         .ocr_mask       = MMC_VDD_32_33|MMC_VDD_33_34,
 299         .status         = v2m_mmci_status,
 300 };
 301
 302 static AMBA_APB_DEVICE(aaci,  "mb:aaci",  0, V2M_AACI, IRQ_V2M_AACI, NULL);
 303 static AMBA_APB_DEVICE(mmci,  "mb:mmci",  0, V2M_MMCI, IRQ_V2M_MMCI, &v2m_mmci_data);
 304 static AMBA_APB_DEVICE(kmi0,  "mb:kmi0",  0, V2M_KMI0, IRQ_V2M_KMI0, NULL);
 305 static AMBA_APB_DEVICE(kmi1,  "mb:kmi1",  0, V2M_KMI1, IRQ_V2M_KMI1, NULL);
 306 static AMBA_APB_DEVICE(uart0, "mb:uart0", 0, V2M_UART0, IRQ_V2M_UART0, NULL);
 307 static AMBA_APB_DEVICE(uart1, "mb:uart1", 0, V2M_UART1, IRQ_V2M_UART1, NULL);
 308 static AMBA_APB_DEVICE(uart2, "mb:uart2", 0, V2M_UART2, IRQ_V2M_UART2, NULL);
 309 static AMBA_APB_DEVICE(uart3, "mb:uart3", 0, V2M_UART3, IRQ_V2M_UART3, NULL);
 310 static AMBA_APB_DEVICE(wdt,   "mb:wdt",   0, V2M_WDT, IRQ_V2M_WDT, NULL);
 311 static AMBA_APB_DEVICE(rtc,   "mb:rtc",   0, V2M_RTC, IRQ_V2M_RTC, NULL);
 312
 313 static struct amba_device *v2m_amba_devs[] __initdata = {
 314         &aaci_device,
 315         &mmci_device,
 316         &kmi0_device,
 317         &kmi1_device,
 318         &uart0_device,
 319         &uart1_device,
 320         &uart2_device,
 321         &uart3_device,
 322         &wdt_device,
 323         &rtc_device,
 324 };
 325
 326
 327 static unsigned long v2m_osc_recalc_rate(struct clk_hw *hw,
 328                 unsigned long parent_rate)
 329 {
 330         struct v2m_osc *osc = to_v2m_osc(hw);
 331
 332         return !parent_rate ? osc->rate_default : parent_rate;
 333 }
 334
 335 static long v2m_osc_round_rate(struct clk_hw *hw, unsigned long rate,
 336                 unsigned long *parent_rate)
 337 {
 338         struct v2m_osc *osc = to_v2m_osc(hw);
 339
 340         if (WARN_ON(rate < osc->rate_min))
 341                 rate = osc->rate_min;
 342
 343         if (WARN_ON(rate > osc->rate_max))
 344                 rate = osc->rate_max;
 345
 346         return rate;
 347 }
 348
 349 static int v2m_osc_set_rate(struct clk_hw *hw, unsigned long rate,
 350                 unsigned long parent_rate)
 351 {
 352         struct v2m_osc *osc = to_v2m_osc(hw);
 353
 354         v2m_cfg_write(SYS_CFG_OSC | SYS_CFG_SITE(osc->site) |
 355                         SYS_CFG_STACK(osc->stack) | osc->osc, rate);
 356
 357         return 0;
 358 }
 359
 360 static struct clk_ops v2m_osc_ops = {
 361         .recalc_rate = v2m_osc_recalc_rate,
 362         .round_rate = v2m_osc_round_rate,
 363         .set_rate = v2m_osc_set_rate,
 364 };
 365
 366 struct clk * __init v2m_osc_register(const char *name, struct v2m_osc *osc)
 367 {
 368         struct clk_init_data init;
 369
 370         WARN_ON(osc->site > 2);
 371         WARN_ON(osc->stack > 15);
 372         WARN_ON(osc->osc > 4095);
 373
 374         init.name = name;
 375         init.ops = &v2m_osc_ops;
 376         init.flags = CLK_IS_ROOT;
 377         init.num_parents = 0;
 378
 379         osc->hw.init = &init;
 380
 381         return clk_register(NULL, &osc->hw);
 382 }
 383
 384 static struct v2m_osc v2m_mb_osc1 = {
 385         .site = SYS_CFG_SITE_MB,
 386         .osc = 1,
 387         .rate_min = 23750000,
 388         .rate_max = 63500000,
 389         .rate_default = 23750000,
 390 };
 391
 392 static const char *v2m_ref_clk_periphs[] __initconst = {
 393         "mb:wdt",   "1000f000.wdt",  "1c0f0000.wdt",    /* SP805 WDT */
 394 };
 395
 396 static const char *v2m_osc1_periphs[] __initconst = {
 397         "mb:clcd",  "1001f000.clcd", "1c1f0000.clcd",   /* PL111 CLCD */
 398 };
 399
 400 static const char *v2m_osc2_periphs[] __initconst = {
 401         "mb:mmci",  "10005000.mmci", "1c050000.mmci",   /* PL180 MMCI */
 402         "mb:kmi0",  "10006000.kmi",  "1c060000.kmi",    /* PL050 KMI0 */
 403         "mb:kmi1",  "10007000.kmi",  "1c070000.kmi",    /* PL050 KMI1 */
 404         "mb:uart0", "10009000.uart", "1c090000.uart",   /* PL011 UART0 */
 405         "mb:uart1", "1000a000.uart", "1c0a0000.uart",   /* PL011 UART1 */
 406         "mb:uart2", "1000b000.uart", "1c0b0000.uart",   /* PL011 UART2 */
 407         "mb:uart3", "1000c000.uart", "1c0c0000.uart",   /* PL011 UART3 */
 408 };
 409
 410 static void __init v2m_clk_init(void)
 411 {
 412         struct clk *clk;
 413         int i;
 414
 415         clk = clk_register_fixed_rate(NULL, "dummy_apb_pclk", NULL,
 416                         CLK_IS_ROOT, 0);
 417         WARN_ON(clk_register_clkdev(clk, "apb_pclk", NULL));
 418
 419         clk = clk_register_fixed_rate(NULL, "mb:ref_clk", NULL,
 420                         CLK_IS_ROOT, 32768);
 421         for (i = 0; i < ARRAY_SIZE(v2m_ref_clk_periphs); i++)
 422                 WARN_ON(clk_register_clkdev(clk, NULL, v2m_ref_clk_periphs[i]));
 423
 424         clk = clk_register_fixed_rate(NULL, "mb:sp804_clk", NULL,
 425                         CLK_IS_ROOT, 1000000);
 426         WARN_ON(clk_register_clkdev(clk, "v2m-timer0", "sp804"));
 427         WARN_ON(clk_register_clkdev(clk, "v2m-timer1", "sp804"));
 428
 429         clk = v2m_osc_register("mb:osc1", &v2m_mb_osc1);
 430         for (i = 0; i < ARRAY_SIZE(v2m_osc1_periphs); i++)
 431                 WARN_ON(clk_register_clkdev(clk, NULL, v2m_osc1_periphs[i]));
 432
 433         clk = clk_register_fixed_rate(NULL, "mb:osc2", NULL,
 434                         CLK_IS_ROOT, 24000000);
 435         for (i = 0; i < ARRAY_SIZE(v2m_osc2_periphs); i++)
 436                 WARN_ON(clk_register_clkdev(clk, NULL, v2m_osc2_periphs[i]));
 437 }
 438
 439 static void __init v2m_timer_init(void)
 440 {
 441         v2m_sysctl_init(ioremap(V2M_SYSCTL, SZ_4K));
 442         v2m_clk_init();
 443         v2m_sp804_init(ioremap(V2M_TIMER01, SZ_4K), IRQ_V2M_TIMER0);
 444 }
 445
 446 static struct sys_timer v2m_timer = {
 447         .init   = v2m_timer_init,
 448 };
 449
 450 static void __init v2m_init_early(void)
 451 {
 452         if (ct_desc->init_early)
 453                 ct_desc->init_early();
 454         versatile_sched_clock_init(v2m_sysreg_base + V2M_SYS_24MHZ, 24000000);
 455 }
 456
 457 static void v2m_power_off(void)
 458 {
 459         if (v2m_cfg_write(SYS_CFG_SHUTDOWN | SYS_CFG_SITE(SYS_CFG_SITE_MB), 0))
 460                 printk(KERN_EMERG "Unable to shutdown\n");
 461 }
 462
 463 static void v2m_restart(char str, const char *cmd)
 464 {
 465         if (v2m_cfg_write(SYS_CFG_REBOOT | SYS_CFG_SITE(SYS_CFG_SITE_MB), 0))
 466                 printk(KERN_EMERG "Unable to reboot\n");
 467 }
 468
 469 struct ct_desc *ct_desc;
 470
 471 static struct ct_desc *ct_descs[] __initdata = {
 472 #ifdef CONFIG_ARCH_VEXPRESS_CA9X4
 473         &ct_ca9x4_desc,
 474 #endif
 475 };
 476
 477 static void __init v2m_populate_ct_desc(void)
 478 {
 479         int i;
 480         u32 current_tile_id;
 481
 482         ct_desc = NULL;
 483         current_tile_id = readl(v2m_sysreg_base + V2M_SYS_PROCID0)
 484                                 & V2M_CT_ID_MASK;
 485
 486         for (i = 0; i < ARRAY_SIZE(ct_descs) && !ct_desc; ++i)
 487                 if (ct_descs[i]->id == current_tile_id)
 488                         ct_desc = ct_descs[i];
 489
 490         if (!ct_desc)
 491                 panic("vexpress: this kernel does not support core tile ID 0x%08x when booting via ATAGs.\n"
 492                       "You may need a device tree blob or a different kernel to boot on this board.\n",
 493                       current_tile_id);
 494 }
 495
 496 static void __init v2m_map_io(void)
 497 {
 498         iotable_init(v2m_io_desc, ARRAY_SIZE(v2m_io_desc));
 499         v2m_sysreg_base = ioremap(V2M_SYSREGS, SZ_4K);
 500         v2m_populate_ct_desc();
 501         ct_desc->map_io();
 502 }
 503
 504 static void __init v2m_init_irq(void)
 505 {
 506         ct_desc->init_irq();
 507 }
 508
 509 static void __init v2m_init(void)
 510 {
 511         int i;
 512
 513         regulator_register_fixed(0, v2m_eth_supplies,
 514                         ARRAY_SIZE(v2m_eth_supplies));
 515
 516         platform_device_register(&v2m_pcie_i2c_device);
 517         platform_device_register(&v2m_ddc_i2c_device);
 518         platform_device_register(&v2m_flash_device);
 519         platform_device_register(&v2m_cf_device);
 520         platform_device_register(&v2m_eth_device);
 521         platform_device_register(&v2m_usb_device);
 522
 523         for (i = 0; i < ARRAY_SIZE(v2m_amba_devs); i++)
 524                 amba_device_register(v2m_amba_devs[i], &iomem_resource);
 525
 526         pm_power_off = v2m_power_off;
 527
 528         ct_desc->init_tile();
 529 }
 530
 531 MACHINE_START(VEXPRESS, "ARM-Versatile Express")
 532         .atag_offset    = 0x100,
 533         .map_io         = v2m_map_io,
 534         .init_early     = v2m_init_early,
 535         .init_irq       = v2m_init_irq,
 536         .timer          = &v2m_timer,
 537         .handle_irq     = gic_handle_irq,
 538         .init_machine   = v2m_init,
 539         .restart        = v2m_restart,
 540 MACHINE_END
 541
 542 #if defined(CONFIG_ARCH_VEXPRESS_DT)
 543
 544 static struct map_desc v2m_rs1_io_desc __initdata = {
 545         .virtual        = V2M_PERIPH,
 546         .pfn            = __phys_to_pfn(0x1c000000),
 547         .length         = SZ_2M,
 548         .type           = MT_DEVICE,
 549 };
 550
 551 static int __init v2m_dt_scan_memory_map(unsigned long node, const char *uname,
 552                 int depth, void *data)
 553 {
 554         const char **map = data;
 555
 556         if (strcmp(uname, "motherboard") != 0)
 557                 return 0;
 558
 559         *map = of_get_flat_dt_prop(node, "arm,v2m-memory-map", NULL);
 560
 561         return 1;
 562 }
 563
 564 void __init v2m_dt_map_io(void)
 565 {
 566         const char *map = NULL;
 567
 568         of_scan_flat_dt(v2m_dt_scan_memory_map, &map);
 569
 570         if (map && strcmp(map, "rs1") == 0)
 571                 iotable_init(&v2m_rs1_io_desc, 1);
 572         else
 573                 iotable_init(v2m_io_desc, ARRAY_SIZE(v2m_io_desc));
 574
 575 #if defined(CONFIG_SMP)
 576         vexpress_dt_smp_map_io();
 577 #endif
 578 }
 579
 580 void __init v2m_dt_init_early(void)
 581 {
 582         struct device_node *node;
 583         u32 dt_hbi;
 584
 585         node = of_find_compatible_node(NULL, NULL, "arm,vexpress-sysreg");
 586         v2m_sysreg_base = of_iomap(node, 0);
 587         if (WARN_ON(!v2m_sysreg_base))
 588                 return;
 589
 590         /* Confirm board type against DT property, if available */
 591         if (of_property_read_u32(allnodes, "arm,hbi", &dt_hbi) == 0) {
 592                 int site = v2m_get_master_site();
 593                 u32 id = readl(v2m_sysreg_base + (site == SYS_CFG_SITE_DB2 ?
 594                                 V2M_SYS_PROCID1 : V2M_SYS_PROCID0));
 595                 u32 hbi = id & SYS_PROCIDx_HBI_MASK;
 596
 597                 if (WARN_ON(dt_hbi != hbi))
 598                         pr_warning("vexpress: DT HBI (%x) is not matching "
 599                                         "hardware (%x)!\n", dt_hbi, hbi);
 600         }
 601 }
 602
 603 static  struct of_device_id vexpress_irq_match[] __initdata = {
 604         { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
 605         {}
 606 };
 607
 608 static void __init v2m_dt_init_irq(void)
 609 {
 610         of_irq_init(vexpress_irq_match);
 611 }
 612
 613 static void __init v2m_dt_timer_init(void)
 614 {
 615         struct device_node *node;
 616         const char *path;
 617         int err;
 618
 619         node = of_find_compatible_node(NULL, NULL, "arm,sp810");
 620         v2m_sysctl_init(of_iomap(node, 0));
 621
 622         v2m_clk_init();
 623
 624         err = of_property_read_string(of_aliases, "arm,v2m_timer", &path);
 625         if (WARN_ON(err))
 626                 return;
 627         node = of_find_node_by_path(path);
 628         v2m_sp804_init(of_iomap(node, 0), irq_of_parse_and_map(node, 0));
 629         if (arch_timer_of_register() != 0)
 630                 twd_local_timer_of_register();
 631
 632         if (arch_timer_sched_clock_init() != 0)
 633                 versatile_sched_clock_init(v2m_sysreg_base + V2M_SYS_24MHZ, 24000000);
 634 }
 635
 636 static struct sys_timer v2m_dt_timer = {
 637         .init = v2m_dt_timer_init,
 638 };
 639
 640 static struct of_dev_auxdata v2m_dt_auxdata_lookup[] __initdata = {
 641         OF_DEV_AUXDATA("arm,vexpress-flash", V2M_NOR0, "physmap-flash",
 642                         &v2m_flash_data),
 643         OF_DEV_AUXDATA("arm,primecell", V2M_MMCI, "mb:mmci", &v2m_mmci_data),
 644         /* RS1 memory map */
 645         OF_DEV_AUXDATA("arm,vexpress-flash", 0x08000000, "physmap-flash",
 646                         &v2m_flash_data),
 647         OF_DEV_AUXDATA("arm,primecell", 0x1c050000, "mb:mmci", &v2m_mmci_data),
 648         {}
 649 };
 650
 651 static void __init v2m_dt_init(void)
 652 {
 653         l2x0_of_init(0x00400000, 0xfe0fffff);
 654         of_platform_populate(NULL, of_default_bus_match_table,
 655                         v2m_dt_auxdata_lookup, NULL);
 656         pm_power_off = v2m_power_off;
 657 }
 658
 659 const static char *v2m_dt_match[] __initconst = {
 660         "arm,vexpress",
 661         NULL,
 662 };
 663
 664 DT_MACHINE_START(VEXPRESS_DT, "ARM-Versatile Express")
 665         .dt_compat      = v2m_dt_match,
 666         .map_io         = v2m_dt_map_io,
 667         .init_early     = v2m_dt_init_early,
 668         .init_irq       = v2m_dt_init_irq,
 669         .timer          = &v2m_dt_timer,
 670         .init_machine   = v2m_dt_init,
 671         .handle_irq     = gic_handle_irq,
 672         .restart        = v2m_restart,
 673 MACHINE_END
 674
 675 #endif