arch/arm/mach-vexpress/v2m.c

   1 /*
   2  * Versatile Express V2M Motherboard Support
   3  */
   4 #include <linux/device.h>
   5 #include <linux/amba/bus.h>
   6 #include <linux/amba/mmci.h>
   7 #include <linux/io.h>
   8 #include <linux/init.h>
   9 #include <linux/platform_device.h>
  10 #include <linux/ata_platform.h>
  11 #include <linux/smsc911x.h>
  12 #include <linux/spinlock.h>
  13 #include <linux/device.h>
  14 #include <linux/usb/isp1760.h>
  15 #include <linux/clkdev.h>
  16 #include <linux/mtd/physmap.h>
  17
  18 #include <asm/mach-types.h>
  19 #include <asm/sizes.h>
  20 #include <asm/mach/arch.h>
  21 #include <asm/mach/map.h>
  22 #include <asm/mach/time.h>
  23 #include <asm/hardware/arm_timer.h>
  24 #include <asm/hardware/timer-sp.h>
  25 #include <asm/hardware/sp810.h>
  26 #include <asm/hardware/gic.h>
  27
  28 #include <mach/ct-ca9x4.h>
  29 #include <mach/motherboard.h>
  30
  31 #include <plat/sched_clock.h>
  32
  33 #include "core.h"
  34
  35 #define V2M_PA_CS0      0x40000000
  36 #define V2M_PA_CS1      0x44000000
  37 #define V2M_PA_CS2      0x48000000
  38 #define V2M_PA_CS3      0x4c000000
  39 #define V2M_PA_CS7      0x10000000
  40
  41 static struct map_desc v2m_io_desc[] __initdata = {
  42         {
  43                 .virtual        = V2M_PERIPH,
  44                 .pfn            = __phys_to_pfn(V2M_PA_CS7),
  45                 .length         = SZ_128K,
  46                 .type           = MT_DEVICE,
  47         },
  48 };
  49
  50 static void __iomem *v2m_sysreg_base;
  51
  52 static void __init v2m_sysctl_init(void __iomem *base)
  53 {
  54         u32 scctrl;
  55
  56         if (WARN_ON(!base))
  57                 return;
  58
  59         /* Select 1MHz TIMCLK as the reference clock for SP804 timers */
  60         scctrl = readl(base + SCCTRL);
  61         scctrl |= SCCTRL_TIMEREN0SEL_TIMCLK;
  62         scctrl |= SCCTRL_TIMEREN1SEL_TIMCLK;
  63         writel(scctrl, base + SCCTRL);
  64 }
  65
  66 static void __init v2m_sp804_init(void __iomem *base, unsigned int irq)
  67 {
  68         if (WARN_ON(!base || irq == NO_IRQ))
  69                 return;
  70
  71         writel(0, base + TIMER_1_BASE + TIMER_CTRL);
  72         writel(0, base + TIMER_2_BASE + TIMER_CTRL);
  73
  74         sp804_clocksource_init(base + TIMER_2_BASE, "v2m-timer1");
  75         sp804_clockevents_init(base + TIMER_1_BASE, irq, "v2m-timer0");
  76 }
  77
  78 static void __init v2m_timer_init(void)
  79 {
  80         v2m_sysctl_init(ioremap(V2M_SYSCTL, SZ_4K));
  81         v2m_sp804_init(ioremap(V2M_TIMER01, SZ_4K), IRQ_V2M_TIMER0);
  82 }
  83
  84 static struct sys_timer v2m_timer = {
  85         .init   = v2m_timer_init,
  86 };
  87
  88
  89 static DEFINE_SPINLOCK(v2m_cfg_lock);
  90
  91 int v2m_cfg_write(u32 devfn, u32 data)
  92 {
  93         /* Configuration interface broken? */
  94         u32 val;
  95
  96         printk("%s: writing %08x to %08x\n", __func__, data, devfn);
  97
  98         devfn |= SYS_CFG_START | SYS_CFG_WRITE;
  99
 100         spin_lock(&v2m_cfg_lock);
 101         val = readl(v2m_sysreg_base + V2M_SYS_CFGSTAT);
 102         writel(val & ~SYS_CFG_COMPLETE, v2m_sysreg_base + V2M_SYS_CFGSTAT);
 103
 104         writel(data, v2m_sysreg_base +  V2M_SYS_CFGDATA);
 105         writel(devfn, v2m_sysreg_base + V2M_SYS_CFGCTRL);
 106
 107         do {
 108                 val = readl(v2m_sysreg_base + V2M_SYS_CFGSTAT);
 109         } while (val == 0);
 110         spin_unlock(&v2m_cfg_lock);
 111
 112         return !!(val & SYS_CFG_ERR);
 113 }
 114
 115 int v2m_cfg_read(u32 devfn, u32 *data)
 116 {
 117         u32 val;
 118
 119         devfn |= SYS_CFG_START;
 120
 121         spin_lock(&v2m_cfg_lock);
 122         writel(0, v2m_sysreg_base + V2M_SYS_CFGSTAT);
 123         writel(devfn, v2m_sysreg_base + V2M_SYS_CFGCTRL);
 124
 125         mb();
 126
 127         do {
 128                 cpu_relax();
 129                 val = readl(v2m_sysreg_base + V2M_SYS_CFGSTAT);
 130         } while (val == 0);
 131
 132         *data = readl(v2m_sysreg_base + V2M_SYS_CFGDATA);
 133         spin_unlock(&v2m_cfg_lock);
 134
 135         return !!(val & SYS_CFG_ERR);
 136 }
 137
 138 void __init v2m_flags_set(u32 data)
 139 {
 140         writel(~0, v2m_sysreg_base + V2M_SYS_FLAGSCLR);
 141         writel(data, v2m_sysreg_base + V2M_SYS_FLAGSSET);
 142 }
 143
 144
 145 static struct resource v2m_pcie_i2c_resource = {
 146         .start  = V2M_SERIAL_BUS_PCI,
 147         .end    = V2M_SERIAL_BUS_PCI + SZ_4K - 1,
 148         .flags  = IORESOURCE_MEM,
 149 };
 150
 151 static struct platform_device v2m_pcie_i2c_device = {
 152         .name           = "versatile-i2c",
 153         .id             = 0,
 154         .num_resources  = 1,
 155         .resource       = &v2m_pcie_i2c_resource,
 156 };
 157
 158 static struct resource v2m_ddc_i2c_resource = {
 159         .start  = V2M_SERIAL_BUS_DVI,
 160         .end    = V2M_SERIAL_BUS_DVI + SZ_4K - 1,
 161         .flags  = IORESOURCE_MEM,
 162 };
 163
 164 static struct platform_device v2m_ddc_i2c_device = {
 165         .name           = "versatile-i2c",
 166         .id             = 1,
 167         .num_resources  = 1,
 168         .resource       = &v2m_ddc_i2c_resource,
 169 };
 170
 171 static struct resource v2m_eth_resources[] = {
 172         {
 173                 .start  = V2M_LAN9118,
 174                 .end    = V2M_LAN9118 + SZ_64K - 1,
 175                 .flags  = IORESOURCE_MEM,
 176         }, {
 177                 .start  = IRQ_V2M_LAN9118,
 178                 .end    = IRQ_V2M_LAN9118,
 179                 .flags  = IORESOURCE_IRQ,
 180         },
 181 };
 182
 183 static struct smsc911x_platform_config v2m_eth_config = {
 184         .flags          = SMSC911X_USE_32BIT,
 185         .irq_polarity   = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH,
 186         .irq_type       = SMSC911X_IRQ_TYPE_PUSH_PULL,
 187         .phy_interface  = PHY_INTERFACE_MODE_MII,
 188 };
 189
 190 static struct platform_device v2m_eth_device = {
 191         .name           = "smsc911x",
 192         .id             = -1,
 193         .resource       = v2m_eth_resources,
 194         .num_resources  = ARRAY_SIZE(v2m_eth_resources),
 195         .dev.platform_data = &v2m_eth_config,
 196 };
 197
 198 static struct resource v2m_usb_resources[] = {
 199         {
 200                 .start  = V2M_ISP1761,
 201                 .end    = V2M_ISP1761 + SZ_128K - 1,
 202                 .flags  = IORESOURCE_MEM,
 203         }, {
 204                 .start  = IRQ_V2M_ISP1761,
 205                 .end    = IRQ_V2M_ISP1761,
 206                 .flags  = IORESOURCE_IRQ,
 207         },
 208 };
 209
 210 static struct isp1760_platform_data v2m_usb_config = {
 211         .is_isp1761             = true,
 212         .bus_width_16           = false,
 213         .port1_otg              = true,
 214         .analog_oc              = false,
 215         .dack_polarity_high     = false,
 216         .dreq_polarity_high     = false,
 217 };
 218
 219 static struct platform_device v2m_usb_device = {
 220         .name           = "isp1760",
 221         .id             = -1,
 222         .resource       = v2m_usb_resources,
 223         .num_resources  = ARRAY_SIZE(v2m_usb_resources),
 224         .dev.platform_data = &v2m_usb_config,
 225 };
 226
 227 static void v2m_flash_set_vpp(struct platform_device *pdev, int on)
 228 {
 229         writel(on != 0, v2m_sysreg_base + V2M_SYS_FLASH);
 230 }
 231
 232 static struct physmap_flash_data v2m_flash_data = {
 233         .width          = 4,
 234         .set_vpp        = v2m_flash_set_vpp,
 235 };
 236
 237 static struct resource v2m_flash_resources[] = {
 238         {
 239                 .start  = V2M_NOR0,
 240                 .end    = V2M_NOR0 + SZ_64M - 1,
 241                 .flags  = IORESOURCE_MEM,
 242         }, {
 243                 .start  = V2M_NOR1,
 244                 .end    = V2M_NOR1 + SZ_64M - 1,
 245                 .flags  = IORESOURCE_MEM,
 246         },
 247 };
 248
 249 static struct platform_device v2m_flash_device = {
 250         .name           = "physmap-flash",
 251         .id             = -1,
 252         .resource       = v2m_flash_resources,
 253         .num_resources  = ARRAY_SIZE(v2m_flash_resources),
 254         .dev.platform_data = &v2m_flash_data,
 255 };
 256
 257 static struct pata_platform_info v2m_pata_data = {
 258         .ioport_shift   = 2,
 259 };
 260
 261 static struct resource v2m_pata_resources[] = {
 262         {
 263                 .start  = V2M_CF,
 264                 .end    = V2M_CF + 0xff,
 265                 .flags  = IORESOURCE_MEM,
 266         }, {
 267                 .start  = V2M_CF + 0x100,
 268                 .end    = V2M_CF + SZ_4K - 1,
 269                 .flags  = IORESOURCE_MEM,
 270         },
 271 };
 272
 273 static struct platform_device v2m_cf_device = {
 274         .name           = "pata_platform",
 275         .id             = -1,
 276         .resource       = v2m_pata_resources,
 277         .num_resources  = ARRAY_SIZE(v2m_pata_resources),
 278         .dev.platform_data = &v2m_pata_data,
 279 };
 280
 281 static unsigned int v2m_mmci_status(struct device *dev)
 282 {
 283         return readl(v2m_sysreg_base + V2M_SYS_MCI) & (1 << 0);
 284 }
 285
 286 static struct mmci_platform_data v2m_mmci_data = {
 287         .ocr_mask       = MMC_VDD_32_33|MMC_VDD_33_34,
 288         .status         = v2m_mmci_status,
 289 };
 290
 291 static AMBA_APB_DEVICE(aaci,  "mb:aaci",  0, V2M_AACI, IRQ_V2M_AACI, NULL);
 292 static AMBA_APB_DEVICE(mmci,  "mb:mmci",  0, V2M_MMCI, IRQ_V2M_MMCI, &v2m_mmci_data);
 293 static AMBA_APB_DEVICE(kmi0,  "mb:kmi0",  0, V2M_KMI0, IRQ_V2M_KMI0, NULL);
 294 static AMBA_APB_DEVICE(kmi1,  "mb:kmi1",  0, V2M_KMI1, IRQ_V2M_KMI1, NULL);
 295 static AMBA_APB_DEVICE(uart0, "mb:uart0", 0, V2M_UART0, IRQ_V2M_UART0, NULL);
 296 static AMBA_APB_DEVICE(uart1, "mb:uart1", 0, V2M_UART1, IRQ_V2M_UART1, NULL);
 297 static AMBA_APB_DEVICE(uart2, "mb:uart2", 0, V2M_UART2, IRQ_V2M_UART2, NULL);
 298 static AMBA_APB_DEVICE(uart3, "mb:uart3", 0, V2M_UART3, IRQ_V2M_UART3, NULL);
 299 static AMBA_APB_DEVICE(wdt,   "mb:wdt",   0, V2M_WDT, IRQ_V2M_WDT, NULL);
 300 static AMBA_APB_DEVICE(rtc,   "mb:rtc",   0, V2M_RTC, IRQ_V2M_RTC, NULL);
 301
 302 static struct amba_device *v2m_amba_devs[] __initdata = {
 303         &aaci_device,
 304         &mmci_device,
 305         &kmi0_device,
 306         &kmi1_device,
 307         &uart0_device,
 308         &uart1_device,
 309         &uart2_device,
 310         &uart3_device,
 311         &wdt_device,
 312         &rtc_device,
 313 };
 314
 315
 316 static long v2m_osc_round(struct clk *clk, unsigned long rate)
 317 {
 318         return rate;
 319 }
 320
 321 static int v2m_osc1_set(struct clk *clk, unsigned long rate)
 322 {
 323         return v2m_cfg_write(SYS_CFG_OSC | SYS_CFG_SITE_MB | 1, rate);
 324 }
 325
 326 static const struct clk_ops osc1_clk_ops = {
 327         .round  = v2m_osc_round,
 328         .set    = v2m_osc1_set,
 329 };
 330
 331 static struct clk osc1_clk = {
 332         .ops    = &osc1_clk_ops,
 333         .rate   = 24000000,
 334 };
 335
 336 static struct clk osc2_clk = {
 337         .rate   = 24000000,
 338 };
 339
 340 static struct clk v2m_sp804_clk = {
 341         .rate   = 1000000,
 342 };
 343
 344 static struct clk v2m_ref_clk = {
 345         .rate   = 32768,
 346 };
 347
 348 static struct clk dummy_apb_pclk;
 349
 350 static struct clk_lookup v2m_lookups[] = {
 351         {       /* AMBA bus clock */
 352                 .con_id         = "apb_pclk",
 353                 .clk            = &dummy_apb_pclk,
 354         }, {    /* UART0 */
 355                 .dev_id         = "mb:uart0",
 356                 .clk            = &osc2_clk,
 357         }, {    /* UART1 */
 358                 .dev_id         = "mb:uart1",
 359                 .clk            = &osc2_clk,
 360         }, {    /* UART2 */
 361                 .dev_id         = "mb:uart2",
 362                 .clk            = &osc2_clk,
 363         }, {    /* UART3 */
 364                 .dev_id         = "mb:uart3",
 365                 .clk            = &osc2_clk,
 366         }, {    /* KMI0 */
 367                 .dev_id         = "mb:kmi0",
 368                 .clk            = &osc2_clk,
 369         }, {    /* KMI1 */
 370                 .dev_id         = "mb:kmi1",
 371                 .clk            = &osc2_clk,
 372         }, {    /* MMC0 */
 373                 .dev_id         = "mb:mmci",
 374                 .clk            = &osc2_clk,
 375         }, {    /* CLCD */
 376                 .dev_id         = "mb:clcd",
 377                 .clk            = &osc1_clk,
 378         }, {    /* SP805 WDT */
 379                 .dev_id         = "mb:wdt",
 380                 .clk            = &v2m_ref_clk,
 381         }, {    /* SP804 timers */
 382                 .dev_id         = "sp804",
 383                 .con_id         = "v2m-timer0",
 384                 .clk            = &v2m_sp804_clk,
 385         }, {    /* SP804 timers */
 386                 .dev_id         = "sp804",
 387                 .con_id         = "v2m-timer1",
 388                 .clk            = &v2m_sp804_clk,
 389         },
 390 };
 391
 392 static void __init v2m_init_early(void)
 393 {
 394         ct_desc->init_early();
 395         clkdev_add_table(v2m_lookups, ARRAY_SIZE(v2m_lookups));
 396         versatile_sched_clock_init(v2m_sysreg_base + V2M_SYS_24MHZ, 24000000);
 397 }
 398
 399 static void v2m_power_off(void)
 400 {
 401         if (v2m_cfg_write(SYS_CFG_SHUTDOWN | SYS_CFG_SITE_MB, 0))
 402                 printk(KERN_EMERG "Unable to shutdown\n");
 403 }
 404
 405 static void v2m_restart(char str, const char *cmd)
 406 {
 407         if (v2m_cfg_write(SYS_CFG_REBOOT | SYS_CFG_SITE_MB, 0))
 408                 printk(KERN_EMERG "Unable to reboot\n");
 409 }
 410
 411 struct ct_desc *ct_desc;
 412
 413 static struct ct_desc *ct_descs[] __initdata = {
 414 #ifdef CONFIG_ARCH_VEXPRESS_CA9X4
 415         &ct_ca9x4_desc,
 416 #endif
 417 };
 418
 419 static void __init v2m_populate_ct_desc(void)
 420 {
 421         int i;
 422         u32 current_tile_id;
 423
 424         ct_desc = NULL;
 425         current_tile_id = readl(v2m_sysreg_base + V2M_SYS_PROCID0)
 426                                 & V2M_CT_ID_MASK;
 427
 428         for (i = 0; i < ARRAY_SIZE(ct_descs) && !ct_desc; ++i)
 429                 if (ct_descs[i]->id == current_tile_id)
 430                         ct_desc = ct_descs[i];
 431
 432         if (!ct_desc)
 433                 panic("vexpress: failed to populate core tile description "
 434                       "for tile ID 0x%8x\n", current_tile_id);
 435 }
 436
 437 static void __init v2m_map_io(void)
 438 {
 439         iotable_init(v2m_io_desc, ARRAY_SIZE(v2m_io_desc));
 440         v2m_sysreg_base = ioremap(V2M_SYSREGS, SZ_4K);
 441         v2m_populate_ct_desc();
 442         ct_desc->map_io();
 443 }
 444
 445 static void __init v2m_init_irq(void)
 446 {
 447         ct_desc->init_irq();
 448 }
 449
 450 static void __init v2m_init(void)
 451 {
 452         int i;
 453
 454         platform_device_register(&v2m_pcie_i2c_device);
 455         platform_device_register(&v2m_ddc_i2c_device);
 456         platform_device_register(&v2m_flash_device);
 457         platform_device_register(&v2m_cf_device);
 458         platform_device_register(&v2m_eth_device);
 459         platform_device_register(&v2m_usb_device);
 460
 461         for (i = 0; i < ARRAY_SIZE(v2m_amba_devs); i++)
 462                 amba_device_register(v2m_amba_devs[i], &iomem_resource);
 463
 464         pm_power_off = v2m_power_off;
 465
 466         ct_desc->init_tile();
 467 }
 468
 469 MACHINE_START(VEXPRESS, "ARM-Versatile Express")
 470         .atag_offset    = 0x100,
 471         .map_io         = v2m_map_io,
 472         .init_early     = v2m_init_early,
 473         .init_irq       = v2m_init_irq,
 474         .timer          = &v2m_timer,
 475         .handle_irq     = gic_handle_irq,
 476         .init_machine   = v2m_init,
 477         .restart        = v2m_restart,
 478 MACHINE_END