2 * arch/arm/mach-tegra/include/mach/dc.h
4 * Copyright (C) 2010 Google, Inc.
7 * Erik Gilling <konkers@google.com>
9 * This software is licensed under the terms of the GNU General Public
10 * License version 2, as published by the Free Software Foundation, and
11 * may be copied, distributed, and modified under those terms.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
20 #ifndef __MACH_TEGRA_DC_H
21 #define __MACH_TEGRA_DC_H
24 #define TEGRA_MAX_DC 2
25 #define DC_N_WINDOWS 3
27 struct tegra_dc_blend {
35 #define BLEND(key, control, weight0, weight1) \
36 (CKEY_ ## key | BLEND_CONTROL_ ## control | \
37 BLEND_WEIGHT0(weight0) | BLEND_WEIGHT0(weight1))
39 struct tegra_dc_mode {
63 struct tegra_dc_mode *modes;
67 #define TEGRA_DC_ALIGN_MSB 0
68 #define TEGRA_DC_ALIGN_LSB 1
70 #define TEGRA_DC_ORDER_RED_BLUE 0
71 #define TEGRA_DC_ORDER_BLUE_RED 1
93 #define TEGRA_WIN_FLAG_ENABLED (1 << 0)
94 #define TEGRA_WIN_FLAG_COLOR_EXPAND (1 << 1)
96 /* Note: These are the actual values written to the DC_WIN_COLOR_DEPTH register
97 * and may change in new tegra architectures.
99 #define TEGRA_WIN_FMT_P1 0
100 #define TEGRA_WIN_FMT_P2 1
101 #define TEGRA_WIN_FMT_P4 2
102 #define TEGRA_WIN_FMT_P8 3
103 #define TEGRA_WIN_FMT_B4G4R4A4 4
104 #define TEGRA_WIN_FMT_B5G5R5A 5
105 #define TEGRA_WIN_FMT_B5G6R5 6
106 #define TEGRA_WIN_FMT_AB5G5R5 7
107 #define TEGRA_WIN_FMT_B8G8R8A8 12
108 #define TEGRA_WIN_FMT_R8G8B8A8 13
109 #define TEGRA_WIN_FMT_B6x2G6x2R6x2A8 14
110 #define TEGRA_WIN_FMT_R6x2G6x2B6x2A8 15
111 #define TEGRA_WIN_FMT_YCbCr422 16
112 #define TEGRA_WIN_FMT_YUV422 17
113 #define TEGRA_WIN_FMT_YCbCr420P 18
114 #define TEGRA_WIN_FMT_YUV420P 19
115 #define TEGRA_WIN_FMT_YCbCr422P 20
116 #define TEGRA_WIN_FMT_YUV422P 21
117 #define TEGRA_WIN_FMT_YCbCr422R 22
118 #define TEGRA_WIN_FMT_YUV422R 23
119 #define TEGRA_WIN_FMT_YCbCr422RA 24
120 #define TEGRA_WIN_FMT_YUV422RA 25
122 struct tegra_fb_data {
130 struct tegra_dc_platform_data {
132 struct tegra_dc_out *default_out;
133 struct tegra_fb_data *fb;
136 #define TEGRA_DC_FLAG_ENABLED (1 << 0)
138 struct tegra_dc *tegra_dc_get_dc(unsigned idx);
139 struct tegra_dc_win *tegra_dc_get_window(struct tegra_dc *dc, unsigned win);
141 /* tegra_dc_update_windows and tegra_dc_sync_windows do not support windows
142 * with differenct dcs in one call
144 int tegra_dc_update_windows(struct tegra_dc_win *windows[], int n);
145 int tegra_dc_sync_windows(struct tegra_dc_win *windows[], int n);
147 /* will probably be replaced with an interface describing the window order */
148 void tegra_dc_set_blending(struct tegra_dc *dc, struct tegra_dc_blend *blend);
150 int tegra_dc_set_mode(struct tegra_dc *dc, struct tegra_dc_mode *mode);