arch/arm/mach-tegra/devices.c

   1 /*
   2  * arch/arm/mach-tegra/devices.c
   3  *
   4  * Copyright (C) 2010 Google, Inc.
   5  *
   6  * Author:
   7  *      Colin Cross <ccross@android.com>
   8  *      Erik Gilling <ccross@android.com>
   9  *
  10  * This software is licensed under the terms of the GNU General Public
  11  * License version 2, as published by the Free Software Foundation, and
  12  * may be copied, distributed, and modified under those terms.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  * GNU General Public License for more details.
  18  *
  19  */
  20
  21
  22 #include <linux/resource.h>
  23 #include <linux/platform_device.h>
  24 #include <linux/dma-mapping.h>
  25 #include <linux/fsl_devices.h>
  26 #include <linux/serial_8250.h>
  27 #include <asm/pmu.h>
  28 #include <mach/irqs.h>
  29 #include <mach/iomap.h>
  30 #include <mach/dma.h>
  31
  32 static struct resource i2c_resource1[] = {
  33         [0] = {
  34                 .start  = INT_I2C,
  35                 .end    = INT_I2C,
  36                 .flags  = IORESOURCE_IRQ,
  37         },
  38         [1] = {
  39                 .start  = TEGRA_I2C_BASE,
  40                 .end    = TEGRA_I2C_BASE + TEGRA_I2C_SIZE-1,
  41                 .flags  = IORESOURCE_MEM,
  42         },
  43 };
  44
  45 static struct resource i2c_resource2[] = {
  46         [0] = {
  47                 .start  = INT_I2C2,
  48                 .end    = INT_I2C2,
  49                 .flags  = IORESOURCE_IRQ,
  50         },
  51         [1] = {
  52                 .start  = TEGRA_I2C2_BASE,
  53                 .end    = TEGRA_I2C2_BASE + TEGRA_I2C2_SIZE-1,
  54                 .flags  = IORESOURCE_MEM,
  55         },
  56 };
  57
  58 static struct resource i2c_resource3[] = {
  59         [0] = {
  60                 .start  = INT_I2C3,
  61                 .end    = INT_I2C3,
  62                 .flags  = IORESOURCE_IRQ,
  63         },
  64         [1] = {
  65                 .start  = TEGRA_I2C3_BASE,
  66                 .end    = TEGRA_I2C3_BASE + TEGRA_I2C3_SIZE-1,
  67                 .flags  = IORESOURCE_MEM,
  68         },
  69 };
  70
  71 static struct resource i2c_resource4[] = {
  72         [0] = {
  73                 .start  = INT_DVC,
  74                 .end    = INT_DVC,
  75                 .flags  = IORESOURCE_IRQ,
  76         },
  77         [1] = {
  78                 .start  = TEGRA_DVC_BASE,
  79                 .end    = TEGRA_DVC_BASE + TEGRA_DVC_SIZE-1,
  80                 .flags  = IORESOURCE_MEM,
  81         },
  82 };
  83
  84 struct platform_device tegra_i2c_device1 = {
  85         .name           = "tegra-i2c",
  86         .id             = 0,
  87         .resource       = i2c_resource1,
  88         .num_resources  = ARRAY_SIZE(i2c_resource1),
  89         .dev = {
  90                 .platform_data = 0,
  91         },
  92 };
  93
  94 struct platform_device tegra_i2c_device2 = {
  95         .name           = "tegra-i2c",
  96         .id             = 1,
  97         .resource       = i2c_resource2,
  98         .num_resources  = ARRAY_SIZE(i2c_resource2),
  99         .dev = {
 100                 .platform_data = 0,
 101         },
 102 };
 103
 104 struct platform_device tegra_i2c_device3 = {
 105         .name           = "tegra-i2c",
 106         .id             = 2,
 107         .resource       = i2c_resource3,
 108         .num_resources  = ARRAY_SIZE(i2c_resource3),
 109         .dev = {
 110                 .platform_data = 0,
 111         },
 112 };
 113
 114 struct platform_device tegra_i2c_device4 = {
 115         .name           = "tegra-i2c",
 116         .id             = 3,
 117         .resource       = i2c_resource4,
 118         .num_resources  = ARRAY_SIZE(i2c_resource4),
 119         .dev = {
 120                 .platform_data = 0,
 121         },
 122 };
 123
 124 static struct resource spi_resource1[] = {
 125         [0] = {
 126                 .start  = INT_S_LINK1,
 127                 .end    = INT_S_LINK1,
 128                 .flags  = IORESOURCE_IRQ,
 129         },
 130         [1] = {
 131                 .start  = TEGRA_SPI1_BASE,
 132                 .end    = TEGRA_SPI1_BASE + TEGRA_SPI1_SIZE-1,
 133                 .flags  = IORESOURCE_MEM,
 134         },
 135 };
 136
 137 static struct resource spi_resource2[] = {
 138         [0] = {
 139                 .start  = INT_SPI_2,
 140                 .end    = INT_SPI_2,
 141                 .flags  = IORESOURCE_IRQ,
 142         },
 143         [1] = {
 144                 .start  = TEGRA_SPI2_BASE,
 145                 .end    = TEGRA_SPI2_BASE + TEGRA_SPI2_SIZE-1,
 146                 .flags  = IORESOURCE_MEM,
 147         },
 148 };
 149
 150 static struct resource spi_resource3[] = {
 151         [0] = {
 152                 .start  = INT_SPI_3,
 153                 .end    = INT_SPI_3,
 154                 .flags  = IORESOURCE_IRQ,
 155         },
 156         [1] = {
 157                 .start  = TEGRA_SPI3_BASE,
 158                 .end    = TEGRA_SPI3_BASE + TEGRA_SPI3_SIZE-1,
 159                 .flags  = IORESOURCE_MEM,
 160         },
 161 };
 162
 163 static struct resource spi_resource4[] = {
 164         [0] = {
 165                 .start  = INT_SPI_4,
 166                 .end    = INT_SPI_4,
 167                 .flags  = IORESOURCE_IRQ,
 168         },
 169         [1] = {
 170                 .start  = TEGRA_SPI4_BASE,
 171                 .end    = TEGRA_SPI4_BASE + TEGRA_SPI4_SIZE-1,
 172                 .flags  = IORESOURCE_MEM,
 173         },
 174 };
 175
 176 struct platform_device tegra_spi_device1 = {
 177         .name           = "spi_tegra",
 178         .id             = 0,
 179         .resource       = spi_resource1,
 180         .num_resources  = ARRAY_SIZE(spi_resource1),
 181         .dev  = {
 182                 .coherent_dma_mask      = 0xffffffff,
 183         },
 184 };
 185
 186 struct platform_device tegra_spi_device2 = {
 187         .name           = "spi_tegra",
 188         .id             = 1,
 189         .resource       = spi_resource2,
 190         .num_resources  = ARRAY_SIZE(spi_resource2),
 191         .dev  = {
 192                 .coherent_dma_mask      = 0xffffffff,
 193         },
 194 };
 195
 196 struct platform_device tegra_spi_device3 = {
 197         .name           = "spi_tegra",
 198         .id             = 2,
 199         .resource       = spi_resource3,
 200         .num_resources  = ARRAY_SIZE(spi_resource3),
 201         .dev  = {
 202                 .coherent_dma_mask      = 0xffffffff,
 203         },
 204 };
 205
 206 struct platform_device tegra_spi_device4 = {
 207         .name           = "spi_tegra",
 208         .id             = 3,
 209         .resource       = spi_resource4,
 210         .num_resources  = ARRAY_SIZE(spi_resource4),
 211         .dev  = {
 212                 .coherent_dma_mask      = 0xffffffff,
 213         },
 214 };
 215
 216
 217 static struct resource sdhci_resource1[] = {
 218         [0] = {
 219                 .start  = INT_SDMMC1,
 220                 .end    = INT_SDMMC1,
 221                 .flags  = IORESOURCE_IRQ,
 222         },
 223         [1] = {
 224                 .start  = TEGRA_SDMMC1_BASE,
 225                 .end    = TEGRA_SDMMC1_BASE + TEGRA_SDMMC1_SIZE-1,
 226                 .flags  = IORESOURCE_MEM,
 227         },
 228 };
 229
 230 static struct resource sdhci_resource2[] = {
 231         [0] = {
 232                 .start  = INT_SDMMC2,
 233                 .end    = INT_SDMMC2,
 234                 .flags  = IORESOURCE_IRQ,
 235         },
 236         [1] = {
 237                 .start  = TEGRA_SDMMC2_BASE,
 238                 .end    = TEGRA_SDMMC2_BASE + TEGRA_SDMMC2_SIZE-1,
 239                 .flags  = IORESOURCE_MEM,
 240         },
 241 };
 242
 243 static struct resource sdhci_resource3[] = {
 244         [0] = {
 245                 .start  = INT_SDMMC3,
 246                 .end    = INT_SDMMC3,
 247                 .flags  = IORESOURCE_IRQ,
 248         },
 249         [1] = {
 250                 .start  = TEGRA_SDMMC3_BASE,
 251                 .end    = TEGRA_SDMMC3_BASE + TEGRA_SDMMC3_SIZE-1,
 252                 .flags  = IORESOURCE_MEM,
 253         },
 254 };
 255
 256 static struct resource sdhci_resource4[] = {
 257         [0] = {
 258                 .start  = INT_SDMMC4,
 259                 .end    = INT_SDMMC4,
 260                 .flags  = IORESOURCE_IRQ,
 261         },
 262         [1] = {
 263                 .start  = TEGRA_SDMMC4_BASE,
 264                 .end    = TEGRA_SDMMC4_BASE + TEGRA_SDMMC4_SIZE-1,
 265                 .flags  = IORESOURCE_MEM,
 266         },
 267 };
 268
 269 /* board files should fill in platform_data register the devices themselvs.
 270  * See board-harmony.c for an example
 271  */
 272 struct platform_device tegra_sdhci_device1 = {
 273         .name           = "sdhci-tegra",
 274         .id             = 0,
 275         .resource       = sdhci_resource1,
 276         .num_resources  = ARRAY_SIZE(sdhci_resource1),
 277 };
 278
 279 struct platform_device tegra_sdhci_device2 = {
 280         .name           = "sdhci-tegra",
 281         .id             = 1,
 282         .resource       = sdhci_resource2,
 283         .num_resources  = ARRAY_SIZE(sdhci_resource2),
 284 };
 285
 286 struct platform_device tegra_sdhci_device3 = {
 287         .name           = "sdhci-tegra",
 288         .id             = 2,
 289         .resource       = sdhci_resource3,
 290         .num_resources  = ARRAY_SIZE(sdhci_resource3),
 291 };
 292
 293 struct platform_device tegra_sdhci_device4 = {
 294         .name           = "sdhci-tegra",
 295         .id             = 3,
 296         .resource       = sdhci_resource4,
 297         .num_resources  = ARRAY_SIZE(sdhci_resource4),
 298 };
 299
 300 static struct resource w1_resources[] = {
 301         [0] = {
 302                 .start = INT_OWR,
 303                 .end   = INT_OWR,
 304                 .flags = IORESOURCE_IRQ
 305         },
 306         [1] = {
 307                 .start = TEGRA_OWR_BASE,
 308                 .end = TEGRA_OWR_BASE + TEGRA_OWR_SIZE - 1,
 309                 .flags = IORESOURCE_MEM
 310         }
 311 };
 312
 313 struct platform_device tegra_w1_device = {
 314         .name          = "tegra_w1",
 315         .id            = -1,
 316         .resource      = w1_resources,
 317         .num_resources = ARRAY_SIZE(w1_resources),
 318 };
 319
 320 static struct resource tegra_udc_resources[] = {
 321         [0] = {
 322                 .start  = TEGRA_USB_BASE,
 323                 .end    = TEGRA_USB_BASE + TEGRA_USB_SIZE - 1,
 324                 .flags  = IORESOURCE_MEM,
 325         },
 326         [1] = {
 327                 .start  = INT_USB,
 328                 .end    = INT_USB,
 329                 .flags  = IORESOURCE_IRQ,
 330         },
 331 };
 332
 333 static struct resource tegra_usb1_resources[] = {
 334         [0] = {
 335                 .start  = TEGRA_USB_BASE,
 336                 .end    = TEGRA_USB_BASE + TEGRA_USB_SIZE - 1,
 337                 .flags  = IORESOURCE_MEM,
 338         },
 339         [1] = {
 340                 .start  = INT_USB,
 341                 .end    = INT_USB,
 342                 .flags  = IORESOURCE_IRQ,
 343         },
 344 };
 345
 346 static struct resource tegra_usb2_resources[] = {
 347         [0] = {
 348                 .start  = TEGRA_USB2_BASE,
 349                 .end    = TEGRA_USB2_BASE + TEGRA_USB2_SIZE - 1,
 350                 .flags  = IORESOURCE_MEM,
 351         },
 352         [1] = {
 353                 .start  = INT_USB2,
 354                 .end    = INT_USB2,
 355                 .flags  = IORESOURCE_IRQ,
 356         },
 357 };
 358
 359 static struct resource tegra_usb3_resources[] = {
 360         [0] = {
 361                 .start  = TEGRA_USB3_BASE,
 362                 .end    = TEGRA_USB3_BASE + TEGRA_USB3_SIZE - 1,
 363                 .flags  = IORESOURCE_MEM,
 364         },
 365         [1] = {
 366                 .start  = INT_USB3,
 367                 .end    = INT_USB3,
 368                 .flags  = IORESOURCE_IRQ,
 369         },
 370 };
 371
 372 static u64 tegra_udc_dmamask = DMA_BIT_MASK(32);
 373
 374 static struct fsl_usb2_platform_data tegra_udc_pdata = {
 375         .operating_mode = FSL_USB2_DR_DEVICE,
 376         .phy_mode       = FSL_USB2_PHY_UTMI,
 377 };
 378
 379 struct platform_device tegra_udc_device = {
 380         .name   = "fsl-tegra-udc",
 381         .id     = -1,
 382         .dev    = {
 383                 .dma_mask       = &tegra_udc_dmamask,
 384                 .coherent_dma_mask = DMA_BIT_MASK(32),
 385                 .platform_data  = &tegra_udc_pdata,
 386         },
 387         .resource = tegra_udc_resources,
 388         .num_resources = ARRAY_SIZE(tegra_udc_resources),
 389 };
 390
 391 static u64 tegra_ehci_dmamask = DMA_BIT_MASK(32);
 392
 393 struct platform_device tegra_ehci1_device = {
 394         .name   = "tegra-ehci",
 395         .id     = 0,
 396         .dev    = {
 397                 .dma_mask       = &tegra_ehci_dmamask,
 398                 .coherent_dma_mask = DMA_BIT_MASK(32),
 399         },
 400         .resource = tegra_usb1_resources,
 401         .num_resources = ARRAY_SIZE(tegra_usb1_resources),
 402 };
 403
 404 struct platform_device tegra_ehci2_device = {
 405         .name   = "tegra-ehci",
 406         .id     = 1,
 407         .dev    = {
 408                 .dma_mask       = &tegra_ehci_dmamask,
 409                 .coherent_dma_mask = DMA_BIT_MASK(32),
 410         },
 411         .resource = tegra_usb2_resources,
 412         .num_resources = ARRAY_SIZE(tegra_usb2_resources),
 413 };
 414
 415 struct platform_device tegra_ehci3_device = {
 416         .name   = "tegra-ehci",
 417         .id     = 2,
 418         .dev    = {
 419                 .dma_mask       = &tegra_ehci_dmamask,
 420                 .coherent_dma_mask = DMA_BIT_MASK(32),
 421         },
 422         .resource = tegra_usb3_resources,
 423         .num_resources = ARRAY_SIZE(tegra_usb3_resources),
 424 };
 425
 426 static struct resource tegra_otg_resources[] = {
 427         [0] = {
 428                 .start  = TEGRA_USB_BASE,
 429                 .end    = TEGRA_USB_BASE + TEGRA_USB_SIZE - 1,
 430                 .flags  = IORESOURCE_MEM,
 431         },
 432         [1] = {
 433                 .start  = INT_USB,
 434                 .end    = INT_USB,
 435                 .flags  = IORESOURCE_IRQ,
 436         },
 437 };
 438
 439 struct platform_device tegra_otg_device = {
 440         .name           = "tegra-otg",
 441         .id             = -1,
 442         .resource       = tegra_otg_resources,
 443         .num_resources  = ARRAY_SIZE(tegra_otg_resources),
 444 };
 445
 446 static struct resource i2s_resource1[] = {
 447         [0] = {
 448                 .start  = INT_I2S1,
 449                 .end    = INT_I2S1,
 450                 .flags  = IORESOURCE_IRQ
 451         },
 452         [1] = {
 453                 .start  = TEGRA_DMA_REQ_SEL_I2S_1,
 454                 .end    = TEGRA_DMA_REQ_SEL_I2S_1,
 455                 .flags  = IORESOURCE_DMA
 456         },
 457         [2] = {
 458                 .start  = TEGRA_I2S1_BASE,
 459                 .end    = TEGRA_I2S1_BASE + TEGRA_I2S1_SIZE - 1,
 460                 .flags  = IORESOURCE_MEM
 461         }
 462 };
 463
 464 static struct resource i2s_resource2[] = {
 465         [0] = {
 466                 .start  = INT_I2S2,
 467                 .end    = INT_I2S2,
 468                 .flags  = IORESOURCE_IRQ
 469         },
 470         [1] = {
 471                 .start  = TEGRA_DMA_REQ_SEL_I2S2_1,
 472                 .end    = TEGRA_DMA_REQ_SEL_I2S2_1,
 473                 .flags  = IORESOURCE_DMA
 474         },
 475         [2] = {
 476                 .start  = TEGRA_I2S2_BASE,
 477                 .end    = TEGRA_I2S2_BASE + TEGRA_I2S2_SIZE - 1,
 478                 .flags  = IORESOURCE_MEM
 479         }
 480 };
 481
 482 static struct resource spdif_resource[] = {
 483         [0] = {
 484                 .start  = INT_SPDIF,
 485                 .end    = INT_SPDIF,
 486                 .flags  = IORESOURCE_IRQ
 487         },
 488         [1] = {
 489                 .start  = TEGRA_DMA_REQ_SEL_SPD_I,
 490                 .end    = TEGRA_DMA_REQ_SEL_SPD_I,
 491                 .flags  = IORESOURCE_DMA
 492         },
 493         [2] = {
 494                 .start  = TEGRA_SPDIF_BASE,
 495                 .end    = TEGRA_SPDIF_BASE + TEGRA_SPDIF_SIZE - 1,
 496                 .flags  = IORESOURCE_MEM
 497         }
 498 };
 499
 500 struct platform_device tegra_i2s_device1 = {
 501         .name           = "i2s",
 502         .id             = 0,
 503         .resource       = i2s_resource1,
 504         .num_resources  = ARRAY_SIZE(i2s_resource1),
 505 };
 506
 507 struct platform_device tegra_i2s_device2 = {
 508         .name           = "i2s",
 509         .id             = 1,
 510         .resource       = i2s_resource2,
 511         .num_resources  = ARRAY_SIZE(i2s_resource2),
 512 };
 513
 514 struct platform_device tegra_spdif_device = {
 515         .name           = "spdif_out",
 516         .id             = -1,
 517         .resource       = spdif_resource,
 518         .num_resources  = ARRAY_SIZE(spdif_resource),
 519 };
 520
 521 static struct resource tegra_gart_resources[] = {
 522         [0] = {
 523                 .name   = "mc",
 524                 .flags  = IORESOURCE_MEM,
 525                 .start  = TEGRA_MC_BASE,
 526                 .end    = TEGRA_MC_BASE + TEGRA_MC_SIZE - 1,
 527         },
 528         [1] = {
 529                 .name   = "gart",
 530                 .flags  = IORESOURCE_MEM,
 531                 .start  = TEGRA_GART_BASE,
 532                 .end    = TEGRA_GART_BASE + TEGRA_GART_SIZE - 1,
 533         }
 534 };
 535
 536 struct platform_device tegra_gart_device = {
 537         .name           = "tegra_gart",
 538         .id             = -1,
 539         .num_resources  = ARRAY_SIZE(tegra_gart_resources),
 540         .resource       = tegra_gart_resources
 541 };
 542
 543 static struct resource pmu_resources[] = {
 544         [0] = {
 545                 .start  = INT_CPU0_PMU_INTR,
 546                 .end    = INT_CPU0_PMU_INTR,
 547                 .flags  = IORESOURCE_IRQ,
 548         },
 549         [1] = {
 550                 .start  = INT_CPU1_PMU_INTR,
 551                 .end    = INT_CPU1_PMU_INTR,
 552                 .flags  = IORESOURCE_IRQ,
 553         },
 554 };
 555
 556 struct platform_device pmu_device = {
 557         .name           = "arm-pmu",
 558         .id             = ARM_PMU_DEVICE_CPU,
 559         .num_resources  = ARRAY_SIZE(pmu_resources),
 560         .resource       = pmu_resources,
 561 };
 562
 563 #define CLK_RESET_RST_SOURCE    0x0
 564 static struct resource tegra_wdt_resources[] = {
 565         [0] = {
 566                 .start  = TEGRA_CLK_RESET_BASE + CLK_RESET_RST_SOURCE,
 567                 .end    = TEGRA_CLK_RESET_BASE + CLK_RESET_RST_SOURCE + 4 - 1,
 568                 .flags  = IORESOURCE_MEM,
 569         },
 570         [1] = {
 571                 .start  = TEGRA_TMR1_BASE,
 572                 .end    = TEGRA_TMR1_BASE + TEGRA_TMR1_SIZE - 1,
 573                 .flags  = IORESOURCE_MEM,
 574         },
 575         [2] = {
 576                 .start  = INT_TMR1,
 577                 .end    = INT_TMR1,
 578                 .flags  = IORESOURCE_IRQ,
 579         },
 580 };
 581
 582 struct platform_device tegra_wdt_device = {
 583         .name           = "tegra_wdt",
 584         .id             = -1,
 585         .num_resources  = ARRAY_SIZE(tegra_wdt_resources),
 586         .resource       = tegra_wdt_resources,
 587 };
 588
 589 static struct resource tegra_pwfm0_resource = {
 590         .start  = TEGRA_PWFM0_BASE,
 591         .end    = TEGRA_PWFM0_BASE + TEGRA_PWFM0_SIZE - 1,
 592         .flags  = IORESOURCE_MEM,
 593 };
 594
 595 static struct resource tegra_pwfm1_resource = {
 596         .start  = TEGRA_PWFM1_BASE,
 597         .end    = TEGRA_PWFM1_BASE + TEGRA_PWFM1_SIZE - 1,
 598         .flags  = IORESOURCE_MEM,
 599 };
 600
 601 static struct resource tegra_pwfm2_resource = {
 602         .start  = TEGRA_PWFM2_BASE,
 603         .end    = TEGRA_PWFM2_BASE + TEGRA_PWFM2_SIZE - 1,
 604         .flags  = IORESOURCE_MEM,
 605 };
 606
 607 static struct resource tegra_pwfm3_resource = {
 608         .start  = TEGRA_PWFM3_BASE,
 609         .end    = TEGRA_PWFM3_BASE + TEGRA_PWFM3_SIZE - 1,
 610         .flags  = IORESOURCE_MEM,
 611 };
 612
 613 struct platform_device tegra_pwfm0_device = {
 614         .name           = "tegra_pwm",
 615         .id             = 0,
 616         .num_resources  = 1,
 617         .resource       = &tegra_pwfm0_resource,
 618 };
 619
 620 struct platform_device tegra_pwfm1_device = {
 621         .name           = "tegra_pwm",
 622         .id             = 1,
 623         .num_resources  = 1,
 624         .resource       = &tegra_pwfm1_resource,
 625 };
 626
 627 struct platform_device tegra_pwfm2_device = {
 628         .name           = "tegra_pwm",
 629         .id             = 2,
 630         .num_resources  = 1,
 631         .resource       = &tegra_pwfm2_resource,
 632 };
 633
 634 struct platform_device tegra_pwfm3_device = {
 635         .name           = "tegra_pwm",
 636         .id             = 3,
 637         .num_resources  = 1,
 638         .resource       = &tegra_pwfm3_resource,
 639 };
 640
 641 static struct plat_serial8250_port tegra_uart0_port[] = {
 642         [0] = {
 643                 .mapbase        = TEGRA_UARTA_BASE,
 644                 .membase        = IO_ADDRESS(TEGRA_UARTA_BASE),
 645                 .irq            = INT_UARTA,
 646         },
 647         [1] = {
 648                 .flags          = 0,
 649         },
 650 };
 651
 652 static struct plat_serial8250_port tegra_uart1_port[] = {
 653         [0] = {
 654                 .mapbase        = TEGRA_UARTB_BASE,
 655                 .membase        = IO_ADDRESS(TEGRA_UARTB_BASE),
 656                 .irq            = INT_UARTB,
 657         },
 658         [1] = {
 659                 .flags          = 0,
 660         },
 661 };
 662
 663 static struct plat_serial8250_port tegra_uart2_port[] = {
 664         [0] = {
 665                 .mapbase        = TEGRA_UARTC_BASE,
 666                 .membase        = IO_ADDRESS(TEGRA_UARTC_BASE),
 667                 .irq            = INT_UARTC,
 668         },
 669         [1] = {
 670                 .flags          = 0,
 671         },
 672 };
 673
 674 static struct plat_serial8250_port tegra_uart3_port[] = {
 675         [0] = {
 676                 .mapbase        = TEGRA_UARTD_BASE,
 677                 .membase        = IO_ADDRESS(TEGRA_UARTD_BASE),
 678                 .irq            = INT_UARTD,
 679         },
 680         [1] = {
 681                 .flags          = 0,
 682         },
 683 };
 684
 685 static struct plat_serial8250_port tegra_uart4_port[] = {
 686         [0] = {
 687                 .mapbase        = TEGRA_UARTE_BASE,
 688                 .membase        = IO_ADDRESS(TEGRA_UARTE_BASE),
 689                 .irq            = INT_UARTE,
 690         },
 691         [1] = {
 692                 .flags          = 0,
 693         },
 694 };
 695
 696 struct platform_device tegra_uart0_device = {
 697         .name   = "tegra_uart",
 698         .id     = 0,
 699         .dev    = {
 700                 .platform_data          = tegra_uart0_port,
 701                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 702         },
 703 };
 704
 705 struct platform_device tegra_uart1_device = {
 706         .name   = "tegra_uart",
 707         .id     = 1,
 708         .dev    = {
 709                 .platform_data          = tegra_uart1_port,
 710                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 711         },
 712 };
 713
 714 struct platform_device tegra_uart2_device = {
 715         .name   = "tegra_uart",
 716         .id     = 2,
 717         .dev    = {
 718                 .platform_data          = tegra_uart2_port,
 719                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 720         },
 721 };
 722
 723 struct platform_device tegra_uart3_device = {
 724         .name   = "tegra_uart",
 725         .id     = 3,
 726         .dev    = {
 727                 .platform_data          = tegra_uart3_port,
 728                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 729         },
 730 };
 731
 732 struct platform_device tegra_uart4_device = {
 733         .name   = "tegra_uart",
 734         .id     = 4,
 735         .dev    = {
 736                 .platform_data          = tegra_uart4_port,
 737                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 738         },
 739 };
 740
 741 static struct resource tegra_grhost_resources[] = {
 742         {
 743                 .start = TEGRA_HOST1X_BASE,
 744                 .end = TEGRA_HOST1X_BASE + TEGRA_HOST1X_SIZE - 1,
 745                 .flags = IORESOURCE_MEM,
 746         },
 747         {
 748                 .start = TEGRA_DISPLAY_BASE,
 749                 .end = TEGRA_DISPLAY_BASE + TEGRA_DISPLAY_SIZE - 1,
 750                 .flags = IORESOURCE_MEM,
 751         },
 752         {
 753                 .start = TEGRA_DISPLAY2_BASE,
 754                 .end = TEGRA_DISPLAY2_BASE + TEGRA_DISPLAY2_SIZE - 1,
 755                 .flags = IORESOURCE_MEM,
 756         },
 757         {
 758                 .start = TEGRA_VI_BASE,
 759                 .end = TEGRA_VI_BASE + TEGRA_VI_SIZE - 1,
 760                 .flags = IORESOURCE_MEM,
 761         },
 762         {
 763                 .start = TEGRA_ISP_BASE,
 764                 .end = TEGRA_ISP_BASE + TEGRA_ISP_SIZE - 1,
 765                 .flags = IORESOURCE_MEM,
 766         },
 767         {
 768                 .start = TEGRA_MPE_BASE,
 769                 .end = TEGRA_MPE_BASE + TEGRA_MPE_SIZE - 1,
 770                 .flags = IORESOURCE_MEM,
 771         },
 772         {
 773                 .start = INT_SYNCPT_THRESH_BASE,
 774                 .end = INT_SYNCPT_THRESH_BASE + INT_SYNCPT_THRESH_NR - 1,
 775                 .flags = IORESOURCE_IRQ,
 776         },
 777         {
 778                 .start = INT_HOST1X_MPCORE_GENERAL,
 779                 .end = INT_HOST1X_MPCORE_GENERAL,
 780                 .flags = IORESOURCE_IRQ,
 781         },
 782 };
 783
 784 struct platform_device tegra_grhost_device = {
 785         .name = "tegra_grhost",
 786         .id = -1,
 787         .resource = tegra_grhost_resources,
 788         .num_resources = ARRAY_SIZE(tegra_grhost_resources),
 789 };
 790
 791 static struct resource tegra_avp_resources[] = {
 792         [0] = {
 793                 .start  = INT_SHR_SEM_INBOX_IBF,
 794                 .end    = INT_SHR_SEM_INBOX_IBF,
 795                 .flags  = IORESOURCE_IRQ,
 796                 .name   = "mbox_from_avp_pending",
 797         },
 798 };
 799
 800 struct platform_device tegra_avp_device = {
 801         .name           = "tegra-avp",
 802         .id             = -1,
 803         .num_resources  = ARRAY_SIZE(tegra_avp_resources),
 804         .resource       = tegra_avp_resources,
 805         .dev  = {
 806                 .coherent_dma_mask      = 0xffffffffULL,
 807         },
 808 };