cgroup: superblock can't be released with active dentries
[firefly-linux-kernel-4.4.55.git] / arch / arm / mach-tegra / devices.c
1 /*
2  * Copyright (C) 2010,2011 Google, Inc.
3  *
4  * Author:
5  *      Colin Cross <ccross@android.com>
6  *      Erik Gilling <ccross@android.com>
7  *
8  * This software is licensed under the terms of the GNU General Public
9  * License version 2, as published by the Free Software Foundation, and
10  * may be copied, distributed, and modified under those terms.
11  *
12  * This program is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15  * GNU General Public License for more details.
16  *
17  */
18
19
20 #include <linux/resource.h>
21 #include <linux/platform_device.h>
22 #include <linux/dma-mapping.h>
23 #include <linux/fsl_devices.h>
24 #include <linux/serial_8250.h>
25 #include <linux/i2c-tegra.h>
26 #include <asm/pmu.h>
27 #include <mach/irqs.h>
28 #include <mach/iomap.h>
29 #include <mach/dma.h>
30 #include <mach/usb_phy.h>
31
32 #include "gpio-names.h"
33 #include "devices.h"
34
35 static struct resource gpio_resource[] = {
36         [0] = {
37                 .start  = TEGRA_GPIO_BASE,
38                 .end    = TEGRA_GPIO_BASE + TEGRA_GPIO_SIZE-1,
39                 .flags  = IORESOURCE_MEM,
40         },
41         [1] = {
42                 .start  = INT_GPIO1,
43                 .end    = INT_GPIO1,
44                 .flags  = IORESOURCE_IRQ,
45         },
46         [2] = {
47                 .start  = INT_GPIO2,
48                 .end    = INT_GPIO2,
49                 .flags  = IORESOURCE_IRQ,
50         },
51         [3] = {
52                 .start  = INT_GPIO3,
53                 .end    = INT_GPIO3,
54                 .flags  = IORESOURCE_IRQ,
55         },
56         [4] = {
57                 .start  = INT_GPIO4,
58                 .end    = INT_GPIO4,
59                 .flags  = IORESOURCE_IRQ,
60         },
61         [5] = {
62                 .start  = INT_GPIO5,
63                 .end    = INT_GPIO5,
64                 .flags  = IORESOURCE_IRQ,
65         },
66         [6] = {
67                 .start  = INT_GPIO6,
68                 .end    = INT_GPIO6,
69                 .flags  = IORESOURCE_IRQ,
70         },
71         [7] = {
72                 .start  = INT_GPIO7,
73                 .end    = INT_GPIO7,
74                 .flags  = IORESOURCE_IRQ,
75         },
76 };
77
78 struct platform_device tegra_gpio_device = {
79         .name           = "tegra-gpio",
80         .id             = -1,
81         .resource       = gpio_resource,
82         .num_resources  = ARRAY_SIZE(gpio_resource),
83 };
84
85 static struct resource pinmux_resource[] = {
86         [0] = {
87                 /* Tri-state registers */
88                 .start  = TEGRA_APB_MISC_BASE + 0x14,
89                 .end    = TEGRA_APB_MISC_BASE + 0x20 + 3,
90                 .flags  = IORESOURCE_MEM,
91         },
92         [1] = {
93                 /* Mux registers */
94                 .start  = TEGRA_APB_MISC_BASE + 0x80,
95                 .end    = TEGRA_APB_MISC_BASE + 0x9c + 3,
96                 .flags  = IORESOURCE_MEM,
97         },
98         [2] = {
99                 /* Pull-up/down registers */
100                 .start  = TEGRA_APB_MISC_BASE + 0xa0,
101                 .end    = TEGRA_APB_MISC_BASE + 0xb0 + 3,
102                 .flags  = IORESOURCE_MEM,
103         },
104         [3] = {
105                 /* Pad control registers */
106                 .start  = TEGRA_APB_MISC_BASE + 0x868,
107                 .end    = TEGRA_APB_MISC_BASE + 0x90c + 3,
108                 .flags  = IORESOURCE_MEM,
109         },
110 };
111
112 struct platform_device tegra_pinmux_device = {
113         .name           = "tegra20-pinctrl",
114         .id             = -1,
115         .resource       = pinmux_resource,
116         .num_resources  = ARRAY_SIZE(pinmux_resource),
117 };
118
119 static struct resource i2c_resource1[] = {
120         [0] = {
121                 .start  = INT_I2C,
122                 .end    = INT_I2C,
123                 .flags  = IORESOURCE_IRQ,
124         },
125         [1] = {
126                 .start  = TEGRA_I2C_BASE,
127                 .end    = TEGRA_I2C_BASE + TEGRA_I2C_SIZE-1,
128                 .flags  = IORESOURCE_MEM,
129         },
130 };
131
132 static struct resource i2c_resource2[] = {
133         [0] = {
134                 .start  = INT_I2C2,
135                 .end    = INT_I2C2,
136                 .flags  = IORESOURCE_IRQ,
137         },
138         [1] = {
139                 .start  = TEGRA_I2C2_BASE,
140                 .end    = TEGRA_I2C2_BASE + TEGRA_I2C2_SIZE-1,
141                 .flags  = IORESOURCE_MEM,
142         },
143 };
144
145 static struct resource i2c_resource3[] = {
146         [0] = {
147                 .start  = INT_I2C3,
148                 .end    = INT_I2C3,
149                 .flags  = IORESOURCE_IRQ,
150         },
151         [1] = {
152                 .start  = TEGRA_I2C3_BASE,
153                 .end    = TEGRA_I2C3_BASE + TEGRA_I2C3_SIZE-1,
154                 .flags  = IORESOURCE_MEM,
155         },
156 };
157
158 static struct resource i2c_resource4[] = {
159         [0] = {
160                 .start  = INT_DVC,
161                 .end    = INT_DVC,
162                 .flags  = IORESOURCE_IRQ,
163         },
164         [1] = {
165                 .start  = TEGRA_DVC_BASE,
166                 .end    = TEGRA_DVC_BASE + TEGRA_DVC_SIZE-1,
167                 .flags  = IORESOURCE_MEM,
168         },
169 };
170
171 static struct tegra_i2c_platform_data tegra_i2c1_platform_data = {
172         .bus_clk_rate   = 400000,
173 };
174
175 static struct tegra_i2c_platform_data tegra_i2c2_platform_data = {
176         .bus_clk_rate   = 400000,
177 };
178
179 static struct tegra_i2c_platform_data tegra_i2c3_platform_data = {
180         .bus_clk_rate   = 400000,
181 };
182
183 static struct tegra_i2c_platform_data tegra_dvc_platform_data = {
184         .bus_clk_rate   = 400000,
185 };
186
187 struct platform_device tegra_i2c_device1 = {
188         .name           = "tegra-i2c",
189         .id             = 0,
190         .resource       = i2c_resource1,
191         .num_resources  = ARRAY_SIZE(i2c_resource1),
192         .dev = {
193                 .platform_data = &tegra_i2c1_platform_data,
194         },
195 };
196
197 struct platform_device tegra_i2c_device2 = {
198         .name           = "tegra-i2c",
199         .id             = 1,
200         .resource       = i2c_resource2,
201         .num_resources  = ARRAY_SIZE(i2c_resource2),
202         .dev = {
203                 .platform_data = &tegra_i2c2_platform_data,
204         },
205 };
206
207 struct platform_device tegra_i2c_device3 = {
208         .name           = "tegra-i2c",
209         .id             = 2,
210         .resource       = i2c_resource3,
211         .num_resources  = ARRAY_SIZE(i2c_resource3),
212         .dev = {
213                 .platform_data = &tegra_i2c3_platform_data,
214         },
215 };
216
217 struct platform_device tegra_i2c_device4 = {
218         .name           = "tegra-i2c",
219         .id             = 3,
220         .resource       = i2c_resource4,
221         .num_resources  = ARRAY_SIZE(i2c_resource4),
222         .dev = {
223                 .platform_data = &tegra_dvc_platform_data,
224         },
225 };
226
227 static struct resource spi_resource1[] = {
228         [0] = {
229                 .start  = INT_S_LINK1,
230                 .end    = INT_S_LINK1,
231                 .flags  = IORESOURCE_IRQ,
232         },
233         [1] = {
234                 .start  = TEGRA_SPI1_BASE,
235                 .end    = TEGRA_SPI1_BASE + TEGRA_SPI1_SIZE-1,
236                 .flags  = IORESOURCE_MEM,
237         },
238 };
239
240 static struct resource spi_resource2[] = {
241         [0] = {
242                 .start  = INT_SPI_2,
243                 .end    = INT_SPI_2,
244                 .flags  = IORESOURCE_IRQ,
245         },
246         [1] = {
247                 .start  = TEGRA_SPI2_BASE,
248                 .end    = TEGRA_SPI2_BASE + TEGRA_SPI2_SIZE-1,
249                 .flags  = IORESOURCE_MEM,
250         },
251 };
252
253 static struct resource spi_resource3[] = {
254         [0] = {
255                 .start  = INT_SPI_3,
256                 .end    = INT_SPI_3,
257                 .flags  = IORESOURCE_IRQ,
258         },
259         [1] = {
260                 .start  = TEGRA_SPI3_BASE,
261                 .end    = TEGRA_SPI3_BASE + TEGRA_SPI3_SIZE-1,
262                 .flags  = IORESOURCE_MEM,
263         },
264 };
265
266 static struct resource spi_resource4[] = {
267         [0] = {
268                 .start  = INT_SPI_4,
269                 .end    = INT_SPI_4,
270                 .flags  = IORESOURCE_IRQ,
271         },
272         [1] = {
273                 .start  = TEGRA_SPI4_BASE,
274                 .end    = TEGRA_SPI4_BASE + TEGRA_SPI4_SIZE-1,
275                 .flags  = IORESOURCE_MEM,
276         },
277 };
278
279 struct platform_device tegra_spi_device1 = {
280         .name           = "spi_tegra",
281         .id             = 0,
282         .resource       = spi_resource1,
283         .num_resources  = ARRAY_SIZE(spi_resource1),
284         .dev            = {
285                 .coherent_dma_mask      = 0xffffffff,
286         },
287 };
288
289 struct platform_device tegra_spi_device2 = {
290         .name           = "spi_tegra",
291         .id             = 1,
292         .resource       = spi_resource2,
293         .num_resources  = ARRAY_SIZE(spi_resource2),
294         .dev            = {
295                 .coherent_dma_mask      = 0xffffffff,
296         },
297 };
298
299 struct platform_device tegra_spi_device3 = {
300         .name           = "spi_tegra",
301         .id             = 2,
302         .resource       = spi_resource3,
303         .num_resources  = ARRAY_SIZE(spi_resource3),
304         .dev            = {
305                 .coherent_dma_mask      = 0xffffffff,
306         },
307 };
308
309 struct platform_device tegra_spi_device4 = {
310         .name           = "spi_tegra",
311         .id             = 3,
312         .resource       = spi_resource4,
313         .num_resources  = ARRAY_SIZE(spi_resource4),
314         .dev            = {
315                 .coherent_dma_mask      = 0xffffffff,
316         },
317 };
318
319
320 static struct resource sdhci_resource1[] = {
321         [0] = {
322                 .start  = INT_SDMMC1,
323                 .end    = INT_SDMMC1,
324                 .flags  = IORESOURCE_IRQ,
325         },
326         [1] = {
327                 .start  = TEGRA_SDMMC1_BASE,
328                 .end    = TEGRA_SDMMC1_BASE + TEGRA_SDMMC1_SIZE-1,
329                 .flags  = IORESOURCE_MEM,
330         },
331 };
332
333 static struct resource sdhci_resource2[] = {
334         [0] = {
335                 .start  = INT_SDMMC2,
336                 .end    = INT_SDMMC2,
337                 .flags  = IORESOURCE_IRQ,
338         },
339         [1] = {
340                 .start  = TEGRA_SDMMC2_BASE,
341                 .end    = TEGRA_SDMMC2_BASE + TEGRA_SDMMC2_SIZE-1,
342                 .flags  = IORESOURCE_MEM,
343         },
344 };
345
346 static struct resource sdhci_resource3[] = {
347         [0] = {
348                 .start  = INT_SDMMC3,
349                 .end    = INT_SDMMC3,
350                 .flags  = IORESOURCE_IRQ,
351         },
352         [1] = {
353                 .start  = TEGRA_SDMMC3_BASE,
354                 .end    = TEGRA_SDMMC3_BASE + TEGRA_SDMMC3_SIZE-1,
355                 .flags  = IORESOURCE_MEM,
356         },
357 };
358
359 static struct resource sdhci_resource4[] = {
360         [0] = {
361                 .start  = INT_SDMMC4,
362                 .end    = INT_SDMMC4,
363                 .flags  = IORESOURCE_IRQ,
364         },
365         [1] = {
366                 .start  = TEGRA_SDMMC4_BASE,
367                 .end    = TEGRA_SDMMC4_BASE + TEGRA_SDMMC4_SIZE-1,
368                 .flags  = IORESOURCE_MEM,
369         },
370 };
371
372 /* board files should fill in platform_data register the devices themselvs.
373  * See board-harmony.c for an example
374  */
375 struct platform_device tegra_sdhci_device1 = {
376         .name           = "sdhci-tegra",
377         .id             = 0,
378         .resource       = sdhci_resource1,
379         .num_resources  = ARRAY_SIZE(sdhci_resource1),
380 };
381
382 struct platform_device tegra_sdhci_device2 = {
383         .name           = "sdhci-tegra",
384         .id             = 1,
385         .resource       = sdhci_resource2,
386         .num_resources  = ARRAY_SIZE(sdhci_resource2),
387 };
388
389 struct platform_device tegra_sdhci_device3 = {
390         .name           = "sdhci-tegra",
391         .id             = 2,
392         .resource       = sdhci_resource3,
393         .num_resources  = ARRAY_SIZE(sdhci_resource3),
394 };
395
396 struct platform_device tegra_sdhci_device4 = {
397         .name           = "sdhci-tegra",
398         .id             = 3,
399         .resource       = sdhci_resource4,
400         .num_resources  = ARRAY_SIZE(sdhci_resource4),
401 };
402
403 static struct resource tegra_usb1_resources[] = {
404         [0] = {
405                 .start  = TEGRA_USB_BASE,
406                 .end    = TEGRA_USB_BASE + TEGRA_USB_SIZE - 1,
407                 .flags  = IORESOURCE_MEM,
408         },
409         [1] = {
410                 .start  = INT_USB,
411                 .end    = INT_USB,
412                 .flags  = IORESOURCE_IRQ,
413         },
414 };
415
416 static struct resource tegra_usb2_resources[] = {
417         [0] = {
418                 .start  = TEGRA_USB2_BASE,
419                 .end    = TEGRA_USB2_BASE + TEGRA_USB2_SIZE - 1,
420                 .flags  = IORESOURCE_MEM,
421         },
422         [1] = {
423                 .start  = INT_USB2,
424                 .end    = INT_USB2,
425                 .flags  = IORESOURCE_IRQ,
426         },
427 };
428
429 static struct resource tegra_usb3_resources[] = {
430         [0] = {
431                 .start  = TEGRA_USB3_BASE,
432                 .end    = TEGRA_USB3_BASE + TEGRA_USB3_SIZE - 1,
433                 .flags  = IORESOURCE_MEM,
434         },
435         [1] = {
436                 .start  = INT_USB3,
437                 .end    = INT_USB3,
438                 .flags  = IORESOURCE_IRQ,
439         },
440 };
441
442 static struct tegra_ulpi_config tegra_ehci2_ulpi_phy_config = {
443         /* All existing boards use GPIO PV0 for phy reset */
444         .reset_gpio = TEGRA_GPIO_PV0,
445         .clk = "cdev2",
446 };
447
448 struct tegra_ehci_platform_data tegra_ehci1_pdata = {
449         .operating_mode = TEGRA_USB_OTG,
450         .power_down_on_bus_suspend = 1,
451         .vbus_gpio = -1,
452 };
453
454 struct tegra_ehci_platform_data tegra_ehci2_pdata = {
455         .phy_config = &tegra_ehci2_ulpi_phy_config,
456         .operating_mode = TEGRA_USB_HOST,
457         .power_down_on_bus_suspend = 1,
458         .vbus_gpio = -1,
459 };
460
461 struct tegra_ehci_platform_data tegra_ehci3_pdata = {
462         .operating_mode = TEGRA_USB_HOST,
463         .power_down_on_bus_suspend = 1,
464         .vbus_gpio = -1,
465 };
466
467 static u64 tegra_ehci_dmamask = DMA_BIT_MASK(32);
468
469 struct platform_device tegra_ehci1_device = {
470         .name   = "tegra-ehci",
471         .id     = 0,
472         .dev    = {
473                 .dma_mask       = &tegra_ehci_dmamask,
474                 .coherent_dma_mask = DMA_BIT_MASK(32),
475                 .platform_data = &tegra_ehci1_pdata,
476         },
477         .resource = tegra_usb1_resources,
478         .num_resources = ARRAY_SIZE(tegra_usb1_resources),
479 };
480
481 struct platform_device tegra_ehci2_device = {
482         .name   = "tegra-ehci",
483         .id     = 1,
484         .dev    = {
485                 .dma_mask       = &tegra_ehci_dmamask,
486                 .coherent_dma_mask = DMA_BIT_MASK(32),
487                 .platform_data = &tegra_ehci2_pdata,
488         },
489         .resource = tegra_usb2_resources,
490         .num_resources = ARRAY_SIZE(tegra_usb2_resources),
491 };
492
493 struct platform_device tegra_ehci3_device = {
494         .name   = "tegra-ehci",
495         .id     = 2,
496         .dev    = {
497                 .dma_mask       = &tegra_ehci_dmamask,
498                 .coherent_dma_mask = DMA_BIT_MASK(32),
499                 .platform_data = &tegra_ehci3_pdata,
500         },
501         .resource = tegra_usb3_resources,
502         .num_resources = ARRAY_SIZE(tegra_usb3_resources),
503 };
504
505 static struct resource tegra_pmu_resources[] = {
506         [0] = {
507                 .start  = INT_CPU0_PMU_INTR,
508                 .end    = INT_CPU0_PMU_INTR,
509                 .flags  = IORESOURCE_IRQ,
510         },
511         [1] = {
512                 .start  = INT_CPU1_PMU_INTR,
513                 .end    = INT_CPU1_PMU_INTR,
514                 .flags  = IORESOURCE_IRQ,
515         },
516 };
517
518 struct platform_device tegra_pmu_device = {
519         .name           = "arm-pmu",
520         .id             = ARM_PMU_DEVICE_CPU,
521         .num_resources  = ARRAY_SIZE(tegra_pmu_resources),
522         .resource       = tegra_pmu_resources,
523 };
524
525 static struct resource tegra_uarta_resources[] = {
526         [0] = {
527                 .start  = TEGRA_UARTA_BASE,
528                 .end    = TEGRA_UARTA_BASE + TEGRA_UARTA_SIZE - 1,
529                 .flags  = IORESOURCE_MEM,
530         },
531         [1] = {
532                 .start  = INT_UARTA,
533                 .end    = INT_UARTA,
534                 .flags  = IORESOURCE_IRQ,
535         },
536 };
537
538 static struct resource tegra_uartb_resources[] = {
539         [0] = {
540                 .start  = TEGRA_UARTB_BASE,
541                 .end    = TEGRA_UARTB_BASE + TEGRA_UARTB_SIZE - 1,
542                 .flags  = IORESOURCE_MEM,
543         },
544         [1] = {
545                 .start  = INT_UARTB,
546                 .end    = INT_UARTB,
547                 .flags  = IORESOURCE_IRQ,
548         },
549 };
550
551 static struct resource tegra_uartc_resources[] = {
552         [0] = {
553                 .start  = TEGRA_UARTC_BASE,
554                 .end    = TEGRA_UARTC_BASE + TEGRA_UARTC_SIZE - 1,
555                 .flags  = IORESOURCE_MEM,
556         },
557         [1] = {
558                 .start  = INT_UARTC,
559                 .end    = INT_UARTC,
560                 .flags  = IORESOURCE_IRQ,
561         },
562 };
563
564 static struct resource tegra_uartd_resources[] = {
565         [0] = {
566                 .start  = TEGRA_UARTD_BASE,
567                 .end    = TEGRA_UARTD_BASE + TEGRA_UARTD_SIZE - 1,
568                 .flags  = IORESOURCE_MEM,
569         },
570         [1] = {
571                 .start  = INT_UARTD,
572                 .end    = INT_UARTD,
573                 .flags  = IORESOURCE_IRQ,
574         },
575 };
576
577 static struct resource tegra_uarte_resources[] = {
578         [0] = {
579                 .start  = TEGRA_UARTE_BASE,
580                 .end    = TEGRA_UARTE_BASE + TEGRA_UARTE_SIZE - 1,
581                 .flags  = IORESOURCE_MEM,
582         },
583         [1] = {
584                 .start  = INT_UARTE,
585                 .end    = INT_UARTE,
586                 .flags  = IORESOURCE_IRQ,
587         },
588 };
589
590 struct platform_device tegra_uarta_device = {
591         .name   = "tegra_uart",
592         .id     = 0,
593         .num_resources  = ARRAY_SIZE(tegra_uarta_resources),
594         .resource       = tegra_uarta_resources,
595         .dev    = {
596                 .coherent_dma_mask      = DMA_BIT_MASK(32),
597         },
598 };
599
600 struct platform_device tegra_uartb_device = {
601         .name   = "tegra_uart",
602         .id     = 1,
603         .num_resources  = ARRAY_SIZE(tegra_uartb_resources),
604         .resource       = tegra_uartb_resources,
605         .dev    = {
606                 .coherent_dma_mask      = DMA_BIT_MASK(32),
607         },
608 };
609
610 struct platform_device tegra_uartc_device = {
611         .name   = "tegra_uart",
612         .id     = 2,
613         .num_resources  = ARRAY_SIZE(tegra_uartc_resources),
614         .resource       = tegra_uartc_resources,
615         .dev    = {
616                 .coherent_dma_mask      = DMA_BIT_MASK(32),
617         },
618 };
619
620 struct platform_device tegra_uartd_device = {
621         .name   = "tegra_uart",
622         .id     = 3,
623         .num_resources  = ARRAY_SIZE(tegra_uartd_resources),
624         .resource       = tegra_uartd_resources,
625         .dev    = {
626                 .coherent_dma_mask      = DMA_BIT_MASK(32),
627         },
628 };
629
630 struct platform_device tegra_uarte_device = {
631         .name   = "tegra_uart",
632         .id     = 4,
633         .num_resources  = ARRAY_SIZE(tegra_uarte_resources),
634         .resource       = tegra_uarte_resources,
635         .dev    = {
636                 .coherent_dma_mask      = DMA_BIT_MASK(32),
637         },
638 };
639
640 static struct resource i2s_resource1[] = {
641         [0] = {
642                 .start  = INT_I2S1,
643                 .end    = INT_I2S1,
644                 .flags  = IORESOURCE_IRQ
645         },
646         [1] = {
647                 .start  = TEGRA_DMA_REQ_SEL_I2S_1,
648                 .end    = TEGRA_DMA_REQ_SEL_I2S_1,
649                 .flags  = IORESOURCE_DMA
650         },
651         [2] = {
652                 .start  = TEGRA_I2S1_BASE,
653                 .end    = TEGRA_I2S1_BASE + TEGRA_I2S1_SIZE - 1,
654                 .flags  = IORESOURCE_MEM
655         }
656 };
657
658 static struct resource i2s_resource2[] = {
659         [0] = {
660                 .start  = INT_I2S2,
661                 .end    = INT_I2S2,
662                 .flags  = IORESOURCE_IRQ
663         },
664         [1] = {
665                 .start  = TEGRA_DMA_REQ_SEL_I2S2_1,
666                 .end    = TEGRA_DMA_REQ_SEL_I2S2_1,
667                 .flags  = IORESOURCE_DMA
668         },
669         [2] = {
670                 .start  = TEGRA_I2S2_BASE,
671                 .end    = TEGRA_I2S2_BASE + TEGRA_I2S2_SIZE - 1,
672                 .flags  = IORESOURCE_MEM
673         }
674 };
675
676 struct platform_device tegra_i2s_device1 = {
677         .name           = "tegra-i2s",
678         .id             = 0,
679         .resource       = i2s_resource1,
680         .num_resources  = ARRAY_SIZE(i2s_resource1),
681 };
682
683 struct platform_device tegra_i2s_device2 = {
684         .name           = "tegra-i2s",
685         .id             = 1,
686         .resource       = i2s_resource2,
687         .num_resources  = ARRAY_SIZE(i2s_resource2),
688 };
689
690 static struct resource tegra_das_resources[] = {
691         [0] = {
692                 .start = TEGRA_APB_MISC_DAS_BASE,
693                 .end = TEGRA_APB_MISC_DAS_BASE + TEGRA_APB_MISC_DAS_SIZE - 1,
694                 .flags = IORESOURCE_MEM,
695         },
696 };
697
698 struct platform_device tegra_das_device = {
699         .name           = "tegra-das",
700         .id             = -1,
701         .num_resources  = ARRAY_SIZE(tegra_das_resources),
702         .resource       = tegra_das_resources,
703 };
704
705 struct platform_device tegra_pcm_device = {
706         .name = "tegra-pcm-audio",
707         .id = -1,
708 };