2 * Copyright (C) 2010,2011 Google, Inc.
5 * Colin Cross <ccross@android.com>
6 * Erik Gilling <ccross@android.com>
8 * This software is licensed under the terms of the GNU General Public
9 * License version 2, as published by the Free Software Foundation, and
10 * may be copied, distributed, and modified under those terms.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
20 #include <linux/resource.h>
21 #include <linux/platform_device.h>
22 #include <linux/dma-mapping.h>
23 #include <linux/fsl_devices.h>
24 #include <linux/serial_8250.h>
25 #include <linux/i2c-tegra.h>
27 #include <mach/irqs.h>
28 #include <mach/iomap.h>
30 #include <mach/usb_phy.h>
32 #include "gpio-names.h"
35 static struct resource gpio_resource[] = {
37 .start = TEGRA_GPIO_BASE,
38 .end = TEGRA_GPIO_BASE + TEGRA_GPIO_SIZE-1,
39 .flags = IORESOURCE_MEM,
44 .flags = IORESOURCE_IRQ,
49 .flags = IORESOURCE_IRQ,
54 .flags = IORESOURCE_IRQ,
59 .flags = IORESOURCE_IRQ,
64 .flags = IORESOURCE_IRQ,
69 .flags = IORESOURCE_IRQ,
74 .flags = IORESOURCE_IRQ,
78 struct platform_device tegra_gpio_device = {
81 .resource = gpio_resource,
82 .num_resources = ARRAY_SIZE(gpio_resource),
85 static struct resource pinmux_resource[] = {
87 /* Tri-state registers */
88 .start = TEGRA_APB_MISC_BASE + 0x14,
89 .end = TEGRA_APB_MISC_BASE + 0x20 + 3,
90 .flags = IORESOURCE_MEM,
94 .start = TEGRA_APB_MISC_BASE + 0x80,
95 .end = TEGRA_APB_MISC_BASE + 0x9c + 3,
96 .flags = IORESOURCE_MEM,
99 /* Pull-up/down registers */
100 .start = TEGRA_APB_MISC_BASE + 0xa0,
101 .end = TEGRA_APB_MISC_BASE + 0xb0 + 3,
102 .flags = IORESOURCE_MEM,
105 /* Pad control registers */
106 .start = TEGRA_APB_MISC_BASE + 0x868,
107 .end = TEGRA_APB_MISC_BASE + 0x90c + 3,
108 .flags = IORESOURCE_MEM,
112 struct platform_device tegra_pinmux_device = {
113 .name = "tegra20-pinctrl",
115 .resource = pinmux_resource,
116 .num_resources = ARRAY_SIZE(pinmux_resource),
119 static struct resource i2c_resource1[] = {
123 .flags = IORESOURCE_IRQ,
126 .start = TEGRA_I2C_BASE,
127 .end = TEGRA_I2C_BASE + TEGRA_I2C_SIZE-1,
128 .flags = IORESOURCE_MEM,
132 static struct resource i2c_resource2[] = {
136 .flags = IORESOURCE_IRQ,
139 .start = TEGRA_I2C2_BASE,
140 .end = TEGRA_I2C2_BASE + TEGRA_I2C2_SIZE-1,
141 .flags = IORESOURCE_MEM,
145 static struct resource i2c_resource3[] = {
149 .flags = IORESOURCE_IRQ,
152 .start = TEGRA_I2C3_BASE,
153 .end = TEGRA_I2C3_BASE + TEGRA_I2C3_SIZE-1,
154 .flags = IORESOURCE_MEM,
158 static struct resource i2c_resource4[] = {
162 .flags = IORESOURCE_IRQ,
165 .start = TEGRA_DVC_BASE,
166 .end = TEGRA_DVC_BASE + TEGRA_DVC_SIZE-1,
167 .flags = IORESOURCE_MEM,
171 static struct tegra_i2c_platform_data tegra_i2c1_platform_data = {
172 .bus_clk_rate = 400000,
175 static struct tegra_i2c_platform_data tegra_i2c2_platform_data = {
176 .bus_clk_rate = 400000,
179 static struct tegra_i2c_platform_data tegra_i2c3_platform_data = {
180 .bus_clk_rate = 400000,
183 static struct tegra_i2c_platform_data tegra_dvc_platform_data = {
184 .bus_clk_rate = 400000,
187 struct platform_device tegra_i2c_device1 = {
190 .resource = i2c_resource1,
191 .num_resources = ARRAY_SIZE(i2c_resource1),
193 .platform_data = &tegra_i2c1_platform_data,
197 struct platform_device tegra_i2c_device2 = {
200 .resource = i2c_resource2,
201 .num_resources = ARRAY_SIZE(i2c_resource2),
203 .platform_data = &tegra_i2c2_platform_data,
207 struct platform_device tegra_i2c_device3 = {
210 .resource = i2c_resource3,
211 .num_resources = ARRAY_SIZE(i2c_resource3),
213 .platform_data = &tegra_i2c3_platform_data,
217 struct platform_device tegra_i2c_device4 = {
220 .resource = i2c_resource4,
221 .num_resources = ARRAY_SIZE(i2c_resource4),
223 .platform_data = &tegra_dvc_platform_data,
227 static struct resource spi_resource1[] = {
229 .start = INT_S_LINK1,
231 .flags = IORESOURCE_IRQ,
234 .start = TEGRA_SPI1_BASE,
235 .end = TEGRA_SPI1_BASE + TEGRA_SPI1_SIZE-1,
236 .flags = IORESOURCE_MEM,
240 static struct resource spi_resource2[] = {
244 .flags = IORESOURCE_IRQ,
247 .start = TEGRA_SPI2_BASE,
248 .end = TEGRA_SPI2_BASE + TEGRA_SPI2_SIZE-1,
249 .flags = IORESOURCE_MEM,
253 static struct resource spi_resource3[] = {
257 .flags = IORESOURCE_IRQ,
260 .start = TEGRA_SPI3_BASE,
261 .end = TEGRA_SPI3_BASE + TEGRA_SPI3_SIZE-1,
262 .flags = IORESOURCE_MEM,
266 static struct resource spi_resource4[] = {
270 .flags = IORESOURCE_IRQ,
273 .start = TEGRA_SPI4_BASE,
274 .end = TEGRA_SPI4_BASE + TEGRA_SPI4_SIZE-1,
275 .flags = IORESOURCE_MEM,
279 struct platform_device tegra_spi_device1 = {
282 .resource = spi_resource1,
283 .num_resources = ARRAY_SIZE(spi_resource1),
285 .coherent_dma_mask = 0xffffffff,
289 struct platform_device tegra_spi_device2 = {
292 .resource = spi_resource2,
293 .num_resources = ARRAY_SIZE(spi_resource2),
295 .coherent_dma_mask = 0xffffffff,
299 struct platform_device tegra_spi_device3 = {
302 .resource = spi_resource3,
303 .num_resources = ARRAY_SIZE(spi_resource3),
305 .coherent_dma_mask = 0xffffffff,
309 struct platform_device tegra_spi_device4 = {
312 .resource = spi_resource4,
313 .num_resources = ARRAY_SIZE(spi_resource4),
315 .coherent_dma_mask = 0xffffffff,
320 static struct resource sdhci_resource1[] = {
324 .flags = IORESOURCE_IRQ,
327 .start = TEGRA_SDMMC1_BASE,
328 .end = TEGRA_SDMMC1_BASE + TEGRA_SDMMC1_SIZE-1,
329 .flags = IORESOURCE_MEM,
333 static struct resource sdhci_resource2[] = {
337 .flags = IORESOURCE_IRQ,
340 .start = TEGRA_SDMMC2_BASE,
341 .end = TEGRA_SDMMC2_BASE + TEGRA_SDMMC2_SIZE-1,
342 .flags = IORESOURCE_MEM,
346 static struct resource sdhci_resource3[] = {
350 .flags = IORESOURCE_IRQ,
353 .start = TEGRA_SDMMC3_BASE,
354 .end = TEGRA_SDMMC3_BASE + TEGRA_SDMMC3_SIZE-1,
355 .flags = IORESOURCE_MEM,
359 static struct resource sdhci_resource4[] = {
363 .flags = IORESOURCE_IRQ,
366 .start = TEGRA_SDMMC4_BASE,
367 .end = TEGRA_SDMMC4_BASE + TEGRA_SDMMC4_SIZE-1,
368 .flags = IORESOURCE_MEM,
372 /* board files should fill in platform_data register the devices themselvs.
373 * See board-harmony.c for an example
375 struct platform_device tegra_sdhci_device1 = {
376 .name = "sdhci-tegra",
378 .resource = sdhci_resource1,
379 .num_resources = ARRAY_SIZE(sdhci_resource1),
382 struct platform_device tegra_sdhci_device2 = {
383 .name = "sdhci-tegra",
385 .resource = sdhci_resource2,
386 .num_resources = ARRAY_SIZE(sdhci_resource2),
389 struct platform_device tegra_sdhci_device3 = {
390 .name = "sdhci-tegra",
392 .resource = sdhci_resource3,
393 .num_resources = ARRAY_SIZE(sdhci_resource3),
396 struct platform_device tegra_sdhci_device4 = {
397 .name = "sdhci-tegra",
399 .resource = sdhci_resource4,
400 .num_resources = ARRAY_SIZE(sdhci_resource4),
403 static struct resource tegra_usb1_resources[] = {
405 .start = TEGRA_USB_BASE,
406 .end = TEGRA_USB_BASE + TEGRA_USB_SIZE - 1,
407 .flags = IORESOURCE_MEM,
412 .flags = IORESOURCE_IRQ,
416 static struct resource tegra_usb2_resources[] = {
418 .start = TEGRA_USB2_BASE,
419 .end = TEGRA_USB2_BASE + TEGRA_USB2_SIZE - 1,
420 .flags = IORESOURCE_MEM,
425 .flags = IORESOURCE_IRQ,
429 static struct resource tegra_usb3_resources[] = {
431 .start = TEGRA_USB3_BASE,
432 .end = TEGRA_USB3_BASE + TEGRA_USB3_SIZE - 1,
433 .flags = IORESOURCE_MEM,
438 .flags = IORESOURCE_IRQ,
442 static struct tegra_ulpi_config tegra_ehci2_ulpi_phy_config = {
443 /* All existing boards use GPIO PV0 for phy reset */
444 .reset_gpio = TEGRA_GPIO_PV0,
448 struct tegra_ehci_platform_data tegra_ehci1_pdata = {
449 .operating_mode = TEGRA_USB_OTG,
450 .power_down_on_bus_suspend = 1,
454 struct tegra_ehci_platform_data tegra_ehci2_pdata = {
455 .phy_config = &tegra_ehci2_ulpi_phy_config,
456 .operating_mode = TEGRA_USB_HOST,
457 .power_down_on_bus_suspend = 1,
461 struct tegra_ehci_platform_data tegra_ehci3_pdata = {
462 .operating_mode = TEGRA_USB_HOST,
463 .power_down_on_bus_suspend = 1,
467 static u64 tegra_ehci_dmamask = DMA_BIT_MASK(32);
469 struct platform_device tegra_ehci1_device = {
470 .name = "tegra-ehci",
473 .dma_mask = &tegra_ehci_dmamask,
474 .coherent_dma_mask = DMA_BIT_MASK(32),
475 .platform_data = &tegra_ehci1_pdata,
477 .resource = tegra_usb1_resources,
478 .num_resources = ARRAY_SIZE(tegra_usb1_resources),
481 struct platform_device tegra_ehci2_device = {
482 .name = "tegra-ehci",
485 .dma_mask = &tegra_ehci_dmamask,
486 .coherent_dma_mask = DMA_BIT_MASK(32),
487 .platform_data = &tegra_ehci2_pdata,
489 .resource = tegra_usb2_resources,
490 .num_resources = ARRAY_SIZE(tegra_usb2_resources),
493 struct platform_device tegra_ehci3_device = {
494 .name = "tegra-ehci",
497 .dma_mask = &tegra_ehci_dmamask,
498 .coherent_dma_mask = DMA_BIT_MASK(32),
499 .platform_data = &tegra_ehci3_pdata,
501 .resource = tegra_usb3_resources,
502 .num_resources = ARRAY_SIZE(tegra_usb3_resources),
505 static struct resource tegra_pmu_resources[] = {
507 .start = INT_CPU0_PMU_INTR,
508 .end = INT_CPU0_PMU_INTR,
509 .flags = IORESOURCE_IRQ,
512 .start = INT_CPU1_PMU_INTR,
513 .end = INT_CPU1_PMU_INTR,
514 .flags = IORESOURCE_IRQ,
518 struct platform_device tegra_pmu_device = {
520 .id = ARM_PMU_DEVICE_CPU,
521 .num_resources = ARRAY_SIZE(tegra_pmu_resources),
522 .resource = tegra_pmu_resources,
525 static struct resource tegra_uarta_resources[] = {
527 .start = TEGRA_UARTA_BASE,
528 .end = TEGRA_UARTA_BASE + TEGRA_UARTA_SIZE - 1,
529 .flags = IORESOURCE_MEM,
534 .flags = IORESOURCE_IRQ,
538 static struct resource tegra_uartb_resources[] = {
540 .start = TEGRA_UARTB_BASE,
541 .end = TEGRA_UARTB_BASE + TEGRA_UARTB_SIZE - 1,
542 .flags = IORESOURCE_MEM,
547 .flags = IORESOURCE_IRQ,
551 static struct resource tegra_uartc_resources[] = {
553 .start = TEGRA_UARTC_BASE,
554 .end = TEGRA_UARTC_BASE + TEGRA_UARTC_SIZE - 1,
555 .flags = IORESOURCE_MEM,
560 .flags = IORESOURCE_IRQ,
564 static struct resource tegra_uartd_resources[] = {
566 .start = TEGRA_UARTD_BASE,
567 .end = TEGRA_UARTD_BASE + TEGRA_UARTD_SIZE - 1,
568 .flags = IORESOURCE_MEM,
573 .flags = IORESOURCE_IRQ,
577 static struct resource tegra_uarte_resources[] = {
579 .start = TEGRA_UARTE_BASE,
580 .end = TEGRA_UARTE_BASE + TEGRA_UARTE_SIZE - 1,
581 .flags = IORESOURCE_MEM,
586 .flags = IORESOURCE_IRQ,
590 struct platform_device tegra_uarta_device = {
591 .name = "tegra_uart",
593 .num_resources = ARRAY_SIZE(tegra_uarta_resources),
594 .resource = tegra_uarta_resources,
596 .coherent_dma_mask = DMA_BIT_MASK(32),
600 struct platform_device tegra_uartb_device = {
601 .name = "tegra_uart",
603 .num_resources = ARRAY_SIZE(tegra_uartb_resources),
604 .resource = tegra_uartb_resources,
606 .coherent_dma_mask = DMA_BIT_MASK(32),
610 struct platform_device tegra_uartc_device = {
611 .name = "tegra_uart",
613 .num_resources = ARRAY_SIZE(tegra_uartc_resources),
614 .resource = tegra_uartc_resources,
616 .coherent_dma_mask = DMA_BIT_MASK(32),
620 struct platform_device tegra_uartd_device = {
621 .name = "tegra_uart",
623 .num_resources = ARRAY_SIZE(tegra_uartd_resources),
624 .resource = tegra_uartd_resources,
626 .coherent_dma_mask = DMA_BIT_MASK(32),
630 struct platform_device tegra_uarte_device = {
631 .name = "tegra_uart",
633 .num_resources = ARRAY_SIZE(tegra_uarte_resources),
634 .resource = tegra_uarte_resources,
636 .coherent_dma_mask = DMA_BIT_MASK(32),
640 static struct resource i2s_resource1[] = {
644 .flags = IORESOURCE_IRQ
647 .start = TEGRA_DMA_REQ_SEL_I2S_1,
648 .end = TEGRA_DMA_REQ_SEL_I2S_1,
649 .flags = IORESOURCE_DMA
652 .start = TEGRA_I2S1_BASE,
653 .end = TEGRA_I2S1_BASE + TEGRA_I2S1_SIZE - 1,
654 .flags = IORESOURCE_MEM
658 static struct resource i2s_resource2[] = {
662 .flags = IORESOURCE_IRQ
665 .start = TEGRA_DMA_REQ_SEL_I2S2_1,
666 .end = TEGRA_DMA_REQ_SEL_I2S2_1,
667 .flags = IORESOURCE_DMA
670 .start = TEGRA_I2S2_BASE,
671 .end = TEGRA_I2S2_BASE + TEGRA_I2S2_SIZE - 1,
672 .flags = IORESOURCE_MEM
676 struct platform_device tegra_i2s_device1 = {
677 .name = "tegra20-i2s",
679 .resource = i2s_resource1,
680 .num_resources = ARRAY_SIZE(i2s_resource1),
683 struct platform_device tegra_i2s_device2 = {
684 .name = "tegra20-i2s",
686 .resource = i2s_resource2,
687 .num_resources = ARRAY_SIZE(i2s_resource2),
690 static struct resource tegra_das_resources[] = {
692 .start = TEGRA_APB_MISC_DAS_BASE,
693 .end = TEGRA_APB_MISC_DAS_BASE + TEGRA_APB_MISC_DAS_SIZE - 1,
694 .flags = IORESOURCE_MEM,
698 struct platform_device tegra_das_device = {
699 .name = "tegra20-das",
701 .num_resources = ARRAY_SIZE(tegra_das_resources),
702 .resource = tegra_das_resources,