arch/arm/mach-shmobile/setup-r8a7790.c

   1 /*
   2  * r8a7790 processor support
   3  *
   4  * Copyright (C) 2013  Renesas Solutions Corp.
   5  * Copyright (C) 2013  Magnus Damm
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; version 2 of the License.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
  19  */
  20
  21 #include <linux/irq.h>
  22 #include <linux/kernel.h>
  23 #include <linux/of_platform.h>
  24 #include <linux/platform_data/gpio-rcar.h>
  25 #include <linux/platform_data/irq-renesas-irqc.h>
  26 #include <linux/serial_sci.h>
  27 #include <linux/sh_timer.h>
  28 #include <mach/common.h>
  29 #include <mach/irqs.h>
  30 #include <mach/r8a7790.h>
  31 #include <asm/mach/arch.h>
  32
  33 static const struct resource pfc_resources[] __initconst = {
  34         DEFINE_RES_MEM(0xe6060000, 0x250),
  35 };
  36
  37 #define R8A7790_GPIO(idx)                                               \
  38 static const struct resource r8a7790_gpio##idx##_resources[] __initconst = { \
  39         DEFINE_RES_MEM(0xe6050000 + 0x1000 * (idx), 0x50),              \
  40         DEFINE_RES_IRQ(gic_spi(4 + (idx))),                             \
  41 };                                                                      \
  42                                                                         \
  43 static const struct gpio_rcar_config                                    \
  44 r8a7790_gpio##idx##_platform_data __initconst = {                       \
  45         .gpio_base      = 32 * (idx),                                   \
  46         .irq_base       = 0,                                            \
  47         .number_of_pins = 32,                                           \
  48         .pctl_name      = "pfc-r8a7790",                                \
  49         .has_both_edge_trigger = 1,                                     \
  50 };                                                                      \
  51
  52 R8A7790_GPIO(0);
  53 R8A7790_GPIO(1);
  54 R8A7790_GPIO(2);
  55 R8A7790_GPIO(3);
  56 R8A7790_GPIO(4);
  57 R8A7790_GPIO(5);
  58
  59 #define r8a7790_register_gpio(idx)                                      \
  60         platform_device_register_resndata(&platform_bus, "gpio_rcar", idx, \
  61                 r8a7790_gpio##idx##_resources,                          \
  62                 ARRAY_SIZE(r8a7790_gpio##idx##_resources),              \
  63                 &r8a7790_gpio##idx##_platform_data,                     \
  64                 sizeof(r8a7790_gpio##idx##_platform_data))
  65
  66 static struct resource i2c_resources[] __initdata = {
  67         /* I2C0 */
  68         DEFINE_RES_MEM(0xE6508000, 0x40),
  69         DEFINE_RES_IRQ(gic_spi(287)),
  70         /* I2C1 */
  71         DEFINE_RES_MEM(0xE6518000, 0x40),
  72         DEFINE_RES_IRQ(gic_spi(288)),
  73         /* I2C2 */
  74         DEFINE_RES_MEM(0xE6530000, 0x40),
  75         DEFINE_RES_IRQ(gic_spi(286)),
  76         /* I2C3 */
  77         DEFINE_RES_MEM(0xE6540000, 0x40),
  78         DEFINE_RES_IRQ(gic_spi(290)),
  79
  80 };
  81
  82 #define r8a7790_register_i2c(idx)               \
  83         platform_device_register_simple(        \
  84                 "i2c-rcar_gen2", idx,           \
  85                 i2c_resources + (2 * idx), 2);  \
  86
  87 void __init r8a7790_pinmux_init(void)
  88 {
  89         platform_device_register_simple("pfc-r8a7790", -1, pfc_resources,
  90                                         ARRAY_SIZE(pfc_resources));
  91         r8a7790_register_gpio(0);
  92         r8a7790_register_gpio(1);
  93         r8a7790_register_gpio(2);
  94         r8a7790_register_gpio(3);
  95         r8a7790_register_gpio(4);
  96         r8a7790_register_gpio(5);
  97         r8a7790_register_i2c(0);
  98         r8a7790_register_i2c(1);
  99         r8a7790_register_i2c(2);
 100         r8a7790_register_i2c(3);
 101 }
 102
 103 #define __R8A7790_SCIF(scif_type, _scscr, index, baseaddr, irq)         \
 104 static struct plat_sci_port scif##index##_platform_data = {             \
 105         .type           = scif_type,                                    \
 106         .flags          = UPF_BOOT_AUTOCONF | UPF_IOREMAP,              \
 107         .scscr          = _scscr,                                       \
 108 };                                                                      \
 109                                                                         \
 110 static struct resource scif##index##_resources[] = {                    \
 111         DEFINE_RES_MEM(baseaddr, 0x100),                                \
 112         DEFINE_RES_IRQ(irq),                                            \
 113 }
 114
 115 #define R8A7790_SCIF(index, baseaddr, irq)                              \
 116         __R8A7790_SCIF(PORT_SCIF, SCSCR_RE | SCSCR_TE,                  \
 117                        index, baseaddr, irq)
 118
 119 #define R8A7790_SCIFA(index, baseaddr, irq)                             \
 120         __R8A7790_SCIF(PORT_SCIFA, SCSCR_RE | SCSCR_TE | SCSCR_CKE0,    \
 121                        index, baseaddr, irq)
 122
 123 #define R8A7790_SCIFB(index, baseaddr, irq)                             \
 124         __R8A7790_SCIF(PORT_SCIFB, SCSCR_RE | SCSCR_TE,                 \
 125                        index, baseaddr, irq)
 126
 127 #define R8A7790_HSCIF(index, baseaddr, irq)                             \
 128         __R8A7790_SCIF(PORT_HSCIF, SCSCR_RE | SCSCR_TE,                 \
 129                        index, baseaddr, irq)
 130
 131 R8A7790_SCIFA(0, 0xe6c40000, gic_spi(144)); /* SCIFA0 */
 132 R8A7790_SCIFA(1, 0xe6c50000, gic_spi(145)); /* SCIFA1 */
 133 R8A7790_SCIFB(2, 0xe6c20000, gic_spi(148)); /* SCIFB0 */
 134 R8A7790_SCIFB(3, 0xe6c30000, gic_spi(149)); /* SCIFB1 */
 135 R8A7790_SCIFB(4, 0xe6ce0000, gic_spi(150)); /* SCIFB2 */
 136 R8A7790_SCIFA(5, 0xe6c60000, gic_spi(151)); /* SCIFA2 */
 137 R8A7790_SCIF(6,  0xe6e60000, gic_spi(152)); /* SCIF0 */
 138 R8A7790_SCIF(7,  0xe6e68000, gic_spi(153)); /* SCIF1 */
 139 R8A7790_HSCIF(8, 0xe62c0000, gic_spi(154)); /* HSCIF0 */
 140 R8A7790_HSCIF(9, 0xe62c8000, gic_spi(155)); /* HSCIF1 */
 141
 142 #define r8a7790_register_scif(index)                                           \
 143         platform_device_register_resndata(&platform_bus, "sh-sci", index,      \
 144                                           scif##index##_resources,             \
 145                                           ARRAY_SIZE(scif##index##_resources), \
 146                                           &scif##index##_platform_data,        \
 147                                           sizeof(scif##index##_platform_data))
 148
 149 static const struct renesas_irqc_config irqc0_data __initconst = {
 150         .irq_base = irq_pin(0), /* IRQ0 -> IRQ3 */
 151 };
 152
 153 static const struct resource irqc0_resources[] __initconst = {
 154         DEFINE_RES_MEM(0xe61c0000, 0x200), /* IRQC Event Detector Block_0 */
 155         DEFINE_RES_IRQ(gic_spi(0)), /* IRQ0 */
 156         DEFINE_RES_IRQ(gic_spi(1)), /* IRQ1 */
 157         DEFINE_RES_IRQ(gic_spi(2)), /* IRQ2 */
 158         DEFINE_RES_IRQ(gic_spi(3)), /* IRQ3 */
 159 };
 160
 161 #define r8a7790_register_irqc(idx)                                      \
 162         platform_device_register_resndata(&platform_bus, "renesas_irqc", \
 163                                           idx, irqc##idx##_resources,   \
 164                                           ARRAY_SIZE(irqc##idx##_resources), \
 165                                           &irqc##idx##_data,            \
 166                                           sizeof(struct renesas_irqc_config))
 167
 168 static const struct resource thermal_resources[] __initconst = {
 169         DEFINE_RES_MEM(0xe61f0000, 0x14),
 170         DEFINE_RES_MEM(0xe61f0100, 0x38),
 171         DEFINE_RES_IRQ(gic_spi(69)),
 172 };
 173
 174 #define r8a7790_register_thermal()                                      \
 175         platform_device_register_simple("rcar_thermal", -1,             \
 176                                         thermal_resources,              \
 177                                         ARRAY_SIZE(thermal_resources))
 178
 179 static const struct sh_timer_config cmt00_platform_data __initconst = {
 180         .name = "CMT00",
 181         .timer_bit = 0,
 182         .clockevent_rating = 80,
 183 };
 184
 185 static const struct resource cmt00_resources[] __initconst = {
 186         DEFINE_RES_MEM(0xffca0510, 0x0c),
 187         DEFINE_RES_MEM(0xffca0500, 0x04),
 188         DEFINE_RES_IRQ(gic_spi(142)), /* CMT0_0 */
 189 };
 190
 191 #define r8a7790_register_cmt(idx)                                       \
 192         platform_device_register_resndata(&platform_bus, "sh_cmt",      \
 193                                           idx, cmt##idx##_resources,    \
 194                                           ARRAY_SIZE(cmt##idx##_resources), \
 195                                           &cmt##idx##_platform_data,    \
 196                                           sizeof(struct sh_timer_config))
 197
 198 void __init r8a7790_add_dt_devices(void)
 199 {
 200         r8a7790_register_scif(0);
 201         r8a7790_register_scif(1);
 202         r8a7790_register_scif(2);
 203         r8a7790_register_scif(3);
 204         r8a7790_register_scif(4);
 205         r8a7790_register_scif(5);
 206         r8a7790_register_scif(6);
 207         r8a7790_register_scif(7);
 208         r8a7790_register_scif(8);
 209         r8a7790_register_scif(9);
 210         r8a7790_register_cmt(00);
 211 }
 212
 213 void __init r8a7790_add_standard_devices(void)
 214 {
 215         r8a7790_add_dt_devices();
 216         r8a7790_register_irqc(0);
 217         r8a7790_register_thermal();
 218 }
 219
 220 void __init r8a7790_init_early(void)
 221 {
 222 #ifndef CONFIG_ARM_ARCH_TIMER
 223         shmobile_setup_delay(1300, 2, 4); /* Cortex-A15 @ 1300MHz */
 224 #endif
 225 }
 226
 227 #ifdef CONFIG_USE_OF
 228
 229 static const char * const r8a7790_boards_compat_dt[] __initconst = {
 230         "renesas,r8a7790",
 231         NULL,
 232 };
 233
 234 DT_MACHINE_START(R8A7790_DT, "Generic R8A7790 (Flattened Device Tree)")
 235         .smp            = smp_ops(r8a7790_smp_ops),
 236         .init_early     = r8a7790_init_early,
 237         .init_time      = rcar_gen2_timer_init,
 238         .dt_compat      = r8a7790_boards_compat_dt,
 239 MACHINE_END
 240 #endif /* CONFIG_USE_OF */