2 * R8A7740 processor support
4 * Copyright (C) 2011 Renesas Solutions Corp.
5 * Copyright (C) 2011 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 #include <linux/delay.h>
21 #include <linux/kernel.h>
22 #include <linux/init.h>
24 #include <linux/platform_device.h>
25 #include <linux/serial_sci.h>
26 #include <linux/sh_timer.h>
27 #include <mach/r8a7740.h>
28 #include <mach/common.h>
29 #include <mach/irqs.h>
30 #include <asm/mach-types.h>
31 #include <asm/mach/map.h>
32 #include <asm/mach/arch.h>
33 #include <asm/mach/time.h>
35 static struct map_desc r8a7740_io_desc[] __initdata = {
38 * 0xe6000000-0xefffffff -> 0xe6000000-0xefffffff
41 .virtual = 0xe6000000,
42 .pfn = __phys_to_pfn(0xe6000000),
44 .type = MT_DEVICE_NONSHARED
46 #ifdef CONFIG_CACHE_L2X0
49 * 0xf0100000-0xf0101000 -> 0xf0002000-0xf0003000
52 .virtual = 0xf0002000,
53 .pfn = __phys_to_pfn(0xf0100000),
55 .type = MT_DEVICE_NONSHARED
60 void __init r8a7740_map_io(void)
62 iotable_init(r8a7740_io_desc, ARRAY_SIZE(r8a7740_io_desc));
66 static struct plat_sci_port scif0_platform_data = {
67 .mapbase = 0xe6c40000,
68 .flags = UPF_BOOT_AUTOCONF,
69 .scscr = SCSCR_RE | SCSCR_TE,
70 .scbrr_algo_id = SCBRR_ALGO_4,
72 .irqs = SCIx_IRQ_MUXED(evt2irq(0x0c00)),
75 static struct platform_device scif0_device = {
79 .platform_data = &scif0_platform_data,
84 static struct plat_sci_port scif1_platform_data = {
85 .mapbase = 0xe6c50000,
86 .flags = UPF_BOOT_AUTOCONF,
87 .scscr = SCSCR_RE | SCSCR_TE,
88 .scbrr_algo_id = SCBRR_ALGO_4,
90 .irqs = SCIx_IRQ_MUXED(evt2irq(0x0c20)),
93 static struct platform_device scif1_device = {
97 .platform_data = &scif1_platform_data,
102 static struct plat_sci_port scif2_platform_data = {
103 .mapbase = 0xe6c60000,
104 .flags = UPF_BOOT_AUTOCONF,
105 .scscr = SCSCR_RE | SCSCR_TE,
106 .scbrr_algo_id = SCBRR_ALGO_4,
108 .irqs = SCIx_IRQ_MUXED(evt2irq(0x0c40)),
111 static struct platform_device scif2_device = {
115 .platform_data = &scif2_platform_data,
120 static struct plat_sci_port scif3_platform_data = {
121 .mapbase = 0xe6c70000,
122 .flags = UPF_BOOT_AUTOCONF,
123 .scscr = SCSCR_RE | SCSCR_TE,
124 .scbrr_algo_id = SCBRR_ALGO_4,
126 .irqs = SCIx_IRQ_MUXED(evt2irq(0x0c60)),
129 static struct platform_device scif3_device = {
133 .platform_data = &scif3_platform_data,
138 static struct plat_sci_port scif4_platform_data = {
139 .mapbase = 0xe6c80000,
140 .flags = UPF_BOOT_AUTOCONF,
141 .scscr = SCSCR_RE | SCSCR_TE,
142 .scbrr_algo_id = SCBRR_ALGO_4,
144 .irqs = SCIx_IRQ_MUXED(evt2irq(0x0d20)),
147 static struct platform_device scif4_device = {
151 .platform_data = &scif4_platform_data,
156 static struct plat_sci_port scif5_platform_data = {
157 .mapbase = 0xe6cb0000,
158 .flags = UPF_BOOT_AUTOCONF,
159 .scscr = SCSCR_RE | SCSCR_TE,
160 .scbrr_algo_id = SCBRR_ALGO_4,
162 .irqs = SCIx_IRQ_MUXED(evt2irq(0x0d40)),
165 static struct platform_device scif5_device = {
169 .platform_data = &scif5_platform_data,
174 static struct plat_sci_port scif6_platform_data = {
175 .mapbase = 0xe6cc0000,
176 .flags = UPF_BOOT_AUTOCONF,
177 .scscr = SCSCR_RE | SCSCR_TE,
178 .scbrr_algo_id = SCBRR_ALGO_4,
180 .irqs = SCIx_IRQ_MUXED(evt2irq(0x04c0)),
183 static struct platform_device scif6_device = {
187 .platform_data = &scif6_platform_data,
192 static struct plat_sci_port scif7_platform_data = {
193 .mapbase = 0xe6cd0000,
194 .flags = UPF_BOOT_AUTOCONF,
195 .scscr = SCSCR_RE | SCSCR_TE,
196 .scbrr_algo_id = SCBRR_ALGO_4,
198 .irqs = SCIx_IRQ_MUXED(evt2irq(0x04e0)),
201 static struct platform_device scif7_device = {
205 .platform_data = &scif7_platform_data,
210 static struct plat_sci_port scifb_platform_data = {
211 .mapbase = 0xe6c30000,
212 .flags = UPF_BOOT_AUTOCONF,
213 .scscr = SCSCR_RE | SCSCR_TE,
214 .scbrr_algo_id = SCBRR_ALGO_4,
216 .irqs = SCIx_IRQ_MUXED(evt2irq(0x0d60)),
219 static struct platform_device scifb_device = {
223 .platform_data = &scifb_platform_data,
228 static struct sh_timer_config cmt10_platform_data = {
230 .channel_offset = 0x10,
232 .clockevent_rating = 125,
233 .clocksource_rating = 125,
236 static struct resource cmt10_resources[] = {
241 .flags = IORESOURCE_MEM,
244 .start = evt2irq(0x0b00),
245 .flags = IORESOURCE_IRQ,
249 static struct platform_device cmt10_device = {
253 .platform_data = &cmt10_platform_data,
255 .resource = cmt10_resources,
256 .num_resources = ARRAY_SIZE(cmt10_resources),
259 static struct platform_device *r8a7740_early_devices[] __initdata = {
273 static struct resource i2c0_resources[] = {
277 .end = 0xfff20425 - 1,
278 .flags = IORESOURCE_MEM,
281 .start = intcs_evt2irq(0xe00),
282 .end = intcs_evt2irq(0xe60),
283 .flags = IORESOURCE_IRQ,
287 static struct resource i2c1_resources[] = {
291 .end = 0xe6c20425 - 1,
292 .flags = IORESOURCE_MEM,
295 .start = evt2irq(0x780), /* IIC1_ALI1 */
296 .end = evt2irq(0x7e0), /* IIC1_DTEI1 */
297 .flags = IORESOURCE_IRQ,
301 static struct platform_device i2c0_device = {
302 .name = "i2c-sh_mobile",
304 .resource = i2c0_resources,
305 .num_resources = ARRAY_SIZE(i2c0_resources),
308 static struct platform_device i2c1_device = {
309 .name = "i2c-sh_mobile",
311 .resource = i2c1_resources,
312 .num_resources = ARRAY_SIZE(i2c1_resources),
315 static struct platform_device *r8a7740_late_devices[] __initdata = {
321 #define ICSTART 0x0070
323 #define i2c_read(reg, offset) ioread8(reg + offset)
324 #define i2c_write(reg, offset, data) iowrite8(data, reg + offset)
327 * r8a7740 chip has lasting errata on I2C I/O pad reset.
328 * this is work-around for it.
330 static void r8a7740_i2c_workaround(struct platform_device *pdev)
332 struct resource *res;
335 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
336 if (unlikely(!res)) {
337 pr_err("r8a7740 i2c workaround fail (cannot find resource)\n");
341 reg = ioremap(res->start, resource_size(res));
342 if (unlikely(!reg)) {
343 pr_err("r8a7740 i2c workaround fail (cannot map IO)\n");
347 i2c_write(reg, ICCR, i2c_read(reg, ICCR) | 0x80);
348 i2c_read(reg, ICCR); /* dummy read */
350 i2c_write(reg, ICSTART, i2c_read(reg, ICSTART) | 0x10);
351 i2c_read(reg, ICSTART); /* dummy read */
355 i2c_write(reg, ICCR, 0x01);
357 i2c_write(reg, ICSTART, 0x00);
358 i2c_read(reg, ICSTART);
360 i2c_write(reg, ICCR, 0x10);
362 i2c_write(reg, ICCR, 0x00);
364 i2c_write(reg, ICCR, 0x10);
370 void __init r8a7740_add_standard_devices(void)
372 /* I2C work-around */
373 r8a7740_i2c_workaround(&i2c0_device);
374 r8a7740_i2c_workaround(&i2c1_device);
376 platform_add_devices(r8a7740_early_devices,
377 ARRAY_SIZE(r8a7740_early_devices));
378 platform_add_devices(r8a7740_late_devices,
379 ARRAY_SIZE(r8a7740_late_devices));
382 static void __init r8a7740_earlytimer_init(void)
384 r8a7740_clock_init(0);
385 shmobile_earlytimer_init();
388 void __init r8a7740_add_early_devices(void)
390 early_platform_add_devices(r8a7740_early_devices,
391 ARRAY_SIZE(r8a7740_early_devices));
393 /* setup early console here as well */
394 shmobile_setup_console();
396 /* override timer setup with soc-specific code */
397 shmobile_timer.init = r8a7740_earlytimer_init;