4 * Copyright (C) 2013-2014 Renesas Solutions Corp.
5 * Copyright (C) 2013 Magnus Damm
6 * Copyright (C) 2014 Cogent Embedded, Inc.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
18 #include <linux/gpio.h>
19 #include <linux/gpio_keys.h>
20 #include <linux/i2c.h>
21 #include <linux/input.h>
22 #include <linux/interrupt.h>
23 #include <linux/irq.h>
24 #include <linux/kernel.h>
25 #include <linux/leds.h>
26 #include <linux/mfd/tmio.h>
27 #include <linux/mmc/host.h>
28 #include <linux/mmc/sh_mmcif.h>
29 #include <linux/mmc/sh_mobile_sdhi.h>
30 #include <linux/mtd/partitions.h>
31 #include <linux/mtd/mtd.h>
32 #include <linux/pinctrl/machine.h>
33 #include <linux/platform_data/camera-rcar.h>
34 #include <linux/platform_data/gpio-rcar.h>
35 #include <linux/platform_data/rcar-du.h>
36 #include <linux/platform_data/usb-rcar-gen2-phy.h>
37 #include <linux/platform_device.h>
38 #include <linux/phy.h>
39 #include <linux/regulator/driver.h>
40 #include <linux/regulator/fixed.h>
41 #include <linux/regulator/gpio-regulator.h>
42 #include <linux/regulator/machine.h>
43 #include <linux/sh_eth.h>
44 #include <linux/spi/flash.h>
45 #include <linux/spi/rspi.h>
46 #include <linux/spi/spi.h>
47 #include <linux/usb/phy.h>
48 #include <linux/usb/renesas_usbhs.h>
50 #include <media/soc_camera.h>
51 #include <asm/mach-types.h>
52 #include <asm/mach/arch.h>
53 #include <sound/rcar_snd.h>
54 #include <sound/simple_card.h>
59 #include "rcar-gen2.h"
68 * this command is required when playback.
70 * # amixer set "LINEOUT Mixer DACL" on
79 * GP5_24: 1: VDD 3.3V (defult)
81 * GP5_29: 1: VccQ 3.3V (defult)
87 static struct rcar_du_encoder_data lager_du_encoders[] = {
89 .type = RCAR_DU_ENCODER_VGA,
90 .output = RCAR_DU_OUTPUT_DPAD0,
92 .type = RCAR_DU_ENCODER_NONE,
93 .output = RCAR_DU_OUTPUT_LVDS1,
94 .connector.lvds.panel = {
98 .pixelclock = 65000000,
112 static const struct rcar_du_platform_data lager_du_pdata __initconst = {
113 .encoders = lager_du_encoders,
114 .num_encoders = ARRAY_SIZE(lager_du_encoders),
117 static const struct resource du_resources[] __initconst = {
118 DEFINE_RES_MEM(0xfeb00000, 0x70000),
119 DEFINE_RES_MEM_NAMED(0xfeb90000, 0x1c, "lvds.0"),
120 DEFINE_RES_MEM_NAMED(0xfeb94000, 0x1c, "lvds.1"),
121 DEFINE_RES_IRQ(gic_spi(256)),
122 DEFINE_RES_IRQ(gic_spi(268)),
123 DEFINE_RES_IRQ(gic_spi(269)),
126 static void __init lager_add_du_device(void)
128 struct platform_device_info info = {
129 .name = "rcar-du-r8a7790",
132 .num_res = ARRAY_SIZE(du_resources),
133 .data = &lager_du_pdata,
134 .size_data = sizeof(lager_du_pdata),
135 .dma_mask = DMA_BIT_MASK(32),
138 platform_device_register_full(&info);
142 static struct gpio_led lager_leds[] = {
145 .gpio = RCAR_GP_PIN(5, 17),
146 .default_state = LEDS_GPIO_DEFSTATE_ON,
149 .gpio = RCAR_GP_PIN(4, 23),
150 .default_state = LEDS_GPIO_DEFSTATE_ON,
153 .gpio = RCAR_GP_PIN(4, 22),
154 .default_state = LEDS_GPIO_DEFSTATE_ON,
158 static const struct gpio_led_platform_data lager_leds_pdata __initconst = {
160 .num_leds = ARRAY_SIZE(lager_leds),
164 #define GPIO_KEY(c, g, d, ...) \
165 { .code = c, .gpio = g, .desc = d, .active_low = 1, \
166 .wakeup = 1, .debounce_interval = 20 }
168 static struct gpio_keys_button gpio_buttons[] = {
169 GPIO_KEY(KEY_4, RCAR_GP_PIN(1, 28), "SW2-pin4"),
170 GPIO_KEY(KEY_3, RCAR_GP_PIN(1, 26), "SW2-pin3"),
171 GPIO_KEY(KEY_2, RCAR_GP_PIN(1, 24), "SW2-pin2"),
172 GPIO_KEY(KEY_1, RCAR_GP_PIN(1, 14), "SW2-pin1"),
175 static const struct gpio_keys_platform_data lager_keys_pdata __initconst = {
176 .buttons = gpio_buttons,
177 .nbuttons = ARRAY_SIZE(gpio_buttons),
180 /* Fixed 3.3V regulator to be used by MMCIF */
181 static struct regulator_consumer_supply fixed3v3_power_consumers[] =
183 REGULATOR_SUPPLY("vmmc", "sh_mmcif.1"),
187 * SDHI regulator macro
190 * Lager board vqmmc is provided via DA9063 PMIC chip,
191 * and we should use ${LINK}/drivers/mfd/da9063-* driver for it.
192 * but, it doesn't have regulator support at this point.
193 * It uses gpio-regulator for vqmmc as quick-hack.
195 #define SDHI_REGULATOR(idx, vdd_pin, vccq_pin) \
196 static struct regulator_consumer_supply vcc_sdhi##idx##_consumer = \
197 REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi." #idx); \
199 static struct regulator_init_data vcc_sdhi##idx##_init_data = { \
201 .valid_ops_mask = REGULATOR_CHANGE_STATUS, \
203 .consumer_supplies = &vcc_sdhi##idx##_consumer, \
204 .num_consumer_supplies = 1, \
207 static const struct fixed_voltage_config vcc_sdhi##idx##_info __initconst = {\
208 .supply_name = "SDHI" #idx "Vcc", \
209 .microvolts = 3300000, \
212 .init_data = &vcc_sdhi##idx##_init_data, \
215 static struct regulator_consumer_supply vccq_sdhi##idx##_consumer = \
216 REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi." #idx); \
218 static struct regulator_init_data vccq_sdhi##idx##_init_data = { \
220 .input_uV = 3300000, \
223 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | \
224 REGULATOR_CHANGE_STATUS, \
226 .consumer_supplies = &vccq_sdhi##idx##_consumer, \
227 .num_consumer_supplies = 1, \
230 static struct gpio vccq_sdhi##idx##_gpio = \
231 { vccq_pin, GPIOF_OUT_INIT_HIGH, "vccq-sdhi" #idx }; \
233 static struct gpio_regulator_state vccq_sdhi##idx##_states[] = { \
234 { .value = 1800000, .gpios = 0 }, \
235 { .value = 3300000, .gpios = 1 }, \
238 static const struct gpio_regulator_config vccq_sdhi##idx##_info __initconst = {\
239 .supply_name = "vqmmc", \
240 .gpios = &vccq_sdhi##idx##_gpio, \
242 .states = vccq_sdhi##idx##_states, \
243 .nr_states = ARRAY_SIZE(vccq_sdhi##idx##_states), \
244 .type = REGULATOR_VOLTAGE, \
245 .init_data = &vccq_sdhi##idx##_init_data, \
248 SDHI_REGULATOR(0, RCAR_GP_PIN(5, 24), RCAR_GP_PIN(5, 29));
249 SDHI_REGULATOR(2, RCAR_GP_PIN(5, 25), RCAR_GP_PIN(5, 30));
252 static const struct sh_mmcif_plat_data mmcif1_pdata __initconst = {
253 .caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE,
254 .clk_ctrl2_present = true,
255 .ccs_unsupported = true,
258 static const struct resource mmcif1_resources[] __initconst = {
259 DEFINE_RES_MEM(0xee220000, 0x80),
260 DEFINE_RES_IRQ(gic_spi(170)),
264 static const struct sh_eth_plat_data ether_pdata __initconst = {
266 .phy_irq = irq_pin(0),
267 .edmac_endian = EDMAC_LITTLE_ENDIAN,
268 .phy_interface = PHY_INTERFACE_MODE_RMII,
269 .ether_link_active_low = 1,
272 static const struct resource ether_resources[] __initconst = {
273 DEFINE_RES_MEM(0xee700000, 0x400),
274 DEFINE_RES_IRQ(gic_spi(162)),
277 static const struct platform_device_info ether_info __initconst = {
278 .name = "r8a7790-ether",
280 .res = ether_resources,
281 .num_res = ARRAY_SIZE(ether_resources),
282 .data = ðer_pdata,
283 .size_data = sizeof(ether_pdata),
284 .dma_mask = DMA_BIT_MASK(32),
287 /* SPI Flash memory (Spansion S25FL512SAGMFIG11 64Mb) */
288 static struct mtd_partition spi_flash_part[] = {
289 /* Reserved for user loader program, read-only */
294 .mask_flags = MTD_WRITEABLE,
296 /* Reserved for user program, read-only */
299 .offset = MTDPART_OFS_APPEND,
301 .mask_flags = MTD_WRITEABLE,
303 /* All else is writable (e.g. JFFS2) */
306 .offset = MTDPART_OFS_APPEND,
307 .size = MTDPART_SIZ_FULL,
312 static const struct flash_platform_data spi_flash_data = {
314 .parts = spi_flash_part,
315 .nr_parts = ARRAY_SIZE(spi_flash_part),
319 static const struct rspi_plat_data qspi_pdata __initconst = {
323 static const struct spi_board_info spi_info[] __initconst = {
325 .modalias = "m25p80",
326 .platform_data = &spi_flash_data,
327 .mode = SPI_MODE_0 | SPI_TX_QUAD | SPI_RX_QUAD,
328 .max_speed_hz = 30000000,
335 static const struct resource qspi_resources[] __initconst = {
336 DEFINE_RES_MEM(0xe6b10000, 0x1000),
337 DEFINE_RES_IRQ_NAMED(gic_spi(184), "mux"),
341 static const struct resource vin_resources[] __initconst = {
343 DEFINE_RES_MEM(0xe6ef0000, 0x1000),
344 DEFINE_RES_IRQ(gic_spi(188)),
346 DEFINE_RES_MEM(0xe6ef1000, 0x1000),
347 DEFINE_RES_IRQ(gic_spi(189)),
350 static void __init lager_add_vin_device(unsigned idx,
351 struct rcar_vin_platform_data *pdata)
353 struct platform_device_info vin_info = {
354 .name = "r8a7790-vin",
356 .res = &vin_resources[idx * 2],
358 .dma_mask = DMA_BIT_MASK(32),
360 .size_data = sizeof(*pdata),
365 platform_device_register_full(&vin_info);
368 #define LAGER_CAMERA(idx, name, addr, pdata, flag) \
369 static struct i2c_board_info i2c_cam##idx##_device = { \
370 I2C_BOARD_INFO(name, addr), \
373 static struct rcar_vin_platform_data vin##idx##_pdata = { \
377 static struct soc_camera_link cam##idx##_link = { \
379 .board_info = &i2c_cam##idx##_device, \
380 .i2c_adapter_id = 2, \
381 .module_name = name, \
385 /* Camera 0 is not currently supported due to adv7612 support missing */
386 LAGER_CAMERA(1, "adv7180", 0x20, NULL, RCAR_VIN_BT656);
388 static void __init lager_add_camera1_device(void)
390 platform_device_register_data(NULL, "soc-camera-pdrv", 1,
391 &cam1_link, sizeof(cam1_link));
392 lager_add_vin_device(1, &vin1_pdata);
396 static const struct resource sata1_resources[] __initconst = {
397 DEFINE_RES_MEM(0xee500000, 0x2000),
398 DEFINE_RES_IRQ(gic_spi(106)),
401 static const struct platform_device_info sata1_info __initconst = {
402 .name = "sata-r8a7790",
404 .res = sata1_resources,
405 .num_res = ARRAY_SIZE(sata1_resources),
406 .dma_mask = DMA_BIT_MASK(32),
410 static const struct resource usbhs_resources[] __initconst = {
411 DEFINE_RES_MEM(0xe6590000, 0x100),
412 DEFINE_RES_IRQ(gic_spi(107)),
415 struct usbhs_private {
416 struct renesas_usbhs_platform_info info;
420 #define usbhs_get_priv(pdev) \
421 container_of(renesas_usbhs_get_info(pdev), struct usbhs_private, info)
423 static int usbhs_power_ctrl(struct platform_device *pdev,
424 void __iomem *base, int enable)
426 struct usbhs_private *priv = usbhs_get_priv(pdev);
432 int retval = usb_phy_init(priv->phy);
435 retval = usb_phy_set_suspend(priv->phy, 0);
439 usb_phy_set_suspend(priv->phy, 1);
440 usb_phy_shutdown(priv->phy);
444 static int usbhs_hardware_init(struct platform_device *pdev)
446 struct usbhs_private *priv = usbhs_get_priv(pdev);
450 /* USB0 Function - use PWEN as GPIO input to detect DIP Switch SW5
451 * setting to avoid VBUS short circuit due to wrong cable.
452 * PWEN should be pulled up high if USB Function is selected by SW5
454 gpio_request_one(RCAR_GP_PIN(5, 18), GPIOF_IN, NULL); /* USB0_PWEN */
455 if (!gpio_get_value(RCAR_GP_PIN(5, 18))) {
456 pr_warn("Error: USB Function not selected - check SW5 + SW6\n");
461 phy = usb_get_phy_dev(&pdev->dev, 0);
470 gpio_free(RCAR_GP_PIN(5, 18));
474 static int usbhs_hardware_exit(struct platform_device *pdev)
476 struct usbhs_private *priv = usbhs_get_priv(pdev);
481 usb_put_phy(priv->phy);
484 gpio_free(RCAR_GP_PIN(5, 18));
488 static int usbhs_get_id(struct platform_device *pdev)
493 static u32 lager_usbhs_pipe_type[] = {
494 USB_ENDPOINT_XFER_CONTROL,
495 USB_ENDPOINT_XFER_ISOC,
496 USB_ENDPOINT_XFER_ISOC,
497 USB_ENDPOINT_XFER_BULK,
498 USB_ENDPOINT_XFER_BULK,
499 USB_ENDPOINT_XFER_BULK,
500 USB_ENDPOINT_XFER_INT,
501 USB_ENDPOINT_XFER_INT,
502 USB_ENDPOINT_XFER_INT,
503 USB_ENDPOINT_XFER_BULK,
504 USB_ENDPOINT_XFER_BULK,
505 USB_ENDPOINT_XFER_BULK,
506 USB_ENDPOINT_XFER_BULK,
507 USB_ENDPOINT_XFER_BULK,
508 USB_ENDPOINT_XFER_BULK,
509 USB_ENDPOINT_XFER_BULK,
512 static struct usbhs_private usbhs_priv __initdata = {
514 .platform_callback = {
515 .power_ctrl = usbhs_power_ctrl,
516 .hardware_init = usbhs_hardware_init,
517 .hardware_exit = usbhs_hardware_exit,
518 .get_id = usbhs_get_id,
522 .pipe_type = lager_usbhs_pipe_type,
523 .pipe_size = ARRAY_SIZE(lager_usbhs_pipe_type),
528 static void __init lager_register_usbhs(void)
530 usb_bind_phy("renesas_usbhs", 0, "usb_phy_rcar_gen2");
531 platform_device_register_resndata(NULL,
534 ARRAY_SIZE(usbhs_resources),
536 sizeof(usbhs_priv.info));
540 static const struct rcar_gen2_phy_platform_data usbhs_phy_pdata __initconst = {
541 .chan0_pci = 0, /* Channel 0 is USBHS */
542 .chan2_pci = 1, /* Channel 2 is PCI USB */
545 static const struct resource usbhs_phy_resources[] __initconst = {
546 DEFINE_RES_MEM(0xe6590100, 0x100),
550 static struct i2c_board_info i2c2_devices[] = {
552 I2C_BOARD_INFO("ak4643", 0x12),
557 static struct resource rsnd_resources[] __initdata = {
558 [RSND_GEN2_SCU] = DEFINE_RES_MEM(0xec500000, 0x1000),
559 [RSND_GEN2_ADG] = DEFINE_RES_MEM(0xec5a0000, 0x100),
560 [RSND_GEN2_SSIU] = DEFINE_RES_MEM(0xec540000, 0x1000),
561 [RSND_GEN2_SSI] = DEFINE_RES_MEM(0xec541000, 0x1280),
564 static struct rsnd_ssi_platform_info rsnd_ssi[] = {
565 RSND_SSI(0, gic_spi(370), 0),
566 RSND_SSI(0, gic_spi(371), RSND_SSI_CLK_PIN_SHARE),
569 static struct rsnd_src_platform_info rsnd_src[2] = {
570 /* no member at this point */
573 static struct rsnd_dai_platform_info rsnd_dai = {
574 .playback = { .ssi = &rsnd_ssi[0], },
575 .capture = { .ssi = &rsnd_ssi[1], },
578 static struct rcar_snd_info rsnd_info = {
580 .ssi_info = rsnd_ssi,
581 .ssi_info_nr = ARRAY_SIZE(rsnd_ssi),
582 .src_info = rsnd_src,
583 .src_info_nr = ARRAY_SIZE(rsnd_src),
584 .dai_info = &rsnd_dai,
588 static struct asoc_simple_card_info rsnd_card_info = {
590 .card = "SSI01-AK4643",
591 .codec = "ak4642-codec.2-0012",
592 .platform = "rcar_sound",
593 .daifmt = SND_SOC_DAIFMT_LEFT_J | SND_SOC_DAIFMT_CBM_CFM,
595 .name = "rcar_sound",
598 .name = "ak4642-hifi",
603 static void __init lager_add_rsnd_device(void)
605 struct platform_device_info cardinfo = {
606 .name = "asoc-simple-card",
608 .data = &rsnd_card_info,
609 .size_data = sizeof(struct asoc_simple_card_info),
610 .dma_mask = DMA_BIT_MASK(32),
613 i2c_register_board_info(2, i2c2_devices,
614 ARRAY_SIZE(i2c2_devices));
616 platform_device_register_resndata(
617 NULL, "rcar_sound", -1,
618 rsnd_resources, ARRAY_SIZE(rsnd_resources),
619 &rsnd_info, sizeof(rsnd_info));
621 platform_device_register_full(&cardinfo);
625 static struct sh_mobile_sdhi_info sdhi0_info __initdata = {
626 .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
627 MMC_CAP_POWER_OFF_CARD,
628 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT |
629 TMIO_MMC_WRPROTECT_DISABLE,
632 static struct resource sdhi0_resources[] __initdata = {
633 DEFINE_RES_MEM(0xee100000, 0x200),
634 DEFINE_RES_IRQ(gic_spi(165)),
638 static struct sh_mobile_sdhi_info sdhi2_info __initdata = {
639 .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
640 MMC_CAP_POWER_OFF_CARD,
641 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT |
642 TMIO_MMC_WRPROTECT_DISABLE,
645 static struct resource sdhi2_resources[] __initdata = {
646 DEFINE_RES_MEM(0xee140000, 0x100),
647 DEFINE_RES_IRQ(gic_spi(167)),
651 static const struct resource pci1_resources[] __initconst = {
652 DEFINE_RES_MEM(0xee0b0000, 0x10000), /* CFG */
653 DEFINE_RES_MEM(0xee0a0000, 0x10000), /* MEM */
654 DEFINE_RES_IRQ(gic_spi(112)),
657 static const struct platform_device_info pci1_info __initconst = {
658 .name = "pci-rcar-gen2",
660 .res = pci1_resources,
661 .num_res = ARRAY_SIZE(pci1_resources),
662 .dma_mask = DMA_BIT_MASK(32),
665 static void __init lager_add_usb1_device(void)
667 platform_device_register_full(&pci1_info);
671 static const struct resource pci2_resources[] __initconst = {
672 DEFINE_RES_MEM(0xee0d0000, 0x10000), /* CFG */
673 DEFINE_RES_MEM(0xee0c0000, 0x10000), /* MEM */
674 DEFINE_RES_IRQ(gic_spi(113)),
677 static const struct platform_device_info pci2_info __initconst = {
678 .name = "pci-rcar-gen2",
680 .res = pci2_resources,
681 .num_res = ARRAY_SIZE(pci2_resources),
682 .dma_mask = DMA_BIT_MASK(32),
685 static void __init lager_add_usb2_device(void)
687 platform_device_register_full(&pci2_info);
690 static const struct pinctrl_map lager_pinctrl_map[] = {
691 /* DU (CN10: ARGB0, CN13: LVDS) */
692 PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7790", "pfc-r8a7790",
694 PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7790", "pfc-r8a7790",
696 PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7790", "pfc-r8a7790",
697 "du_clk_out_0", "du"),
699 PIN_MAP_MUX_GROUP_DEFAULT("i2c-rcar.2", "pfc-r8a7790",
702 PIN_MAP_MUX_GROUP_DEFAULT("qspi.0", "pfc-r8a7790",
703 "qspi_ctrl", "qspi"),
704 PIN_MAP_MUX_GROUP_DEFAULT("qspi.0", "pfc-r8a7790",
705 "qspi_data4", "qspi"),
706 /* SCIF0 (CN19: DEBUG SERIAL0) */
707 PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.6", "pfc-r8a7790",
708 "scif0_data", "scif0"),
709 /* SCIF1 (CN20: DEBUG SERIAL1) */
710 PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.7", "pfc-r8a7790",
711 "scif1_data", "scif1"),
713 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7790",
714 "sdhi0_data4", "sdhi0"),
715 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7790",
716 "sdhi0_ctrl", "sdhi0"),
717 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7790",
718 "sdhi0_cd", "sdhi0"),
720 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.2", "pfc-r8a7790",
721 "sdhi2_data4", "sdhi2"),
722 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.2", "pfc-r8a7790",
723 "sdhi2_ctrl", "sdhi2"),
724 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.2", "pfc-r8a7790",
725 "sdhi2_cd", "sdhi2"),
726 /* SSI (CN17: sound) */
727 PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7790",
728 "ssi0129_ctrl", "ssi"),
729 PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7790",
731 PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7790",
733 PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7790",
734 "audio_clk_a", "audio_clk"),
736 PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.1", "pfc-r8a7790",
737 "mmc1_data8", "mmc1"),
738 PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.1", "pfc-r8a7790",
739 "mmc1_ctrl", "mmc1"),
741 PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790",
743 PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790",
745 PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790",
747 PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790",
748 "intc_irq0", "intc"),
750 PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.0", "pfc-r8a7790",
751 "vin0_data24", "vin0"),
752 PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.0", "pfc-r8a7790",
753 "vin0_sync", "vin0"),
754 PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.0", "pfc-r8a7790",
755 "vin0_field", "vin0"),
756 PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.0", "pfc-r8a7790",
757 "vin0_clkenb", "vin0"),
758 PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.0", "pfc-r8a7790",
761 PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.1", "pfc-r8a7790",
762 "vin1_data8", "vin1"),
763 PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.1", "pfc-r8a7790",
766 PIN_MAP_MUX_GROUP_DEFAULT("renesas_usbhs", "pfc-r8a7790",
767 "usb0_ovc_vbus", "usb0"),
769 PIN_MAP_MUX_GROUP_DEFAULT("pci-rcar-gen2.1", "pfc-r8a7790",
772 PIN_MAP_MUX_GROUP_DEFAULT("pci-rcar-gen2.2", "pfc-r8a7790",
776 static void __init lager_add_standard_devices(void)
778 int fixed_regulator_idx = 0;
779 int gpio_regulator_idx = 0;
781 r8a7790_clock_init();
783 pinctrl_register_mappings(lager_pinctrl_map,
784 ARRAY_SIZE(lager_pinctrl_map));
785 r8a7790_pinmux_init();
787 r8a7790_add_standard_devices();
788 platform_device_register_data(NULL, "leds-gpio", -1,
790 sizeof(lager_leds_pdata));
791 platform_device_register_data(NULL, "gpio-keys", -1,
793 sizeof(lager_keys_pdata));
794 regulator_register_always_on(fixed_regulator_idx++,
795 "fixed-3.3V", fixed3v3_power_consumers,
796 ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
797 platform_device_register_resndata(NULL, "sh_mmcif", 1,
798 mmcif1_resources, ARRAY_SIZE(mmcif1_resources),
799 &mmcif1_pdata, sizeof(mmcif1_pdata));
801 platform_device_register_full(ðer_info);
803 lager_add_du_device();
805 platform_device_register_resndata(NULL, "qspi", 0,
807 ARRAY_SIZE(qspi_resources),
808 &qspi_pdata, sizeof(qspi_pdata));
809 spi_register_board_info(spi_info, ARRAY_SIZE(spi_info));
811 platform_device_register_data(NULL, "reg-fixed-voltage", fixed_regulator_idx++,
812 &vcc_sdhi0_info, sizeof(struct fixed_voltage_config));
813 platform_device_register_data(NULL, "reg-fixed-voltage", fixed_regulator_idx++,
814 &vcc_sdhi2_info, sizeof(struct fixed_voltage_config));
816 platform_device_register_data(NULL, "gpio-regulator", gpio_regulator_idx++,
817 &vccq_sdhi0_info, sizeof(struct gpio_regulator_config));
818 platform_device_register_data(NULL, "gpio-regulator", gpio_regulator_idx++,
819 &vccq_sdhi2_info, sizeof(struct gpio_regulator_config));
821 lager_add_camera1_device();
823 platform_device_register_full(&sata1_info);
825 platform_device_register_resndata(NULL, "usb_phy_rcar_gen2",
826 -1, usbhs_phy_resources,
827 ARRAY_SIZE(usbhs_phy_resources),
829 sizeof(usbhs_phy_pdata));
830 lager_register_usbhs();
831 lager_add_usb1_device();
832 lager_add_usb2_device();
834 lager_add_rsnd_device();
836 platform_device_register_resndata(NULL, "sh_mobile_sdhi", 0,
837 sdhi0_resources, ARRAY_SIZE(sdhi0_resources),
838 &sdhi0_info, sizeof(struct sh_mobile_sdhi_info));
839 platform_device_register_resndata(NULL, "sh_mobile_sdhi", 2,
840 sdhi2_resources, ARRAY_SIZE(sdhi2_resources),
841 &sdhi2_info, sizeof(struct sh_mobile_sdhi_info));
845 * Ether LEDs on the Lager board are named LINK and ACTIVE which corresponds
846 * to non-default 01 setting of the Micrel KSZ8041 PHY control register 1 bits
847 * 14-15. We have to set them back to 01 from the default 00 value each time
848 * the PHY is reset. It's also important because the PHY's LED0 signal is
849 * connected to SoC's ETH_LINK signal and in the PHY's default mode it will
850 * bounce on and off after each packet, which we apparently want to avoid.
852 static int lager_ksz8041_fixup(struct phy_device *phydev)
854 u16 phyctrl1 = phy_read(phydev, 0x1e);
858 return phy_write(phydev, 0x1e, phyctrl1);
861 static void __init lager_init(void)
863 lager_add_standard_devices();
865 irq_set_irq_type(irq_pin(0), IRQ_TYPE_LEVEL_LOW);
867 if (IS_ENABLED(CONFIG_PHYLIB))
868 phy_register_fixup_for_id("r8a7790-ether-ff:01",
869 lager_ksz8041_fixup);
872 static const char * const lager_boards_compat_dt[] __initconst = {
877 DT_MACHINE_START(LAGER_DT, "lager")
878 .smp = smp_ops(r8a7790_smp_ops),
879 .init_early = shmobile_init_delay,
880 .init_time = rcar_gen2_timer_init,
881 .init_machine = lager_init,
882 .init_late = shmobile_init_late,
883 .reserve = rcar_gen2_reserve,
884 .dt_compat = lager_boards_compat_dt,