1 /* linux/arch/arm/mach-s5pv310/irq-eint.c
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
6 * S5PV310 - IRQ EINT support
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <linux/kernel.h>
14 #include <linux/interrupt.h>
15 #include <linux/irq.h>
17 #include <linux/sysdev.h>
18 #include <linux/gpio.h>
22 #include <plat/gpio-cfg.h>
24 #include <mach/regs-gpio.h>
26 static DEFINE_SPINLOCK(eint_lock);
28 static unsigned int eint0_15_data[16];
30 static unsigned int s5pv310_get_irq_nr(unsigned int number)
36 ret = (number + IRQ_EINT0);
39 ret = (number + (IRQ_EINT4 - 4));
42 ret = (number + (IRQ_EINT8 - 8));
45 printk(KERN_ERR "number available : %d\n", number);
51 static inline void s5pv310_irq_eint_mask(unsigned int irq)
55 spin_lock(&eint_lock);
56 mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(irq)));
57 mask |= eint_irq_to_bit(irq);
58 __raw_writel(mask, S5P_EINT_MASK(EINT_REG_NR(irq)));
59 spin_unlock(&eint_lock);
62 static void s5pv310_irq_eint_unmask(unsigned int irq)
66 spin_lock(&eint_lock);
67 mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(irq)));
68 mask &= ~(eint_irq_to_bit(irq));
69 __raw_writel(mask, S5P_EINT_MASK(EINT_REG_NR(irq)));
70 spin_unlock(&eint_lock);
73 static inline void s5pv310_irq_eint_ack(unsigned int irq)
75 __raw_writel(eint_irq_to_bit(irq), S5P_EINT_PEND(EINT_REG_NR(irq)));
78 static void s5pv310_irq_eint_maskack(unsigned int irq)
80 s5pv310_irq_eint_mask(irq);
81 s5pv310_irq_eint_ack(irq);
84 static int s5pv310_irq_eint_set_type(unsigned int irq, unsigned int type)
86 int offs = EINT_OFFSET(irq);
92 case IRQ_TYPE_EDGE_RISING:
93 newvalue = S5P_IRQ_TYPE_EDGE_RISING;
96 case IRQ_TYPE_EDGE_FALLING:
97 newvalue = S5P_IRQ_TYPE_EDGE_FALLING;
100 case IRQ_TYPE_EDGE_BOTH:
101 newvalue = S5P_IRQ_TYPE_EDGE_BOTH;
104 case IRQ_TYPE_LEVEL_LOW:
105 newvalue = S5P_IRQ_TYPE_LEVEL_LOW;
108 case IRQ_TYPE_LEVEL_HIGH:
109 newvalue = S5P_IRQ_TYPE_LEVEL_HIGH;
113 printk(KERN_ERR "No such irq type %d", type);
117 shift = (offs & 0x7) * 4;
120 spin_lock(&eint_lock);
121 ctrl = __raw_readl(S5P_EINT_CON(EINT_REG_NR(irq)));
123 ctrl |= newvalue << shift;
124 __raw_writel(ctrl, S5P_EINT_CON(EINT_REG_NR(irq)));
125 spin_unlock(&eint_lock);
129 s3c_gpio_cfgpin(EINT_GPIO_0(offs & 0x7), EINT_MODE);
132 s3c_gpio_cfgpin(EINT_GPIO_1(offs & 0x7), EINT_MODE);
135 s3c_gpio_cfgpin(EINT_GPIO_2(offs & 0x7), EINT_MODE);
138 s3c_gpio_cfgpin(EINT_GPIO_3(offs & 0x7), EINT_MODE);
141 printk(KERN_ERR "No such irq number %d", offs);
147 static struct irq_chip s5pv310_irq_eint = {
148 .name = "s5pv310-eint",
149 .mask = s5pv310_irq_eint_mask,
150 .unmask = s5pv310_irq_eint_unmask,
151 .mask_ack = s5pv310_irq_eint_maskack,
152 .ack = s5pv310_irq_eint_ack,
153 .set_type = s5pv310_irq_eint_set_type,
155 .set_wake = s3c_irqext_wake,
159 /* s5pv310_irq_demux_eint
161 * This function demuxes the IRQ from from EINTs 16 to 31.
162 * It is designed to be inlined into the specific handler
163 * s5p_irq_demux_eintX_Y.
165 * Each EINT pend/mask registers handle eight of them.
167 static inline void s5pv310_irq_demux_eint(unsigned int start)
171 u32 status = __raw_readl(S5P_EINT_PEND(EINT_REG_NR(start)));
172 u32 mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(start)));
178 irq = fls(status) - 1;
179 generic_handle_irq(irq + start);
180 status &= ~(1 << irq);
184 static void s5pv310_irq_demux_eint16_31(unsigned int irq, struct irq_desc *desc)
186 s5pv310_irq_demux_eint(IRQ_EINT(16));
187 s5pv310_irq_demux_eint(IRQ_EINT(24));
190 static void s5pv310_irq_eint0_15(unsigned int irq, struct irq_desc *desc)
192 u32 *irq_data = get_irq_data(irq);
193 struct irq_chip *chip = get_irq_chip(irq);
200 generic_handle_irq(*irq_data);
205 int __init s5pv310_init_irq_eint(void)
209 for (irq = 0 ; irq <= 31 ; irq++) {
210 set_irq_chip(IRQ_EINT(irq), &s5pv310_irq_eint);
211 set_irq_handler(IRQ_EINT(irq), handle_level_irq);
212 set_irq_flags(IRQ_EINT(irq), IRQF_VALID);
215 set_irq_chained_handler(IRQ_EINT16_31, s5pv310_irq_demux_eint16_31);
217 for (irq = 0 ; irq <= 15 ; irq++) {
218 eint0_15_data[irq] = IRQ_EINT(irq);
220 set_irq_data(s5pv310_get_irq_nr(irq), &eint0_15_data[irq]);
221 set_irq_chained_handler(s5pv310_get_irq_nr(irq),
222 s5pv310_irq_eint0_15);
228 arch_initcall(s5pv310_init_irq_eint);