1 /* linux/arch/arm/mach-s3c64xx/mach-anw6410.c
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
7 * Copyright 2009 Kwangwoo Lee
8 * Kwangwoo Lee <kwangwoo.lee@gmail.com>
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
16 #include <linux/kernel.h>
17 #include <linux/types.h>
18 #include <linux/interrupt.h>
19 #include <linux/list.h>
20 #include <linux/timer.h>
21 #include <linux/init.h>
22 #include <linux/serial_core.h>
23 #include <linux/serial_s3c.h>
24 #include <linux/platform_device.h>
26 #include <linux/i2c.h>
28 #include <linux/gpio.h>
29 #include <linux/delay.h>
30 #include <linux/dm9000.h>
32 #include <video/platform_lcd.h>
33 #include <video/samsung_fimd.h>
35 #include <asm/mach/arch.h>
36 #include <asm/mach/map.h>
37 #include <asm/mach/irq.h>
39 #include <mach/hardware.h>
43 #include <asm/mach-types.h>
45 #include <linux/platform_data/i2c-s3c2410.h>
48 #include <plat/devs.h>
50 #include <mach/regs-gpio.h>
51 #include <mach/gpio-samsung.h>
52 #include <plat/samsung-time.h>
55 #include "regs-modem.h"
58 #define ANW6410_PA_DM9000 (0x18000000)
60 /* A hardware buffer to control external devices is mapped at 0x30000000.
61 * It can not be read. So current status must be kept in anw6410_extdev_status.
63 #define ANW6410_VA_EXTDEV S3C_ADDR(0x02000000)
64 #define ANW6410_PA_EXTDEV (0x30000000)
66 #define ANW6410_EN_DM9000 (1<<11)
67 #define ANW6410_EN_LCD (1<<14)
69 static __u32 anw6410_extdev_status;
71 static struct s3c2410_uartcfg anw6410_uartcfgs[] __initdata = {
88 /* framebuffer and LCD setup. */
89 static void __init anw6410_lcd_mode_set(void)
93 /* set the LCD type */
94 tmp = __raw_readl(S3C64XX_SPCON);
95 tmp &= ~S3C64XX_SPCON_LCD_SEL_MASK;
96 tmp |= S3C64XX_SPCON_LCD_SEL_RGB;
97 __raw_writel(tmp, S3C64XX_SPCON);
99 /* remove the LCD bypass */
100 tmp = __raw_readl(S3C64XX_MODEM_MIFPCON);
101 tmp &= ~MIFPCON_LCD_BYPASS;
102 __raw_writel(tmp, S3C64XX_MODEM_MIFPCON);
105 /* GPF1 = LCD panel power
106 * GPF4 = LCD backlight control
108 static void anw6410_lcd_power_set(struct plat_lcd_data *pd,
112 anw6410_extdev_status |= (ANW6410_EN_LCD << 16);
113 __raw_writel(anw6410_extdev_status, ANW6410_VA_EXTDEV);
115 gpio_direction_output(S3C64XX_GPF(1), 1);
116 gpio_direction_output(S3C64XX_GPF(4), 1);
118 anw6410_extdev_status &= ~(ANW6410_EN_LCD << 16);
119 __raw_writel(anw6410_extdev_status, ANW6410_VA_EXTDEV);
121 gpio_direction_output(S3C64XX_GPF(1), 0);
122 gpio_direction_output(S3C64XX_GPF(4), 0);
126 static struct plat_lcd_data anw6410_lcd_power_data = {
127 .set_power = anw6410_lcd_power_set,
130 static struct platform_device anw6410_lcd_powerdev = {
131 .name = "platform-lcd",
132 .dev.parent = &s3c_device_fb.dev,
133 .dev.platform_data = &anw6410_lcd_power_data,
136 static struct s3c_fb_pd_win anw6410_fb_win0 = {
143 static struct fb_videomode anw6410_lcd_timing = {
154 /* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
155 static struct s3c_fb_platdata anw6410_lcd_pdata __initdata = {
156 .setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
157 .vtiming = &anw6410_lcd_timing,
158 .win[0] = &anw6410_fb_win0,
159 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
160 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
163 /* DM9000AEP 10/100 ethernet controller */
164 static void __init anw6410_dm9000_enable(void)
166 anw6410_extdev_status |= (ANW6410_EN_DM9000 << 16);
167 __raw_writel(anw6410_extdev_status, ANW6410_VA_EXTDEV);
170 static struct resource anw6410_dm9000_resource[] = {
171 [0] = DEFINE_RES_MEM(ANW6410_PA_DM9000, 4),
172 [1] = DEFINE_RES_MEM(ANW6410_PA_DM9000 + 4, 501),
173 [2] = DEFINE_RES_NAMED(IRQ_EINT(15), 1, NULL, IORESOURCE_IRQ \
174 | IRQF_TRIGGER_HIGH),
177 static struct dm9000_plat_data anw6410_dm9000_pdata = {
178 .flags = (DM9000_PLATF_16BITONLY | DM9000_PLATF_NO_EEPROM),
179 /* dev_addr can be set to provide hwaddr. */
182 static struct platform_device anw6410_device_eth = {
185 .num_resources = ARRAY_SIZE(anw6410_dm9000_resource),
186 .resource = anw6410_dm9000_resource,
188 .platform_data = &anw6410_dm9000_pdata,
192 static struct map_desc anw6410_iodesc[] __initdata = {
194 .virtual = (unsigned long)ANW6410_VA_EXTDEV,
195 .pfn = __phys_to_pfn(ANW6410_PA_EXTDEV),
201 static struct platform_device *anw6410_devices[] __initdata = {
203 &anw6410_lcd_powerdev,
207 static void __init anw6410_map_io(void)
209 s3c64xx_init_io(anw6410_iodesc, ARRAY_SIZE(anw6410_iodesc));
210 s3c64xx_set_xtal_freq(12000000);
211 s3c24xx_init_uarts(anw6410_uartcfgs, ARRAY_SIZE(anw6410_uartcfgs));
212 samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4);
214 anw6410_lcd_mode_set();
217 static void __init anw6410_machine_init(void)
219 s3c_fb_set_platdata(&anw6410_lcd_pdata);
221 gpio_request(S3C64XX_GPF(1), "panel power");
222 gpio_request(S3C64XX_GPF(4), "LCD backlight");
224 anw6410_dm9000_enable();
226 platform_add_devices(anw6410_devices, ARRAY_SIZE(anw6410_devices));
229 MACHINE_START(ANW6410, "A&W6410")
230 /* Maintainer: Kwangwoo Lee <kwangwoo.lee@gmail.com> */
231 .atag_offset = 0x100,
233 .init_irq = s3c6410_init_irq,
234 .map_io = anw6410_map_io,
235 .init_machine = anw6410_machine_init,
236 .init_time = samsung_timer_init,
237 .restart = s3c64xx_restart,