2 * arch/arm/mach-rockchip/psci.c
4 * PSCI call interface for rockchip
6 * Copyright (C) 2015 ROCKCHIP, Inc.
8 * This software is licensed under the terms of the GNU General Public
9 * License version 2, as published by the Free Software Foundation, and
10 * may be copied, distributed, and modified under those terms.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
19 #include <linux/types.h>
20 #include <linux/rockchip/psci.h>
21 #include <asm/compiler.h>
22 #include <asm/smp_plat.h>
24 #include <asm/opcodes-sec.h>
28 * SMC32 id call made from arch32 or arch64
30 static u32 reg_rd_fn_smc(u32 function_id, u32 arg0, u32 arg1,
47 : "+r" (function_id), "+r" (arg0)
48 : "r" (arg1), "r" (arg2));
58 * SMC32 id call made from arch32 or arch64
60 static u32 reg_wr_fn_smc(u32 function_id, u32 arg0,
77 : "+r" (function_id), "+r" (arg0)
78 : "r" (arg1), "r" (arg2));
83 static u32 (*reg_wr_fn)(u32, u32, u32, u32) = reg_wr_fn_smc;
84 static u32 (*reg_rd_fn)(u32, u32, u32, u32, u32 *) = reg_rd_fn_smc;
90 * SMC64 id call only made from arch64
92 static u32 reg_rd_fn_smc64(u64 function_id, u64 arg0, u64 arg1, u64 arg2,
101 : "+r" (function_id), "+r" (arg0)
102 : "r" (arg1), "r" (arg2));
111 * SMC64 id call only made from Arch64
113 static u32 reg_wr_fn_smc64(u64 function_id, u64 arg0, u64 arg1, u64 arg2)
121 : "+r" (function_id), "+r" (arg0)
122 : "r" (arg1), "r" (arg2));
127 static u32 (*reg_wr_fn64)(u64, u64, u64, u64) = reg_wr_fn_smc64;
128 static u32 (*reg_rd_fn64)(u64, u64, u64, u64, u64 *) = reg_rd_fn_smc64;
130 u32 rockchip_psci_smc_read64(u64 function_id, u64 arg0, u64 arg1, u64 arg2,
133 return reg_rd_fn64(function_id, arg0, arg1, arg2, val);
136 u32 rockchip_psci_smc_write64(u64 function_id, u64 arg0, u64 arg1, u64 arg2)
138 return reg_wr_fn64(function_id, arg0, arg1, arg2);
141 u64 rockchip_secure_reg_read64(u64 addr_phy)
145 reg_rd_fn64(PSCI_SIP_ACCESS_REG64, 0, addr_phy, SEC_REG_RD, &val);
150 u32 rockchip_secure_reg_write64(u64 addr_phy, u64 val)
152 return reg_wr_fn64(PSCI_SIP_ACCESS_REG64, val, addr_phy, SEC_REG_WR);
155 #endif /*CONFIG_ARM64*/
157 u32 rockchip_psci_smc_read(u32 function_id, u32 arg0, u32 arg1, u32 arg2,
160 return reg_rd_fn(function_id, arg0, arg1, arg2, val);
163 u32 rockchip_psci_smc_write(u32 function_id, u32 arg0, u32 arg1, u32 arg2)
165 return reg_wr_fn(function_id, arg0, arg1, arg2);
168 u32 rockchip_secure_reg_read(u32 addr_phy)
172 reg_rd_fn(PSCI_SIP_ACCESS_REG, 0, addr_phy, SEC_REG_RD, &val);
177 u32 rockchip_secure_reg_write(u32 addr_phy, u32 val)
179 return reg_wr_fn(PSCI_SIP_ACCESS_REG, val, addr_phy, SEC_REG_WR);
183 * get trust firmware verison
185 u32 rockchip_psci_smc_get_tf_ver(void)
187 return reg_rd_fn(PSCI_SIP_RKTF_VER, 0, 0, 0, NULL);
190 u32 psci_set_memory_secure(bool val)
192 return reg_wr_fn(PSCI_SIP_SMEM_CONFIG, val, 0, 0);
195 /*************************** fiq debug *****************************/
197 static u64 ft_fiq_mem_phy;
198 static void __iomem *ft_fiq_mem_base;
199 static void (*psci_fiq_debugger_uart_irq_tf)(void *reg_base, u64 sp_el1);
201 void psci_fiq_debugger_uart_irq_tf_cb(u64 sp_el1, u64 offset)
203 psci_fiq_debugger_uart_irq_tf((char *)ft_fiq_mem_base + offset, sp_el1);
204 reg_wr_fn64(PSCI_SIP_UARTDBG_CFG64, 0, 0, UARTDBG_CFG_OSHDL_TO_OS);
207 void psci_fiq_debugger_uart_irq_tf_init(u32 irq_id, void *callback)
209 psci_fiq_debugger_uart_irq_tf = callback;
210 ft_fiq_mem_phy = reg_wr_fn64(PSCI_SIP_UARTDBG_CFG64, irq_id,
211 (u64)psci_fiq_debugger_uart_irq_tf_cb,
213 ft_fiq_mem_base = ioremap(ft_fiq_mem_phy, 8 * 1024);
216 u32 psci_fiq_debugger_switch_cpu(u32 cpu)
218 return reg_wr_fn64(PSCI_SIP_UARTDBG_CFG64, cpu_logical_map(cpu),
219 0, UARTDBG_CFG_OSHDL_CPUSW);
222 void psci_fiq_debugger_enable_debug(bool val)
225 reg_wr_fn64(PSCI_SIP_UARTDBG_CFG64, 0,
226 0, UARTDBG_CFG_OSHDL_DEBUG_ENABLE);
228 reg_wr_fn64(PSCI_SIP_UARTDBG_CFG64, 0,
229 0, UARTDBG_CFG_OSHDL_DEBUG_DISABLE);