arch/arm/mach-rockchip/ddr_freq.c

   1 #define pr_fmt(fmt) "ddrfreq: " fmt
   2 #define DEBUG
   3 #include <linux/clk.h>
   4 #include <linux/fb.h>
   5 #include <linux/cpu.h>
   6 #include <linux/cpufreq.h>
   7 #include <linux/delay.h>
   8 #include <linux/freezer.h>
   9 #include <linux/fs.h>
  10 #include <linux/kthread.h>
  11 #include <linux/miscdevice.h>
  12 #include <linux/module.h>
  13 #include <linux/reboot.h>
  14 #include <linux/slab.h>
  15 #include <linux/uaccess.h>
  16 #include <linux/sched/rt.h>
  17 #include <linux/of.h>
  18 #include <linux/fb.h>
  19 #include <linux/input.h>
  20 #include <asm/cacheflush.h>
  21 #include <asm/tlbflush.h>
  22 #include <linux/vmalloc.h>
  23 #include <linux/rockchip/common.h>
  24 #include <linux/rockchip/dvfs.h>
  25 #include <dt-bindings/clock/ddr.h>
  26 #include <asm/io.h>
  27 #include <linux/rockchip/grf.h>
  28 #include <linux/rockchip/iomap.h>
  29 #include <linux/clk-private.h>
  30 #include "../../../drivers/clk/rockchip/clk-pd.h"
  31
  32 extern int rockchip_cpufreq_reboot_limit_freq(void);
  33
  34 static struct dvfs_node *clk_cpu_dvfs_node = NULL;
  35 static int reboot_config_done = 0;
  36 static int ddr_boost = 0;
  37 static int print=0;
  38 static int watch=0;
  39 static int high_load = 70;
  40 static int low_load = 60;
  41 static int auto_freq_interval_ms = 20;
  42 static int high_load_last_ms = 0;
  43 static int low_load_last_ms = 200;
  44 static unsigned long *auto_freq_table = NULL;
  45 static int cur_freq_index;
  46 static int auto_freq_table_size;
  47
  48 enum {
  49         DEBUG_DDR = 1U << 0,
  50         DEBUG_VIDEO_STATE = 1U << 1,
  51         DEBUG_SUSPEND = 1U << 2,
  52         DEBUG_VERBOSE = 1U << 3,
  53 };
  54 static int debug_mask = DEBUG_DDR;
  55
  56 module_param(debug_mask, int, S_IRUGO | S_IWUSR | S_IWGRP);
  57 #define dprintk(mask, fmt, ...) do { if (mask & debug_mask) pr_debug(fmt, ##__VA_ARGS__); } while (0)
  58
  59 enum ddr_bandwidth_id{
  60     ddrbw_wr_num=0,
  61     ddrbw_rd_num,
  62     ddrbw_act_num,
  63     ddrbw_time_num,
  64     ddrbw_eff,
  65     ddrbw_id_end
  66 };
  67
  68 #define  ddr_monitor_start() grf_writel((((readl_relaxed(RK_PMU_VIRT + 0x9c)>>13)&7)==3)?0xc000c000:0xe000e000,RK3288_GRF_SOC_CON4)
  69 #define  ddr_monitor_stop() grf_writel(0xc0000000,RK3288_GRF_SOC_CON4)
  70
  71 #define grf_readl(offset)       readl_relaxed(RK_GRF_VIRT + offset)
  72 #define grf_writel(v, offset)   do { writel_relaxed(v, RK_GRF_VIRT + offset); dsb(); } while (0)
  73
  74
  75 #define MHZ     (1000*1000)
  76 #define KHZ     1000
  77
  78 struct video_info {
  79         int width;
  80         int height;
  81         int ishevc;
  82         int videoFramerate;
  83         int streamBitrate;
  84
  85         struct list_head node;
  86 };
  87
  88 struct ddr {
  89         struct dvfs_node *clk_dvfs_node;
  90         struct list_head video_info_list;
  91         unsigned long normal_rate;
  92         unsigned long video_1080p_rate;
  93         unsigned long video_4k_rate;
  94         unsigned long performance_rate;
  95         unsigned long dualview_rate;
  96         unsigned long idle_rate;
  97         unsigned long suspend_rate;
  98         unsigned long reboot_rate;
  99         unsigned long boost_rate;
 100         unsigned long isp_rate;
 101         bool auto_freq;
 102         bool auto_self_refresh;
 103         char *mode;
 104         unsigned long sys_status;
 105         struct task_struct *task;
 106         wait_queue_head_t wait;
 107 };
 108 static struct ddr ddr;
 109
 110 module_param_named(sys_status, ddr.sys_status, ulong, S_IRUGO);
 111 module_param_named(auto_self_refresh, ddr.auto_self_refresh, bool, S_IRUGO);
 112 module_param_named(mode, ddr.mode, charp, S_IRUGO);
 113
 114 static unsigned long get_freq_from_table(unsigned long freq)
 115 {
 116         int i;
 117
 118         if (!auto_freq_table)
 119                 return 0;
 120
 121         for (i = 0; auto_freq_table[i] != 0; i++) {
 122                 if (auto_freq_table[i] >= freq) {
 123                         return auto_freq_table[i];
 124                 }
 125         }
 126
 127         return auto_freq_table[i-1];
 128 }
 129
 130 static unsigned long get_index_from_table(unsigned long freq)
 131 {
 132         int i;
 133
 134         if (!auto_freq_table)
 135                 return 0;
 136
 137         for (i = 0; auto_freq_table[i] != 0; i++) {
 138                 if (auto_freq_table[i] >= freq) {
 139                         return i;
 140                 }
 141         }
 142         return i-1;
 143 }
 144
 145
 146 static noinline void ddrfreq_set_sys_status(int status)
 147 {
 148         ddr.sys_status |= status;
 149         wake_up(&ddr.wait);
 150 }
 151
 152 static noinline void ddrfreq_clear_sys_status(int status)
 153 {
 154         ddr.sys_status &= ~status;
 155         wake_up(&ddr.wait);
 156 }
 157
 158 static void ddrfreq_mode(bool auto_self_refresh, unsigned long *target_rate, char *name)
 159 {
 160         unsigned int min_rate, max_rate;
 161         int freq_limit_en;
 162
 163         ddr.mode = name;
 164         if (auto_self_refresh != ddr.auto_self_refresh) {
 165                 ddr_set_auto_self_refresh(auto_self_refresh);
 166                 ddr.auto_self_refresh = auto_self_refresh;
 167                 dprintk(DEBUG_DDR, "change auto self refresh to %d when %s\n", auto_self_refresh, name);
 168         }
 169
 170         cur_freq_index = get_index_from_table(*target_rate);
 171
 172         if (*target_rate != dvfs_clk_get_rate(ddr.clk_dvfs_node)) {
 173                 freq_limit_en = dvfs_clk_get_limit(clk_cpu_dvfs_node, &min_rate, &max_rate);
 174
 175                 dvfs_clk_enable_limit(clk_cpu_dvfs_node, 600000000, -1);
 176                 if (dvfs_clk_set_rate(ddr.clk_dvfs_node, *target_rate) == 0) {
 177                         *target_rate = dvfs_clk_get_rate(ddr.clk_dvfs_node);
 178                         dprintk(DEBUG_DDR, "change freq to %lu MHz when %s\n", *target_rate / MHZ, name);
 179                 }
 180
 181                 if (freq_limit_en) {
 182                         dvfs_clk_enable_limit(clk_cpu_dvfs_node, min_rate, max_rate);
 183                 } else {
 184                         dvfs_clk_disable_limit(clk_cpu_dvfs_node);
 185                 }
 186         }
 187 }
 188
 189 void ddr_bandwidth_get(u32 *ch0_eff, u32 *ch1_eff)
 190 {
 191         u32 ddr_bw_val[2][ddrbw_id_end];
 192         u64 temp64;
 193         int i, j;
 194
 195         for(j = 0; j < 2; j++) {
 196                 for(i = 0; i < ddrbw_eff; i++ ){
 197                         ddr_bw_val[j][i] = grf_readl(RK3288_GRF_SOC_STATUS11+i*4+j*16);
 198                 }
 199         }
 200
 201         temp64 = ((u64)ddr_bw_val[0][0]+ddr_bw_val[0][1])*4*100;
 202         do_div(temp64, ddr_bw_val[0][ddrbw_time_num]);
 203         ddr_bw_val[0][ddrbw_eff] = temp64;
 204         *ch0_eff = temp64;
 205
 206         temp64 = ((u64)ddr_bw_val[1][0]+ddr_bw_val[1][1])*4*100;
 207         do_div(temp64, ddr_bw_val[1][ddrbw_time_num]);
 208         ddr_bw_val[1][ddrbw_eff] = temp64;
 209         *ch1_eff = temp64;
 210 }
 211
 212 static void ddr_auto_freq(void)
 213 {
 214         unsigned long freq;
 215         u32 ch0_eff, ch1_eff, max_eff;
 216         static u32 high_load_last = 0, low_load_last = 0;
 217
 218         freq = dvfs_clk_get_rate(ddr.clk_dvfs_node);
 219
 220         ddr_monitor_stop();
 221         ddr_bandwidth_get(&ch0_eff, &ch1_eff);
 222         max_eff = (ch0_eff > ch1_eff) ? ch0_eff : ch1_eff;
 223
 224         if (watch) {
 225                 printk("%d %d\n", ch0_eff, ch1_eff);
 226                 ddr_monitor_start();
 227                 return;
 228         }
 229
 230         if (print) {
 231                 printk("%d %d\n", ch0_eff, ch1_eff);
 232         }
 233
 234         if (ddr_boost) {
 235                 ddr_boost = 0;
 236                 if (freq < ddr.boost_rate) {
 237                         low_load_last = low_load_last_ms/auto_freq_interval_ms;
 238                         freq = ddr.boost_rate;
 239                         ddrfreq_mode(false, &freq, "boost");
 240                 }
 241         } else if(max_eff > high_load){
 242                 low_load_last = low_load_last_ms/auto_freq_interval_ms;
 243                 if (!high_load_last) {
 244                         if (cur_freq_index < auto_freq_table_size-1) {
 245                                 freq = auto_freq_table[cur_freq_index+1];
 246                                 ddrfreq_mode(false, &freq, "high load");
 247                         }
 248                 } else {
 249                         high_load_last--;
 250                 }
 251         } else if (max_eff < low_load){
 252                 high_load_last = high_load_last_ms/auto_freq_interval_ms;
 253                 if (!low_load_last) {
 254                         freq = max_eff*(freq/low_load);
 255                         freq = get_freq_from_table(freq);
 256                         ddrfreq_mode(false, &freq, "low load");
 257                 } else {
 258                         low_load_last--;
 259                 }
 260         }
 261
 262         ddr_monitor_start();
 263 }
 264
 265 static noinline long ddrfreq_work(unsigned long sys_status)
 266 {
 267         static struct clk *cpu = NULL;
 268         static struct clk *gpu = NULL;
 269         long timeout = MAX_SCHEDULE_TIMEOUT;
 270         unsigned long s = sys_status;
 271
 272         if (!cpu)
 273                 cpu = clk_get(NULL, "cpu");
 274         if (!gpu)
 275                 gpu = clk_get(NULL, "gpu");
 276
 277         dprintk(DEBUG_VERBOSE, "sys_status %02lx\n", sys_status);
 278
 279         if (ddr.reboot_rate && (s & SYS_STATUS_REBOOT)) {
 280                 ddrfreq_mode(false, &ddr.reboot_rate, "shutdown/reboot");
 281                 rockchip_cpufreq_reboot_limit_freq();
 282                 reboot_config_done = 1;
 283         } else if (ddr.suspend_rate && (s & SYS_STATUS_SUSPEND)) {
 284                 ddrfreq_mode(true, &ddr.suspend_rate, "suspend");
 285         } else if (ddr.dualview_rate &&
 286                 (s & SYS_STATUS_LCDC0) && (s & SYS_STATUS_LCDC1)) {
 287                 ddrfreq_mode(false, &ddr.dualview_rate, "dual-view");
 288         } else if (ddr.video_1080p_rate && (s & SYS_STATUS_VIDEO_1080P)) {
 289                 ddrfreq_mode(false, &ddr.video_1080p_rate, "video_1080p");
 290         } else if (ddr.video_4k_rate && (s & SYS_STATUS_VIDEO_4K)) {
 291                 ddrfreq_mode(false, &ddr.video_4k_rate, "video_4k");
 292         } else if (ddr.performance_rate && (s & SYS_STATUS_PERFORMANCE)) {
 293                 ddrfreq_mode(false, &ddr.performance_rate, "performance");
 294         }  else if (ddr.isp_rate && (s & SYS_STATUS_ISP)) {
 295                 ddrfreq_mode(false, &ddr.isp_rate, "isp");
 296         } else if (ddr.idle_rate
 297                 && !(s & SYS_STATUS_GPU)
 298                 && !(s & SYS_STATUS_RGA)
 299                 && !(s & SYS_STATUS_CIF0)
 300                 && !(s & SYS_STATUS_CIF1)
 301                 && (clk_get_rate(cpu) < 816 * MHZ)
 302                 && (clk_get_rate(gpu) <= 200 * MHZ)
 303                 ) {
 304                 ddrfreq_mode(false, &ddr.idle_rate, "idle");
 305         } else {
 306                 if (ddr.auto_freq) {
 307                         ddr_auto_freq();
 308                         timeout = auto_freq_interval_ms;
 309                 }
 310                 else {
 311                         ddrfreq_mode(false, &ddr.normal_rate, "normal");
 312                 }
 313         }
 314
 315         return timeout;
 316 }
 317
 318 static int ddrfreq_task(void *data)
 319 {
 320         long timeout;
 321
 322         set_freezable();
 323
 324         do {
 325                 unsigned long status = ddr.sys_status;
 326                 timeout = ddrfreq_work(status);
 327                 wait_event_freezable_timeout(ddr.wait, (status != ddr.sys_status) || kthread_should_stop(), timeout);
 328         } while (!kthread_should_stop());
 329
 330         return 0;
 331 }
 332
 333 void add_video_info(struct video_info *video_info)
 334 {
 335         if (video_info)
 336                 list_add(&video_info->node, &ddr.video_info_list);
 337 }
 338
 339 void del_video_info(struct video_info *video_info)
 340 {
 341         if (video_info) {
 342                 list_del(&video_info->node);
 343                 kfree(video_info);
 344         }
 345 }
 346
 347 void clear_video_info(void)
 348 {
 349         struct video_info *video_info, *next;
 350
 351         list_for_each_entry_safe(video_info, next, &ddr.video_info_list, node) {
 352                 del_video_info(video_info);
 353         }
 354 }
 355
 356 struct video_info *find_video_info(struct video_info *match_video_info)
 357 {
 358         struct video_info *video_info;
 359
 360         if (!match_video_info)
 361                 return NULL;
 362
 363         list_for_each_entry(video_info, &ddr.video_info_list, node) {
 364                 if ((video_info->width == match_video_info->width)
 365                         && (video_info->height == match_video_info->height)
 366                         && (video_info->ishevc== match_video_info->ishevc)
 367                         && (video_info->videoFramerate == match_video_info->videoFramerate)
 368                         && (video_info->streamBitrate== match_video_info->streamBitrate)) {
 369
 370                         return video_info;
 371                 }
 372
 373         }
 374
 375         return NULL;
 376 }
 377
 378 void update_video_info(void)
 379 {
 380         struct video_info *video_info, *max_res_video;
 381         int max_res=0, res=0;
 382
 383         if (list_empty(&ddr.video_info_list)) {
 384                 ddrfreq_clear_sys_status(SYS_STATUS_VIDEO_1080P | SYS_STATUS_VIDEO_4K);
 385                 return;
 386         }
 387
 388
 389         list_for_each_entry(video_info, &ddr.video_info_list, node) {
 390                 res = video_info->width * video_info->height;
 391                 if (res > max_res) {
 392                         max_res = res;
 393                         max_res_video = video_info;
 394                 }
 395         }
 396
 397         if (max_res <= 1920*1080)
 398                 ddrfreq_set_sys_status(SYS_STATUS_VIDEO_1080P);
 399         else
 400                 ddrfreq_set_sys_status(SYS_STATUS_VIDEO_4K);
 401
 402
 403         return;
 404 }
 405
 406 /***format: width=val,height=val,ishevc=val,videoFramerate=val,streamBitrate=val***/
 407 static long get_video_param(char **str)
 408 {
 409         char *p;
 410
 411         strsep(str,"=");
 412         p=strsep(str,",");
 413         if (p)
 414                 return simple_strtol(p,NULL,10);
 415
 416         return 0;
 417 }
 418
 419 static ssize_t video_state_write(struct file *file, const char __user *buffer,
 420                                  size_t count, loff_t *ppos)
 421 {
 422         struct video_info *video_info = NULL;
 423         char state, *cookie_pot, *buf = vzalloc(count);
 424         cookie_pot = buf;
 425
 426         if(!buf)
 427                 return -ENOMEM;
 428
 429         if (count < 1){
 430                 vfree(buf);
 431                 return -EPERM;
 432         }
 433
 434         if (copy_from_user(cookie_pot, buffer, count)) {
 435                 vfree(buf);
 436                 return -EFAULT;
 437         }
 438
 439         dprintk(DEBUG_VIDEO_STATE, "%s: %s,len %d\n", __func__, cookie_pot,count);
 440
 441         state=cookie_pot[0];
 442         if( (count>=3) && (cookie_pot[2]=='w') )
 443         {
 444                 video_info = kzalloc(sizeof(struct video_info), GFP_KERNEL);
 445                 if (!video_info){
 446                         vfree(buf);
 447                         return -ENOMEM;
 448                 }
 449                 INIT_LIST_HEAD(&video_info->node);
 450
 451                 strsep(&cookie_pot,",");
 452
 453                 video_info->width = get_video_param(&cookie_pot);
 454                 video_info->height = get_video_param(&cookie_pot);
 455                 video_info->ishevc = get_video_param(&cookie_pot);
 456                 video_info->videoFramerate = get_video_param(&cookie_pot);
 457                 video_info->streamBitrate = get_video_param(&cookie_pot);
 458
 459                 dprintk(DEBUG_VIDEO_STATE, "%s: video_state=%c,width=%d,height=%d,ishevc=%d,videoFramerate=%d,streamBitrate=%d\n",
 460                         __func__, state,video_info->width,video_info->height,
 461                         video_info->ishevc, video_info->videoFramerate,
 462                         video_info->streamBitrate);
 463
 464         }
 465
 466         switch (state) {
 467         case '0':
 468                 del_video_info(find_video_info(video_info));
 469                 kfree(video_info);
 470                 update_video_info();
 471                 break;
 472         case '1':
 473                 add_video_info(video_info);
 474                 update_video_info();
 475                 break;
 476         case 'p'://performance
 477                 ddrfreq_set_sys_status(SYS_STATUS_PERFORMANCE);
 478                 break;
 479         case 'n'://normal
 480                 ddrfreq_clear_sys_status(SYS_STATUS_PERFORMANCE);
 481                 break;
 482         default:
 483                 vfree(buf);
 484                 return -EINVAL;
 485
 486         }
 487
 488         vfree(buf);
 489         return count;
 490 }
 491
 492 static int video_state_release(struct inode *inode, struct file *file)
 493 {
 494         dprintk(DEBUG_VIDEO_STATE, "video_state release\n");
 495         clear_video_info();
 496         update_video_info();
 497         return 0;
 498 }
 499
 500
 501 static const struct file_operations video_state_fops = {
 502         .owner  = THIS_MODULE,
 503         .release= video_state_release,
 504         .write  = video_state_write,
 505 };
 506
 507 static struct miscdevice video_state_dev = {
 508         .fops   = &video_state_fops,
 509         .name   = "video_state",
 510         .minor  = MISC_DYNAMIC_MINOR,
 511 };
 512
 513 static void ddr_freq_input_event(struct input_handle *handle, unsigned int type,
 514                 unsigned int code, int value)
 515 {
 516         if (type == EV_ABS)
 517                 ddr_boost = 1;
 518 }
 519
 520 static int ddr_freq_input_connect(struct input_handler *handler,
 521                 struct input_dev *dev, const struct input_device_id *id)
 522 {
 523         struct input_handle *handle;
 524         int error;
 525
 526         handle = kzalloc(sizeof(struct input_handle), GFP_KERNEL);
 527         if (!handle)
 528                 return -ENOMEM;
 529
 530         handle->dev = dev;
 531         handle->handler = handler;
 532         handle->name = "ddr_freq";
 533
 534         error = input_register_handle(handle);
 535         if (error)
 536                 goto err2;
 537
 538         error = input_open_device(handle);
 539         if (error)
 540                 goto err1;
 541
 542         return 0;
 543 err1:
 544         input_unregister_handle(handle);
 545 err2:
 546         kfree(handle);
 547         return error;
 548 }
 549
 550 static void ddr_freq_input_disconnect(struct input_handle *handle)
 551 {
 552         input_close_device(handle);
 553         input_unregister_handle(handle);
 554         kfree(handle);
 555 }
 556
 557 static const struct input_device_id ddr_freq_ids[] = {
 558         {
 559                 .flags = INPUT_DEVICE_ID_MATCH_EVBIT |
 560                         INPUT_DEVICE_ID_MATCH_ABSBIT,
 561                 .evbit = { BIT_MASK(EV_ABS) },
 562                 .absbit = { [BIT_WORD(ABS_MT_POSITION_X)] =
 563                         BIT_MASK(ABS_MT_POSITION_X) |
 564                         BIT_MASK(ABS_MT_POSITION_Y) },
 565         },
 566         {
 567                 .flags = INPUT_DEVICE_ID_MATCH_KEYBIT |
 568                         INPUT_DEVICE_ID_MATCH_ABSBIT,
 569                 .keybit = { [BIT_WORD(BTN_TOUCH)] = BIT_MASK(BTN_TOUCH) },
 570                 .absbit = { [BIT_WORD(ABS_X)] =
 571                         BIT_MASK(ABS_X) | BIT_MASK(ABS_Y) },
 572         },
 573         {
 574                 .flags = INPUT_DEVICE_ID_MATCH_EVBIT,
 575                 .evbit = { BIT_MASK(EV_KEY) },
 576         },
 577         { },
 578 };
 579
 580 static struct input_handler ddr_freq_input_handler = {
 581         .event          = ddr_freq_input_event,
 582         .connect        = ddr_freq_input_connect,
 583         .disconnect     = ddr_freq_input_disconnect,
 584         .name           = "ddr_freq",
 585         .id_table       = ddr_freq_ids,
 586 };
 587
 588 static int ddrfreq_clk_event(int status, unsigned long event)
 589 {
 590         switch (event) {
 591         case RK_CLK_PD_PREPARE:
 592                 ddrfreq_set_sys_status(status);
 593                 break;
 594         case RK_CLK_PD_UNPREPARE:
 595                 ddrfreq_clear_sys_status(status);
 596                 break;
 597         }
 598         return NOTIFY_OK;
 599 }
 600
 601 #define CLK_NOTIFIER(name, status) \
 602 static int ddrfreq_clk_##name##_event(struct notifier_block *this, unsigned long event, void *ptr) \
 603 { \
 604         return ddrfreq_clk_event(SYS_STATUS_##status, event); \
 605 } \
 606 static struct notifier_block ddrfreq_clk_##name##_notifier = { .notifier_call = ddrfreq_clk_##name##_event };
 607
 608 #define REGISTER_CLK_NOTIFIER(name) \
 609 do { \
 610         struct clk *clk = clk_get(NULL, #name); \
 611         rk_clk_pd_notifier_register(clk, &ddrfreq_clk_##name##_notifier); \
 612         clk_put(clk); \
 613 } while (0)
 614
 615 #define UNREGISTER_CLK_NOTIFIER(name) \
 616 do { \
 617         struct clk *clk = clk_get(NULL, #name); \
 618         rk_clk_pd_notifier_unregister(clk, &ddrfreq_clk_##name##_notifier); \
 619         clk_put(clk); \
 620 } while (0)
 621
 622 CLK_NOTIFIER(pd_isp, ISP)
 623 CLK_NOTIFIER(pd_vop0, LCDC0)
 624 CLK_NOTIFIER(pd_vop1, LCDC1)
 625
 626 static int ddrfreq_reboot_notifier_event(struct notifier_block *this, unsigned long event, void *ptr)
 627 {
 628         u32 timeout = 1000; // 10s
 629         ddrfreq_set_sys_status(SYS_STATUS_REBOOT);
 630         while (!reboot_config_done && --timeout) {
 631                 msleep(10);
 632         }
 633         if (!timeout) {
 634                 pr_err("failed to set ddr clk from %luMHz to %luMHz when shutdown/reboot\n", dvfs_clk_get_rate(ddr.clk_dvfs_node) / MHZ, ddr.reboot_rate / MHZ);
 635         }
 636         return NOTIFY_OK;
 637 }
 638
 639 static struct notifier_block ddrfreq_reboot_notifier = {
 640         .notifier_call = ddrfreq_reboot_notifier_event,
 641 };
 642
 643 static int ddr_freq_suspend_notifier_call(struct notifier_block *self,
 644                                 unsigned long action, void *data)
 645 {
 646         struct fb_event *event = data;
 647         int blank_mode = *((int *)event->data);
 648
 649         if (action == FB_EARLY_EVENT_BLANK) {
 650                 switch (blank_mode) {
 651                 case FB_BLANK_UNBLANK:
 652                         ddrfreq_clear_sys_status(SYS_STATUS_SUSPEND);
 653                         break;
 654                 default:
 655                         break;
 656                 }
 657         }
 658         else if (action == FB_EVENT_BLANK) {
 659                 switch (blank_mode) {
 660                 case FB_BLANK_POWERDOWN:
 661                         ddrfreq_set_sys_status(SYS_STATUS_SUSPEND);
 662                         break;
 663                 default:
 664                         break;
 665                 }
 666         }
 667
 668         return NOTIFY_OK;
 669 }
 670
 671 static struct notifier_block ddr_freq_suspend_notifier = {
 672                 .notifier_call = ddr_freq_suspend_notifier_call,
 673 };
 674
 675 int of_init_ddr_freq_table(void)
 676 {
 677         struct device_node *clk_ddr_dev_node;
 678         const struct property *prop;
 679         const __be32 *val;
 680         int nr, i=0;
 681
 682         clk_ddr_dev_node = of_find_node_by_name(NULL, "clk_ddr");
 683         if (IS_ERR_OR_NULL(clk_ddr_dev_node)) {
 684                 pr_err("%s: get clk ddr dev node err\n", __func__);
 685                 return PTR_ERR(clk_ddr_dev_node);
 686         }
 687
 688         prop = of_find_property(clk_ddr_dev_node, "auto-freq", NULL);
 689         if (prop && prop->value)
 690                 ddr.auto_freq = be32_to_cpup(prop->value);
 691
 692         prop = of_find_property(clk_ddr_dev_node, "auto-freq-table", NULL);
 693         if (prop && prop->value) {
 694                 nr = prop->length / sizeof(u32);
 695                 auto_freq_table = kzalloc((sizeof(u32) *(nr+1)), GFP_KERNEL);
 696                 val = prop->value;
 697                 while (nr) {
 698                         auto_freq_table[i++] = 1000 * be32_to_cpup(val++);
 699                         nr--;
 700                 }
 701                 cur_freq_index = 0;
 702                 auto_freq_table_size = i;
 703         }
 704
 705         prop = of_find_property(clk_ddr_dev_node, "freq-table", NULL);
 706         if (!prop)
 707                 return -ENODEV;
 708         if (!prop->value)
 709                 return -ENODATA;
 710
 711         nr = prop->length / sizeof(u32);
 712         if (nr % 2) {
 713                 pr_err("%s: Invalid freq list\n", __func__);
 714                 return -EINVAL;
 715         }
 716
 717         val = prop->value;
 718         while (nr) {
 719                 unsigned long status = be32_to_cpup(val++);
 720                 unsigned long rate = be32_to_cpup(val++) * 1000;
 721
 722                 if (status & SYS_STATUS_NORMAL)
 723                         ddr.normal_rate = rate;
 724                 if (status & SYS_STATUS_SUSPEND)
 725                         ddr.suspend_rate = rate;
 726                 if (status & SYS_STATUS_VIDEO_1080P)
 727                         ddr.video_1080p_rate = rate;
 728                 if (status & SYS_STATUS_VIDEO_4K)
 729                         ddr.video_4k_rate = rate;
 730                 if (status & SYS_STATUS_PERFORMANCE)
 731                         ddr.performance_rate= rate;
 732                 if ((status & SYS_STATUS_LCDC0)&&(status & SYS_STATUS_LCDC1))
 733                         ddr.dualview_rate = rate;
 734                 if (status & SYS_STATUS_IDLE)
 735                         ddr.idle_rate= rate;
 736                 if (status & SYS_STATUS_REBOOT)
 737                         ddr.reboot_rate= rate;
 738                 if (status & SYS_STATUS_BOOST)
 739                         ddr.boost_rate= rate;
 740                 if (status & SYS_STATUS_ISP)
 741                         ddr.isp_rate= rate;
 742
 743                 nr -= 2;
 744         }
 745
 746         return 0;
 747 }
 748
 749 static int ddrfreq_scale_rate_for_dvfs(struct clk *clk, unsigned long rate)
 750 {
 751         unsigned long real_rate;
 752
 753         real_rate = ddr_change_freq(rate/MHZ);
 754         real_rate *= MHZ;
 755         if (!real_rate)
 756                 return -EAGAIN;
 757
 758         clk->parent->rate = clk->rate = real_rate;
 759
 760         return 0;
 761 }
 762
 763 #if defined(CONFIG_RK_PM_TESTS)
 764 static void ddrfreq_tst_init(void);
 765 #endif
 766
 767 static int ddrfreq_init(void)
 768 {
 769         int ret;
 770         struct sched_param param = { .sched_priority = MAX_RT_PRIO - 1 };
 771
 772 #if defined(CONFIG_RK_PM_TESTS)
 773         ddrfreq_tst_init();
 774 #endif
 775
 776         clk_cpu_dvfs_node = clk_get_dvfs_node("clk_core");
 777         if (!clk_cpu_dvfs_node){
 778                 return -EINVAL;
 779         }
 780
 781         memset(&ddr, 0x00, sizeof(ddr));
 782         ddr.clk_dvfs_node = clk_get_dvfs_node("clk_ddr");
 783         if (!ddr.clk_dvfs_node){
 784                 return -EINVAL;
 785         }
 786         clk_enable_dvfs(ddr.clk_dvfs_node);
 787
 788         dvfs_clk_register_set_rate_callback(ddr.clk_dvfs_node, ddrfreq_scale_rate_for_dvfs);
 789
 790         init_waitqueue_head(&ddr.wait);
 791         INIT_LIST_HEAD(&ddr.video_info_list);
 792         ddr.mode = "normal";
 793         ddr.normal_rate = dvfs_clk_get_rate(ddr.clk_dvfs_node);
 794         ddr.suspend_rate = ddr.normal_rate;
 795         ddr.reboot_rate = ddr.normal_rate;
 796
 797         of_init_ddr_freq_table();
 798
 799         ret = input_register_handler(&ddr_freq_input_handler);
 800         if (ret)
 801                 ddr.auto_freq = false;
 802
 803         REGISTER_CLK_NOTIFIER(pd_isp);
 804         REGISTER_CLK_NOTIFIER(pd_vop0);
 805         REGISTER_CLK_NOTIFIER(pd_vop1);
 806
 807         ret = misc_register(&video_state_dev);
 808         if (unlikely(ret)) {
 809                 pr_err("failed to register video_state misc device! error %d\n", ret);
 810                 goto err;
 811         }
 812
 813         ddr.task = kthread_create(ddrfreq_task, NULL, "ddrfreqd");
 814         if (IS_ERR(ddr.task)) {
 815                 ret = PTR_ERR(ddr.task);
 816                 pr_err("failed to create kthread! error %d\n", ret);
 817                 goto err1;
 818         }
 819
 820         sched_setscheduler_nocheck(ddr.task, SCHED_FIFO, &param);
 821         get_task_struct(ddr.task);
 822         kthread_bind(ddr.task, 0);
 823         wake_up_process(ddr.task);
 824
 825         fb_register_client(&ddr_freq_suspend_notifier);
 826         register_reboot_notifier(&ddrfreq_reboot_notifier);
 827
 828         pr_info("verion 1.1 20140509\n");
 829         dprintk(DEBUG_DDR, "normal %luMHz video_1080p %luMHz video_4k %luMHz dualview %luMHz idle %luMHz suspend %luMHz reboot %luMHz\n",
 830                 ddr.normal_rate / MHZ, ddr.video_1080p_rate / MHZ, ddr.video_1080p_rate / MHZ, ddr.dualview_rate / MHZ, ddr.idle_rate / MHZ, ddr.suspend_rate / MHZ, ddr.reboot_rate / MHZ);
 831
 832         return 0;
 833
 834 err1:
 835         misc_deregister(&video_state_dev);
 836 err:
 837         return ret;
 838 }
 839 late_initcall(ddrfreq_init);
 840 /****************************ddr bandwith tst************************************/
 841 #if defined(CONFIG_RK_PM_TESTS)
 842 static ssize_t ddrbw_dyn_show(struct kobject *kobj, struct kobj_attribute *attr,
 843                 char *buf)
 844 {
 845         char *str = buf;
 846         str += sprintf(str, "print: %d\n", print);
 847         str += sprintf(str, "watch: %d\n", watch);
 848         str += sprintf(str, "high_load: %d\n", high_load);
 849         str += sprintf(str, "low_load: %d\n", low_load);
 850         str += sprintf(str, "auto_freq_interval_ms: %d\n", auto_freq_interval_ms);
 851         str += sprintf(str, "high_load_last_ms: %d\n", high_load_last_ms);
 852         str += sprintf(str, "low_load_last_ms: %d\n", low_load_last_ms);
 853         if (str != buf)
 854                 *(str - 1) = '\n';
 855         return (str - buf);
 856 }
 857
 858 static ssize_t ddrbw_dyn_store(struct kobject *kobj, struct kobj_attribute *attr,
 859                 const char *buf, size_t n)
 860 {
 861         int value;
 862         char var_name[64];
 863
 864         sscanf(buf, "%s %u", var_name, &value);
 865
 866         if((strncmp(buf, "print", strlen("print")) == 0)) {
 867                 print = value;
 868         } else if((strncmp(buf, "watch", strlen("watch")) == 0)) {
 869                 watch = value;;
 870         } else if((strncmp(buf, "high", strlen("high")) == 0)) {
 871                 high_load = value;;
 872         } else if((strncmp(buf, "low", strlen("low")) == 0)) {
 873                 low_load = value;;
 874         } else if((strncmp(buf, "interval", strlen("interval")) == 0)) {
 875                 auto_freq_interval_ms = value;;
 876         } else if((strncmp(buf, "high_last", strlen("high_last")) == 0)) {
 877                 high_load_last_ms = value;;
 878         } else if((strncmp(buf, "low_last", strlen("low_last")) == 0)) {
 879                 low_load_last_ms = value;;
 880         }
 881         return n;
 882 }
 883
 884 struct ddrfreq_attribute {
 885         struct attribute        attr;
 886         ssize_t (*show)(struct kobject *kobj, struct kobj_attribute *attr,
 887                         char *buf);
 888         ssize_t (*store)(struct kobject *kobj, struct kobj_attribute *attr,
 889                         const char *buf, size_t n);
 890 };
 891
 892 static struct ddrfreq_attribute ddrfreq_attrs[] = {
 893         /*     node_name        permision               show_func       store_func */
 894         __ATTR(ddrfreq, S_IRUSR|S_IRGRP|S_IWUSR,        ddrbw_dyn_show, ddrbw_dyn_store),
 895 };
 896 int rk_pm_tests_kobj_atrradd(const struct attribute *attr);
 897
 898 static void ddrfreq_tst_init(void)
 899 {
 900         int ret;
 901
 902         ret = rk_pm_tests_kobj_atrradd(&ddrfreq_attrs[0].attr);
 903
 904         if (ret) {
 905                 printk("%s: create ddrfreq sysfs node error, ret: %d\n", __func__, ret);
 906                 return;
 907         }
 908
 909 }
 910 #endif