1 #ifndef __MACH_IOMUX_H__
2 #define __MACH_IOMUX_H__
4 #include <linux/init.h>
6 #if defined(CONFIG_ARCH_RK3066B)
7 #include <mach/iomux-rk3066b.h>
8 #elif defined(CONFIG_ARCH_RK30)
10 #define GPIO0A_GPIO0A7 0
11 #define GPIO0A_I2S_8CH_SDI 1
12 #define GPIO0A_GPIO0A6 0
13 #define GPIO0A_HOST_DRV_VBUS 1
14 #define GPIO0A_GPIO0A5 0
15 #define GPIO0A_OTG_DRV_VBUS 1
16 #define GPIO0A_GPIO0A4 0
18 #define GPIO0A_GPIO0A3 0
20 #define GPIO0A_GPIO0A2 0
21 #define GPIO0A_HDMI_I2C_SDA 1
22 #define GPIO0A_GPIO0A1 0
23 #define GPIO0A_HDMI_I2C_SCL 1
24 #define GPIO0A_GPIO0A0 0
25 #define GPIO0A_HDMI_HOT_PLUG_IN 1
29 #define GPIO0B_GPIO0B7 0
30 #define GPIO0B_I2S_8CH_SDO3 1
31 #define GPIO0B_GPIO0B6 0
32 #define GPIO0B_I2S_8CH_SDO2 1
33 #define GPIO0B_GPIO0B5 0
34 #define GPIO0B_I2S_8CH_SDO1 1
35 #define GPIO0B_GPIO0B4 0
36 #define GPIO0B_I2S_8CH_SDO0 1
37 #define GPIO0B_GPIO0B3 0
38 #define GPIO0B_I2S_8CH_LRCK_TX 1
39 #define GPIO0B_GPIO0B2 0
40 #define GPIO0B_I2S_8CH_LRCK_RX 1
41 #define GPIO0B_GPIO0B1 0
42 #define GPIO0B_I2S_8CH_SCLK 1
43 #define GPIO0B_GPIO0B0 0
44 #define GPIO0B_I2S_8CH_CLK 1
48 #define GPIO0C_GPIO0C7 0
49 #define GPIO0C_TRACE_CTL 1
50 #define GPIO0C_SMC_ADDR3 2
51 #define GPIO0C_GPIO0C6 0
52 #define GPIO0C_TRACE_CLK 1
53 #define GPIO0C_SMC_ADDR2 2
54 #define GPIO0C_GPIO0C5 0
55 #define GPIO0C_I2S1_2CH_SDO 1
56 #define GPIO0C_GPIO0C4 0
57 #define GPIO0C_I2S1_2CH_SDI 1
58 #define GPIO0C_GPIO0C3 0
59 #define GPIO0C_I2S1_2CH_LRCK_TX 1
60 #define GPIO0C_GPIO0C2 0
61 #define GPIO0C_I2S1_2CH_LRCK_RX 1
62 #define GPIO0C_GPIO0C1 0
63 #define GPIO0C_I2S1_2CH_SCLK 1
64 #define GPIO0C_GPIO0C0 0
65 #define GPIO0C_I2S1_2CH_CLK 1
70 #define GPIO0D_GPIO0D7 0
72 #define GPIO0D_GPIO0D6 0
74 #define GPIO0D_GPIO0D5 0
75 #define GPIO0D_I2S2_2CH_SDO 1
76 #define GPIO0D_SMC_ADDR1 2
77 #define GPIO0D_GPIO0D4 0
78 #define GPIO0D_I2S2_2CH_SDI 1
79 #define GPIO0D_SMC_ADDR0 2
80 #define GPIO0D_GPIO0D3 0
81 #define GPIO0D_I2S2_2CH_LRCK_TX 1
82 #define GPIO0D_SMC_ADV_N 2
83 #define GPIO0D_GPIO0D2 0
84 #define GPIO0D_I2S2_2CH_LRCK_RX 1
85 #define GPIO0D_SMC_OE_N 2
86 #define GPIO0D_GPIO0D1 0
87 #define GPIO0D_I2S2_2CH_SCLK 1
88 #define GPIO0D_SMC_WE_N 2
89 #define GPIO0D_GPIO0D0 0
90 #define GPIO0D_I2S2_2CH_CLK 1
91 #define GPIO0D_SMC_CSN0 2
95 #define GPIO1A_GPIO1A7 0
96 #define GPIO1A_UART1_RTS_N 1
97 #define GPIO1A_SPI0_TXD 2
98 #define GPIO1A_GPIO1A6 0
99 #define GPIO1A_UART1_CTS_N 1
100 #define GPIO1A_SPI0_RXD 2
101 #define GPIO1A_GPIO1A5 0
102 #define GPIO1A_UART1_SOUT 1
103 #define GPIO1A_SPI0_CLK 2
104 #define GPIO1A_GPIO1A4 0
105 #define GPIO1A_UART1_SIN 1
106 #define GPIO1A_SPI0_CSN0 2
107 #define GPIO1A_GPIO1A3 0
108 #define GPIO1A_UART0_RTS_N 1
109 #define GPIO1A_GPIO1A2 0
110 #define GPIO1A_UART0_CTS_N 1
111 #define GPIO1A_GPIO1A1 0
112 #define GPIO1A_UART0_SOUT 1
113 #define GPIO1A_GPIO1A0 0
114 #define GPIO1A_UART0_SIN 1
118 #define GPIO1B_GPIO1B7 0
119 #define GPIO1B_CIF_DATA11 1
120 #define GPIO1B_GPIO1B6 0
121 #define GPIO1B_CIF_DATA10 1
122 #define GPIO1B_GPIO1B5 0
123 #define GPIO1B_CIF0_DATA1 1
124 #define GPIO1B_GPIO1B4 0
125 #define GPIO1B_CIF0_DATA0 1
126 #define GPIO1B_GPIO1B3 0
127 #define GPIO1B_CIF0_CLKOUT 1
128 #define GPIO1B_GPIO1B2 0
129 #define GPIO1B_SPDIF_TX 1
130 #define GPIO1B_GPIO1B1 0
131 #define GPIO1B_UART2_SOUT 1
132 #define GPIO1B_GPIO1B0 0
133 #define GPIO1B_UART2_SIN 1
137 #define GPIO1C_GPIO1C7 0
138 #define GPIO1C_CIF_DATA9 1
139 #define GPIO1C_RMII_RXD0 2
140 #define GPIO1C_GPIO1C6 0
141 #define GPIO1C_CIF_DATA8 1
142 #define GPIO1C_RMII_RXD1 2
143 #define GPIO1C_GPIO1C5 0
144 #define GPIO1C_CIF_DATA7 1
145 #define GPIO1C_RMII_CRS_DVALID 2
146 #define GPIO1C_GPIO1C4 0
147 #define GPIO1C_CIF_DATA6 1
148 #define GPIO1C_RMII_RX_ERR 2
149 #define GPIO1C_GPIO1C3 0
150 #define GPIO1C_CIF_DATA5 1
151 #define GPIO1C_RMII_TXD0 2
152 #define GPIO1C_GPIO1C2 0
153 #define GPIO1C_CIF1_DATA4 1
154 #define GPIO1C_RMII_TXD1 2
155 #define GPIO1C_GPIO1C1 0
156 #define GPIO1C_CIF_DATA3 1
157 #define GPIO1C_RMII_TX_EN 2
158 #define GPIO1C_GPIO1C0 0
159 #define GPIO1C_CIF1_DATA2 1
160 #define GPIO1C_RMII_CLKOUT 2
161 #define GPIO1C_RMII_CLKIN 3
165 #define GPIO1D_GPIO1D7 0
166 #define GPIO1D_CIF1_CLKOUT 1
167 #define GPIO1D_GPIO1D6 0
168 #define GPIO1D_CIF1_DATA11 1
169 #define GPIO1D_GPIO1D5 0
170 #define GPIO1D_CIF1_DATA10 1
171 #define GPIO1D_GPIO1D4 0
172 #define GPIO1D_CIF1_DATA1 1
173 #define GPIO1D_GPIO1D3 0
174 #define GPIO1D_CIF1_DATA0 1
175 #define GPIO1D_GPIO1D2 0
176 #define GPIO1D_CIF1_CLKIN 1
177 #define GPIO1D_GPIO1D1 0
178 #define GPIO1D_CIF1_HREF 1
179 #define GPIO1D_MII_MDCLK 2
180 #define GPIO1D_GPIO1D0 0
181 #define GPIO1D_CIF1_VSYNC 1
182 #define GPIO1D_MII_MD 2
186 #define GPIO2A_GPIO2A7 0
187 #define GPIO2A_LCDC1_DATA7 1
188 #define GPIO2A_SMC_ADDR11 2
189 #define GPIO2A_GPIO2A6 0
190 #define GPIO2A_LCDC1_DATA6 1
191 #define GPIO2A_SMC_ADDR10 2
192 #define GPIO2A_GPIO2A5 0
193 #define GPIO2A_LCDC1_DATA5 1
194 #define GPIO2A_SMC_ADDR9 2
195 #define GPIO2A_GPIO2A4 0
196 #define GPIO2A_LCDC1_DATA4 1
197 #define GPIO2A_SMC_ADDR8 2
198 #define GPIO2A_GPIO2A3 0
199 #define GPIO2A_LCDC_DATA3 1
200 #define GPIO2A_SMC_ADDR7 2
201 #define GPIO2A_GPIO2A2 0
202 #define GPIO2A_LCDC_DATA2 1
203 #define GPIO2A_SMC_ADDR6 2
204 #define GPIO2A_GPIO2A1 0
205 #define GPIO2A_LCDC1_DATA1 1
206 #define GPIO2A_SMC_ADDR5 2
207 #define GPIO2A_GPIO2A0 0
208 #define GPIO2A_LCDC1_DATA0 1
209 #define GPIO2A_SMC_ADDR4 2
213 #define GPIO2B_GPIO2B7 0
214 #define GPIO2B_LCDC1_DATA15 1
215 #define GPIO2B_SMC_ADDR19 2
216 #define GPIO2B_HSADC_DATA7 3
217 #define GPIO2B_GPIO2B6 0
218 #define GPIO2B_LCDC1_DATA14 1
219 #define GPIO2B_SMC_ADDR18 2
220 #define GPIO2B_TS_SYNC 3
221 #define GPIO2B_GPIO2B5 0
222 #define GPIO2B_LCDC1_DATA13 1
223 #define GPIO2B_SMC_ADDR17 2
224 #define GPIO2B_HSADC_DATA8 3
225 #define GPIO2B_GPIO2B4 0
226 #define GPIO2B_LCDC1_DATA12 1
227 #define GPIO2B_SMC_ADDR16 2
228 #define GPIO2B_HSADC_DATA9 3
229 #define GPIO2B_GPIO2B3 0
230 #define GPIO2B_LCDC1_DATA11 1
231 #define GPIO2B_SMC_ADDR15 2
232 #define GPIO2B_GPIO2B2 0
233 #define GPIO2B_LCDC1_DATA10 1
234 #define GPIO2B_SMC_ADDR14 2
235 #define GPIO2B_GPIO2B1 0
236 #define GPIO2B_LCDC1_DATA9 1
237 #define GPIO2B_SMC_ADDR13 2
238 #define GPIO2B_GPIO2B0 0
239 #define GPIO2B_LCDC1_DATA8 1
240 #define GPIO2B_SMC_ADDR12 2
244 #define GPIO2C_GPIO2C7 0
245 #define GPIO2C_LCDC1_DATA23 1
246 #define GPIO2C_SPI1_CSN1 2
247 #define GPIO2C_HSADC_DATA4 3
248 #define GPIO2C_GPIO2C6 0
249 #define GPIO2C_LCDC1_DATA22 1
250 #define GPIO2C_SPI1_RXD 2
251 #define GPIO2C_HSADC_DATA3 3
252 #define GPIO2C_GPIO2C5 0
253 #define GPIO2C_LCDC1_DATA21 1
254 #define GPIO2C_SPI1_TXD 2
255 #define GPIO2C_HSADC_DATA2 3
256 #define GPIO2C_GPIO2C4 0
257 #define GPIO2C_LCDC1_DATA20 1
258 #define GPIO2C_SPI1_CSN0 2
259 #define GPIO2C_HSADC_DATA1 3
260 #define GPIO2C_GPIO2C3 0
261 #define GPIO2C_LCDC1_DATA19 1
262 #define GPIO2C_SPI1_CLK 2
263 #define GPIO2C_HSADC_DATA0 3
264 #define GPIO2C_GPIO2C2 0
265 #define GPIO2C_LCDC1_DATA18 1
266 #define GPIO2C_SMC_BLS_N1 2
267 #define GPIO2C_HSADC_DATA5 3
268 #define GPIO2C_GPIO2C1 0
269 #define GPIO2C_LCDC1_DATA17 1
270 #define GPIO2C_SMC_BLS_N0 2
271 #define GPIO2C_HSADC_DATA6 3
272 #define GPIO2C_GPIO2C0 0
273 #define GPIO2C_LCDC_DATA16 1
274 #define GPIO2C_GPS_CLK 2
275 #define GPIO2C_HSADC_CLKOUT 3
279 #define GPIO2D_GPIO2D7 0
280 #define GPIO2D_I2C1_SCL 1
281 #define GPIO2D_GPIO2D6 0
282 #define GPIO2D_I2C1_SDA 1
283 #define GPIO2D_GPIO2D5 0
284 #define GPIO2D_I2C0_SCL 1
285 #define GPIO2D_GPIO2D4 0
286 #define GPIO2D_I2C0_SDA 1
287 #define GPIO2D_GPIO2D3 0
288 #define GPIO2D_LCDC1_VSYNC 1
289 #define GPIO2D_GPIO2D2 0
290 #define GPIO2D_LCDC1_HSYNC 1
291 #define GPIO2D_GPIO2D1 0
292 #define GPIO2D_LCDC1_DEN 1
293 #define GPIO2D_SMC_CSN1 2
294 #define GPIO2D_GPIO2D0 0
295 #define GPIO2D_LCDC1_DCLK 1
299 #define GPIO3A_GPIO3A7 0
300 #define GPIO3A_SDMMC0_PWR_EN 1 //#define GPIO3A_SDMMC0_WRITE_PRT 1 //Modifyed by xbw,at 2012-03-05
301 #define GPIO3A_GPIO3A6 0
302 #define GPIO3A_SDMMC0_RSTN_OUT 1
303 #define GPIO3A_GPIO3A5 0
304 #define GPIO3A_I2C4_SCL 1
305 #define GPIO3A_GPIO3A4 0
306 #define GPIO3A_I2C4_SDA 1
307 #define GPIO3A_GPIO3A3 0
308 #define GPIO3A_I2C3_SCL 1
309 #define GPIO3A_GPIO3A2 0
310 #define GPIO3A_I2C3_SDA 1
311 #define GPIO3A_GPIO3A1 0
312 #define GPIO3A_I2C2_SCL 1
313 #define GPIO3A_GPIO3A0 0
314 #define GPIO3A_I2C2_SDA 1
318 #define GPIO3B_GPIO3B7 0
319 #define GPIO3B_SDMMC0_WRITE_PRT 1
320 #define GPIO3B_GPIO3B6 0
321 #define GPIO3B_SDMMC0_DETECT_N 1
322 #define GPIO3B_GPIO3B5 0
323 #define GPIO3B_SDMMC0_DATA3 1
324 #define GPIO3B_GPIO3B4 0
325 #define GPIO3B_SDMMC0_DATA2 1
326 #define GPIO3B_GPIO3B3 0
327 #define GPIO3B_SDMMC0_DATA1 1
328 #define GPIO3B_GPIO3B2 0
329 #define GPIO3B_SDMMC0_DATA0 1
330 #define GPIO3B_GPIO3B1 0
331 #define GPIO3B_SDMMC0_CMD 1
332 #define GPIO3B_GPIO3B0 0
333 #define GPIO3B_SDMMC0_CLKOUT 1
337 #define GPIO3C_GPIO3C7 0
338 #define GPIO3C_SDMMC1_WRITE_PRT 1
339 #define GPIO3C_GPIO3C6 0
340 #define GPIO3C_SDMMC1_DETECT_N 1
341 #define GPIO3C_GPIO3C5 0
342 #define GPIO3C_SDMMC1_CLKOUT 1
343 #define GPIO3C_GPIO3C4 0
344 #define GPIO3C_SDMMC1_DATA3 1
345 #define GPIO3C_GPIO3C3 0
346 #define GPIO3C_SDMMC1_DATA2 1
347 #define GPIO3C_GPIO3C2 0
348 #define GPIO3C_SDMMC1_DATA1 1
349 #define GPIO3C_GPIO3C1 0
350 #define GPIO3C_SDMMC1_DATA0 1
351 #define GPIO3C_GPIO3C0 0
352 #define GPIO3C_SMMC1_CMD 1
356 #define GPIO3D_GPIO3D7 0
357 #define GPIO3D_FLASH_DQS 1
358 #define GPIO3D_EMMC_CLKOUT 2
359 #define GPIO3D_GPIO3D6 0
360 #define GPIO3D_UART3_RTS_N 1
361 #define GPIO3D_GPIO3D5 0
362 #define GPIO3D_UART3_CTS_N 1
363 #define GPIO3D_GPIO3D4 0
364 #define GPIO3D_UART3_SOUT 1
365 #define GPIO3D_GPIO3D3 0
366 #define GPIO3D_UART3_SIN 1
367 #define GPIO3D_GPIO3D2 0
368 #define GPIO3D_SDMMC1_INT_N 1
369 #define GPIO3D_GPIO3D1 0
370 #define GPIO3D_SDMMC1_BACKEND_PWR 1
371 #define GPIO3D_GPIO3D0 0
372 #define GPIO3D_SDMMC1_PWR_EN 1
376 #define GPIO4A_GPIO4A7 0
377 #define GPIO4A_FLASH_DATA15 1
378 #define GPIO4A_GPIO4A6 0
379 #define GPIO4A_FLASH_DATA14 1
380 #define GPIO4A_GPIO4A5 0
381 #define GPIO4A_FLASH_DATA13 1
382 #define GPIO4A_GPIO4A4 0
383 #define GPIO4A_FLASH_DATA12 1
384 #define GPIO4A_GPIO4A3 0
385 #define GPIO4A_FLASH_DATA11 1
386 #define GPIO4A_GPIO4A2 0
387 #define GPIO4A_FLASH_DATA10 1
388 #define GPIO4A_GPIO4A1 0
389 #define GPIO4A_FLASH_DATA9 1
390 #define GPIO4A_GPIO4A0 0
391 #define GPIO4A_FLASH_DATA8 1
395 #define GPIO4B_GPIO4B7 0
396 #define GPIO4B_SPI0_CSN1 1
397 #define GPIO4B_GPIO4B6 0
398 #define GPIO4B_FLASH_CSN7 1
399 #define GPIO4B_GPIO4B5 0
400 #define GPIO4B_FLASH_CSN6 1
401 #define GPIO4B_GPIO4B4 0
402 #define GPIO4B_FLASH_CSN5 1
403 #define GPIO4B_GPIO4B3 0
404 #define GPIO4B_FLASH_CSN4 1
405 #define GPIO4B_GPIO4B2 0
406 #define GPIO4B_FLASH_CSN3 1
407 #define GPIO4B_EMMC_RSTN_OUT 2
408 #define GPIO4B_GPIO4B1 0
409 #define GPIO4B_FLASH_CSN2 1
410 #define GPIO4B_EMMC_CMD 2
411 #define GPIO4B_GPIO4B0 0
412 #define GPIO4B_FLASH_CSN1 1
416 #define GPIO4C_GPIO4C7 0
417 #define GPIO4C_SMC_DATA7 1
418 #define GPIO4C_TRACE_DATA7 2
419 #define GPIO4C_GPIO4C6 0
420 #define GPIO4C_SMC_DATA6 1
421 #define GPIO4C_TRACE_DATA6 2
422 #define GPIO4C_GPIO4C5 0
423 #define GPIO4C_SMC_DATA5 1
424 #define GPIO4C_TRACE_DATA5 2
425 #define GPIO4C_GPIO4C4 0
426 #define GPIO4C_SMC_DATA4 1
427 #define GPIO4C_TRACE_DATA4 2
428 #define GPIO4C_GPIO4C3 0
429 #define GPIO4C_SMC_DATA3 1
430 #define GPIO4C_TRACE_DATA3 2
431 #define GPIO4C_GPIO4C2 0
432 #define GPIO4C_SMC_DATA2 1
433 #define GPIO4C_TRACE_DATA2 2
434 #define GPIO4C_GPIO4C1 0
435 #define GPIO4C_SMC_DATA1 1
436 #define GPIO4C_TRACE_DATA1 2
437 #define GPIO4C_GPIO4C0 0
438 #define GPIO4C_SMC_DATA0 1
439 #define GPIO4C_TRACE_DATA0 2
443 #define GPIO4D_GPIO4D7 0
444 #define GPIO4D_SMC_DATA15 1
445 #define GPIO4D_TRACE_DATA15 2
446 #define GPIO4D_GPIO4D6 0
447 #define GPIO4D_SMC_DATA14 1
448 #define GPIO4D_TRACE_DATA14 2
449 #define GPIO4D_GPIO4D5 0
450 #define GPIO4D_SMC_DATA13 1
451 #define GPIO4D_TRACE_DATA13 2
452 #define GPIO4D_GPIO4D4 0
453 #define GPIO4D_SMC_DATA12 1
454 #define GPIO4D_TRACE_DATA12 2
455 #define GPIO4D_GPIO4D3 0
456 #define GPIO4D_SMC_DATA11 1
457 #define GPIO4D_TRACE_DATA11 2
458 #define GPIO4D_GPIO4D2 0
459 #define GPIO4D_SMC_DATA10 1
460 #define GPIO4D_TRACE_DATA10 2
461 #define GPIO4D_GPIO4D1 0
462 #define GPIO4D_SMC_DATA9 1
463 #define GPIO4D_TRACE_DATA9 2
464 #define GPIO4D_GPIO4D0 0
465 #define GPIO4D_SMC_DATA8 1
466 #define GPIO4D_TRACE_DATA8 2
470 #define GPIO6B_GPIO6B7 0
471 #define GPIO6B_TEST_CLOCK_OUT 1
473 #define GRF_GPIO0L_DIR 0x0000
474 #define GRF_GPIO0H_DIR 0x0004
475 #define GRF_GPIO1L_DIR 0x0008
476 #define GRF_GPIO1H_DIR 0x000c
477 #define GRF_GPIO2L_DIR 0x0010
478 #define GRF_GPIO2H_DIR 0x0014
479 #define GRF_GPIO3L_DIR 0x0018
480 #define GRF_GPIO3H_DIR 0x001c
481 #define GRF_GPIO4L_DIR 0x0020
482 #define GRF_GPIO4H_DIR 0x0024
483 #define GRF_GPIO6L_DIR 0x0030
484 #define GRF_GPIO0L_DO 0x0038
485 #define GRF_GPIO0H_DO 0x003c
486 #define GRF_GPIO1L_DO 0x0040
487 #define GRF_GPIO1H_DO 0x0044
488 #define GRF_GPIO2L_DO 0x0048
489 #define GRF_GPIO2H_DO 0x004c
490 #define GRF_GPIO3L_DO 0x0050
491 #define GRF_GPIO3H_DO 0x0054
492 #define GRF_GPIO4L_DO 0x0058
493 #define GRF_GPIO4H_DO 0x005c
494 #define GRF_GPIO6L_DO 0x0068
495 #define GRF_GPIO0L_EN 0x0070
496 #define GRF_GPIO0H_EN 0x0074
497 #define GRF_GPIO1L_EN 0x0078
498 #define GRF_GPIO1H_EN 0x007c
499 #define GRF_GPIO2L_EN 0x0080
500 #define GRF_GPIO2H_EN 0x0084
501 #define GRF_GPIO3L_EN 0x0088
502 #define GRF_GPIO3H_EN 0x008c
503 #define GRF_GPIO4L_EN 0x0090
504 #define GRF_GPIO4H_EN 0x0094
505 #define GRF_GPIO6L_EN 0x00a0
506 #define GRF_GPIO0A_IOMUX RK30_GRF_BASE+0x00a8
507 #define GRF_GPIO0B_IOMUX RK30_GRF_BASE+0x00ac
508 #define GRF_GPIO0C_IOMUX RK30_GRF_BASE+0x00b0
509 #define GRF_GPIO0D_IOMUX RK30_GRF_BASE+0x00b4
510 #define GRF_GPIO1A_IOMUX RK30_GRF_BASE+0x00b8
511 #define GRF_GPIO1B_IOMUX RK30_GRF_BASE+0x00bc
512 #define GRF_GPIO1C_IOMUX RK30_GRF_BASE+0x00c0
513 #define GRF_GPIO1D_IOMUX RK30_GRF_BASE+0x00c4
514 #define GRF_GPIO2A_IOMUX RK30_GRF_BASE+0x00c8
515 #define GRF_GPIO2B_IOMUX RK30_GRF_BASE+0x00cc
516 #define GRF_GPIO2C_IOMUX RK30_GRF_BASE+0x00d0
517 #define GRF_GPIO2D_IOMUX RK30_GRF_BASE+0x00d4
518 #define GRF_GPIO3A_IOMUX RK30_GRF_BASE+0x00d8
519 #define GRF_GPIO3B_IOMUX RK30_GRF_BASE+0x00dc
520 #define GRF_GPIO3C_IOMUX RK30_GRF_BASE+0x00e0
521 #define GRF_GPIO3D_IOMUX RK30_GRF_BASE+0x00e4
522 #define GRF_GPIO4A_IOMUX RK30_GRF_BASE+0x00e8
523 #define GRF_GPIO4B_IOMUX RK30_GRF_BASE+0x00ec
524 #define GRF_GPIO4C_IOMUX RK30_GRF_BASE+0x00f0
525 #define GRF_GPIO4D_IOMUX RK30_GRF_BASE+0x00f4
526 #define GRF_GPIO6B_IOMUX RK30_GRF_BASE+0x010c
527 #define GRF_GPIO0L_PULL 0x0118
528 #define GRF_GPIO0H_PULL 0x011c
529 #define GRF_GPIO1L_PULL 0x0120
530 #define GRF_GPIO1H_PULL 0x0124
531 #define GRF_GPIO2L_PULL 0x0128
532 #define GRF_GPIO2H_PULL 0x012c
533 #define GRF_GPIO3L_PULL 0x0130
534 #define GRF_GPIO3H_PULL 0x0134
535 #define GRF_GPIO4L_PULL 0x0138
536 #define GRF_GPIO4H_PULL 0x013c
537 #define GRF_GPIO6L_PULL 0x0148
538 #define GRF_SOC_CON0 0x0150
539 #define GRF_SOC_CON1 0x0154
540 #define GRF_SOC_CON2 0x0158
541 #define GRF_SOC_STATUS0 0x015c
542 #define GRF_DMAC1_CON0 0x0160
543 #define GRF_DMAC1_CON1 0x0164
544 #define GRF_DMAC1_CON2 0x0168
545 #define GRF_DMAC2_CON0 0x016c
546 #define GRF_DMAC2_CON1 0x0170
547 #define GRF_DMAC2_CON2 0x0174
548 #define GRF_DMAC2_CON3 0x0178
549 #define GRF_UOC0_CON0 0x017c
550 #define GRF_UOC0_CON1 0x0180
551 #define GRF_UOC0_CON2 0x0184
552 #define GRF_UOC1_CON0 0x0188
553 #define GRF_UOC1_CON1 0x018c
554 #define GRF_UOC1_CON2 0x0190
555 #define GRF_UOC1_CON3 0x0194
556 #define GRF_DDRC_CON0 0x0198
557 #define GRF_DDRC_STAT 0x019c
558 #define GRF_OS_REG0 0x01c8
559 #define GRF_OS_REG1 0x01cc
560 #define GRF_OS_REG2 0x01d0
561 #define GRF_OS_REG3 0x01d4
565 #define GPIO0A7_I2S8CHSDI_NAME "gpio0a7_i2s8chsdi_name"
566 #define GPIO0A6_HOSTDRVVBUS_NAME "gpio0a6_hostdrvvbus_name"
567 #define GPIO0A5_OTGDRVVBUS_NAME "gpio0a5_otgdrvvbus_name"
568 #define GPIO0A4_PWM1_NAME "gpio0a4_pwm1_name"
569 #define GPIO0A3_PWM0_NAME "gpio0a3_pwm0_name"
570 #define GPIO0A2_HDMII2CSDA_NAME "gpio0a2_hdmii2csda_name"
571 #define GPIO0A1_HDMII2CSCL_NAME "gpio0a1_hdmii2cscl_name"
572 #define GPIO0A0_HDMIHOTPLUGIN_NAME "gpio0a0_hdmihotplugin_name"
576 #define GPIO0B7_I2S8CHSDO3_NAME "gpio0b7_i2s8chsdo3_name"
577 #define GPIO0B6_I2S8CHSDO2_NAME "gpio0b6_i2s8chsdo2_name"
578 #define GPIO0B5_I2S8CHSDO1_NAME "gpio0b5_i2s8chsdo1_name"
579 #define GPIO0B4_I2S8CHSDO0_NAME "gpio0b4_i2s8chsdo0_name"
580 #define GPIO0B3_I2S8CHLRCKTX_NAME "gpio0b3_i2s8chlrcktx_name"
581 #define GPIO0B2_I2S8CHLRCKRX_NAME "gpio0b2_i2s8chlrckrx_name"
582 #define GPIO0B1_I2S8CHSCLK_NAME "gpio0b1_i2s8chsclk_name"
583 #define GPIO0B0_I2S8CHCLK_NAME "gpio0b0_i2s8chclk_name"
587 #define GPIO0C7_TRACECTL_SMCADDR3_NAME "gpio0c7_tracectl_smcaddr3_name"
588 #define GPIO0C6_TRACECLK_SMCADDR2_NAME "gpio0c6_traceclk_smcaddr2_name"
589 #define GPIO0C5_I2S12CHSDO_NAME "gpio0c5_i2s12chsdo_name"
590 #define GPIO0C4_I2S12CHSDI_NAME "gpio0c4_i2s12chsdi_name"
591 #define GPIO0C3_I2S12CHLRCKTX_NAME "gpio0c3_i2s12chlrcktx_name"
592 #define GPIO0C2_I2S12CHLRCKRX_NAME "gpio0c2_i2s12chlrckrx_name"
593 #define GPIO0C1_I2S12CHSCLK_NAME "gpio0c1_i2s12chsclk_name"
594 #define GPIO0C0_I2S12CHCLK_NAME "gpio0c0_i2s12chclk_name"
598 #define GPIO0D7_PWM3_NAME "gpio0d7_pwm3_name"
599 #define GPIO0D6_PWM2_NAME "gpio0d6_pwm2_name"
600 #define GPIO0D5_I2S22CHSDO_SMCADDR1_NAME "gpio0d5_i2s22chsdo_smcaddr1_name"
601 #define GPIO0D4_I2S22CHSDI_SMCADDR0_NAME "gpio0d4_i2s22chsdi_smcaddr0_name"
602 #define GPIO0D3_I2S22CHLRCKTX_SMCADVN_NAME "gpio0d3_i2s22chlrcktx_smcadvn_name"
603 #define GPIO0D2_I2S22CHLRCKRX_SMCOEN_NAME "gpio0d2_i2s22chlrckrx_smcoen_name"
604 #define GPIO0D1_I2S22CHSCLK_SMCWEN_NAME "gpio0d1_i2s22chsclk_smcwen_name"
605 #define GPIO0D0_I2S22CHCLK_SMCCSN0_NAME "gpio0d0_i2s22chclk_smccsn0_name"
609 #define GPIO1A7_UART1RTSN_SPI0TXD_NAME "gpio1a7_uart1rtsn_spi0txd_name"
610 #define GPIO1A6_UART1CTSN_SPI0RXD_NAME "gpio1a6_uart1ctsn_spi0rxd_name"
611 #define GPIO1A5_UART1SOUT_SPI0CLK_NAME "gpio1a5_uart1sout_spi0clk_name"
612 #define GPIO1A4_UART1SIN_SPI0CSN0_NAME "gpio1a4_uart1sin_spi0csn0_name"
613 #define GPIO1A3_UART0RTSN_NAME "gpio1a3_uart0rtsn_name"
614 #define GPIO1A2_UART0CTSN_NAME "gpio1a2_uart0ctsn_name"
615 #define GPIO1A1_UART0SOUT_NAME "gpio1a1_uart0sout_name"
616 #define GPIO1A0_UART0SIN_NAME "gpio1a0_uart0sin_name"
621 #define GPIO1B7_CIFDATA11_NAME "gpio1b7_cifdata11_name"
622 #define GPIO1B6_CIFDATA10_NAME "gpio1b6_cifdata10_name"
623 #define GPIO1B5_CIF0DATA1_NAME "gpio1b5_cif0data1_name"
624 #define GPIO1B4_CIF0DATA0_NAME "gpio1b4_cif0data0_name"
625 #define GPIO1B3_CIF0CLKOUT_NAME "gpio1b3_cif0clkout_name"
626 #define GPIO1B2_SPDIFTX_NAME "gpio1b2_spdiftx_name"
627 #define GPIO1B1_UART2SOUT_NAME "gpio1b1_uart2sout_name"
628 #define GPIO1B0_UART2SIN_NAME "gpio1b0_uart2sin_name"
632 #define GPIO1C7_CIFDATA9_RMIIRXD0_NAME "gpio1c7_cifdata9_rmiirxd0_name"
633 #define GPIO1C6_CIFDATA8_RMIIRXD1_NAME "gpio1c6_cifdata8_rmiirxd1_name"
634 #define GPIO1C5_CIFDATA7_RMIICRSDVALID_NAME "gpio1c5_cifdata7_rmiicrsdvalid_name"
635 #define GPIO1C4_CIFDATA6_RMIIRXERR_NAME "gpio1c4_cifdata6_rmiirxerr_name"
636 #define GPIO1C3_CIFDATA5_RMIITXD0_NAME "gpio1c3_cifdata5_rmiitxd0_name"
637 #define GPIO1C2_CIF1DATA4_RMIITXD1_NAME "gpio1c2_cif1data4_rmiitxd1_name"
638 #define GPIO1C1_CIFDATA3_RMIITXEN_NAME "gpio1c1_cifdata3_rmiitxen_name"
639 #define GPIO1C0_CIF1DATA2_RMIICLKOUT_RMIICLKIN_NAME "gpio1c0_cif1data2_rmiiclkout_rmiiclkin_name"
643 #define GPIO1D7_CIF1CLKOUT_NAME "gpio1d7_cif1clkout_name"
644 #define GPIO1D6_CIF1DATA11_NAME "gpio1d6_cif1data11_name"
645 #define GPIO1D5_CIF1DATA10_NAME "gpio1d5_cif1data10_name"
646 #define GPIO1D4_CIF1DATA1_NAME "gpio1d4_cif1data1_name"
647 #define GPIO1D3_CIF1DATA0_NAME "gpio1d3_cif1data0_name"
648 #define GPIO1D2_CIF1CLKIN_NAME "gpio1d2_cif1clkin_name"
649 #define GPIO1D1_CIF1HREF_MIIMDCLK_NAME "gpio1d1_cif1href_miimdclk_name"
650 #define GPIO1D0_CIF1VSYNC_MIIMD_NAME "gpio1d0_cif1vsync_miimd_name"
654 #define GPIO2A7_LCDC1DATA7_SMCADDR11_NAME "gpio2a7_lcdc1data7_smcaddr11_name"
655 #define GPIO2A6_LCDC1DATA6_SMCADDR10_NAME "gpio2a6_lcdc1data6_smcaddr10_name"
656 #define GPIO2A5_LCDC1DATA5_SMCADDR9_NAME "gpio2a5_lcdc1data5_smcaddr9_name"
657 #define GPIO2A4_LCDC1DATA4_SMCADDR8_NAME "gpio2a4_lcdc1data4_smcaddr8_name"
658 #define GPIO2A3_LCDCDATA3_SMCADDR7_NAME "gpio2a3_lcdcdata3_smcaddr7_name"
659 #define GPIO2A2_LCDCDATA2_SMCADDR6_NAME "gpio2a2_lcdcdata2_smcaddr6_name"
660 #define GPIO2A1_LCDC1DATA1_SMCADDR5_NAME "gpio2a1_lcdc1data1_smcaddr5_name"
661 #define GPIO2A0_LCDC1DATA0_SMCADDR4_NAME "gpio2a0_lcdc1data0_smcaddr4_name"
665 #define GPIO2B7_LCDC1DATA15_SMCADDR19_HSADCDATA7_NAME "gpio2b7_lcdc1data15_smcaddr19_hsadcdata7_name"
666 #define GPIO2B6_LCDC1DATA14_SMCADDR18_TSSYNC_NAME "gpio2b6_lcdc1data14_smcaddr18_tssync_name"
667 #define GPIO2B5_LCDC1DATA13_SMCADDR17_HSADCDATA8_NAME "gpio2b5_lcdc1data13_smcaddr17_hsadcdata8_name"
668 #define GPIO2B4_LCDC1DATA12_SMCADDR16_HSADCDATA9_NAME "gpio2b4_lcdc1data12_smcaddr16_hsadcdata9_name"
669 #define GPIO2B3_LCDC1DATA11_SMCADDR15_NAME "gpio2b3_lcdc1data11_smcaddr15_name"
670 #define GPIO2B2_LCDC1DATA10_SMCADDR14_NAME "gpio2b2_lcdc1data10_smcaddr14_name"
671 #define GPIO2B1_LCDC1DATA9_SMCADDR13_NAME "gpio2b1_lcdc1data9_smcaddr13_name"
672 #define GPIO2B0_LCDC1DATA8_SMCADDR12_NAME "gpio2b0_lcdc1data8_smcaddr12_name"
676 #define GPIO2C7_LCDC1DATA23_SPI1CSN1_HSADCDATA4_NAME "gpio2c7_lcdc1data23_spi1csn1_hsadcdata4_name"
677 #define GPIO2C6_LCDC1DATA22_SPI1RXD_HSADCDATA3_NAME "gpio2c6_lcdc1data22_spi1rxd_hsadcdata3_name"
678 #define GPIO2C5_LCDC1DATA21_SPI1TXD_HSADCDATA2_NAME "gpio2c5_lcdc1data21_spi1txd_hsadcdata2_name"
679 #define GPIO2C4_LCDC1DATA20_SPI1CSN0_HSADCDATA1_NAME "gpio2c4_lcdc1data20_spi1csn0_hsadcdata1_name"
680 #define GPIO2C3_LCDC1DATA19_SPI1CLK_HSADCDATA0_NAME "gpio2c3_lcdc1data19_spi1clk_hsadcdata0_name"
681 #define GPIO2C2_LCDC1DATA18_SMCBLSN1_HSADCDATA5_NAME "gpio2c2_lcdc1data18_smcblsn1_hsadcdata5_name"
682 #define GPIO2C1_LCDC1DATA17_SMCBLSN0_HSADCDATA6_NAME "gpio2c1_lcdc1data17_smcblsn0_hsadcdata6_name"
683 #define GPIO2C0_LCDCDATA16_GPSCLK_HSADCCLKOUT_NAME "gpio2c0_lcdcdata16_gpsclk_hsadcclkout_name"
687 #define GPIO2D7_I2C1SCL_NAME "gpio2d7_i2c1scl_name"
688 #define GPIO2D6_I2C1SDA_NAME "gpio2d6_i2c1sda_name"
689 #define GPIO2D5_I2C0SCL_NAME "gpio2d5_i2c0scl_name"
690 #define GPIO2D4_I2C0SDA_NAME "gpio2d4_i2c0sda_name"
691 #define GPIO2D3_LCDC1VSYNC_NAME "gpio2d3_lcdc1vsync_name"
692 #define GPIO2D2_LCDC1HSYNC_NAME "gpio2d2_lcdc1hsync_name"
693 #define GPIO2D1_LCDC1DEN_SMCCSN1_NAME "gpio2d1_lcdc1den_smccsn1_name"
694 #define GPIO2D0_LCDC1DCLK_NAME "gpio2d0_lcdc1dclk_name"
698 //#define GPIO3A7_SDMMC0WRITEPRT_NAME "gpio3a7_sdmmc0writeprt_name"
699 #define GPIO3A7_SDMMC0PWREN_NAME "gpio3a70_sdmmc0pwren_name" //Modifyed by xbw,at 2012-03-05
700 #define GPIO3A6_SDMMC0RSTNOUT_NAME "gpio3a6_sdmmc0rstnout_name"
701 #define GPIO3A5_I2C4SCL_NAME "gpio3a5_i2c4scl_name"
702 #define GPIO3A4_I2C4SDA_NAME "gpio3a4_i2c4sda_name"
703 #define GPIO3A3_I2C3SCL_NAME "gpio3a3_i2c3scl_name"
704 #define GPIO3A2_I2C3SDA_NAME "gpio3a2_i2c3sda_name"
705 #define GPIO3A1_I2C2SCL_NAME "gpio3a1_i2c2scl_name"
706 #define GPIO3A0_I2C2SDA_NAME "gpio3a0_i2c2sda_name"
711 #define GPIO3B7_SDMMC0WRITEPRT_NAME "gpio3b7_sdmmc0writeprt_name"
712 #define GPIO3B6_SDMMC0DETECTN_NAME "gpio3b6_sdmmc0detectn_name"
713 #define GPIO3B5_SDMMC0DATA3_NAME "gpio3b5_sdmmc0data3_name"
714 #define GPIO3B4_SDMMC0DATA2_NAME "gpio3b4_sdmmc0data2_name"
715 #define GPIO3B3_SDMMC0DATA1_NAME "gpio3b3_sdmmc0data1_name"
716 #define GPIO3B2_SDMMC0DATA0_NAME "gpio3b2_sdmmc0data0_name"
717 #define GPIO3B1_SDMMC0CMD_NAME "gpio3b1_sdmmc0cmd_name"
718 #define GPIO3B0_SDMMC0CLKOUT_NAME "gpio3b0_sdmmc0clkout_name"
722 #define GPIO3C7_SDMMC1WRITEPRT_NAME "gpio3c7_sdmmc1writeprt_name"
723 #define GPIO3C6_SDMMC1DETECTN_NAME "gpio3c6_sdmmc1detectn_name"
724 #define GPIO3C5_SDMMC1CLKOUT_NAME "gpio3c5_sdmmc1clkout_name"
725 #define GPIO3C4_SDMMC1DATA3_NAME "gpio3c4_sdmmc1data3_name"
726 #define GPIO3C3_SDMMC1DATA2_NAME "gpio3c3_sdmmc1data2_name"
727 #define GPIO3C2_SDMMC1DATA1_NAME "gpio3c2_sdmmc1data1_name"
728 #define GPIO3C1_SDMMC1DATA0_NAME "gpio3c1_sdmmc1data0_name"
729 #define GPIO3C0_SMMC1CMD_NAME "gpio3c0_smmc1cmd_name"
733 #define GPIO3D7_FLASHDQS_EMMCCLKOUT_NAME "gpio3d7_flashdqs_emmcclkout_name"
734 #define GPIO3D6_UART3RTSN_NAME "gpio3d6_uart3rtsn_name"
735 #define GPIO3D5_UART3CTSN_NAME "gpio3d5_uart3ctsn_name"
736 #define GPIO3D4_UART3SOUT_NAME "gpio3d4_uart3sout_name"
737 #define GPIO3D3_UART3SIN_NAME "gpio3d3_uart3sin_name"
738 #define GPIO3D2_SDMMC1INTN_NAME "gpio3d2_sdmmc1intn_name"
739 #define GPIO3D1_SDMMC1BACKENDPWR_NAME "gpio3d1_sdmmc1backendpwr_name"
740 #define GPIO3D0_SDMMC1PWREN_NAME "gpio3d0_sdmmc1pwren_name"
744 #define GPIO4A7_FLASHDATA15_NAME "gpio4a7_flashdata15_name"
745 #define GPIO4A6_FLASHDATA14_NAME "gpio4a6_flashdata14_name"
746 #define GPIO4A5_FLASHDATA13_NAME "gpio4a5_flashdata13_name"
747 #define GPIO4A4_FLASHDATA12_NAME "gpio4a4_flashdata12_name"
748 #define GPIO4A3_FLASHDATA11_NAME "gpio4a3_flashdata11_name"
749 #define GPIO4A2_FLASHDATA10_NAME "gpio4a2_flashdata10_name"
750 #define GPIO4A1_FLASHDATA9_NAME "gpio4a1_flashdata9_name"
751 #define GPIO4A0_FLASHDATA8_NAME "gpio4a0_flashdata8_name"
755 #define GPIO4B7_SPI0CSN1_NAME "gpio4b7_spi0csn1_name"
756 #define GPIO4B6_FLASHCSN7_NAME "gpio4b6_flashcsn7_name"
757 #define GPIO4B5_FLASHCSN6_NAME "gpio4b5_flashcsn6_name"
758 #define GPIO4B4_FLASHCSN5_NAME "gpio4b4_flashcsn5_name"
759 #define GPIO4B3_FLASHCSN4_NAME "gpio4b3_flashcsn4_name"
760 #define GPIO4B2_FLASHCSN3_EMMCRSTNOUT_NAME "gpio4b2_flashcsn3_emmcrstnout_name"
761 #define GPIO4B1_FLASHCSN2_EMMCCMD_NAME "gpio4b1_flashcsn2_emmccmd_name"
762 #define GPIO4B0_FLASHCSN1_NAME "gpio4b0_flashcsn1_name"
766 #define GPIO4C7_SMCDATA7_TRACEDATA7_NAME "gpio4c7_smcdata7_tracedata7_name"
767 #define GPIO4C6_SMCDATA6_TRACEDATA6_NAME "gpio4c6_smcdata6_tracedata6_name"
768 #define GPIO4C5_SMCDATA5_TRACEDATA5_NAME "gpio4c5_smcdata5_tracedata5_name"
769 #define GPIO4C4_SMCDATA4_TRACEDATA4_NAME "gpio4c4_smcdata4_tracedata4_name"
770 #define GPIO4C3_SMCDATA3_TRACEDATA3_NAME "gpio4c3_smcdata3_tracedata3_name"
771 #define GPIO4C2_SMCDATA2_TRACEDATA2_NAME "gpio4c2_smcdata2_tracedata2_name"
772 #define GPIO4C1_SMCDATA1_TRACEDATA1_NAME "gpio4c1_smcdata1_tracedata1_name"
773 #define GPIO4C0_SMCDATA0_TRACEDATA0_NAME "gpio4c0_smcdata0_tracedata0_name"
777 #define GPIO4D7_SMCDATA15_TRACEDATA15_NAME "gpio4d7_smcdata15_tracedata15_name"
778 #define GPIO4D6_SMCDATA14_TRACEDATA14_NAME "gpio4d6_smcdata14_tracedata14_name"
779 #define GPIO4D5_SMCDATA13_TRACEDATA13_NAME "gpio4d5_smcdata13_tracedata13_name"
780 #define GPIO4D4_SMCDATA12_TRACEDATA12_NAME "gpio4d4_smcdata12_tracedata12_name"
781 #define GPIO4D3_SMCDATA11_TRACEDATA11_NAME "gpio4d3_smcdata11_tracedata11_name"
782 #define GPIO4D2_SMCDATA10_TRACEDATA10_NAME "gpio4d2_smcdata10_tracedata10_name"
783 #define GPIO4D1_SMCDATA9_TRACEDATA9_NAME "gpio4d1_smcdata9_tracedata9_name"
784 #define GPIO4D0_SMCDATA8_TRACEDATA8_NAME "gpio4d0_smcdata8_tracedata8_name"
789 #define GPIO6B7_TESTCLOCKOUT_NAME "gpio6b7_testclockout_name"
796 #define MUX_CFG(desc,reg,off,interl,mux_mode,bflags) \
800 .interleave = interl, \
801 .mux_reg = GRF_##reg##_IOMUX, \
803 .premode = mux_mode, \
809 const unsigned int offset;
811 unsigned int premode;
812 const void* __iomem mux_reg;
813 const unsigned int interleave;
816 #define rk29_mux_api_set rk30_mux_api_set
818 extern int __init rk30_iomux_init(void);
819 extern void rk30_mux_api_set(char *name, unsigned int mode);
820 extern int rk30_mux_api_get(char *name);