arch/arm/mach-rk30/board-rk3168-tb.c

   1 /*
   2  *
   3  * Copyright (C) 2012 ROCKCHIP, Inc.
   4  *
   5  * This software is licensed under the terms of the GNU General Public
   6  * License version 2, as published by the Free Software Foundation, and
   7  * may be copied, distributed, and modified under those terms.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  *
  14  */
  15
  16 #include <linux/kernel.h>
  17 #include <linux/init.h>
  18 #include <linux/platform_device.h>
  19 #include <linux/input.h>
  20 #include <linux/io.h>
  21 #include <linux/delay.h>
  22 #include <linux/i2c.h>
  23 #include <linux/skbuff.h>
  24 #include <linux/spi/spi.h>
  25 #include <linux/mmc/host.h>
  26 #include <linux/ion.h>
  27 #include <linux/cpufreq.h>
  28 #include <linux/clk.h>
  29 #include <mach/dvfs.h>
  30
  31 #include <asm/setup.h>
  32 #include <asm/mach-types.h>
  33 #include <asm/mach/arch.h>
  34 #include <asm/mach/map.h>
  35 #include <asm/mach/flash.h>
  36 #include <asm/hardware/gic.h>
  37
  38 #include <mach/board.h>
  39 #include <mach/hardware.h>
  40 #include <mach/io.h>
  41 #include <mach/gpio.h>
  42 #include <mach/iomux.h>
  43 #include <linux/rk_fb.h>
  44 #include <linux/regulator/machine.h>
  45 #include <linux/rfkill-rk.h>
  46 #include <linux/sensor-dev.h>
  47 #include <linux/mfd/tps65910.h>
  48 #include <linux/regulator/act8846.h>
  49 #include <linux/mfd/rk808.h>
  50 #include <linux/mfd/ricoh619.h>
  51 #include <linux/regulator/rk29-pwm-regulator.h>
  52 #ifdef CONFIG_MFD_RT5025
  53 #include <linux/mfd/rt5025.h>
  54 #endif
  55 #include <plat/efuse.h>
  56
  57 #ifdef CONFIG_CW2015_BATTERY
  58 #include <linux/power/cw2015_battery.h>
  59 #endif
  60 #if defined(CONFIG_MFD_RK610)
  61 #include <linux/mfd/rk610_core.h>
  62 #endif
  63
  64 #if defined(CONFIG_MFD_RK616)
  65 #include <linux/mfd/rk616.h>
  66 #endif
  67
  68
  69 #if defined(CONFIG_RK_HDMI)
  70         #include "../../../drivers/video/rockchip/hdmi/rk_hdmi.h"
  71 #endif
  72
  73 #if defined(CONFIG_SPIM_RK29)
  74 #include "../../../drivers/spi/rk29_spim.h"
  75 #endif
  76 #if defined(CONFIG_GPS_RK)
  77 #include "../../../drivers/misc/gps/rk_gps/rk_gps.h"
  78 #endif
  79 #if defined(CONFIG_MU509)
  80 #include <linux/mu509.h>
  81 #endif
  82 #if defined(CONFIG_MW100)
  83 #include <linux/mw100.h>
  84 #endif
  85 #if defined(CONFIG_MT6229)
  86 #include <linux/mt6229.h>
  87 #endif
  88 #if defined(CONFIG_ANDROID_TIMED_GPIO)
  89 #include "../../../drivers/staging/android/timed_gpio.h"
  90 #endif
  91
  92 #if defined(CONFIG_MT6620)
  93 #include <linux/gps.h>
  94 #endif
  95 #include "board-rk3168-tb-camera.c"
  96
  97 #if defined(CONFIG_TOUCHSCREEN_GT8XX)
  98 #define TOUCH_RESET_PIN  RK30_PIN0_PB6
  99 #define TOUCH_PWR_PIN    RK30_PIN0_PC5   // need to fly line by hardware engineer
 100
 101 /* Android Parameter */
 102 static int ap_mdm = 0;
 103 module_param(ap_mdm, int, 0644);
 104 static int ap_has_alsa = 0;
 105 module_param(ap_has_alsa, int, 0644);
 106 static int ap_data_only = 2;
 107 module_param(ap_data_only, int, 0644);
 108 static int ap_has_earphone = 0;
 109 module_param(ap_has_earphone, int, 0644);
 110
 111
 112 static int goodix_init_platform_hw(void)
 113 {
 114         int ret;
 115
 116         if (TOUCH_PWR_PIN != INVALID_GPIO) {
 117                 ret = gpio_request(TOUCH_PWR_PIN, "goodix power pin");
 118                 if (ret != 0) {
 119                         gpio_free(TOUCH_PWR_PIN);
 120                         printk("goodix power error\n");
 121                         return -EIO;
 122                 }
 123                 gpio_direction_output(TOUCH_PWR_PIN, 0);
 124                 gpio_set_value(TOUCH_PWR_PIN, GPIO_LOW);
 125                 msleep(100);
 126         }
 127
 128         if (TOUCH_RESET_PIN != INVALID_GPIO) {
 129                 ret = gpio_request(TOUCH_RESET_PIN, "goodix reset pin");
 130                 if (ret != 0) {
 131                         gpio_free(TOUCH_RESET_PIN);
 132                         printk("goodix gpio_request error\n");
 133                         return -EIO;
 134                 }
 135                 gpio_direction_output(TOUCH_RESET_PIN, 1);
 136                 msleep(100);
 137                 //gpio_set_value(TOUCH_RESET_PIN, GPIO_LOW);
 138                 //msleep(100);
 139                 //gpio_set_value(TOUCH_RESET_PIN, GPIO_HIGH);
 140                 //msleep(500);
 141         }
 142         return 0;
 143 }
 144
 145 struct goodix_platform_data goodix_info = {
 146         .model = 8105,
 147         .irq_pin = RK30_PIN1_PB7,
 148         .rest_pin = TOUCH_RESET_PIN,
 149         .init_platform_hw = goodix_init_platform_hw,
 150 };
 151 #endif
 152
 153 static struct spi_board_info board_spi_devices[] = {
 154 };
 155
 156 /***********************************************************
 157 *       rk30  backlight
 158 ************************************************************/
 159 #ifdef CONFIG_BACKLIGHT_RK29_BL
 160 #define PWM_ID            3
 161 #define PWM_MODE          PWM3
 162 #define PWM_EFFECT_VALUE  1
 163
 164 #define LCD_DISP_ON_PIN
 165
 166 #ifdef  LCD_DISP_ON_PIN
 167 #define BL_EN_PIN         RK30_PIN0_PA2
 168 #define BL_EN_VALUE       GPIO_HIGH
 169 #endif
 170 static int rk29_backlight_io_init(void)
 171 {
 172         int ret = 0;
 173
 174         iomux_set(PWM_MODE);
 175 #ifdef  LCD_DISP_ON_PIN
 176         ret = gpio_request(BL_EN_PIN, "bl_en");
 177         if (ret == 0) {
 178                 gpio_direction_output(BL_EN_PIN, BL_EN_VALUE);
 179         }
 180 #endif
 181         return ret;
 182 }
 183
 184 static int rk29_backlight_io_deinit(void)
 185 {
 186         int ret = 0, pwm_gpio;
 187 #ifdef  LCD_DISP_ON_PIN
 188         gpio_free(BL_EN_PIN);
 189 #endif
 190         pwm_gpio = iomux_mode_to_gpio(PWM_MODE);
 191         gpio_request(pwm_gpio, "bl_pwm");
 192         gpio_direction_output(pwm_gpio, GPIO_LOW);
 193         return ret;
 194 }
 195
 196 static int rk29_backlight_pwm_suspend(void)
 197 {
 198         int ret, pwm_gpio = iomux_mode_to_gpio(PWM_MODE);
 199
 200         ret = gpio_request(pwm_gpio, "bl_pwm");
 201         if (ret) {
 202                 printk("func %s, line %d: request gpio fail\n", __FUNCTION__, __LINE__);
 203                 return ret;
 204         }
 205         gpio_direction_output(pwm_gpio, GPIO_LOW);
 206 #ifdef  LCD_DISP_ON_PIN
 207         gpio_direction_output(BL_EN_PIN, !BL_EN_VALUE);
 208 #endif
 209         return ret;
 210 }
 211
 212 static int rk29_backlight_pwm_resume(void)
 213 {
 214         int pwm_gpio = iomux_mode_to_gpio(PWM_MODE);
 215
 216         gpio_free(pwm_gpio);
 217         iomux_set(PWM_MODE);
 218 #ifdef  LCD_DISP_ON_PIN
 219         msleep(30);
 220         gpio_direction_output(BL_EN_PIN, BL_EN_VALUE);
 221 #endif
 222         return 0;
 223 }
 224
 225 static struct rk29_bl_info rk29_bl_info = {
 226         .pwm_id = PWM_ID,
 227         .min_brightness=20,
 228         .max_brightness=255,
 229         .brightness_mode =BRIGHTNESS_MODE_CONIC,
 230         .bl_ref = PWM_EFFECT_VALUE,
 231         .io_init = rk29_backlight_io_init,
 232         .io_deinit = rk29_backlight_io_deinit,
 233         .pwm_suspend = rk29_backlight_pwm_suspend,
 234         .pwm_resume = rk29_backlight_pwm_resume,
 235 };
 236
 237 static struct platform_device rk29_device_backlight = {
 238         .name   = "rk29_backlight",
 239         .id     = -1,
 240         .dev    = {
 241                 .platform_data  = &rk29_bl_info,
 242         }
 243 };
 244
 245 #endif
 246
 247 #ifdef CONFIG_RK29_SUPPORT_MODEM
 248
 249 #define RK30_MODEM_POWER        RK30_PIN0_PC6
 250 #define RK30_MODEM_POWER_IOMUX  iomux_set(GPIO0_C6)
 251
 252 static int rk30_modem_io_init(void)
 253 {
 254     printk("%s\n", __FUNCTION__);
 255     RK30_MODEM_POWER_IOMUX;
 256
 257         return 0;
 258 }
 259
 260 static struct rk29_io_t rk30_modem_io = {
 261     .io_addr    = RK30_MODEM_POWER,
 262     .enable     = GPIO_HIGH,
 263     .disable    = GPIO_LOW,
 264     .io_init    = rk30_modem_io_init,
 265 };
 266
 267 static struct platform_device rk30_device_modem = {
 268         .name   = "rk30_modem",
 269         .id     = -1,
 270         .dev    = {
 271                 .platform_data  = &rk30_modem_io,
 272         }
 273 };
 274 #endif
 275 #if defined(CONFIG_MU509)
 276 static int mu509_io_init(void)
 277 {
 278
 279         iomux_set(GPIO2_D5);
 280         iomux_set(GPIO0_C6);
 281         iomux_set(GPIO2_D4);
 282         iomux_set(GPIO0_C4);
 283         iomux_set(GPIO0_C5);
 284         return 0;
 285 }
 286
 287 static int mu509_io_deinit(void)
 288 {
 289
 290         return 0;
 291 }
 292
 293 struct rk29_mu509_data rk29_mu509_info = {
 294         .io_init = mu509_io_init,
 295         .io_deinit = mu509_io_deinit,
 296         .modem_power_en = RK30_PIN2_PD5,
 297         .bp_power = RK30_PIN0_PC6,
 298         .bp_reset = RK30_PIN2_PD4,
 299         .ap_wakeup_bp = RK30_PIN0_PC4,
 300         .bp_wakeup_ap = RK30_PIN0_PC5,
 301 };
 302 struct platform_device rk29_device_mu509 = {
 303         .name = "mu509",
 304         .id = -1,
 305         .dev            = {
 306                 .platform_data = &rk29_mu509_info,
 307         }
 308     };
 309 #endif
 310 #if defined(CONFIG_MW100)
 311 static int mw100_io_init(void)
 312 {
 313         iomux_set(GPIO2_D5);
 314         iomux_set(GPIO0_C6);
 315         iomux_set(GPIO2_D4);
 316         iomux_set(GPIO0_C4);
 317         iomux_set(GPIO0_C5);
 318         return 0;
 319 }
 320
 321 static int mw100_io_deinit(void)
 322 {
 323
 324         return 0;
 325 }
 326
 327 struct rk29_mw100_data rk29_mw100_info = {
 328         .io_init = mw100_io_init,
 329         .io_deinit = mw100_io_deinit,
 330         .modem_power_en = RK30_PIN2_PD5,
 331         .bp_power = RK30_PIN0_PC6,
 332         .bp_reset = RK30_PIN2_PD4,
 333         .ap_wakeup_bp = RK30_PIN0_PC4,
 334         .bp_wakeup_ap = RK30_PIN0_PC5,
 335 };
 336 struct platform_device rk29_device_mw100 = {
 337         .name = "mw100",
 338         .id = -1,
 339         .dev            = {
 340                 .platform_data = &rk29_mw100_info,
 341         }
 342     };
 343 #endif
 344 #if defined(CONFIG_MT6229)
 345 static int mt6229_io_init(void)
 346 {
 347         iomux_set(GPIO2_D5);
 348         iomux_set(GPIO0_C6);
 349         iomux_set(GPIO2_D4);
 350         iomux_set(GPIO0_C4);
 351         iomux_set(GPIO0_C5);
 352         return 0;
 353 }
 354
 355 static int mt6229_io_deinit(void)
 356 {
 357
 358         return 0;
 359 }
 360
 361 struct rk29_mt6229_data rk29_mt6229_info = {
 362         .io_init = mt6229_io_init,
 363         .io_deinit = mt6229_io_deinit,
 364         .modem_power_en = RK30_PIN2_PD5,
 365         .bp_power = RK30_PIN0_PC6,
 366         .bp_reset = RK30_PIN2_PD4,
 367         .ap_wakeup_bp = RK30_PIN0_PC4,
 368         .bp_wakeup_ap = RK30_PIN0_PC5,
 369 };
 370 struct platform_device rk29_device_mt6229 = {
 371         .name = "mt6229",
 372         .id = -1,
 373         .dev            = {
 374                 .platform_data = &rk29_mt6229_info,
 375         }
 376     };
 377 #endif
 378
 379 /*MMA8452 gsensor*/
 380 #if defined (CONFIG_GS_MMA8452)
 381 #define MMA8452_INT_PIN   RK30_PIN0_PB7
 382
 383 static int mma8452_init_platform_hw(void)
 384 {
 385         return 0;
 386 }
 387
 388 static struct sensor_platform_data mma8452_info = {
 389         .type = SENSOR_TYPE_ACCEL,
 390         .irq_enable = 1,
 391         .poll_delay_ms = 30,
 392         .init_platform_hw = mma8452_init_platform_hw,
 393         .orientation = {-1, 0, 0, 0, -1, 0, 0, 0, 1},
 394 };
 395 #endif
 396 #if defined (CONFIG_GS_LIS3DH)
 397 #define LIS3DH_INT_PIN   RK30_PIN0_PB7
 398
 399 static int lis3dh_init_platform_hw(void)
 400 {
 401
 402         return 0;
 403 }
 404
 405 static struct sensor_platform_data lis3dh_info = {
 406         .type = SENSOR_TYPE_ACCEL,
 407         .irq_enable = 1,
 408         .poll_delay_ms = 30,
 409         .init_platform_hw = lis3dh_init_platform_hw,
 410         .orientation = {-1, 0, 0, 0, -1, 0, 0, 0, 1},
 411 };
 412 #endif
 413 #if defined (CONFIG_COMPASS_AK8975)
 414 static struct sensor_platform_data akm8975_info =
 415 {
 416         .type = SENSOR_TYPE_COMPASS,
 417         .irq_enable = 1,
 418         .poll_delay_ms = 30,
 419         .m_layout =
 420         {
 421                 {
 422                         {1, 0, 0},
 423                         {0, 1, 0},
 424                         {0, 0, 1},
 425                 },
 426
 427                 {
 428                         {1, 0, 0},
 429                         {0, 1, 0},
 430                         {0, 0, 1},
 431                 },
 432
 433                 {
 434                         {1, 0, 0},
 435                         {0, 1, 0},
 436                         {0, 0, 1},
 437                 },
 438
 439                 {
 440                         {1, 0, 0},
 441                         {0, 1, 0},
 442                         {0, 0, 1},
 443                 },
 444         }
 445 };
 446
 447 #endif
 448
 449 #if defined(CONFIG_GYRO_L3G4200D)
 450
 451 #include <linux/l3g4200d.h>
 452 #define L3G4200D_INT_PIN  RK30_PIN0_PB4
 453
 454 static int l3g4200d_init_platform_hw(void)
 455 {
 456         return 0;
 457 }
 458
 459 static struct sensor_platform_data l3g4200d_info = {
 460         .type = SENSOR_TYPE_GYROSCOPE,
 461         .irq_enable = 1,
 462         .poll_delay_ms = 30,
 463         .orientation = {0, 1, 0, -1, 0, 0, 0, 0, 1},
 464         .init_platform_hw = l3g4200d_init_platform_hw,
 465         .x_min = 40,//x_min,y_min,z_min = (0-100) according to hardware
 466         .y_min = 40,
 467         .z_min = 20,
 468 };
 469
 470 #endif
 471
 472 #ifdef CONFIG_LS_CM3217
 473 static struct sensor_platform_data cm3217_info = {
 474         .type = SENSOR_TYPE_LIGHT,
 475         .irq_enable = 0,
 476         .poll_delay_ms = 500,
 477 };
 478
 479 #endif
 480
 481 #ifdef CONFIG_FB_ROCKCHIP
 482
 483 #define LCD_CS_PIN         INVALID_GPIO
 484 #define LCD_CS_VALUE       GPIO_HIGH
 485
 486 #define LCD_EN_PIN         RK30_PIN0_PB0
 487 #define LCD_EN_VALUE       GPIO_HIGH
 488
 489 static int rk_fb_io_init(struct rk29_fb_setting_info *fb_setting)
 490 {
 491         int ret = 0;
 492
 493         if(LCD_CS_PIN !=INVALID_GPIO)
 494         {
 495                 ret = gpio_request(LCD_CS_PIN, NULL);
 496                 if (ret != 0)
 497                 {
 498                         gpio_free(LCD_CS_PIN);
 499                         printk(KERN_ERR "request lcd cs pin fail!\n");
 500                         return -1;
 501                 }
 502                 else
 503                 {
 504                         gpio_direction_output(LCD_CS_PIN, LCD_CS_VALUE);
 505                 }
 506         }
 507
 508         if(LCD_EN_PIN !=INVALID_GPIO)
 509         {
 510                 ret = gpio_request(LCD_EN_PIN, NULL);
 511                 if (ret != 0)
 512                 {
 513                         gpio_free(LCD_EN_PIN);
 514                         printk(KERN_ERR "request lcd en pin fail!\n");
 515                         return -1;
 516                 }
 517                 else
 518                 {
 519                         gpio_direction_output(LCD_EN_PIN, LCD_EN_VALUE);
 520                 }
 521         }
 522         return 0;
 523 }
 524 static int rk_fb_io_disable(void)
 525 {
 526         if(LCD_CS_PIN !=INVALID_GPIO)
 527         {
 528                 gpio_set_value(LCD_CS_PIN, !LCD_CS_VALUE);
 529         }
 530         if(LCD_EN_PIN !=INVALID_GPIO)
 531         {
 532                 gpio_set_value(LCD_EN_PIN, !LCD_EN_VALUE);
 533         }
 534         return 0;
 535 }
 536 static int rk_fb_io_enable(void)
 537 {
 538         if(LCD_CS_PIN !=INVALID_GPIO)
 539         {
 540                 gpio_set_value(LCD_CS_PIN, LCD_CS_VALUE);
 541         }
 542         if(LCD_EN_PIN !=INVALID_GPIO)
 543         {
 544                 gpio_set_value(LCD_EN_PIN, LCD_EN_VALUE);
 545         }
 546         return 0;
 547 }
 548
 549 #if defined(CONFIG_LCDC0_RK3066B) || defined(CONFIG_LCDC0_RK3188)
 550 struct rk29fb_info lcdc0_screen_info = {
 551 #if defined(CONFIG_RK_HDMI) && defined(CONFIG_HDMI_SOURCE_LCDC0) && defined(CONFIG_DUAL_LCDC_DUAL_DISP_IN_KERNEL)
 552         .prop      = EXTEND,    //extend display device
 553         .io_init    = NULL,
 554         .io_disable = NULL,
 555         .io_enable = NULL,
 556         .set_screen_info = hdmi_init_lcdc,
 557 #else
 558         .prop      = PRMRY,             //primary display device
 559         .io_init   = rk_fb_io_init,
 560         .io_disable = rk_fb_io_disable,
 561         .io_enable = rk_fb_io_enable,
 562         .set_screen_info = set_lcd_info,
 563 #endif
 564 };
 565 #endif
 566
 567 #if defined(CONFIG_LCDC1_RK3066B) || defined(CONFIG_LCDC1_RK3188)
 568 struct rk29fb_info lcdc1_screen_info = {
 569 #if defined(CONFIG_RK_HDMI) && defined(CONFIG_HDMI_SOURCE_LCDC1) && defined(CONFIG_DUAL_LCDC_DUAL_DISP_IN_KERNEL)
 570         .prop      = EXTEND,    //extend display device
 571         .io_init    = NULL,
 572         .io_disable = NULL,
 573         .io_enable = NULL,
 574         .set_screen_info = hdmi_init_lcdc,
 575 #else
 576         .prop      = PRMRY,             //primary display device
 577         .io_init   = rk_fb_io_init,
 578         .io_disable = rk_fb_io_disable,
 579         .io_enable = rk_fb_io_enable,
 580         .set_screen_info = set_lcd_info,
 581 #endif
 582 };
 583 #endif
 584
 585 static struct resource resource_fb[] = {
 586         [0] = {
 587                 .name  = "fb0 buf",
 588                 .start = 0,
 589                 .end   = 0,//RK30_FB0_MEM_SIZE - 1,
 590                 .flags = IORESOURCE_MEM,
 591         },
 592         [1] = {
 593                 .name  = "ipp buf",  //for rotate
 594                 .start = 0,
 595                 .end   = 0,//RK30_FB0_MEM_SIZE - 1,
 596                 .flags = IORESOURCE_MEM,
 597         },
 598         [2] = {
 599                 .name  = "fb2 buf",
 600                 .start = 0,
 601                 .end   = 0,//RK30_FB0_MEM_SIZE - 1,
 602                 .flags = IORESOURCE_MEM,
 603         },
 604 };
 605
 606 static struct platform_device device_fb = {
 607         .name           = "rk-fb",
 608         .id             = -1,
 609         .num_resources  = ARRAY_SIZE(resource_fb),
 610         .resource       = resource_fb,
 611 };
 612 #endif
 613 #if defined(CONFIG_ARCH_RK3188)
 614 static struct resource resource_mali[] = {
 615         [0] = {
 616         .name  = "ump buf",
 617         .start = 0,
 618         .end   = 0,
 619         .flags = IORESOURCE_MEM,
 620         },
 621
 622 };
 623
 624 static struct platform_device device_mali= {
 625         .name           = "mali400_ump",
 626         .id             = -1,
 627         .num_resources  = ARRAY_SIZE(resource_mali),
 628         .resource       = resource_mali,
 629 };
 630 #endif
 631
 632 #if defined(CONFIG_LCDC0_RK3066B) || defined(CONFIG_LCDC0_RK3188)
 633 static struct resource resource_lcdc0[] = {
 634         [0] = {
 635                 .name  = "lcdc0 reg",
 636                 .start = RK30_LCDC0_PHYS,
 637                 .end   = RK30_LCDC0_PHYS + RK30_LCDC0_SIZE - 1,
 638                 .flags = IORESOURCE_MEM,
 639         },
 640
 641         [1] = {
 642                 .name  = "lcdc0 irq",
 643                 .start = IRQ_LCDC0,
 644                 .end   = IRQ_LCDC0,
 645                 .flags = IORESOURCE_IRQ,
 646         },
 647 };
 648
 649 static struct platform_device device_lcdc0 = {
 650         .name             = "rk30-lcdc",
 651         .id               = 0,
 652         .num_resources    = ARRAY_SIZE(resource_lcdc0),
 653         .resource         = resource_lcdc0,
 654         .dev            = {
 655                 .platform_data = &lcdc0_screen_info,
 656         },
 657 };
 658 #endif
 659 #if defined(CONFIG_LCDC1_RK3066B) || defined(CONFIG_LCDC1_RK3188)
 660 static struct resource resource_lcdc1[] = {
 661         [0] = {
 662                 .name  = "lcdc1 reg",
 663                 .start = RK30_LCDC1_PHYS,
 664                 .end   = RK30_LCDC1_PHYS + RK30_LCDC1_SIZE - 1,
 665                 .flags = IORESOURCE_MEM,
 666         },
 667         [1] = {
 668                 .name  = "lcdc1 irq",
 669                 .start = IRQ_LCDC1,
 670                 .end   = IRQ_LCDC1,
 671                 .flags = IORESOURCE_IRQ,
 672         },
 673 };
 674
 675 static struct platform_device device_lcdc1 = {
 676         .name             = "rk30-lcdc",
 677         .id               = 1,
 678         .num_resources    = ARRAY_SIZE(resource_lcdc1),
 679         .resource         = resource_lcdc1,
 680         .dev            = {
 681                 .platform_data = &lcdc1_screen_info,
 682         },
 683 };
 684 #endif
 685
 686 #if defined(CONFIG_MFD_RK610)
 687 #define RK610_RST_PIN                   RK30_PIN2_PC5
 688 static int rk610_power_on_init(void)
 689 {
 690         int ret;
 691         if(RK610_RST_PIN != INVALID_GPIO)
 692         {
 693                 ret = gpio_request(RK610_RST_PIN, "rk610 reset");
 694                 if (ret)
 695                 {
 696                         printk(KERN_ERR "rk610_control_probe request gpio fail\n");
 697                 }
 698                 else
 699                 {
 700                         gpio_direction_output(RK610_RST_PIN, GPIO_HIGH);
 701                         msleep(100);
 702                         gpio_direction_output(RK610_RST_PIN, GPIO_LOW);
 703                         msleep(100);
 704                         gpio_set_value(RK610_RST_PIN, GPIO_HIGH);
 705                 }
 706         }
 707
 708         return 0;
 709
 710 }
 711
 712
 713 static struct rk610_ctl_platform_data rk610_ctl_pdata = {
 714         .rk610_power_on_init = rk610_power_on_init,
 715 };
 716 #endif
 717
 718 #if defined(CONFIG_MFD_RK616)
 719 #define RK616_RST_PIN                   RK30_PIN3_PB2
 720 #define RK616_PWREN_PIN                 RK30_PIN0_PA3
 721 #define RK616_SCL_RATE                  (100*1000)   //i2c scl rate
 722 static int rk616_power_on_init(void)
 723 {
 724         int ret;
 725
 726         if(RK616_PWREN_PIN != INVALID_GPIO)
 727         {
 728                 ret = gpio_request(RK616_PWREN_PIN, "rk616 pwren");
 729                 if (ret)
 730                 {
 731                         printk(KERN_ERR "rk616 pwren gpio request fail\n");
 732                 }
 733                 else
 734                 {
 735                         gpio_direction_output(RK616_PWREN_PIN,GPIO_HIGH);
 736                 }
 737         }
 738
 739         if(RK616_RST_PIN != INVALID_GPIO)
 740         {
 741                 ret = gpio_request(RK616_RST_PIN, "rk616 reset");
 742                 if (ret)
 743                 {
 744                         printk(KERN_ERR "rk616 reset gpio request fail\n");
 745                 }
 746                 else
 747                 {
 748                         gpio_direction_output(RK616_RST_PIN, GPIO_HIGH);
 749                         msleep(2);
 750                         gpio_direction_output(RK616_RST_PIN, GPIO_LOW);
 751                         msleep(10);
 752                         gpio_set_value(RK616_RST_PIN, GPIO_HIGH);
 753                 }
 754         }
 755
 756         return 0;
 757
 758 }
 759
 760
 761 static int rk616_power_deinit(void)
 762 {
 763         gpio_set_value(RK616_PWREN_PIN,GPIO_LOW);
 764         gpio_set_value(RK616_RST_PIN,GPIO_LOW);
 765         gpio_free(RK616_PWREN_PIN);
 766         gpio_free(RK616_RST_PIN);
 767
 768         return 0;
 769 }
 770
 771 static struct rk616_platform_data rk616_pdata = {
 772         .power_init = rk616_power_on_init,
 773         .power_deinit = rk616_power_deinit,
 774         .scl_rate   = RK616_SCL_RATE,
 775         .lcd0_func = INPUT,             //port lcd0 as input
 776         .lcd1_func = INPUT,             //port lcd1 as input
 777         .lvds_ch_nr = 1,                //the number of used lvds channel
 778         .hdmi_irq = RK30_PIN2_PD6,
 779         .spk_ctl_gpio = RK30_PIN2_PD7,
 780         .hp_ctl_gpio = RK30_PIN2_PD7,
 781 };
 782 #endif
 783
 784
 785 #ifdef CONFIG_SND_SOC_RK610
 786 static int rk610_codec_io_init(void)
 787 {
 788 //if need iomux.
 789 //Must not gpio_request
 790         return 0;
 791 }
 792
 793 static struct rk610_codec_platform_data rk610_codec_pdata = {
 794         .spk_ctl_io = RK30_PIN2_PD7,
 795         .io_init = rk610_codec_io_init,
 796 };
 797 #endif
 798
 799 #ifdef CONFIG_ANDROID_TIMED_GPIO
 800 static struct timed_gpio timed_gpios[] = {
 801         {
 802                 .name = "vibrator",
 803                 .gpio = INVALID_GPIO,
 804                 .max_timeout = 1000,
 805                 .active_low = 0,
 806                 .adjust_time =20,      //adjust for diff product
 807         },
 808 };
 809
 810 static struct timed_gpio_platform_data rk29_vibrator_info = {
 811         .num_gpios = 1,
 812         .gpios = timed_gpios,
 813 };
 814
 815 static struct platform_device rk29_device_vibrator = {
 816         .name = "timed-gpio",
 817         .id = -1,
 818         .dev = {
 819                 .platform_data = &rk29_vibrator_info,
 820         },
 821
 822 };
 823 #endif
 824
 825 #ifdef CONFIG_LEDS_GPIO_PLATFORM
 826 static struct gpio_led rk29_leds[] = {
 827         {
 828                 .name = "button-backlight",
 829                 .gpio = INVALID_GPIO,
 830                 .default_trigger = "timer",
 831                 .active_low = 0,
 832                 .retain_state_suspended = 0,
 833                 .default_state = LEDS_GPIO_DEFSTATE_OFF,
 834         },
 835 };
 836
 837 static struct gpio_led_platform_data rk29_leds_pdata = {
 838         .leds = rk29_leds,
 839         .num_leds = ARRAY_SIZE(rk29_leds),
 840 };
 841
 842 static struct platform_device rk29_device_gpio_leds = {
 843         .name   = "leds-gpio",
 844         .id     = -1,
 845         .dev    = {
 846                 .platform_data  = &rk29_leds_pdata,
 847         },
 848 };
 849 #endif
 850
 851 #ifdef CONFIG_RK_IRDA
 852 #define IRDA_IRQ_PIN           INVALID_GPIO //RK30_PIN0_PA3
 853
 854 static int irda_iomux_init(void)
 855 {
 856         int ret = 0;
 857
 858         //irda irq pin
 859         ret = gpio_request(IRDA_IRQ_PIN, NULL);
 860         if (ret != 0) {
 861                 gpio_free(IRDA_IRQ_PIN);
 862                 printk(">>>>>> IRDA_IRQ_PIN gpio_request err \n ");
 863         }
 864         gpio_pull_updown(IRDA_IRQ_PIN, PullDisable);
 865         gpio_direction_input(IRDA_IRQ_PIN);
 866
 867         return 0;
 868 }
 869
 870 static int irda_iomux_deinit(void)
 871 {
 872         gpio_free(IRDA_IRQ_PIN);
 873         return 0;
 874 }
 875
 876 static struct irda_info rk29_irda_info = {
 877         .intr_pin = IRDA_IRQ_PIN,
 878         .iomux_init = irda_iomux_init,
 879         .iomux_deinit = irda_iomux_deinit,
 880         //.irda_pwr_ctl = bu92747guw_power_ctl,
 881 };
 882
 883 static struct platform_device irda_device = {
 884 #ifdef CONFIG_RK_IRDA_NET
 885         .name = "rk_irda",
 886 #else
 887         .name = "bu92747_irda",
 888 #endif
 889         .id = -1,
 890         .dev = {
 891                 .platform_data = &rk29_irda_info,
 892         }
 893 };
 894 #endif
 895
 896 #ifdef CONFIG_ION
 897 #define ION_RESERVE_SIZE        (80 * SZ_1M)
 898 static struct ion_platform_data rk30_ion_pdata = {
 899         .nr = 1,
 900         .heaps = {
 901                 {
 902                         .type = ION_HEAP_TYPE_CARVEOUT,
 903                         .id = ION_NOR_HEAP_ID,
 904                         .name = "norheap",
 905                         .size = ION_RESERVE_SIZE,
 906                 }
 907         },
 908 };
 909
 910 static struct platform_device device_ion = {
 911         .name = "ion-rockchip",
 912         .id = 0,
 913         .dev = {
 914                 .platform_data = &rk30_ion_pdata,
 915         },
 916 };
 917 #endif
 918
 919 /**************************************************************************************************
 920  * SDMMC devices,  include the module of SD,MMC,and sdio.noted by xbw at 2012-03-05
 921 **************************************************************************************************/
 922 #ifdef CONFIG_SDMMC_RK29
 923 #include "board-rk3168-tb-sdmmc-conifg.c"
 924 #include "../plat-rk/rk-sdmmc-ops.c"
 925 #include "../plat-rk/rk-sdmmc-wifi.c"
 926 #endif //endif ---#ifdef CONFIG_SDMMC_RK29
 927
 928 #ifdef CONFIG_SDMMC0_RK29
 929 static int rk29_sdmmc0_cfg_gpio(void)
 930 {
 931 #ifdef CONFIG_SDMMC_RK29_OLD
 932         iomux_set(MMC0_CMD);
 933         iomux_set(MMC0_CLKOUT);
 934         iomux_set(MMC0_D0);
 935         iomux_set(MMC0_D1);
 936         iomux_set(MMC0_D2);
 937         iomux_set(MMC0_D3);
 938
 939         iomux_set_gpio_mode(iomux_mode_to_gpio(MMC0_DETN));
 940
 941         gpio_request(RK30_PIN3_PA7, "sdmmc-power");
 942         gpio_direction_output(RK30_PIN3_PA7, GPIO_LOW);
 943
 944 #else
 945         rk29_sdmmc_set_iomux(0, 0xFFFF);
 946
 947     #if defined(CONFIG_SDMMC0_RK29_SDCARD_DET_FROM_GPIO)
 948         #if SDMMC_USE_NEW_IOMUX_API
 949         iomux_set_gpio_mode(iomux_gpio_to_mode(RK29SDK_SD_CARD_DETECT_N));
 950         #else
 951         rk30_mux_api_set(RK29SDK_SD_CARD_DETECT_PIN_NAME, RK29SDK_SD_CARD_DETECT_IOMUX_FGPIO);
 952         #endif
 953     #else
 954         #if SDMMC_USE_NEW_IOMUX_API
 955         iomux_set(MMC0_DETN);
 956         #else
 957         rk30_mux_api_set(RK29SDK_SD_CARD_DETECT_PIN_NAME, RK29SDK_SD_CARD_DETECT_IOMUX_FMUX);
 958         #endif
 959     #endif
 960
 961 #if defined(CONFIG_SDMMC0_RK29_WRITE_PROTECT)
 962         gpio_request(SDMMC0_WRITE_PROTECT_PIN, "sdmmc-wp");
 963         gpio_direction_input(SDMMC0_WRITE_PROTECT_PIN);
 964 #endif
 965
 966 #endif
 967
 968         return 0;
 969 }
 970
 971 #define CONFIG_SDMMC0_USE_DMA
 972 struct rk29_sdmmc_platform_data default_sdmmc0_data = {
 973         .host_ocr_avail =
 974             (MMC_VDD_25_26 | MMC_VDD_26_27 | MMC_VDD_27_28 | MMC_VDD_28_29 |
 975              MMC_VDD_29_30 | MMC_VDD_30_31 | MMC_VDD_31_32 | MMC_VDD_32_33 |
 976              MMC_VDD_33_34 | MMC_VDD_34_35 | MMC_VDD_35_36),
 977         .host_caps =
 978             (MMC_CAP_4_BIT_DATA | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
 979         .io_init = rk29_sdmmc0_cfg_gpio,
 980
 981 #if !defined(CONFIG_SDMMC_RK29_OLD)
 982         .set_iomux = rk29_sdmmc_set_iomux,
 983 #endif
 984
 985         .dma_name = "sd_mmc",
 986 #ifdef CONFIG_SDMMC0_USE_DMA
 987         .use_dma = 1,
 988 #else
 989         .use_dma = 0,
 990 #endif
 991
 992 #if defined(CONFIG_WIFI_COMBO_MODULE_CONTROL_FUNC) && defined(CONFIG_USE_SDMMC0_FOR_WIFI_DEVELOP_BOARD)
 993     .status = rk29sdk_wifi_mmc0_status,
 994     .register_status_notify = rk29sdk_wifi_mmc0_status_register,
 995 #endif
 996
 997 #if defined(RK29SDK_SD_CARD_PWR_EN) || (INVALID_GPIO != RK29SDK_SD_CARD_PWR_EN)
 998     .power_en = RK29SDK_SD_CARD_PWR_EN,
 999     .power_en_level = RK29SDK_SD_CARD_PWR_EN_LEVEL,
1000 #else
1001     .power_en = INVALID_GPIO,
1002     .power_en_level = GPIO_LOW,
1003 #endif
1004         .enable_sd_wakeup = 0,
1005
1006 #if defined(CONFIG_SDMMC0_RK29_WRITE_PROTECT)
1007         .write_prt = SDMMC0_WRITE_PROTECT_PIN,
1008         .write_prt_enalbe_level = SDMMC0_WRITE_PROTECT_ENABLE_VALUE;
1009 #else
1010         .write_prt = INVALID_GPIO,
1011 #endif
1012
1013     .det_pin_info = {
1014     #if defined(RK29SDK_SD_CARD_DETECT_N) || (INVALID_GPIO != RK29SDK_SD_CARD_DETECT_N)
1015         .io             = RK29SDK_SD_CARD_DETECT_N, //INVALID_GPIO,
1016         .enable         = RK29SDK_SD_CARD_INSERT_LEVEL,
1017         #ifdef RK29SDK_SD_CARD_DETECT_PIN_NAME
1018         .iomux          = {
1019             .name       = RK29SDK_SD_CARD_DETECT_PIN_NAME,
1020             #ifdef RK29SDK_SD_CARD_DETECT_IOMUX_FGPIO
1021             .fgpio      = RK29SDK_SD_CARD_DETECT_IOMUX_FGPIO,
1022             #endif
1023             #ifdef RK29SDK_SD_CARD_DETECT_IOMUX_FMUX
1024             .fmux       = RK29SDK_SD_CARD_DETECT_IOMUX_FMUX,
1025             #endif
1026         },
1027         #endif
1028     #else
1029         .io             = INVALID_GPIO,
1030         .enable         = GPIO_LOW,
1031     #endif
1032     },
1033
1034 };
1035 #endif // CONFIG_SDMMC0_RK29
1036
1037 #ifdef CONFIG_SDMMC1_RK29
1038 #define CONFIG_SDMMC1_USE_DMA
1039 static int rk29_sdmmc1_cfg_gpio(void)
1040 {
1041 #if defined(CONFIG_SDMMC_RK29_OLD)
1042         iomux_set(MMC1_CMD);
1043         iomux_set(MMC1_CLKOUT);
1044         iomux_set(MMC1_D0);
1045         iomux_set(MMC1_D1);
1046         iomux_set(MMC1_D2);
1047         iomux_set(MMC1_D3);
1048 #else
1049
1050 #if defined(CONFIG_SDMMC1_RK29_WRITE_PROTECT)
1051         gpio_request(SDMMC1_WRITE_PROTECT_PIN, "sdio-wp");
1052         gpio_direction_input(SDMMC1_WRITE_PROTECT_PIN);
1053 #endif
1054
1055 #endif
1056
1057         return 0;
1058 }
1059
1060 struct rk29_sdmmc_platform_data default_sdmmc1_data = {
1061         .host_ocr_avail =
1062             (MMC_VDD_25_26 | MMC_VDD_26_27 | MMC_VDD_27_28 | MMC_VDD_28_29 |
1063              MMC_VDD_29_30 | MMC_VDD_30_31 | MMC_VDD_31_32 | MMC_VDD_32_33 |
1064              MMC_VDD_33_34),
1065
1066 #if !defined(CONFIG_USE_SDMMC1_FOR_WIFI_DEVELOP_BOARD)
1067         .host_caps = (MMC_CAP_4_BIT_DATA | MMC_CAP_SDIO_IRQ |
1068                       MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
1069 #else
1070         .host_caps =
1071             (MMC_CAP_4_BIT_DATA | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
1072 #endif
1073
1074         .io_init = rk29_sdmmc1_cfg_gpio,
1075
1076 #if !defined(CONFIG_SDMMC_RK29_OLD)
1077         .set_iomux = rk29_sdmmc_set_iomux,
1078 #endif
1079
1080         .dma_name = "sdio",
1081 #ifdef CONFIG_SDMMC1_USE_DMA
1082         .use_dma = 1,
1083 #else
1084         .use_dma = 0,
1085 #endif
1086
1087 #if defined(CONFIG_WIFI_CONTROL_FUNC) || defined(CONFIG_WIFI_COMBO_MODULE_CONTROL_FUNC)
1088     .status = rk29sdk_wifi_status,
1089     .register_status_notify = rk29sdk_wifi_status_register,
1090 #endif
1091
1092 #if defined(CONFIG_SDMMC1_RK29_WRITE_PROTECT)
1093         .write_prt = SDMMC1_WRITE_PROTECT_PIN,
1094             .write_prt_enalbe_level = SDMMC1_WRITE_PROTECT_ENABLE_VALUE;
1095 #else
1096         .write_prt = INVALID_GPIO,
1097 #endif
1098
1099     #if defined(CONFIG_RK29_SDIO_IRQ_FROM_GPIO)
1100         .sdio_INT_gpio = RK29SDK_WIFI_SDIO_CARD_INT,
1101     #endif
1102
1103     .det_pin_info = {
1104 #if defined(CONFIG_USE_SDMMC1_FOR_WIFI_DEVELOP_BOARD)
1105      #if defined(RK29SDK_SD_CARD_DETECT_N) || (INVALID_GPIO != RK29SDK_SD_CARD_DETECT_N)
1106         .io             = RK29SDK_SD_CARD_DETECT_N,
1107      #else
1108          .io             = INVALID_GPIO,
1109      #endif
1110
1111         .enable         = RK29SDK_SD_CARD_INSERT_LEVEL,
1112         #ifdef RK29SDK_SD_CARD_DETECT_PIN_NAME
1113         .iomux          = {
1114             .name       = RK29SDK_SD_CARD_DETECT_PIN_NAME,
1115             #ifdef RK29SDK_SD_CARD_DETECT_IOMUX_FGPIO
1116             .fgpio      = RK29SDK_SD_CARD_DETECT_IOMUX_FGPIO,
1117             #endif
1118             #ifdef RK29SDK_SD_CARD_DETECT_IOMUX_FMUX
1119             .fmux       = RK29SDK_SD_CARD_DETECT_IOMUX_FMUX,
1120             #endif
1121         },
1122         #endif
1123  #else
1124         .io             = INVALID_GPIO,
1125         .enable         = GPIO_LOW,
1126 #endif
1127     },
1128
1129         .enable_sd_wakeup = 0,
1130 };
1131 #endif //endif--#ifdef CONFIG_SDMMC1_RK29
1132
1133 /**************************************************************************************************
1134  * the end of setting for SDMMC devices
1135 **************************************************************************************************/
1136
1137 #ifdef CONFIG_BATTERY_RK30_ADC
1138 static struct rk30_adc_battery_platform_data rk30_adc_battery_platdata = {
1139         .dc_det_pin      = RK30_PIN0_PB2,
1140         .batt_low_pin    = RK30_PIN0_PB1,
1141         .charge_set_pin  = INVALID_GPIO,
1142         .charge_ok_pin   = RK30_PIN0_PA6,
1143         .dc_det_level    = GPIO_LOW,
1144         .charge_ok_level = GPIO_HIGH,
1145 };
1146
1147 static struct platform_device rk30_device_adc_battery = {
1148         .name   = "rk30-battery",
1149         .id     = -1,
1150         .dev = {
1151                 .platform_data = &rk30_adc_battery_platdata,
1152         },
1153 };
1154 #endif
1155 #ifdef CONFIG_CW2015_BATTERY
1156 /*
1157    note the follow array must set depend on the battery that you use
1158    you must send the battery to cellwise-semi the contact information:
1159    name: chen gan; tel:13416876079; E-mail: ben.chen@cellwise-semi.com
1160  */
1161 static u8 config_info[SIZE_BATINFO] = {
1162         0x15, 0x42, 0x60, 0x59, 0x52,
1163         0x58, 0x4D, 0x48, 0x48, 0x44,
1164         0x44, 0x46, 0x49, 0x48, 0x32,
1165         0x24, 0x20, 0x17, 0x13, 0x0F,
1166         0x19, 0x3E, 0x51, 0x45, 0x08,
1167         0x76, 0x0B, 0x85, 0x0E, 0x1C,
1168         0x2E, 0x3E, 0x4D, 0x52, 0x52,
1169         0x57, 0x3D, 0x1B, 0x6A, 0x2D,
1170         0x25, 0x43, 0x52, 0x87, 0x8F,
1171         0x91, 0x94, 0x52, 0x82, 0x8C,
1172         0x92, 0x96, 0xFF, 0x7B, 0xBB,
1173         0xCB, 0x2F, 0x7D, 0x72, 0xA5,
1174         0xB5, 0xC1, 0x46, 0xAE
1175 };
1176
1177 static struct cw_bat_platform_data cw_bat_platdata = {
1178         .dc_det_pin      = RK30_PIN0_PB2,
1179         .dc_det_level    = GPIO_LOW,
1180
1181         .bat_low_pin    = RK30_PIN0_PB1,
1182         .bat_low_level  = GPIO_LOW,
1183         .chg_ok_pin   = INVALID_GPIO,
1184         .chg_ok_level = GPIO_HIGH,
1185
1186         .is_usb_charge = 0,
1187         .chg_mode_sel_pin = INVALID_GPIO,
1188         .chg_mode_sel_level = GPIO_HIGH,
1189
1190         .cw_bat_config_info     = config_info,
1191
1192 };
1193
1194 #endif
1195 #ifdef CONFIG_RK30_PWM_REGULATOR
1196 static int pwm_voltage_map[] = {
1197         800000,825000,850000, 875000,900000, 925000 ,950000, 975000,1000000, 1025000, 1050000, 1075000, 1100000, 1125000, 1150000, 1175000, 1200000, 1225000, 1250000, 1275000, 1300000, 1325000, 1350000,1375000
1198 };
1199 static struct regulator_consumer_supply pwm_dcdc1_consumers[] = {
1200         {
1201                 .supply = "vdd_cpu",
1202         }
1203 };
1204
1205 struct regulator_init_data pwm_regulator_init_dcdc[1] =
1206 {
1207         {
1208                 .constraints = {
1209                         .name = "PWM_DCDC1",
1210                         .min_uV = 600000,
1211                         .max_uV = 1800000,      //0.6-1.8V
1212                         .apply_uV = true,
1213                         .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE,
1214                 },
1215                 .num_consumer_supplies = ARRAY_SIZE(pwm_dcdc1_consumers),
1216                 .consumer_supplies = pwm_dcdc1_consumers,
1217         },
1218 };
1219
1220 static struct pwm_platform_data pwm_regulator_info[1] = {
1221         {
1222                 .pwm_id = 1,
1223                 .pwm_gpio = RK30_PIN3_PD4,
1224                 .pwm_iomux_pwm = PWM1,
1225                 .pwm_iomux_gpio = GPIO3_D4,
1226                 .pwm_voltage = 1100000,
1227                 .suspend_voltage = 1000000,
1228                 .min_uV = 800000,
1229                 .max_uV = 1375000,
1230                 .coefficient = 575,     //57.5%
1231                 .pwm_voltage_map = pwm_voltage_map,
1232                 .init_data      = &pwm_regulator_init_dcdc[0],
1233         },
1234 };
1235
1236 struct platform_device pwm_regulator_device[1] = {
1237         {
1238                 .name = "pwm-voltage-regulator",
1239                 .id = 0,
1240                 .dev            = {
1241                         .platform_data = &pwm_regulator_info[0],
1242                 }
1243         },
1244 };
1245 #endif
1246
1247 #ifdef CONFIG_RK29_VMAC
1248 #define PHY_PWR_EN_GPIO RK30_PIN1_PD6
1249 #include "board-rk30-sdk-vmac.c"
1250 #endif
1251
1252 #ifdef CONFIG_RFKILL_RK
1253 // bluetooth rfkill device, its driver in net/rfkill/rfkill-rk.c
1254 static struct rfkill_rk_platform_data rfkill_rk_platdata = {
1255     .type               = RFKILL_TYPE_BLUETOOTH,
1256
1257     .poweron_gpio       = { // BT_REG_ON
1258         .io             = INVALID_GPIO, //RK30_PIN3_PC7,
1259         .enable         = GPIO_HIGH,
1260         .iomux          = {
1261             .name       = "bt_poweron",
1262             .fgpio      = GPIO3_C7,
1263         },
1264     },
1265
1266     .reset_gpio         = { // BT_RST
1267         .io             = RK30_PIN3_PC7, // set io to INVALID_GPIO for disable it
1268         .enable         = GPIO_LOW,
1269         .iomux          = {
1270             .name       = "bt_reset",
1271             .fgpio      = GPIO3_C7,
1272        },
1273    },
1274
1275     .wake_gpio          = { // BT_WAKE, use to control bt's sleep and wakeup
1276         .io             = RK30_PIN3_PC6, // set io to INVALID_GPIO for disable it
1277         .enable         = GPIO_HIGH,
1278         .iomux          = {
1279             .name       = "bt_wake",
1280             .fgpio      = GPIO3_C6,
1281         },
1282     },
1283
1284     .wake_host_irq      = { // BT_HOST_WAKE, for bt wakeup host when it is in deep sleep
1285         .gpio           = {
1286             .io         = RK30_PIN0_PA5, // set io to INVALID_GPIO for disable it
1287             .enable     = GPIO_LOW,      // set GPIO_LOW for falling, set 0 for rising
1288             .iomux      = {
1289                 .name   = NULL,
1290             },
1291         },
1292     },
1293
1294     .rts_gpio           = { // UART_RTS, enable or disable BT's data coming
1295         .io             = RK30_PIN1_PA3, // set io to INVALID_GPIO for disable it
1296         .enable         = GPIO_LOW,
1297         .iomux          = {
1298             .name       = "bt_rts",
1299             .fgpio      = GPIO1_A3,
1300             .fmux       = UART0_RTSN,
1301         },
1302     },
1303 };
1304
1305 static struct platform_device device_rfkill_rk = {
1306     .name   = "rfkill_rk",
1307     .id     = -1,
1308     .dev    = {
1309         .platform_data = &rfkill_rk_platdata,
1310     },
1311 };
1312 #endif
1313
1314 #if defined(CONFIG_GPS_RK)
1315 int rk_gps_io_init(void)
1316 {
1317         printk("%s \n", __FUNCTION__);
1318
1319         gpio_request(RK30_PIN1_PB5, NULL);
1320         gpio_direction_output(RK30_PIN1_PB5, GPIO_LOW);
1321
1322         iomux_set(GPS_RFCLK);//GPS_CLK
1323         iomux_set(GPS_MAG);//GPS_MAG
1324         iomux_set(GPS_SIG);//GPS_SIGN
1325
1326         gpio_request(RK30_PIN1_PA6, NULL);
1327         gpio_direction_output(RK30_PIN1_PA6, GPIO_LOW);
1328
1329         gpio_request(RK30_PIN1_PA5, NULL);
1330         gpio_direction_output(RK30_PIN1_PA5, GPIO_LOW);
1331
1332         gpio_request(RK30_PIN1_PA7, NULL);
1333         gpio_direction_output(RK30_PIN1_PA7, GPIO_LOW);
1334         return 0;
1335 }
1336 int rk_gps_power_up(void)
1337 {
1338         printk("%s \n", __FUNCTION__);
1339
1340         return 0;
1341 }
1342
1343 int rk_gps_power_down(void)
1344 {
1345         printk("%s \n", __FUNCTION__);
1346
1347         return 0;
1348 }
1349
1350 int rk_gps_reset_set(int level)
1351 {
1352         return 0;
1353 }
1354 int rk_enable_hclk_gps(void)
1355 {
1356         struct clk *gps_aclk = NULL;
1357         gps_aclk = clk_get(NULL, "aclk_gps");
1358         if(gps_aclk) {
1359                 clk_enable(gps_aclk);
1360                 clk_put(gps_aclk);
1361                 printk("%s \n", __FUNCTION__);
1362         }
1363         else
1364                 printk("get gps aclk fail\n");
1365         return 0;
1366 }
1367 int rk_disable_hclk_gps(void)
1368 {
1369         struct clk *gps_aclk = NULL;
1370         gps_aclk = clk_get(NULL, "aclk_gps");
1371         if(gps_aclk) {
1372                 //TO wait long enough until GPS ISR is finished.
1373                 msleep(5);
1374                 clk_disable(gps_aclk);
1375                 clk_put(gps_aclk);
1376                 printk("%s \n", __FUNCTION__);
1377         }
1378         else
1379                 printk("get gps aclk fail\n");
1380         return 0;
1381 }
1382 struct rk_gps_data rk_gps_info = {
1383         .io_init = rk_gps_io_init,
1384         .power_up = rk_gps_power_up,
1385         .power_down = rk_gps_power_down,
1386         .reset = rk_gps_reset_set,
1387         .enable_hclk_gps = rk_enable_hclk_gps,
1388         .disable_hclk_gps = rk_disable_hclk_gps,
1389         .GpsSign = RK30_PIN1_PB3,
1390         .GpsMag = RK30_PIN1_PB2,        //GPIO index
1391         .GpsClk = RK30_PIN1_PB4,        //GPIO index
1392         .GpsVCCEn = RK30_PIN1_PB5,     //GPIO index
1393         .GpsSpi_CSO = RK30_PIN1_PA4,    //GPIO index
1394         .GpsSpiClk = RK30_PIN1_PA5,     //GPIO index
1395         .GpsSpiMOSI = RK30_PIN1_PA7,      //GPIO index
1396         .GpsIrq = IRQ_GPS,
1397         .GpsSpiEn = 0,
1398         .GpsAdcCh = 2,
1399         .u32GpsPhyAddr = RK30_GPS_PHYS,
1400         .u32GpsPhySize = RK30_GPS_SIZE,
1401 };
1402
1403 struct platform_device rk_device_gps = {
1404         .name = "gps_hv5820b",
1405         .id = -1,
1406         .dev            = {
1407         .platform_data = &rk_gps_info,
1408                 }
1409         };
1410 #endif
1411
1412 #if defined(CONFIG_MT5931_MT6622)
1413 static struct mt6622_platform_data mt6622_platdata = {
1414                     .power_gpio         = { // BT_REG_ON
1415                         .io             = RK30_PIN3_PD5, // set io to INVALID_GPIO for disable it
1416                             .enable         = GPIO_HIGH,
1417                             .iomux          = {
1418                                     .name       = NULL,
1419                                 },
1420                     },
1421
1422                     .reset_gpio         = { // BT_RST
1423                         .io             = RK30_PIN0_PD7,
1424                         .enable         = GPIO_HIGH,
1425                         .iomux          = {
1426                             .name       = NULL,
1427                         },
1428                     },
1429
1430                     .irq_gpio           = {
1431                             .io             = RK30_PIN3_PD2,
1432                             .enable         = GPIO_HIGH,
1433                             .iomux          = {
1434                                     .name       = NULL,
1435                                 },
1436                     },
1437
1438                     .rts_gpio           = { // UART_RTS
1439                             .io             = RK30_PIN1_PA3,
1440                             .enable         = GPIO_LOW,
1441                                     .iomux          = {
1442                                     .name       = "bt_rts",
1443                                     .fgpio      = GPIO1_A3,
1444                                     .fmux       = UART0_RTSN,
1445                             },
1446                     },
1447 };
1448
1449 static struct platform_device device_mt6622 = {
1450                     .name   = "mt6622",
1451                         .id     = -1,
1452                         .dev    = {
1453                                .platform_data = &mt6622_platdata,
1454                         },
1455 };
1456 #endif
1457
1458 static struct platform_device *devices[] __initdata = {
1459 #ifdef CONFIG_ION
1460         &device_ion,
1461 #endif
1462 #ifdef CONFIG_ANDROID_TIMED_GPIO
1463         &rk29_device_vibrator,
1464 #endif
1465 #ifdef CONFIG_LEDS_GPIO_PLATFORM
1466         &rk29_device_gpio_leds,
1467 #endif
1468 #ifdef CONFIG_RK_IRDA
1469         &irda_device,
1470 #endif
1471 #if defined(CONFIG_WIFI_CONTROL_FUNC)||defined(CONFIG_WIFI_COMBO_MODULE_CONTROL_FUNC)
1472         &rk29sdk_wifi_device,
1473 #endif
1474
1475 #if defined(CONFIG_MT6620)
1476     &mt3326_device_gps,
1477 #endif
1478
1479 #ifdef CONFIG_RK29_SUPPORT_MODEM
1480         &rk30_device_modem,
1481 #endif
1482 #if defined(CONFIG_MU509)
1483         &rk29_device_mu509,
1484 #endif
1485 #if defined(CONFIG_MW100)
1486         &rk29_device_mw100,
1487 #endif
1488 #if defined(CONFIG_MT6229)
1489         &rk29_device_mt6229,
1490 #endif
1491 #ifdef CONFIG_BATTERY_RK30_ADC
1492         &rk30_device_adc_battery,
1493 #endif
1494 #ifdef CONFIG_RFKILL_RK
1495         &device_rfkill_rk,
1496 #endif
1497 #ifdef CONFIG_GPS_RK
1498         &rk_device_gps,
1499 #endif
1500 #if defined(CONFIG_ARCH_RK3188)
1501         &device_mali,
1502 #endif
1503 #ifdef CONFIG_MT5931_MT6622
1504         &device_mt6622,
1505 #endif
1506 };
1507
1508 static int rk_platform_add_display_devices(void)
1509 {
1510         struct platform_device *fb = NULL;  //fb
1511         struct platform_device *lcdc0 = NULL; //lcdc0
1512         struct platform_device *lcdc1 = NULL; //lcdc1
1513         struct platform_device *bl = NULL; //backlight
1514 #ifdef CONFIG_FB_ROCKCHIP
1515         fb = &device_fb;
1516 #endif
1517
1518 #if defined(CONFIG_LCDC0_RK3066B) || defined(CONFIG_LCDC0_RK3188)
1519         lcdc0 = &device_lcdc0,
1520 #endif
1521
1522 #if defined(CONFIG_LCDC1_RK3066B) || defined(CONFIG_LCDC1_RK3188)
1523         lcdc1 = &device_lcdc1,
1524 #endif
1525
1526 #ifdef CONFIG_BACKLIGHT_RK29_BL
1527         bl = &rk29_device_backlight,
1528 #endif
1529         __rk_platform_add_display_devices(fb,lcdc0,lcdc1,bl);
1530
1531         return 0;
1532
1533 }
1534
1535 // i2c
1536 #ifdef CONFIG_I2C0_RK30
1537 static struct i2c_board_info __initdata i2c0_info[] = {
1538 #if defined (CONFIG_GS_MMA8452)
1539         {
1540                 .type           = "gs_mma8452",
1541                 .addr           = 0x1d,
1542                 .flags          = 0,
1543                 .irq            = MMA8452_INT_PIN,
1544                 .platform_data = &mma8452_info,
1545         },
1546 #endif
1547 #if defined (CONFIG_GS_LIS3DH)
1548         {
1549                 .type           = "gs_lis3dh",
1550                 .addr           = 0x19,   //0x19(SA0-->VCC), 0x18(SA0-->GND)
1551                 .flags          = 0,
1552                 .irq            = LIS3DH_INT_PIN,
1553                 .platform_data = &lis3dh_info,
1554         },
1555 #endif
1556 #if defined (CONFIG_COMPASS_AK8975)
1557         {
1558                 .type          = "ak8975",
1559                 .addr          = 0x0d,
1560                 .flags         = 0,
1561                 .irq           = RK30_PIN3_PD7,
1562                 .platform_data = &akm8975_info,
1563         },
1564 #endif
1565 #if defined (CONFIG_GYRO_L3G4200D)
1566         {
1567                 .type          = "l3g4200d_gryo",
1568                 .addr          = 0x69,
1569                 .flags         = 0,
1570                 .irq           = L3G4200D_INT_PIN,
1571                 .platform_data = &l3g4200d_info,
1572         },
1573 #endif
1574 #if defined (CONFIG_SND_SOC_RK1000)
1575         {
1576                 .type          = "rk1000_i2c_codec",
1577                 .addr          = 0x60,
1578                 .flags         = 0,
1579         },
1580         {
1581                 .type          = "rk1000_control",
1582                 .addr          = 0x40,
1583                 .flags         = 0,
1584         },
1585 #endif
1586
1587 #if defined (CONFIG_SND_SOC_RT5631)
1588         {
1589                 .type                   = "rt5631",
1590                 .addr                   = 0x1a,
1591                 .flags                  = 0,
1592         },
1593 #endif
1594
1595 #if defined (CONFIG_SND_SOC_RT5512)
1596         {
1597                 .type                   = "rt5512",
1598                 .addr                   = 0x18,
1599                 .flags                  = 0,
1600         },
1601 #endif
1602
1603
1604 #if defined (CONFIG_SND_SOC_RT5640)
1605             {
1606                         .type                   = "rt5640",
1607                         .addr                   = 0x1c,
1608                         .flags                  = 0,
1609                 },
1610 #endif
1611
1612 #ifdef CONFIG_MFD_RK610
1613                 {
1614                         .type                   = "rk610_ctl",
1615                         .addr                   = 0x40,
1616                         .flags                  = 0,
1617                         .platform_data          = &rk610_ctl_pdata,
1618                 },
1619 #ifdef CONFIG_RK610_TVOUT
1620                 {
1621                         .type                   = "rk610_tvout",
1622                         .addr                   = 0x42,
1623                         .flags                  = 0,
1624                 },
1625 #endif
1626 #ifdef CONFIG_HDMI_RK610
1627                 {
1628                         .type                   = "rk610_hdmi",
1629                         .addr                   = 0x46,
1630                         .flags                  = 0,
1631                         .irq                    = INVALID_GPIO,
1632                 },
1633 #endif
1634 #ifdef CONFIG_SND_SOC_RK610
1635                 {//RK610_CODEC addr  from 0x60 to 0x80 (0x60~0x80)
1636                         .type                   = "rk610_i2c_codec",
1637                         .addr                   = 0x60,
1638                         .flags                  = 0,
1639                         .platform_data          = &rk610_codec_pdata,
1640                 },
1641 #endif
1642 #endif
1643
1644 };
1645 #endif
1646
1647 int __sramdata g_pmic_type =  0;
1648 #ifdef CONFIG_I2C1_RK30
1649 #ifdef CONFIG_MFD_WM831X_I2C
1650 #define PMU_POWER_SLEEP                 RK30_PIN0_PA1
1651
1652 static struct pmu_info  wm8326_dcdc_info[] = {
1653         {
1654                 .name          = "vdd_core",   //logic
1655                 .min_uv          = 1000000,
1656                 .max_uv         = 1000000,
1657                 .suspend_vol  =  950000,
1658         },
1659         {
1660                 .name          = "vdd_cpu",    //arm
1661                 .min_uv          = 1000000,
1662                 .max_uv         = 1000000,
1663                 .suspend_vol  =  950000,
1664         },
1665         {
1666                 .name          = "dcdc3",   //ddr
1667                 .min_uv          = 1150000,
1668                 .max_uv         = 1150000,
1669                 .suspend_vol  =  1150000,
1670         },
1671         #ifdef CONFIG_MACH_RK3066_SDK
1672         {
1673                 .name          = "dcdc4",   //vcc_io
1674                 .min_uv          = 3300000,
1675                 .max_uv         = 3300000,
1676                 .suspend_vol  =  3000000,
1677         },
1678         #else
1679         {
1680                 .name          = "dcdc4",   //vcc_io
1681                 .min_uv          = 3000000,
1682                 .max_uv         = 3000000,
1683                 .suspend_vol  =  2800000,
1684         },
1685         #endif
1686 };
1687
1688 static struct pmu_info  wm8326_ldo_info[] = {
1689         {
1690                 .name          = "ldo1",   //vcc18_cif
1691                 .min_uv          = 1800000,
1692                 .max_uv         = 1800000,
1693                 .suspend_vol  =  1800000,
1694         },
1695         {
1696                 .name          = "ldo2",    //vccio_wl
1697                 .min_uv          = 1800000,
1698                 .max_uv         = 1800000,
1699                 .suspend_vol  =  1800000,
1700         },
1701         {
1702                 .name          = "ldo3",   //
1703                 .min_uv          = 1100000,
1704                 .max_uv         = 1100000,
1705                 .suspend_vol  =  1100000,
1706         },
1707         {
1708                 .name          = "ldo4",   //vdd11
1709                 .min_uv          = 1000000,
1710                 .max_uv         = 1000000,
1711                 .suspend_vol  =  1000000,
1712         },
1713         {
1714                 .name          = "ldo5",   //vcc25
1715                 .min_uv          = 1800000,
1716                 .max_uv         = 1800000,
1717                 .suspend_vol  =  1800000,
1718         },
1719         {
1720                 .name          = "ldo6",   //vcc33
1721                 .min_uv          = 3300000,
1722                 .max_uv         = 3300000,
1723                 .suspend_vol  =  3300000,
1724         },
1725         {
1726                 .name          = "ldo7",   //vcc28_cif
1727                 .min_uv          = 2800000,
1728                 .max_uv         = 2800000,
1729                 .suspend_vol  =  2800000,
1730         },
1731         {
1732                 .name          = "ldo8",   //vcca33
1733                 .min_uv          = 3300000,
1734                 .max_uv         = 3300000,
1735                 .suspend_vol  =  3300000,
1736         },
1737         {
1738                 .name          = "ldo9",   //vcc_tp
1739                 .min_uv          = 3300000,
1740                 .max_uv         = 3300000,
1741                 .suspend_vol  =  3300000,
1742         },
1743         {
1744                 .name          = "ldo10",   //flash_io
1745                 .min_uv          = 1800000,
1746                 .max_uv         = 1800000,
1747                 .suspend_vol  =  1800000,
1748         },
1749 };
1750
1751 #include "board-pmu-wm8326.c"
1752 #endif
1753
1754 #ifdef CONFIG_MFD_TPS65910
1755 #define TPS65910_HOST_IRQ        RK30_PIN0_PB3
1756
1757 #define PMU_POWER_SLEEP RK30_PIN0_PA1
1758
1759 static struct pmu_info  tps65910_dcdc_info[] = {
1760         {
1761                 .name          = "vdd_core",   //logic
1762                 .min_uv          = 1200000,
1763                 .max_uv         = 1200000,
1764         },
1765         {
1766                 .name          = "vdd2",    //ddr
1767                 .min_uv          = 1200000,
1768                 .max_uv         = 1200000,
1769         },
1770         {
1771                 .name          = "vio",   //vcc_io
1772                 .min_uv          = 2500000,
1773                 .max_uv         = 2500000,
1774         },
1775
1776 };
1777 static  struct pmu_info  tps65910_ldo_info[] = {
1778         {
1779                 .name          = "vpll",   //vdd10
1780                 .min_uv          = 1000000,
1781                 .max_uv         = 1000000,
1782         },
1783         {
1784                 .name          = "vdig1",    //vcc18_cif
1785                 .min_uv          = 1800000,
1786                 .max_uv         = 1800000,
1787         },
1788         {
1789                 .name          = "vdig2",   //vdd_jetta
1790                 .min_uv          = 1200000,
1791                 .max_uv         = 1200000,
1792         },
1793         {
1794                 .name          = "vaux1",   //vcc28_cif
1795                 .min_uv          = 2800000,
1796                 .max_uv         = 2800000,
1797         },
1798         {
1799                 .name          = "vaux2",   //vcca33
1800                 .min_uv          = 3300000,
1801                 .max_uv         = 3300000,
1802         },
1803         {
1804                 .name          = "vaux33",   //vcc_tp
1805                 .min_uv          = 3300000,
1806                 .max_uv         = 3300000,
1807         },
1808         {
1809                 .name          = "vmmc",   //vcc30
1810                 .min_uv          = 3000000,
1811                 .max_uv         = 3000000,
1812         },
1813         {
1814                 .name          = "vdac",   //vcc18
1815                 .min_uv          = 1800000,
1816                 .max_uv         = 1800000,
1817         },
1818  };
1819
1820 #include "board-pmu-tps65910.c"
1821 #endif
1822
1823 #ifdef CONFIG_REGULATOR_ACT8846
1824 #define PMU_POWER_SLEEP RK30_PIN0_PA1
1825 #define PMU_VSEL RK30_PIN3_PD3
1826 static struct pmu_info  act8846_dcdc_info[] = {
1827         {
1828                 .name          = "act_dcdc1",   //ddr
1829                 .min_uv          = 1200000,
1830                 .max_uv         = 1200000,
1831                 .suspend_vol  =  1200000,
1832         },
1833         {
1834                 .name          = "vdd_core",    //logic
1835                 .min_uv          = 1000000,
1836                 .max_uv         = 1000000,
1837                 #ifdef CONFIG_ACT8846_SUPPORT_RESET
1838                 .suspend_vol  =  1200000,
1839                 #else
1840                 .suspend_vol  =  900000,
1841                 #endif
1842
1843         },
1844         {
1845                 .name          = "vdd_cpu",   //arm
1846                 .min_uv          = 1000000,
1847                 .max_uv         = 1000000,
1848                 #ifdef CONFIG_ACT8846_SUPPORT_RESET
1849                 .suspend_vol  =  1200000,
1850                 #else
1851                 .suspend_vol  =  900000,
1852                 #endif
1853
1854         },
1855         {
1856                 .name          = "act_dcdc4",   //vccio
1857                 .min_uv          = 3000000,
1858                 .max_uv         = 3000000,
1859                 #ifdef CONFIG_ACT8846_SUPPORT_RESET
1860                 .suspend_vol  =  3000000,
1861                 #else
1862                 .suspend_vol  =  2800000,
1863                 #endif
1864
1865         },
1866
1867 };
1868 static  struct pmu_info  act8846_ldo_info[] = {
1869         {
1870                 .name          = "act_ldo1",   //vdd11
1871                 .min_uv          = 1000000,
1872                 .max_uv         = 1000000,
1873         },
1874         {
1875                 .name          = "act_ldo2",    //vdd12
1876                 .min_uv          = 1200000,
1877                 .max_uv         = 1200000,
1878         },
1879         {
1880                 .name          = "act_ldo3",   //vcc18_cif
1881                 .min_uv          = 1800000,
1882                 .max_uv         = 1800000,
1883         },
1884         {
1885                 .name          = "act_ldo4",   //vcca33
1886                 .min_uv          = 3300000,
1887                 .max_uv         = 3300000,
1888         },
1889         {
1890                 .name          = "act_ldo5",   //vcctp
1891                 .min_uv          = 3300000,
1892                 .max_uv         = 3300000,
1893         },
1894         {
1895                 .name          = "act_ldo6",   //vcc33
1896                 .min_uv          = 3300000,
1897                 .max_uv         = 3300000,
1898         },
1899         {
1900                 .name          = "act_ldo7",   //vccio_wl
1901                 .min_uv          = 1800000,
1902                 .max_uv         = 1800000,
1903         },
1904         {
1905                 .name          = "act_ldo8",   //vcc28_cif
1906                 .min_uv          = 2800000,
1907                 .max_uv         = 2800000,
1908         },
1909  };
1910
1911 #include "board-pmu-act8846.c"
1912 #endif
1913
1914 #ifdef CONFIG_MFD_RK808
1915 #define PMU_POWER_SLEEP RK30_PIN0_PA1
1916 #define RK808_HOST_IRQ        RK30_PIN0_PB3
1917
1918 static struct pmu_info  rk808_dcdc_info[] = {
1919         {
1920                 .name          = "vdd_cpu",   //arm
1921                 .min_uv          = 1000000,
1922                 .max_uv         = 1000000,
1923                 .suspend_vol  =  900000,
1924         },
1925         {
1926                 .name          = "vdd_core",    //logic
1927                 .min_uv          = 1000000,
1928                 .max_uv         = 1000000,
1929                 .suspend_vol  =  900000,
1930         },
1931         {
1932                 .name          = "rk_dcdc3",   //ddr
1933                 .min_uv          = 1200000,
1934                 .max_uv         = 1200000,
1935                 .suspend_vol  =  1200000,
1936         },
1937         {
1938                 .name          = "rk_dcdc4",   //vccio
1939                 .min_uv          = 3300000,
1940                 .max_uv         = 3300000,
1941                 .suspend_vol  =  3000000,
1942         },
1943
1944 };
1945 static  struct pmu_info  rk808_ldo_info[] = {
1946         {
1947                 .name          = "rk_ldo1",   //vcc33
1948                 .min_uv          = 3300000,
1949                 .max_uv         = 3300000,
1950                 .suspend_vol   = 3300000,
1951         },
1952         {
1953                 .name          = "rk_ldo2",    //vcctp
1954                 .min_uv          = 3300000,
1955                 .max_uv         = 3300000,
1956                  .suspend_vol   = 3300000,
1957
1958         },
1959         {
1960                 .name          = "rk_ldo3",   //vdd10
1961                 .min_uv          = 1000000,
1962                 .max_uv         = 1000000,
1963                  .suspend_vol   = 1000000,
1964         },
1965         {
1966                 .name          = "rk_ldo4",   //vcc18
1967                 .min_uv          = 1800000,
1968                 .max_uv         = 1800000,
1969                  .suspend_vol   = 1800000,
1970         },
1971         {
1972                 .name          = "rk_ldo5",   //vcc28_cif
1973                 .min_uv          = 2800000,
1974                 .max_uv         = 2800000,
1975                  .suspend_vol   = 2800000,
1976         },
1977         {
1978                 .name          = "rk_ldo6",   //vdd12
1979                 .min_uv          = 1200000,
1980                 .max_uv         = 1200000,
1981                  .suspend_vol   = 1200000,
1982         },
1983         {
1984                 .name          = "rk_ldo7",   //vcc18_cif
1985                 .min_uv          = 1800000,
1986                 .max_uv         = 1800000,
1987                  .suspend_vol   = 1800000,
1988         },
1989         {
1990                 .name          = "rk_ldo8",   //vcca_33
1991                 .min_uv          = 3300000,
1992                 .max_uv         = 3300000,
1993                  .suspend_vol   = 3300000,
1994         },
1995  };
1996
1997 #include "board-pmu-rk808.c"
1998 #endif
1999 #ifdef CONFIG_MFD_RICOH619
2000 #define PMU_POWER_SLEEP RK30_PIN0_PA1
2001 #define RICOH619_HOST_IRQ        RK30_PIN0_PB3
2002
2003 static struct pmu_info  ricoh619_dcdc_info[] = {
2004         {
2005                 .name          = "vdd_cpu",   //arm
2006                 .min_uv          = 1000000,
2007                 .max_uv         = 1000000,
2008                 .suspend_vol  =  900000,
2009         },
2010         {
2011                 .name          = "vdd_core",    //logic
2012                 .min_uv          = 1000000,
2013                 .max_uv         = 1000000,
2014                 .suspend_vol  =  900000,
2015         },
2016
2017         {
2018                 .name          = "ricoh_dc3",   //vcc18
2019                 .min_uv          = 1800000,
2020                 .max_uv         = 1800000,
2021                 .suspend_vol  =  1800000,
2022         },
2023
2024         {
2025                 .name          = "ricoh_dc4",   //vccio
2026                 .min_uv          = 3300000,
2027                 .max_uv         = 3300000,
2028                 .suspend_vol  =  3300000,
2029         },
2030
2031         {
2032                 .name          = "ricoh_dc5",   //ddr
2033                 .min_uv          = 1200000,
2034                 .max_uv         = 1200000,
2035                 .suspend_vol  =  1200000,
2036         },
2037
2038 };
2039 static  struct pmu_info  ricoh619_ldo_info[] = {
2040         {
2041                 .name          = "ricoh_ldo1",   //vcc30
2042                 .min_uv          = 3000000,
2043                 .max_uv         = 3000000,
2044         },
2045         {
2046                 .name          = "ricoh_ldo2",    //vcca33
2047                 .min_uv          = 3300000,
2048                 .max_uv         = 3300000,
2049         },
2050         {
2051                 .name          = "ricoh_ldo3",   //vcctp
2052                 .min_uv          = 3300000,
2053                 .max_uv         = 3300000,
2054         },
2055         {
2056                 .name          = "ricoh_ldo4",   //vccsd
2057                 .min_uv          = 3300000,
2058                 .max_uv         = 3300000,
2059         },
2060         {
2061                 .name          = "ricoh_ldo5",   //vcc18_cif
2062                 .min_uv          = 1800000,
2063                 .max_uv         = 1800000,
2064         },
2065         {
2066                 .name          = "ricoh_ldo6",   //vdd12
2067                 .min_uv          = 1200000,
2068                 .max_uv         = 1200000,
2069         },
2070         {
2071                 .name          = "ricoh_ldo7",   //vcc28_cif
2072                 .min_uv          = 2800000,
2073                 .max_uv         = 2800000,
2074         },
2075         {
2076                 .name          = "ricoh_ldo8",   //vcc25
2077                 .min_uv          = 2500000,
2078                 .max_uv         = 2500000,
2079         },
2080         {
2081                 .name          = "ricoh_ldo9",   //vdd10
2082                 .min_uv          = 1000000,
2083                 .max_uv         = 1000000,
2084         },
2085         {
2086                 .name          = "ricoh_ldo10",   //vcca18
2087                 .min_uv          = 1800000,
2088                 .max_uv         = 1800000,
2089         },
2090
2091  };
2092
2093 #include "board-pmu-ricoh619.c"
2094 #endif
2095
2096 #ifdef CONFIG_MFD_RT5025
2097 #define RT5025_HOST_IRQ        RK30_PIN0_PB3
2098
2099 static struct pmu_info  rt5025_dcdc_info[] = {
2100         {
2101                 .name          = "vdd_cpu",   //arm
2102                 .min_uv          = 1000000,
2103                 .max_uv         = 1000000,
2104         },
2105         {
2106                 .name          = "vdd_core",    //logic
2107                 .min_uv          = 1000000,
2108                 .max_uv         = 1000000,
2109         },
2110
2111         {
2112                 .name          = "rt5025-dcdc3",   //vccio
2113                 .min_uv          = 3300000,
2114                 .max_uv         = 3300000,
2115         },
2116
2117 };
2118 static  struct pmu_info  rt5025_ldo_info[] = {
2119         {
2120                 .name          = "rt5025-ldo1",   //vcc18
2121                 .min_uv          = 1800000,
2122                 .max_uv         = 1800000,
2123         },
2124         {
2125                 .name          = "rt5025-ldo2",    //vddjetta
2126                 .min_uv          = 1200000,
2127                 .max_uv         = 1200000,
2128         },
2129         {
2130                 .name          = "rt5025-ldo3",   //vdd10
2131                 .min_uv          = 1000000,
2132                 .max_uv         = 1000000,
2133         },
2134         {
2135                 .name          = "rt5025-ldo4",   //vccjetta
2136                 .min_uv          = 3300000,
2137                 .max_uv         = 3300000,
2138         },
2139         {
2140                 .name          = "rt5025-ldo5",   //vccio_wl
2141                 .min_uv          = 1800000,
2142                 .max_uv         = 1800000,
2143         },
2144         {
2145                 .name          = "rt5025-ldo6",   //vcc_tp
2146                 .min_uv          = 3300000,
2147                 .max_uv         = 3300000,
2148         },
2149
2150  };
2151
2152 #include "board-pmu-rt5025.c"
2153 #endif
2154
2155
2156
2157 static struct i2c_board_info __initdata i2c1_info[] = {
2158 #if defined (CONFIG_MFD_WM831X_I2C)
2159         {
2160                 .type          = "wm8326",
2161                 .addr          = 0x34,
2162                 .flags         = 0,
2163                 .irq           = RK30_PIN0_PB3,
2164                 .platform_data = &wm831x_platdata,
2165         },
2166 #endif
2167 #if defined (CONFIG_MFD_TPS65910)
2168         {
2169         .type           = "tps65910",
2170         .addr           = TPS65910_I2C_ID0,
2171         .flags          = 0,
2172         .irq            = TPS65910_HOST_IRQ,
2173         .platform_data = &tps65910_data,
2174         },
2175 #endif
2176
2177 #if defined (CONFIG_REGULATOR_ACT8846)
2178         {
2179                 .type                   = "act8846",
2180                 .addr           = 0x5a,
2181                 .flags                  = 0,
2182         //      .irq            = ACT8846_HOST_IRQ,
2183                 .platform_data=&act8846_data,
2184         },
2185 #endif
2186 #if defined (CONFIG_MFD_RK808)
2187         {
2188                 .type                   = "rk808",
2189                 .addr           = 0x1b,
2190                 .flags                  = 0,
2191         //      .irq            = ACT8846_HOST_IRQ,
2192                 .platform_data=&rk808_data,
2193         },
2194 #endif
2195
2196 #if defined (CONFIG_MFD_RICOH619)
2197         {
2198                 .type                   = "ricoh619",
2199                 .addr           = 0x32,
2200                 .flags                  = 0,
2201                .irq            = RICOH619_HOST_IRQ,
2202                .platform_data=&ricoh619_data,
2203         },
2204 #endif
2205
2206 #if defined (CONFIG_MFD_RT5025)
2207         {
2208                 .type                   = "RT5025",
2209                 .addr           = 0x35,
2210                 .flags                  = 0,
2211                .irq            = RT5025_HOST_IRQ,
2212                .platform_data=&rt5025_data,
2213         },
2214 #endif
2215
2216 #if defined (CONFIG_RTC_HYM8563)
2217         {
2218                 .type                   = "rtc_hym8563",
2219                 .addr           = 0x51,
2220                 .flags                  = 0,
2221                 .irq            = RK30_PIN1_PA4,
2222         },
2223 #if defined (CONFIG_CW2015_BATTERY)
2224         {
2225                 .type           = "cw201x",
2226                 .addr           = 0x62,
2227                 .flags          = 0,
2228                 .platform_data  = &cw_bat_platdata,
2229         },
2230 #endif
2231 #endif
2232
2233 };
2234 #endif
2235
2236 void __sramfunc board_pmu_suspend(void)
2237 {
2238 #if defined (CONFIG_MFD_WM831X_I2C)
2239         if(pmic_is_wm8326())
2240         board_pmu_wm8326_suspend();
2241 #endif
2242 #if defined (CONFIG_MFD_TPS65910)
2243         if(pmic_is_tps65910())
2244         board_pmu_tps65910_suspend();
2245 #endif
2246 #if defined (CONFIG_REGULATOR_ACT8846)
2247         if(pmic_is_act8846())
2248         board_pmu_act8846_suspend();
2249 #endif
2250 #if defined (CONFIG_MFD_RK808)
2251         if(pmic_is_rk808())
2252         board_pmu_rk808_suspend();
2253 #endif
2254 #if defined (CONFIG_MFD_RICOH619)
2255         if(pmic_is_ricoh619())
2256         board_pmu_ricoh619_suspend();
2257 #endif
2258
2259 }
2260
2261 void __sramfunc board_pmu_resume(void)
2262 {
2263 #if defined (CONFIG_MFD_WM831X_I2C)
2264         if(pmic_is_wm8326())
2265         board_pmu_wm8326_resume();
2266 #endif
2267 #if defined (CONFIG_MFD_TPS65910)
2268         if(pmic_is_tps65910())
2269         board_pmu_tps65910_resume();
2270 #endif
2271 #if defined (CONFIG_REGULATOR_ACT8846)
2272         if(pmic_is_act8846())
2273         board_pmu_act8846_resume();
2274 #endif
2275 #if defined (CONFIG_MFD_RK808)
2276         if(pmic_is_rk808())
2277         board_pmu_rk808_resume();
2278 #endif
2279 #if defined (CONFIG_MFD_RICOH619)
2280         if(pmic_is_ricoh619())
2281         board_pmu_ricoh619_resume();
2282 #endif
2283
2284 }
2285
2286  int __sramdata gpio3d6_iomux,gpio3d6_do,gpio3d6_dir,gpio3d6_en;
2287
2288 #define grf_readl(offset)       readl_relaxed(RK30_GRF_BASE + offset)
2289 #define grf_writel(v, offset)   do { writel_relaxed(v, RK30_GRF_BASE + offset); dsb(); } while (0)
2290
2291 void __sramfunc rk30_pwm_logic_suspend_voltage(void)
2292 {
2293 #ifdef CONFIG_RK30_PWM_REGULATOR
2294
2295 //      int gpio0d7_iomux,gpio0d7_do,gpio0d7_dir,gpio0d7_en;
2296         sram_udelay(10000);
2297         gpio3d6_iomux = grf_readl(GRF_GPIO3D_IOMUX);
2298         gpio3d6_do = grf_readl(GRF_GPIO3H_DO);
2299         gpio3d6_dir = grf_readl(GRF_GPIO3H_DIR);
2300         gpio3d6_en = grf_readl(GRF_GPIO3H_EN);
2301
2302         grf_writel((0x03000300), GRF_GPIO3D_IOMUX);
2303         grf_writel((1<<28)|(1<<12), GRF_GPIO3H_DIR);
2304         grf_writel((1<<28)|(1<<12), GRF_GPIO3H_DO);
2305         grf_writel((1<<28)|(1<<12), GRF_GPIO3H_EN);
2306 #endif
2307 }
2308 void __sramfunc rk30_pwm_logic_resume_voltage(void)
2309 {
2310 #ifdef CONFIG_RK30_PWM_REGULATOR
2311         grf_writel((1<<28)|gpio3d6_iomux, GRF_GPIO3D_IOMUX);
2312         grf_writel((1<<30)|gpio3d6_en, GRF_GPIO3H_EN);
2313         grf_writel((1<<30)|gpio3d6_dir, GRF_GPIO3H_DIR);
2314         grf_writel((1<<30)|gpio3d6_do, GRF_GPIO3H_DO);
2315         sram_udelay(10000);
2316
2317 #endif
2318
2319 }
2320 extern void pwm_suspend_voltage(void);
2321 extern void pwm_resume_voltage(void);
2322 void  rk30_pwm_suspend_voltage_set(void)
2323 {
2324 #ifdef CONFIG_RK30_PWM_REGULATOR
2325         pwm_suspend_voltage();
2326 #endif
2327 }
2328 void  rk30_pwm_resume_voltage_set(void)
2329 {
2330 #ifdef CONFIG_RK30_PWM_REGULATOR
2331         pwm_resume_voltage();
2332 #endif
2333 }
2334
2335
2336 #ifdef CONFIG_I2C2_RK30
2337 static struct i2c_board_info __initdata i2c2_info[] = {
2338 #if defined (CONFIG_TOUCHSCREEN_GT8XX)
2339         {
2340                 .type          = "Goodix-TS",
2341                 .addr          = 0x55,
2342                 .flags         = 0,
2343                 .irq           = RK30_PIN1_PB7,
2344                 .platform_data = &goodix_info,
2345         },
2346 #endif
2347 #if defined (CONFIG_LS_CM3217)
2348         {
2349                 .type          = "lightsensor",
2350                 .addr          = 0x10,
2351                 .flags         = 0,
2352                 .platform_data = &cm3217_info,
2353         },
2354 #endif
2355 };
2356 #endif
2357
2358 #ifdef CONFIG_I2C3_RK30
2359 static struct i2c_board_info __initdata i2c3_info[] = {
2360 };
2361 #endif
2362
2363 #ifdef CONFIG_I2C4_RK30
2364 static struct i2c_board_info __initdata i2c4_info[] = {
2365 #if defined (CONFIG_MFD_RK616)
2366         {
2367                 .type          = "rk616",
2368                 .addr          = 0x50,
2369                 .flags         = 0,
2370                 .platform_data = &rk616_pdata,
2371         },
2372 #endif
2373
2374 };
2375 #endif
2376
2377 #ifdef CONFIG_I2C_GPIO_RK30
2378 #define I2C_SDA_PIN     INVALID_GPIO// RK30_PIN2_PD6   //set sda_pin here
2379 #define I2C_SCL_PIN     INVALID_GPIO//RK30_PIN2_PD7   //set scl_pin here
2380 static int rk30_i2c_io_init(void)
2381 {
2382         //set iomux (gpio) here
2383         //rk30_mux_api_set(GPIO2D7_I2C1SCL_NAME, GPIO2D_GPIO2D7);
2384         //rk30_mux_api_set(GPIO2D6_I2C1SDA_NAME, GPIO2D_GPIO2D6);
2385
2386         return 0;
2387 }
2388 struct i2c_gpio_platform_data default_i2c_gpio_data = {
2389        .sda_pin = I2C_SDA_PIN,
2390        .scl_pin = I2C_SCL_PIN,
2391        .udelay = 5, // clk = 500/udelay = 100Khz
2392        .timeout = 100,//msecs_to_jiffies(100),
2393        .bus_num    = 5,
2394        .io_init = rk30_i2c_io_init,
2395 };
2396 static struct i2c_board_info __initdata i2c_gpio_info[] = {
2397 };
2398 #endif
2399
2400 static void __init rk30_i2c_register_board_info(void)
2401 {
2402 #ifdef CONFIG_I2C0_RK30
2403         i2c_register_board_info(0, i2c0_info, ARRAY_SIZE(i2c0_info));
2404 #endif
2405 #ifdef CONFIG_I2C1_RK30
2406         i2c_register_board_info(1, i2c1_info, ARRAY_SIZE(i2c1_info));
2407 #endif
2408 #ifdef CONFIG_I2C2_RK30
2409         i2c_register_board_info(2, i2c2_info, ARRAY_SIZE(i2c2_info));
2410 #endif
2411 #ifdef CONFIG_I2C3_RK30
2412         i2c_register_board_info(3, i2c3_info, ARRAY_SIZE(i2c3_info));
2413 #endif
2414 #ifdef CONFIG_I2C4_RK30
2415         i2c_register_board_info(4, i2c4_info, ARRAY_SIZE(i2c4_info));
2416 #endif
2417 #ifdef CONFIG_I2C_GPIO_RK30
2418         i2c_register_board_info(5, i2c_gpio_info, ARRAY_SIZE(i2c_gpio_info));
2419 #endif
2420 }
2421 //end of i2c
2422
2423 // ========== Begin of rk3168 top board keypad defination ============
2424
2425 #include <plat/key.h>
2426
2427 static struct rk29_keys_button key_button[] = {
2428         {
2429                 .desc   = "vol-",
2430                 .code   = KEY_VOLUMEDOWN,
2431                 .adc_value      = 900,
2432                 .gpio   = INVALID_GPIO,
2433                 .active_low = PRESS_LEV_LOW,
2434         },
2435         {
2436                 .desc   = "play",
2437                 .code   = KEY_POWER,
2438                 .gpio   = RK30_PIN0_PA4,
2439                 .active_low = PRESS_LEV_LOW,
2440                 .wakeup = 1,
2441         },
2442         {
2443                 .desc   = "vol+",
2444                 .code   = KEY_VOLUMEUP,
2445                 .adc_value      = 1,
2446                 .gpio = INVALID_GPIO,
2447                 .active_low = PRESS_LEV_LOW,
2448         },
2449         {
2450                 .desc   = "menu",
2451                 .code   = EV_MENU,
2452                 .adc_value      = 133,
2453                 .gpio = INVALID_GPIO,
2454                 .active_low = PRESS_LEV_LOW,
2455         },
2456         {
2457                 .desc   = "home",
2458                 .code   = KEY_HOME,
2459                 .adc_value      = 550,
2460                 .gpio = INVALID_GPIO,
2461                 .active_low = PRESS_LEV_LOW,
2462         },
2463         {
2464                 .desc   = "esc",
2465                 .code   = KEY_BACK,
2466                 .adc_value      = 333,
2467                 .gpio = INVALID_GPIO,
2468                 .active_low = PRESS_LEV_LOW,
2469         },
2470         {
2471                 .desc   = "camera",
2472                 .code   = KEY_CAMERA,
2473                 .adc_value      = 742,
2474                 .gpio = INVALID_GPIO,
2475                 .active_low = PRESS_LEV_LOW,
2476         },
2477 };
2478 struct rk29_keys_platform_data rk29_keys_pdata = {
2479         .buttons        = key_button,
2480         .nbuttons       = ARRAY_SIZE(key_button),
2481         .chn    = 1,  //chn: 0-7, if do not use ADC,set 'chn' -1
2482 };
2483
2484 // =========== End of rk3168 top board keypad defination  =============
2485
2486
2487 #define POWER_ON_PIN RK30_PIN0_PA0   //power_hold
2488 static void rk30_pm_power_off(void)
2489 {
2490         printk(KERN_ERR "rk30_pm_power_off start...\n");
2491         #if defined(CONFIG_MFD_WM831X)
2492         if(pmic_is_wm8326()){
2493                 wm831x_set_bits(Wm831x,WM831X_GPIO_LEVEL,0x0001,0x0000);  //set sys_pwr 0
2494                 wm831x_device_shutdown(Wm831x);//wm8326 shutdown
2495          }
2496         #endif
2497
2498         #if defined(CONFIG_REGULATOR_ACT8846)
2499         if(pmic_is_act8846())
2500         {
2501                act8846_device_shutdown();
2502         }
2503         #endif
2504
2505         #if defined(CONFIG_MFD_TPS65910)
2506         if(pmic_is_tps65910())
2507         {
2508                 tps65910_device_shutdown();//tps65910 shutdown
2509         }
2510         #endif
2511
2512          #if defined(CONFIG_MFD_RK808)
2513         if(pmic_is_rk808())
2514        {
2515                 rk808_device_shutdown();//rk808 shutdown
2516         }
2517         #endif
2518          #if defined(CONFIG_MFD_RICOH619)
2519          if(pmic_is_ricoh619()){
2520         ricoh619_power_off();    //ricoh619 shutdown
2521         }
2522         #endif
2523
2524         #if defined(CONFIG_MFD_RT5025)
2525         if(pmic_is_rt5025()){
2526         rt5025_power_off();    //rt5025 shutdown
2527         }
2528         #endif
2529
2530         gpio_direction_output(POWER_ON_PIN, GPIO_LOW);
2531         while (1);
2532 }
2533
2534 static void __init machine_rk30_board_init(void)
2535 {
2536         avs_init();
2537         gpio_request(POWER_ON_PIN, "poweronpin");
2538         gpio_direction_output(POWER_ON_PIN, GPIO_HIGH);
2539
2540         pm_power_off = rk30_pm_power_off;
2541
2542         gpio_direction_output(POWER_ON_PIN, GPIO_HIGH);
2543
2544
2545         rk30_i2c_register_board_info();
2546         spi_register_board_info(board_spi_devices, ARRAY_SIZE(board_spi_devices));
2547         platform_add_devices(devices, ARRAY_SIZE(devices));
2548         rk_platform_add_display_devices();
2549         board_usb_detect_init(RK30_PIN0_PA7);
2550
2551 #if defined(CONFIG_WIFI_CONTROL_FUNC)
2552         rk29sdk_wifi_bt_gpio_control_init();
2553 #elif defined(CONFIG_WIFI_COMBO_MODULE_CONTROL_FUNC)
2554     rk29sdk_wifi_combo_module_gpio_init();
2555 #endif
2556
2557 #if defined(CONFIG_MT6620)
2558     clk_set_rate(clk_get_sys("rk_serial.0", "uart"), 48*1000000);
2559 #endif
2560
2561 #if defined(CONFIG_MT5931_MT6622)
2562                 clk_set_rate(clk_get_sys("rk_serial.0", "uart"), 24*1000000);
2563 #endif
2564 }
2565 #define HD_SCREEN_SIZE 1920UL*1200UL*4*3
2566 static void __init rk30_reserve(void)
2567 {
2568 #if defined(CONFIG_ARCH_RK3188)
2569         /*if lcd resolution great than or equal to 1920*1200,reserve the ump memory */
2570         if(!(get_fb_size() < ALIGN(HD_SCREEN_SIZE,SZ_1M)))
2571         {
2572                 int ump_mem_phy_size=512UL*1024UL*1024UL;
2573                 resource_mali[0].start = board_mem_reserve_add("ump buf", ump_mem_phy_size);
2574                 resource_mali[0].end = resource_mali[0].start + ump_mem_phy_size -1;
2575         }
2576 #endif
2577 #ifdef CONFIG_ION
2578         rk30_ion_pdata.heaps[0].base = board_mem_reserve_add("ion", ION_RESERVE_SIZE);
2579 #endif
2580 #ifdef CONFIG_FB_ROCKCHIP
2581         resource_fb[0].start = board_mem_reserve_add("fb0 buf", get_fb_size());
2582         resource_fb[0].end = resource_fb[0].start + get_fb_size()- 1;
2583 #if 0
2584         resource_fb[1].start = board_mem_reserve_add("ipp buf", RK30_FB0_MEM_SIZE);
2585         resource_fb[1].end = resource_fb[1].start + RK30_FB0_MEM_SIZE - 1;
2586 #endif
2587
2588 #if defined(CONFIG_FB_ROTATE) || !defined(CONFIG_THREE_FB_BUFFER)
2589         resource_fb[2].start = board_mem_reserve_add("fb2 buf",get_fb_size());
2590         resource_fb[2].end = resource_fb[2].start + get_fb_size() - 1;
2591 #endif
2592 #endif
2593
2594 #ifdef CONFIG_VIDEO_RK29
2595         rk30_camera_request_reserve_mem();
2596 #endif
2597
2598 #ifdef CONFIG_GPS_RK
2599         //it must be more than 8MB
2600         rk_gps_info.u32MemoryPhyAddr = board_mem_reserve_add("gps", SZ_8M);
2601 #endif
2602         board_mem_reserved();
2603 }
2604 /******************************** arm dvfs frequency volt table **********************************/
2605 /**
2606  * dvfs_cpu_logic_table: table for arm and logic dvfs
2607  * @frequency   : arm frequency
2608  * @cpu_volt    : arm voltage depend on frequency
2609  */
2610
2611 #if defined(CONFIG_ARCH_RK3188)
2612 //sdk
2613 static struct cpufreq_frequency_table dvfs_arm_table_volt_level0[] = {
2614         {.frequency = 312 * 1000,       .index = 850 * 1000},
2615         {.frequency = 504 * 1000,       .index = 900 * 1000},
2616         {.frequency = 816 * 1000,       .index = 950 * 1000},
2617         {.frequency = 1008 * 1000,      .index = 1025 * 1000},
2618         {.frequency = 1200 * 1000,      .index = 1100 * 1000},
2619         {.frequency = 1416 * 1000,      .index = 1200 * 1000},
2620         {.frequency = 1608 * 1000,      .index = 1300 * 1000},
2621         {.frequency = CPUFREQ_TABLE_END},
2622 };
2623 //default
2624 static struct cpufreq_frequency_table dvfs_arm_table_volt_level1[] = {
2625         {.frequency = 312 * 1000,       .index = 875 * 1000},
2626         {.frequency = 504 * 1000,       .index = 925 * 1000},
2627         {.frequency = 816 * 1000,       .index = 975 * 1000},
2628         {.frequency = 1008 * 1000,      .index = 1075 * 1000},
2629         {.frequency = 1200 * 1000,      .index = 1150 * 1000},
2630         {.frequency = 1416 * 1000,      .index = 1250 * 1000},
2631         {.frequency = 1608 * 1000,      .index = 1350 * 1000},
2632         {.frequency = CPUFREQ_TABLE_END},
2633 };
2634 // cube 10'
2635 static struct cpufreq_frequency_table dvfs_arm_table_volt_level2[] = {
2636         {.frequency = 312 * 1000,       .index = 900 * 1000},
2637         {.frequency = 504 * 1000,       .index = 925 * 1000},
2638         {.frequency = 816 * 1000,       .index = 1000 * 1000},
2639         {.frequency = 1008 * 1000,      .index = 1075 * 1000},
2640         {.frequency = 1200 * 1000,      .index = 1200 * 1000},
2641         {.frequency = 1416 * 1000,      .index = 1250 * 1000},
2642         {.frequency = 1608 * 1000,      .index = 1350 * 1000},
2643         {.frequency = CPUFREQ_TABLE_END},
2644 };
2645
2646 /******************************** gpu dvfs frequency volt table **********************************/
2647 //sdk
2648 static struct cpufreq_frequency_table dvfs_gpu_table_volt_level0[] = {
2649         {.frequency = 133 * 1000,       .index = 975 * 1000},//the mininum rate is limited 133M for rk3188
2650         {.frequency = 200 * 1000,       .index = 975 * 1000},
2651         {.frequency = 266 * 1000,       .index = 1000 * 1000},
2652         {.frequency = 300 * 1000,       .index = 1050 * 1000},
2653         {.frequency = 400 * 1000,       .index = 1100 * 1000},
2654         {.frequency = 600 * 1000,       .index = 1200 * 1000},
2655         {.frequency = CPUFREQ_TABLE_END},
2656 };
2657 //cube 10'
2658 static struct cpufreq_frequency_table dvfs_gpu_table_volt_level1[] = {
2659         {.frequency = 133 * 1000,       .index = 975 * 1000},//the mininum rate is limited 133M for rk3188
2660         {.frequency = 200 * 1000,       .index = 1000 * 1000},
2661         {.frequency = 266 * 1000,       .index = 1025 * 1000},
2662         {.frequency = 300 * 1000,       .index = 1050 * 1000},
2663         {.frequency = 400 * 1000,       .index = 1100 * 1000},
2664         {.frequency = 600 * 1000,       .index = 1250 * 1000},
2665         {.frequency = CPUFREQ_TABLE_END},
2666 };
2667
2668 /******************************** ddr dvfs frequency volt table **********************************/
2669 static struct cpufreq_frequency_table dvfs_ddr_table_volt_level0[] = {
2670         {.frequency = 200 * 1000 + DDR_FREQ_SUSPEND,    .index = 950 * 1000},
2671         {.frequency = 300 * 1000 + DDR_FREQ_VIDEO,      .index = 1000 * 1000},
2672         {.frequency = 396 * 1000 + DDR_FREQ_NORMAL,     .index = 1100 * 1000},
2673         {.frequency = 460 * 1000 + DDR_FREQ_DUALVIEW,     .index = 1150 * 1000},
2674         //{.frequency = 528 * 1000 + DDR_FREQ_NORMAL,     .index = 1200 * 1000},
2675         {.frequency = CPUFREQ_TABLE_END},
2676 };
2677
2678 static struct cpufreq_frequency_table dvfs_ddr_table_t[] = {
2679         {.frequency = 200 * 1000 + DDR_FREQ_SUSPEND,    .index = 950 * 1000},
2680         {.frequency = 460 * 1000 + DDR_FREQ_NORMAL,     .index = 1150 * 1000},
2681         {.frequency = CPUFREQ_TABLE_END},
2682 };
2683
2684 //if you board is good for volt quality,select dvfs_arm_table_volt_level0
2685 #define dvfs_arm_table dvfs_arm_table_volt_level1
2686 #define dvfs_gpu_table dvfs_gpu_table_volt_level1
2687 #define dvfs_ddr_table dvfs_ddr_table_volt_level0
2688
2689 #else
2690 //for RK3168 && RK3066B
2691 static struct cpufreq_frequency_table dvfs_arm_table[] = {
2692         {.frequency = 312 * 1000,       .index = 950 * 1000},
2693         {.frequency = 504 * 1000,       .index = 1000 * 1000},
2694         {.frequency = 816 * 1000,       .index = 1050 * 1000},
2695         {.frequency = 1008 * 1000,      .index = 1125 * 1000},
2696         {.frequency = 1200 * 1000,      .index = 1200 * 1000},
2697         //{.frequency = 1416 * 1000,      .index = 1250 * 1000},
2698         //{.frequency = 1608 * 1000,      .index = 1300 * 1000},
2699         {.frequency = CPUFREQ_TABLE_END},
2700 };
2701
2702 static struct cpufreq_frequency_table dvfs_gpu_table[] = {
2703         {.frequency = 100 * 1000,       .index = 1000 * 1000},
2704         {.frequency = 200 * 1000,       .index = 1000 * 1000},
2705         {.frequency = 266 * 1000,       .index = 1050 * 1000},
2706         //{.frequency = 300 * 1000,       .index = 1050 * 1000},
2707         {.frequency = 400 * 1000,       .index = 1125 * 1000},
2708         {.frequency = CPUFREQ_TABLE_END},
2709 };
2710
2711 static struct cpufreq_frequency_table dvfs_ddr_table[] = {
2712         {.frequency = 200 * 1000 + DDR_FREQ_SUSPEND,    .index = 1000 * 1000},
2713         {.frequency = 300 * 1000 + DDR_FREQ_VIDEO,      .index = 1050 * 1000},
2714         {.frequency = 400 * 1000 + DDR_FREQ_NORMAL,     .index = 1100 * 1000},
2715         {.frequency = 450 * 1000,                       .index = 1150 * 1000},
2716         {.frequency = CPUFREQ_TABLE_END},
2717 };
2718 #endif
2719 /******************************** arm dvfs frequency volt table end **********************************/
2720 //#define DVFS_CPU_TABLE_SIZE   (ARRAY_SIZE(dvfs_cpu_logic_table))
2721 //static struct cpufreq_frequency_table cpu_dvfs_table[DVFS_CPU_TABLE_SIZE];
2722 //static struct cpufreq_frequency_table dep_cpu2core_table[DVFS_CPU_TABLE_SIZE];
2723 int get_max_freq(struct cpufreq_frequency_table *table)
2724 {
2725         int i,temp=0;
2726
2727         for(i=0;table[i].frequency!= CPUFREQ_TABLE_END;i++)
2728         {
2729                 if(temp<table[i].frequency)
2730                         temp=table[i].frequency;
2731         }
2732         printk("get_max_freq=%d\n",temp);
2733         return temp;
2734 }
2735
2736 void __init board_clock_init(void)
2737 {
2738         u32 flags=RK30_CLOCKS_DEFAULT_FLAGS;
2739 #if !defined(CONFIG_ARCH_RK3188)
2740         if(get_max_freq(dvfs_gpu_table)<=(400*1000))
2741         {
2742                 flags=RK30_CLOCKS_DEFAULT_FLAGS|CLK_GPU_GPLL;
2743         }
2744         else
2745                 flags=RK30_CLOCKS_DEFAULT_FLAGS|CLK_GPU_CPLL;
2746 #endif
2747         rk30_clock_data_init(periph_pll_default, codec_pll_default, flags);
2748         //dvfs_set_arm_logic_volt(dvfs_cpu_logic_table, cpu_dvfs_table, dep_cpu2core_table);
2749         dvfs_set_freq_volt_table(clk_get(NULL, "cpu"), dvfs_arm_table);
2750         dvfs_set_freq_volt_table(clk_get(NULL, "gpu"), dvfs_gpu_table);
2751 #if defined(CONFIG_ARCH_RK3188)
2752         if (rk_pll_flag() == 0)
2753                 dvfs_set_freq_volt_table(clk_get(NULL, "ddr"), dvfs_ddr_table);
2754         else
2755                 dvfs_set_freq_volt_table(clk_get(NULL, "ddr"), dvfs_ddr_table_t);
2756 #else
2757         dvfs_set_freq_volt_table(clk_get(NULL, "ddr"), dvfs_ddr_table);
2758 #endif
2759 }
2760
2761 MACHINE_START(RK30, "RK30board")
2762         .boot_params    = PLAT_PHYS_OFFSET + 0x800,
2763         .fixup          = rk30_fixup,
2764         .reserve        = &rk30_reserve,
2765         .map_io         = rk30_map_io,
2766         .init_irq       = rk30_init_irq,
2767         .timer          = &rk30_timer,
2768         .init_machine   = machine_rk30_board_init,
2769 MACHINE_END