1 #include <linux/regulator/machine.h>
2 #include <linux/i2c/twl.h>
3 #include <linux/mfd/tps65910.h>
5 #include <linux/platform_device.h>
8 #include <mach/iomux.h>
10 #ifdef CONFIG_MFD_TPS65910
12 extern int platform_device_register(struct platform_device *pdev);
14 int tps65910_pre_init(struct tps65910 *tps65910){
19 printk("%s,line=%d\n", __func__,__LINE__);
21 #ifdef CONFIG_RK_CONFIG
22 if(sram_gpio_init(get_port_config(pmic_slp).gpio, &pmic_sleep) < 0){
23 printk(KERN_ERR "sram_gpio_init failed\n");
26 if(port_output_init(pmic_slp, 0, "pmic_slp") < 0){
27 printk(KERN_ERR "port_output_init failed\n");
31 if(sram_gpio_init(PMU_POWER_SLEEP, &pmic_sleep) < 0){
32 printk(KERN_ERR "sram_gpio_init failed\n");
36 gpio_request(PMU_POWER_SLEEP, "NULL");
37 gpio_direction_output(PMU_POWER_SLEEP, GPIO_LOW);
41 /*************set vdd11 (pll) voltage 1.0v********************/
42 val = tps65910_reg_read(tps65910, TPS65910_VDIG2);
44 printk(KERN_ERR "Unable to read TPS65910_VDIG2 reg\n");
48 err = tps65910_reg_write(tps65910, TPS65910_VDIG2, val);
50 printk(KERN_ERR "Unable to write TPS65910_VDIG2 reg\n");
53 /****************************************/
55 val = tps65910_reg_read(tps65910, TPS65910_DEVCTRL2);
57 printk(KERN_ERR "Unable to read TPS65910_DEVCTRL2 reg\n");
60 /* Set sleep state active high and allow device turn-off after PWRON long press */
61 val |= (DEVCTRL2_SLEEPSIG_POL_MASK | DEVCTRL2_PWON_LP_OFF_MASK);
63 err = tps65910_reg_write(tps65910, TPS65910_DEVCTRL2, val);
65 printk(KERN_ERR "Unable to write TPS65910_DEVCTRL2 reg\n");
71 val = tps65910_reg_read(tps65910, TPS65910_DCDCCTRL);
73 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
77 val &= ~DEVCTRL_DEV_OFF_MASK;
78 val &= ~DEVCTRL_DEV_SLP_MASK;
79 err = tps65910_reg_write(tps65910, TPS65910_DCDCCTRL, val);
81 printk(KERN_ERR "Unable to write TPS65910_DCDCCTRL reg\n");
85 /* Set the maxinum load current */
87 val = tps65910_reg_read(tps65910, TPS65910_VDD1);
89 printk(KERN_ERR "Unable to read TPS65910_VDD1 reg\n");
93 val |= (1<<5); //when 1: 1.5 A
95 val |= (0x01<<2); //TSTEP[3:2] = 01 : 12.5 mV/us(sampling 3 Mhz)
96 err = tps65910_reg_write(tps65910, TPS65910_VDD1, val);
98 printk(KERN_ERR "Unable to write TPS65910_VDD1 reg\n");
103 val = tps65910_reg_read(tps65910, TPS65910_VDD2);
105 printk(KERN_ERR "Unable to read TPS65910_VDD2 reg\n");
109 val |= (1<<5); //when 1: 1.5 A
111 val |= (0x01<<2); //TSTEP[3:2] = 01 : 12.5 mV/us(sampling 3 Mhz)
112 err = tps65910_reg_write(tps65910, TPS65910_VDD2, val);
114 printk(KERN_ERR "Unable to write TPS65910_VDD2 reg\n");
119 val = tps65910_reg_read(tps65910, TPS65910_VIO);
121 printk(KERN_ERR "Unable to read TPS65910_VIO reg\n");
125 val |= (1<<6); //when 01: 1.0 A
126 err = tps65910_reg_write(tps65910, TPS65910_VIO, val);
128 printk(KERN_ERR "Unable to write TPS65910_VIO reg\n");
132 /* Mask ALL interrupts */
133 err = tps65910_reg_write(tps65910,TPS65910_INT_MSK, 0xFF);
135 printk(KERN_ERR "Unable to write TPS65910_INT_MSK reg\n");
139 err = tps65910_reg_write(tps65910, TPS65910_INT_MSK2, 0x03);
141 printk(KERN_ERR "Unable to write TPS65910_INT_MSK2 reg\n");
145 /* Set RTC Power, disable Smart Reflex in DEVCTRL_REG */
148 val |= (DEVCTRL_SR_CTL_I2C_SEL_MASK);
149 err = tps65910_reg_write(tps65910, TPS65910_DEVCTRL, val);
151 printk(KERN_ERR "Unable to write TPS65910_DEVCTRL reg\n");
154 printk(KERN_INFO "TPS65910 Set default voltage.\n");
157 //read sleep control register for debug
160 err = tps65910_reg_read(tps65910, &val, TPS65910_DEVCTRL+i);
162 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
166 printk("%s.......is 0x%04x\n",__FUNCTION__,val);
171 //sleep control register
172 /*set func when in sleep mode */
173 val = tps65910_reg_read(tps65910, TPS65910_DEVCTRL);
175 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
180 err = tps65910_reg_write(tps65910, TPS65910_DEVCTRL, val);
182 printk(KERN_ERR "Unable to read TPS65910 Reg at offset 0x%x= \
183 \n", TPS65910_VDIG1);
187 /* open ldo when in sleep mode */
188 val = tps65910_reg_read(tps65910, TPS65910_SLEEP_KEEP_LDO_ON);
190 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
195 err = tps65910_reg_write(tps65910, TPS65910_SLEEP_KEEP_LDO_ON, val);
197 printk(KERN_ERR "Unable to read TPS65910 Reg at offset 0x%x= \
198 \n", TPS65910_VDIG1);
202 /*set dc mode when in sleep mode */
203 val = tps65910_reg_read(tps65910, TPS65910_SLEEP_KEEP_RES_ON);
205 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
210 val &= ~(0x07); //set vdd1 vdd2 vio in pfm mode when in sleep
211 err = tps65910_reg_write(tps65910, TPS65910_SLEEP_KEEP_RES_ON, val);
213 printk(KERN_ERR "Unable to read TPS65910 Reg at offset 0x%x= \
214 \n", TPS65910_VDIG1);
218 /*close ldo when in sleep mode */
219 val = tps65910_reg_read(tps65910, TPS65910_SLEEP_SET_LDO_OFF);
221 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
226 err = tps65910_reg_write(tps65910, TPS65910_SLEEP_SET_LDO_OFF, val);
228 printk(KERN_ERR "Unable to read TPS65910 Reg at offset 0x%x= \
229 \n", TPS65910_VDIG1);
234 //read sleep control register for debug
237 err = tps65910_reg_read(tps65910, &val, TPS65910_DEVCTRL+i);
239 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
243 printk("%s.......is 0x%4x\n",__FUNCTION__,val);
248 /*****************set arm and logic (dc1&dc2)in pwm ****************/
249 val = tps65910_reg_read(tps65910, TPS65910_DCDCCTRL);
251 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
256 err = tps65910_reg_write(tps65910, TPS65910_DCDCCTRL, val);
258 printk(KERN_ERR "Unable to read TPS65910 Reg at offset 0x%x= \
259 \n", TPS65910_VDIG1);
262 /************************************************/
264 printk("%s,line=%d\n", __func__,__LINE__);
268 int tps65910_post_init(struct tps65910 *tps65910)
270 struct regulator *dcdc;
271 struct regulator *ldo;
273 printk("%s,line=%d\n", __func__,__LINE__);
275 g_pmic_type = PMIC_TYPE_TPS65910;
276 printk("%s:g_pmic_type=%d\n",__func__,g_pmic_type);
278 #ifdef CONFIG_RK30_PWM_REGULATOR
279 platform_device_register(&pwm_regulator_device[0]);
282 for(i = 0; i < ARRAY_SIZE(tps65910_dcdc_info); i++)
284 dcdc =regulator_get(NULL, tps65910_dcdc_info[i].name);
285 regulator_set_voltage(dcdc, tps65910_dcdc_info[i].min_uv, tps65910_dcdc_info[i].max_uv);
286 regulator_enable(dcdc);
287 printk("%s %s =%dmV end\n", __func__,tps65910_dcdc_info[i].name, regulator_get_voltage(dcdc));
292 for(i = 0; i < ARRAY_SIZE(tps65910_ldo_info); i++)
294 ldo =regulator_get(NULL, tps65910_ldo_info[i].name);
295 regulator_set_voltage(ldo, tps65910_ldo_info[i].min_uv, tps65910_ldo_info[i].max_uv);
296 regulator_enable(ldo);
297 //printk("%s %s =%dmV end\n", __func__,tps65910_dcdc_info[i].name, regulator_get_voltage(ldo));
301 printk("%s,line=%d END\n", __func__,__LINE__);
306 static struct regulator_consumer_supply tps65910_smps1_supply[] = {
310 #if defined(CONFIG_SOC_RK3168) || defined(CONFIG_ARCH_RK3188) || defined(CONFIG_SOC_RK3028)
312 .supply = "vdd_core",
320 static struct regulator_consumer_supply tps65910_smps2_supply[] = {
324 #if defined(CONFIG_MACH_RK3168_86V) || defined(CONFIG_SOC_RK3028)
330 static struct regulator_consumer_supply tps65910_smps3_supply[] = {
335 static struct regulator_consumer_supply tps65910_smps4_supply[] = {
340 static struct regulator_consumer_supply tps65910_ldo1_supply[] = {
345 static struct regulator_consumer_supply tps65910_ldo2_supply[] = {
351 static struct regulator_consumer_supply tps65910_ldo3_supply[] = {
356 static struct regulator_consumer_supply tps65910_ldo4_supply[] = {
361 static struct regulator_consumer_supply tps65910_ldo5_supply[] = {
366 static struct regulator_consumer_supply tps65910_ldo6_supply[] = {
371 static struct regulator_consumer_supply tps65910_ldo7_supply[] = {
377 static struct regulator_consumer_supply tps65910_ldo8_supply[] = {
383 static struct regulator_init_data tps65910_smps1 = {
390 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
391 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
394 .num_consumer_supplies = ARRAY_SIZE(tps65910_smps1_supply),
395 .consumer_supplies = tps65910_smps1_supply,
399 static struct regulator_init_data tps65910_smps2 = {
406 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
407 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
410 .num_consumer_supplies = ARRAY_SIZE(tps65910_smps2_supply),
411 .consumer_supplies = tps65910_smps2_supply,
415 static struct regulator_init_data tps65910_smps3 = {
422 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
423 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
426 .num_consumer_supplies = ARRAY_SIZE(tps65910_smps3_supply),
427 .consumer_supplies = tps65910_smps3_supply,
430 static struct regulator_init_data tps65910_smps4 = {
437 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
438 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
441 .num_consumer_supplies = ARRAY_SIZE(tps65910_smps4_supply),
442 .consumer_supplies = tps65910_smps4_supply,
444 static struct regulator_init_data tps65910_ldo1 = {
451 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
452 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
455 .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo1_supply),
456 .consumer_supplies = tps65910_ldo1_supply,
460 static struct regulator_init_data tps65910_ldo2 = {
467 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
468 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
471 .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo2_supply),
472 .consumer_supplies = tps65910_ldo2_supply,
476 static struct regulator_init_data tps65910_ldo3 = {
483 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
484 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
487 .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo3_supply),
488 .consumer_supplies = tps65910_ldo3_supply,
492 static struct regulator_init_data tps65910_ldo4 = {
499 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
500 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
503 .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo4_supply),
504 .consumer_supplies = tps65910_ldo4_supply,
508 static struct regulator_init_data tps65910_ldo5 = {
515 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
516 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
519 .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo5_supply),
520 .consumer_supplies = tps65910_ldo5_supply,
524 static struct regulator_init_data tps65910_ldo6 = {
531 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
532 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
535 .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo6_supply),
536 .consumer_supplies = tps65910_ldo6_supply,
540 static struct regulator_init_data tps65910_ldo7 = {
547 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
548 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
551 .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo7_supply),
552 .consumer_supplies = tps65910_ldo7_supply,
556 static struct regulator_init_data tps65910_ldo8 = {
563 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
564 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
567 .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo8_supply),
568 .consumer_supplies = tps65910_ldo8_supply,
571 void __sramfunc board_pmu_tps65910_suspend(void)
573 #ifdef CONFIG_CLK_SWITCH_TO_32K
574 sram_gpio_set_value(pmic_sleep, GPIO_HIGH);
577 void __sramfunc board_pmu_tps65910_resume(void)
579 #ifdef CONFIG_CLK_SWITCH_TO_32K
580 sram_gpio_set_value(pmic_sleep, GPIO_LOW);
581 sram_32k_udelay(10000);
584 static struct tps65910_board tps65910_data = {
585 .irq = (unsigned)TPS65910_HOST_IRQ,
586 .irq_base = IRQ_BOARD_BASE,
587 .gpio_base = TPS65910_GPIO_EXPANDER_BASE,
589 .pre_init = tps65910_pre_init,
590 .post_init = tps65910_post_init,
592 //TPS65910_NUM_REGS = 13
594 .tps65910_pmic_init_data[TPS65910_REG_VRTC] = NULL,
595 .tps65910_pmic_init_data[TPS65910_REG_VIO] = &tps65910_smps4,
596 .tps65910_pmic_init_data[TPS65910_REG_VDD1] = &tps65910_smps1,
597 .tps65910_pmic_init_data[TPS65910_REG_VDD2] = &tps65910_smps2,
598 .tps65910_pmic_init_data[TPS65910_REG_VDD3] = &tps65910_smps3,
599 .tps65910_pmic_init_data[TPS65910_REG_VDIG1] = &tps65910_ldo1,
600 .tps65910_pmic_init_data[TPS65910_REG_VDIG2] = &tps65910_ldo2,
601 .tps65910_pmic_init_data[TPS65910_REG_VPLL] = &tps65910_ldo8,
602 .tps65910_pmic_init_data[TPS65910_REG_VDAC] = &tps65910_ldo7,
603 .tps65910_pmic_init_data[TPS65910_REG_VAUX1] = &tps65910_ldo3,
604 .tps65910_pmic_init_data[TPS65910_REG_VAUX2] = &tps65910_ldo4,
605 .tps65910_pmic_init_data[TPS65910_REG_VAUX33] = &tps65910_ldo5,
606 .tps65910_pmic_init_data[TPS65910_REG_VMMC] = &tps65910_ldo6,