rk2928 add phonepad support
[firefly-linux-kernel-4.4.55.git] / arch / arm / mach-rk2928 / board-rk2928-phonepad-tps65910.c
1 #include <linux/regulator/machine.h>
2 #include <linux/i2c/twl.h>
3 #include <linux/mfd/tps65910.h>
4 #include <mach/sram.h>
5 #include <linux/platform_device.h>
6
7 #include <mach/gpio.h>
8 #include <mach/iomux.h>
9 #define PMU_POWER_SLEEP RK2928_PIN1_PA1
10 #ifdef CONFIG_MFD_TPS65910
11
12 extern int platform_device_register(struct platform_device *pdev);
13
14 int tps65910_pre_init(struct tps65910 *tps65910){
15
16         int val = 0;
17         int i   = 0;
18         int err = -1;
19                 
20         printk("%s,line=%d\n", __func__,__LINE__);      
21 #ifdef CONFIG_RK_CONFIG
22         if(sram_gpio_init(get_port_config(pmic_slp).gpio, &pmic_sleep) < 0){
23                 printk(KERN_ERR "sram_gpio_init failed\n");
24                 return -EINVAL;
25         }
26         if(port_output_init(pmic_slp, 0, "pmic_slp") < 0){
27                 printk(KERN_ERR "port_output_init failed\n");
28                 return -EINVAL;
29         }
30 #else
31         if(sram_gpio_init(PMU_POWER_SLEEP, &pmic_sleep) < 0){
32                 printk(KERN_ERR "sram_gpio_init failed\n");
33                 return -EINVAL;
34         }
35 //      GPIO1A1_I2S_SCLK_NAME
36         rk30_mux_api_set(GPIO1A1_I2S_SCLK_NAME, 0);
37
38         gpio_request(PMU_POWER_SLEEP, "NULL");
39         gpio_direction_output(PMU_POWER_SLEEP, GPIO_LOW);
40 #endif
41
42         val = tps65910_reg_read(tps65910, TPS65910_DEVCTRL2);
43         if (val<0) {
44                 printk(KERN_ERR "Unable to read TPS65910_DEVCTRL2 reg\n");
45                 return val;
46         }
47         /* Set sleep state active high and allow device turn-off after PWRON long press */
48         val |= (DEVCTRL2_SLEEPSIG_POL_MASK | DEVCTRL2_PWON_LP_OFF_MASK);
49
50         err = tps65910_reg_write(tps65910, TPS65910_DEVCTRL2, val);
51         if (err) {
52                 printk(KERN_ERR "Unable to write TPS65910_DEVCTRL2 reg\n");
53                 return err;
54         }
55          #if 1
56         /* set PSKIP=0 */
57         val = tps65910_reg_read(tps65910, TPS65910_DCDCCTRL);
58         if (val<0) {
59                 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
60                 return val;
61         }
62
63         val &= ~DEVCTRL_DEV_OFF_MASK;
64         val &= ~DEVCTRL_DEV_SLP_MASK;
65         err = tps65910_reg_write(tps65910, TPS65910_DCDCCTRL, val);
66         if (err) {
67                 printk(KERN_ERR "Unable to write TPS65910_DCDCCTRL reg\n");
68                 return err;
69         }
70         #endif
71         /* Set the maxinum load current */
72         /* VDD1 */
73         val = tps65910_reg_read(tps65910, TPS65910_VDD1);
74         if (val<0) {
75                 printk(KERN_ERR "Unable to read TPS65910_VDD1 reg\n");
76                 return val;
77         }
78
79         val |= (1<<5);          //when 1: 1.5 A
80         val |= (0x07<<2);       //TSTEP[2:0] = 111 : 2.5 mV/|¨¬s(sampling 3 Mhz/5)
81         err = tps65910_reg_write(tps65910, TPS65910_VDD1, val);
82         if (err) {
83                 printk(KERN_ERR "Unable to write TPS65910_VDD1 reg\n");
84                 return err;
85         }
86
87         /* VDD2 */
88         val = tps65910_reg_read(tps65910, TPS65910_VDD2);
89         if (val<0) {
90                 printk(KERN_ERR "Unable to read TPS65910_VDD2 reg\n");
91                 return val;
92         }
93
94         val |= (1<<5);          //when 1: 1.5 A
95         err = tps65910_reg_write(tps65910, TPS65910_VDD2, val);
96         if (err) {
97                 printk(KERN_ERR "Unable to write TPS65910_VDD2 reg\n");
98                 return err;
99         }
100
101         /* VIO */
102         val = tps65910_reg_read(tps65910, TPS65910_VIO);
103         if (val<0) {
104                 printk(KERN_ERR "Unable to read TPS65910_VIO reg\n");
105                 return -EIO;
106         }
107
108         val |= (1<<6);  //when 01: 1.0 A
109         err = tps65910_reg_write(tps65910, TPS65910_VIO, val);
110         if (err) {
111                 printk(KERN_ERR "Unable to write TPS65910_VIO reg\n");
112                 return err;
113         }
114         #if 1
115         /* Mask ALL interrupts */
116         err = tps65910_reg_write(tps65910,TPS65910_INT_MSK, 0xFF);
117         if (err) {
118                 printk(KERN_ERR "Unable to write TPS65910_INT_MSK reg\n");
119                 return err;
120         }
121         
122         err = tps65910_reg_write(tps65910, TPS65910_INT_MSK2, 0x03);
123         if (err) {
124                 printk(KERN_ERR "Unable to write TPS65910_INT_MSK2 reg\n");
125                 return err;
126         }
127
128         /* Set RTC Power, disable Smart Reflex in DEVCTRL_REG */
129         #if 1
130         val = 0;
131         val |= (DEVCTRL_SR_CTL_I2C_SEL_MASK);
132         err = tps65910_reg_write(tps65910, TPS65910_DEVCTRL, val);
133         if (err) {
134                 printk(KERN_ERR "Unable to write TPS65910_DEVCTRL reg\n");
135                 return err;
136         }
137         printk(KERN_INFO "TPS65910 Set default voltage.\n");
138         #endif
139         #if 0
140         //read sleep control register  for debug
141         for(i=0; i<6; i++)
142         {
143         err = tps65910_reg_read(tps65910, &val, TPS65910_DEVCTRL+i);
144         if (err) {
145                 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
146                 return -EIO;
147         }
148                 else
149                 printk("%s.......is  0x%04x\n",__FUNCTION__,val);
150         }
151         #endif
152
153         #if 1
154         //sleep control register
155         /*set func when in sleep mode */
156         val = tps65910_reg_read(tps65910, TPS65910_DEVCTRL);
157         if (val<0) {
158                 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
159                 return val;
160         }
161         
162         val |= (1 << 1);
163         err = tps65910_reg_write(tps65910, TPS65910_DEVCTRL, val);
164         if (err) {
165                 printk(KERN_ERR "Unable to read TPS65910 Reg at offset 0x%x= \
166                                 \n", TPS65910_VDIG1);
167                 return err;
168         }
169         
170         /* open ldo when in sleep mode */
171         val = tps65910_reg_read(tps65910, TPS65910_SLEEP_KEEP_LDO_ON);
172         if (val<0) {
173                 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
174                 return val;
175         }
176         
177         val &= 0;
178         err = tps65910_reg_write(tps65910, TPS65910_SLEEP_KEEP_LDO_ON, val);
179         if (err) {
180                 printk(KERN_ERR "Unable to read TPS65910 Reg at offset 0x%x= \
181                                 \n", TPS65910_VDIG1);
182                 return err;
183         }
184                 
185         /*set dc mode when in sleep mode */
186         val = tps65910_reg_read(tps65910, TPS65910_SLEEP_KEEP_RES_ON);
187         if (val<0) {
188                 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
189                 return val;
190         }
191         
192         val  |= 0xff;
193         err = tps65910_reg_write(tps65910, TPS65910_SLEEP_KEEP_RES_ON, val);
194         if (err) {
195                 printk(KERN_ERR "Unable to read TPS65910 Reg at offset 0x%x= \
196                                 \n", TPS65910_VDIG1);
197                 return err;
198         }
199         
200         /*close ldo when in sleep mode */
201         val = tps65910_reg_read(tps65910, TPS65910_SLEEP_SET_LDO_OFF);
202         if (val<0) {
203                 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
204                 return val;
205         }
206         
207         val |= 0x90;
208         //val |= 0x00;
209         err = tps65910_reg_write(tps65910, TPS65910_SLEEP_SET_LDO_OFF, val);
210         if (err) {
211                 printk(KERN_ERR "Unable to read TPS65910 Reg at offset 0x%x= \
212                                 \n", TPS65910_VDIG1);
213                 return err;
214         }
215         
216         #endif
217         #if 0
218         //read sleep control register  for debug
219         for(i=0; i<6; i++)
220         {
221         err = tps65910_reg_read(tps65910, &val, TPS65910_DEVCTRL+i);
222         if (err) {
223                 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
224                 return -EIO;
225         }
226                 else
227                 printk("%s.......is  0x%4x\n",__FUNCTION__,val);
228         }
229         #endif
230         #endif
231         
232         printk("%s,line=%d\n", __func__,__LINE__);
233         return 0;
234
235 }
236
237
238 int tps65910_post_init(struct tps65910 *tps65910)
239 {
240         struct regulator *dcdc;
241         struct regulator *ldo;
242         int i = 0;
243         printk("%s,line=%d\n", __func__,__LINE__);
244
245 #ifndef CONFIG_RK_CONFIG
246         g_pmic_type = PMIC_TYPE_TPS65910;
247 #endif
248         printk("%s:g_pmic_type=%d\n",__func__,g_pmic_type);
249
250         #ifdef CONFIG_RK30_PWM_REGULATOR
251         platform_device_register(&pwm_regulator_device[0]);
252         #endif
253         
254         dcdc = regulator_get(NULL, "vio");      //vcc_io
255         regulator_set_voltage(dcdc, 3300000, 3300000);
256         regulator_enable(dcdc);
257         printk("%s set vio vcc_io=%dmV end\n", __func__, regulator_get_voltage(dcdc));
258         regulator_put(dcdc);
259         udelay(100);
260 #if defined(CONFIG_MACH_RK2928_TB) || defined(CONFIG_MACH_RK2926_TB) || defined(CONFIG_MACH_RK2926_V86)
261         ldo = regulator_get(NULL, "vpll");      // vcc25
262         regulator_set_voltage(ldo, 2500000, 2500000);
263         regulator_enable(ldo);
264         printk("%s set vpll vcc25=%dmV end\n", __func__, regulator_get_voltage(ldo));
265         regulator_put(ldo);
266         udelay(100);
267 #endif
268         ldo = regulator_get(NULL, "vdig2");     // vdd12
269         regulator_set_voltage(ldo, 1200000, 1200000);
270         regulator_enable(ldo);
271         printk("%s set vdig2 vdd12=%dmV end\n", __func__, regulator_get_voltage(ldo));
272         regulator_put(ldo);
273         udelay(100);
274
275         ldo = regulator_get(NULL, "vaux33");     //vcc_tp
276         regulator_set_voltage(ldo, 3300000, 3300000);
277         regulator_enable(ldo);
278         printk("%s set vaux33 vcc_tp=%dmV end\n", __func__, regulator_get_voltage(ldo));
279         regulator_put(ldo);
280         udelay(100);
281         
282         dcdc = regulator_get(NULL, "vdd_cpu");  //vdd_cpu
283         regulator_set_voltage(dcdc, 1200000, 1200000);
284         regulator_enable(dcdc);
285         printk("%s set vdd1 vdd_cpu=%dmV end\n", __func__, regulator_get_voltage(dcdc));
286         regulator_put(dcdc);
287         udelay(100);
288         
289         dcdc = regulator_get(NULL, "vdd2");     //vcc_ddr 
290         regulator_set_voltage(dcdc, 1200000, 1200000);  // 1.5*4/5 = 1.2 and Vout=1.5v
291         regulator_enable(dcdc);
292         printk("%s set vdd2 vcc_ddr=%dmV end\n", __func__, regulator_get_voltage(dcdc));
293         regulator_put(dcdc);
294         udelay(100);
295         
296         ldo = regulator_get(NULL, "vdig1");     //vcc18_cif
297         regulator_set_voltage(ldo, 1800000, 1800000);
298         regulator_enable(ldo);
299         printk("%s set vdig1 vcc18_cif=%dmV end\n", __func__, regulator_get_voltage(ldo));
300         regulator_put(ldo);
301         udelay(100);
302         
303         dcdc = regulator_get(NULL, "vaux1"); //vcc28_cif
304         regulator_set_voltage(dcdc,2800000,2800000);
305         regulator_enable(dcdc); 
306         printk("%s set vaux1 vcc28_cif=%dmV end\n", __func__, regulator_get_voltage(dcdc));
307         regulator_put(dcdc);
308         udelay(100);
309
310         ldo = regulator_get(NULL, "vaux2");     //vcca33
311         regulator_set_voltage(ldo, 3300000, 3300000);
312         regulator_enable(ldo);
313         printk("%s set vaux2 vcca33=%dmV end\n", __func__, regulator_get_voltage(ldo));
314         regulator_put(ldo);
315         udelay(100);
316 #if defined(CONFIG_MACH_RK2928_TB) || defined(CONFIG_MACH_RK2926_TB)
317         ldo = regulator_get(NULL, "vdac"); // vccio_wl
318         regulator_set_voltage(ldo,1800000,1800000);
319         regulator_enable(ldo); 
320         printk("%s set vdac vccio_wl=%dmV end\n", __func__, regulator_get_voltage(ldo));
321         regulator_put(ldo);
322         udelay(100);
323 #endif
324         ldo = regulator_get(NULL, "vmmc");  //vccio_wl
325         regulator_set_voltage(ldo,3300000,3300000);
326         regulator_enable(ldo); 
327         printk("%s set vmmc vccio_wl=%dmV end\n", __func__, regulator_get_voltage(ldo));
328 #if defined(CONFIG_MACH_RK2928_TB) || defined(CONFIG_MACH_RK2926_TB) || defined(CONFIG_MACH_RK2926_V86) || defined(CONFIG_MACH_RK2928_PHONEPAD_760)
329         //do not disable vccio wl
330 #else
331         regulator_disable(ldo);      //for i30 sdcard used vcc_io so must close
332 #endif
333         regulator_put(ldo);
334         udelay(100);
335
336         printk("%s,line=%d END\n", __func__,__LINE__);
337         
338         return 0;
339 }
340 static struct regulator_consumer_supply tps65910_smps1_supply[] = {
341         {
342                 .supply = "vdd1",
343         },
344         {
345                 .supply = "vdd_cpu",
346         },
347 };
348 static struct regulator_consumer_supply tps65910_smps2_supply[] = {
349         {
350                 .supply = "vdd2",
351         },
352         {
353                 .supply = "vdd_core",
354         },
355         
356 };
357 static struct regulator_consumer_supply tps65910_smps3_supply[] = {
358         {
359                 .supply = "vdd3",
360         },
361 };
362 static struct regulator_consumer_supply tps65910_smps4_supply[] = {
363         {
364                 .supply = "vio",
365         },
366 };
367 static struct regulator_consumer_supply tps65910_ldo1_supply[] = {
368         {
369                 .supply = "vdig1",
370         },
371 };
372 static struct regulator_consumer_supply tps65910_ldo2_supply[] = {
373         {
374                 .supply = "vdig2",
375         },
376 };
377
378 static struct regulator_consumer_supply tps65910_ldo3_supply[] = {
379         {
380                 .supply = "vaux1",
381         },
382 };
383 static struct regulator_consumer_supply tps65910_ldo4_supply[] = {
384         {
385                 .supply = "vaux2",
386         },
387 };
388 static struct regulator_consumer_supply tps65910_ldo5_supply[] = {
389         {
390                 .supply = "vaux33",
391         },
392 };
393 static struct regulator_consumer_supply tps65910_ldo6_supply[] = {
394         {
395                 .supply = "vmmc",
396         },
397 };
398 static struct regulator_consumer_supply tps65910_ldo7_supply[] = {
399         {
400                 .supply = "vdac",
401         },
402 };
403
404 static struct regulator_consumer_supply tps65910_ldo8_supply[] = {
405         {
406                 .supply = "vpll",
407         },
408 };
409
410 static struct regulator_init_data tps65910_smps1 = {
411         .constraints = {
412                 .name           = "VDD1",
413                 .min_uV                 = 600000,
414                 .max_uV                 = 1500000,
415                 .apply_uV               = 1,
416                 .always_on = 1,
417                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
418                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
419
420         },
421         .num_consumer_supplies = ARRAY_SIZE(tps65910_smps1_supply),
422         .consumer_supplies =  tps65910_smps1_supply,
423 };
424
425 /* */
426 static struct regulator_init_data tps65910_smps2 = {
427         .constraints = {
428                 .name           = "VDD2",
429                 .min_uV                 = 600000,
430                 .max_uV                 = 1500000,
431                 .apply_uV               = 1,
432                 .always_on = 1,
433                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
434                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
435
436         },
437         .num_consumer_supplies = ARRAY_SIZE(tps65910_smps2_supply),
438         .consumer_supplies =  tps65910_smps2_supply,
439 };
440
441 /* */
442 static struct regulator_init_data tps65910_smps3 = {
443         .constraints = {
444                 .name           = "VDD3",
445                 .min_uV                 = 1000000,
446                 .max_uV                 = 1400000,
447                 .apply_uV               = 1,
448                 .always_on = 1,
449                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
450                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
451
452         },
453         .num_consumer_supplies = ARRAY_SIZE(tps65910_smps3_supply),
454         .consumer_supplies =  tps65910_smps3_supply,
455 };
456
457 static struct regulator_init_data tps65910_smps4 = {
458         .constraints = {
459                 .name           = "VIO",
460                 .min_uV                 = 1800000,
461                 .max_uV                 = 3300000,
462                 .apply_uV               = 1,
463                 .always_on = 1,
464                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
465                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
466
467         },
468         .num_consumer_supplies = ARRAY_SIZE(tps65910_smps4_supply),
469         .consumer_supplies =  tps65910_smps4_supply,
470 };
471 static struct regulator_init_data tps65910_ldo1 = {
472         .constraints = {
473                 .name           = "VDIG1",
474                 .min_uV                 = 1200000,
475                 .max_uV                 = 2700000,
476                 .apply_uV               = 1,
477                 
478                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
479                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
480
481         },
482         .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo1_supply),
483         .consumer_supplies =  tps65910_ldo1_supply,
484 };
485
486 /* */
487 static struct regulator_init_data tps65910_ldo2 = {
488         .constraints = {
489                 .name           = "VDIG2",
490                 .min_uV                 = 1000000,
491                 .max_uV                 = 1800000,
492                 .apply_uV               = 1,
493                 
494                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
495                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
496
497         },
498         .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo2_supply),
499         .consumer_supplies =  tps65910_ldo2_supply,
500 };
501
502 /* */
503 static struct regulator_init_data tps65910_ldo3 = {
504         .constraints = {
505                 .name           = "VAUX1",
506                 .min_uV                 = 1800000,
507                 .max_uV                 = 3300000,
508                 .apply_uV               = 1,
509                 
510                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
511                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
512
513         },
514         .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo3_supply),
515         .consumer_supplies =  tps65910_ldo3_supply,
516 };
517
518 /* */
519 static struct regulator_init_data tps65910_ldo4 = {
520         .constraints = {
521                 .name           = "VAUX2",
522                 .min_uV                 = 1800000,
523                 .max_uV                 = 3300000,
524                 .apply_uV               = 1,
525                 
526                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
527                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
528
529         },
530         .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo4_supply),
531         .consumer_supplies =  tps65910_ldo4_supply,
532 };
533
534 /* */
535 static struct regulator_init_data tps65910_ldo5 = {
536         .constraints = {
537                 .name           = "VAUX33",
538                 .min_uV                 = 1800000,
539                 .max_uV                 = 3300000,
540                 .apply_uV               = 1,
541                 
542                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
543                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
544
545         },
546         .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo5_supply),
547         .consumer_supplies =  tps65910_ldo5_supply,
548 };
549
550 /* */
551 static struct regulator_init_data tps65910_ldo6 = {
552         .constraints = {
553                 .name           = "VMMC",
554                 .min_uV                 = 1800000,
555                 .max_uV                 = 3300000,
556                 .apply_uV               = 1,
557                 
558                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
559                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
560
561         },
562         .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo6_supply),
563         .consumer_supplies =  tps65910_ldo6_supply,
564 };
565
566 /* */
567 static struct regulator_init_data tps65910_ldo7 = {
568         .constraints = {
569                 .name           = "VDAC",
570                 .min_uV                 = 1800000,
571                 .max_uV                 = 2850000,
572                 .apply_uV               = 1,
573                 
574                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
575                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
576
577         },
578         .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo7_supply),
579         .consumer_supplies =  tps65910_ldo7_supply,
580 };
581
582 /* */
583 static struct regulator_init_data tps65910_ldo8 = {
584         .constraints = {
585                 .name           = "VPLL",
586                 .min_uV                 = 1000000,
587                 .max_uV                 = 2500000,
588                 .apply_uV               = 1,
589                 #if defined(CONFIG_MACH_RK2926_V86)
590                 #else
591                 .always_on = 1,
592                 #endif
593                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
594                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
595
596         },
597         .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo8_supply),
598         .consumer_supplies =  tps65910_ldo8_supply,
599 };
600 void __sramfunc board_pmu_tps65910_suspend(void)
601 {
602 //      sram_udelay(100);       
603         sram_gpio_set_value(pmic_sleep, GPIO_HIGH);  
604 }
605 void __sramfunc board_pmu_tps65910_resume(void)
606 {
607        sram_gpio_set_value(pmic_sleep, GPIO_LOW);  
608         sram_udelay(2000);
609 }
610 static struct tps65910_board tps65910_data = {
611         .irq    = (unsigned)TPS65910_HOST_IRQ,          
612         .irq_base = IRQ_BOARD_BASE,
613         .gpio_base = TPS65910_GPIO_EXPANDER_BASE,
614         
615         .pre_init = tps65910_pre_init,
616         .post_init = tps65910_post_init,
617
618         //TPS65910_NUM_REGS = 13
619         // Regulators
620         .tps65910_pmic_init_data[TPS65910_REG_VRTC] = NULL,             
621         .tps65910_pmic_init_data[TPS65910_REG_VIO] = &tps65910_smps4,
622         .tps65910_pmic_init_data[TPS65910_REG_VDD1] = &tps65910_smps1,
623         .tps65910_pmic_init_data[TPS65910_REG_VDD2] = &tps65910_smps2,
624         .tps65910_pmic_init_data[TPS65910_REG_VDD3] = &tps65910_smps3,
625         .tps65910_pmic_init_data[TPS65910_REG_VDIG1] = &tps65910_ldo1,
626         .tps65910_pmic_init_data[TPS65910_REG_VDIG2] = &tps65910_ldo2,
627         .tps65910_pmic_init_data[TPS65910_REG_VPLL] = &tps65910_ldo8,
628         .tps65910_pmic_init_data[TPS65910_REG_VDAC] = &tps65910_ldo7,
629         .tps65910_pmic_init_data[TPS65910_REG_VAUX1] = &tps65910_ldo3,
630         .tps65910_pmic_init_data[TPS65910_REG_VAUX2] = &tps65910_ldo4,
631         .tps65910_pmic_init_data[TPS65910_REG_VAUX33] = &tps65910_ldo5,
632         .tps65910_pmic_init_data[TPS65910_REG_VMMC] = &tps65910_ldo6,
633
634  
635 };
636
637 #endif
638