arch/arm/mach-rk29/vpu_service.c

   1 /* arch/arm/mach-rk29/vpu.c
   2  *
   3  * Copyright (C) 2010 ROCKCHIP, Inc.
   4  *
   5  * This software is licensed under the terms of the GNU General Public
   6  * License version 2, as published by the Free Software Foundation, and
   7  * may be copied, distributed, and modified under those terms.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  *
  14  */
  15
  16 #ifdef CONFIG_RK29_VPU_DEBUG
  17 #define DEBUG
  18 #define pr_fmt(fmt) "VPU_SERVICE: %s: " fmt, __func__
  19 #else
  20 #define pr_fmt(fmt) "VPU_SERVICE: " fmt
  21 #endif
  22
  23
  24 #include <linux/clk.h>
  25 #include <linux/delay.h>
  26 #include <linux/init.h>
  27 #include <linux/interrupt.h>
  28 #include <linux/io.h>
  29 #include <linux/kernel.h>
  30 #include <linux/module.h>
  31 #include <linux/fs.h>
  32 #include <linux/ioport.h>
  33 #include <linux/miscdevice.h>
  34 #include <linux/mm.h>
  35 #include <linux/poll.h>
  36 #include <linux/platform_device.h>
  37 #include <linux/timer.h>
  38
  39 #include <asm/uaccess.h>
  40
  41 #include <mach/irqs.h>
  42 #include <mach/vpu_service.h>
  43 #include <mach/rk29_iomap.h>
  44 #include <mach/pmu.h>
  45 #include <mach/cru.h>
  46
  47
  48 #define DEC_INTERRUPT_REGISTER                  1
  49 #define PP_INTERRUPT_REGISTER                   60
  50 #define ENC_INTERRUPT_REGISTER                  1
  51
  52 #define DEC_INTERRUPT_BIT                        0x100
  53 #define PP_INTERRUPT_BIT                         0x100
  54 #define ENC_INTERRUPT_BIT                        0x1
  55
  56 #define REG_NUM_DEC                             (60)
  57 #define REG_NUM_PP                              (41)
  58 #define REG_NUM_ENC                             (96)
  59 #define REG_NUM_DEC_PP                          (REG_NUM_DEC+REG_NUM_PP)
  60 #define SIZE_REG(reg)                           ((reg)*4)
  61
  62 #define DEC_IO_SIZE                             ((100 + 1) * 4) /* bytes */
  63 #define ENC_IO_SIZE                             (96 * 4)        /* bytes */
  64 static const u16 dec_hw_ids[] = { 0x8190, 0x8170, 0x9170, 0x9190, 0x6731 };
  65 static const u16 enc_hw_ids[] = { 0x6280, 0x7280, 0x8270 };
  66
  67 #define VPU_REG_EN_ENC                          14
  68 #define VPU_REG_ENC_GATE                        2
  69 #define VPU_REG_ENC_GATE_BIT                    (1<<4)
  70
  71 #define VPU_REG_EN_DEC                          1
  72 #define VPU_REG_DEC_GATE                        2
  73 #define VPU_REG_DEC_GATE_BIT                    (1<<10)
  74 #define VPU_REG_EN_PP                           0
  75 #define VPU_REG_PP_GATE                         1
  76 #define VPU_REG_PP_GATE_BIT                     (1<<8)
  77 #define VPU_REG_EN_DEC_PP                       1
  78 #define VPU_REG_DEC_PP_GATE                     61
  79 #define VPU_REG_DEC_PP_GATE_BIT                 (1<<8)
  80
  81
  82 /**
  83  * struct for process session which connect to vpu
  84  *
  85  * @author ChenHengming (2011-5-3)
  86  */
  87 typedef struct vpu_session {
  88         VPU_CLIENT_TYPE         type;
  89         /* a linked list of data so we can access them for debugging */
  90         struct list_head        list_session;
  91         /* a linked list of register data waiting for process */
  92         struct list_head        waiting;
  93         /* a linked list of register data in processing */
  94         struct list_head        running;
  95         /* a linked list of register data processed */
  96         struct list_head        done;
  97         wait_queue_head_t       wait;
  98         pid_t                   pid;
  99 } vpu_session;
 100
 101 /**
 102  * struct for process register set
 103  *
 104  * @author ChenHengming (2011-5-4)
 105  */
 106 typedef struct vpu_reg {
 107         VPU_CLIENT_TYPE         type;
 108         vpu_session             *session;
 109         struct list_head        session_link;           /* link to vpu service session */
 110         struct list_head        status_link;            /* link to register set list */
 111         unsigned long           size;
 112         unsigned long           reg[VPU_REG_NUM_DEC_PP];
 113 } vpu_reg;
 114
 115 typedef struct vpu_device {
 116         unsigned long           iobaseaddr;
 117         unsigned int            iosize;
 118         volatile u32            *hwregs;
 119 } vpu_device;
 120
 121 typedef struct vpu_service_info {
 122         spinlock_t              lock;
 123         struct timer_list       timer;                  /* timer for power off */
 124         struct list_head        waiting;                /* link to link_reg in struct vpu_reg */
 125         struct list_head        running;                /* link to link_reg in struct vpu_reg */
 126         struct list_head        done;                   /* link to link_reg in struct vpu_reg */
 127         struct list_head        session;                /* link to list_session in struct vpu_session */
 128         atomic_t                task_running;
 129         bool                    enabled;
 130         vpu_reg                 *reg_codec;
 131         vpu_reg                 *reg_pproc;
 132         vpu_reg                 *reg_resev;
 133         VPUHwDecConfig_t        dec_config;
 134         VPUHwEncConfig_t        enc_config;
 135 } vpu_service_info;
 136
 137 typedef struct vpu_request
 138 {
 139         unsigned long   *req;
 140         unsigned long   size;
 141 } vpu_request;
 142
 143 static struct clk *aclk_vepu;
 144 static struct clk *hclk_vepu;
 145 static struct clk *aclk_ddr_vepu;
 146 static struct clk *hclk_cpu_vcodec;
 147 static vpu_service_info service;
 148 static vpu_device       dec_dev;
 149 static vpu_device       enc_dev;
 150
 151 #define POWER_OFF_DELAY 3*HZ /* 3s */
 152
 153 static void vpu_get_clk(void)
 154 {
 155         aclk_vepu       = clk_get(NULL, "aclk_vepu");
 156         hclk_vepu       = clk_get(NULL, "hclk_vepu");
 157         aclk_ddr_vepu   = clk_get(NULL, "aclk_ddr_vepu");
 158         hclk_cpu_vcodec = clk_get(NULL, "hclk_cpu_vcodec");
 159 }
 160
 161 static void vpu_put_clk(void)
 162 {
 163         clk_put(aclk_vepu);
 164         clk_put(hclk_vepu);
 165         clk_put(aclk_ddr_vepu);
 166         clk_put(hclk_cpu_vcodec);
 167 }
 168
 169 static void vpu_service_power_off(void)
 170 {
 171         if (!service.enabled)
 172                 return;
 173
 174         service.enabled = false;
 175         printk("vpu: power off\n");
 176
 177         while(atomic_read(&service.task_running)) {
 178                 pr_alert("power off when task running!!\n");
 179                 udelay(10);
 180         }
 181
 182         pmu_set_power_domain(PD_VCODEC, false);
 183         udelay(10);
 184         clk_disable(hclk_cpu_vcodec);
 185         clk_disable(aclk_ddr_vepu);
 186         clk_disable(hclk_vepu);
 187         clk_disable(aclk_vepu);
 188 }
 189
 190 static void vpu_service_power_off_work_func(unsigned long data)
 191 {
 192         printk("vpu: delayed power off work\n");
 193         vpu_service_power_off();
 194 }
 195
 196 static void vpu_service_power_on(void)
 197 {
 198         if (service.enabled) {
 199                 mod_timer(&service.timer, jiffies + POWER_OFF_DELAY);
 200                 return;
 201         }
 202         service.enabled = true;
 203         printk("vpu: power on\n");
 204
 205         clk_enable(aclk_vepu);
 206         clk_enable(hclk_vepu);
 207         clk_enable(hclk_cpu_vcodec);
 208         udelay(10);
 209         pmu_set_power_domain(PD_VCODEC, true);
 210         udelay(10);
 211         clk_enable(aclk_ddr_vepu);
 212         init_timer(&service.timer);
 213         service.timer.expires = jiffies + POWER_OFF_DELAY;
 214         service.timer.function = vpu_service_power_off_work_func;
 215         add_timer(&service.timer);
 216 }
 217
 218 static vpu_reg *reg_init(vpu_session *session, void __user *src, unsigned long size)
 219 {
 220         unsigned long flag;
 221         vpu_reg *reg = kmalloc(sizeof(vpu_reg), GFP_KERNEL);
 222         if (NULL == reg) {
 223                 pr_err("kmalloc fail in reg_init\n");
 224                 return NULL;
 225         }
 226
 227         reg->session = session;
 228         reg->type = session->type;
 229         reg->size = size;
 230         INIT_LIST_HEAD(&reg->session_link);
 231         INIT_LIST_HEAD(&reg->status_link);
 232
 233         if (copy_from_user(&reg->reg[0], (void __user *)src, size)) {
 234                 pr_err("copy_from_user failed in reg_init\n");
 235                 kfree(reg);
 236                 return NULL;
 237         }
 238
 239         spin_lock_irqsave(&service.lock, flag);
 240         list_add_tail(&reg->status_link, &service.waiting);
 241         list_add_tail(&reg->session_link, &session->waiting);
 242         spin_unlock_irqrestore(&service.lock, flag);
 243
 244         return reg;
 245 }
 246
 247 static void reg_deinit(vpu_reg *reg)
 248 {
 249         list_del_init(&reg->session_link);
 250         list_del_init(&reg->status_link);
 251         kfree(reg);
 252         if (reg == service.reg_codec) service.reg_codec = NULL;
 253         if (reg == service.reg_pproc) service.reg_pproc = NULL;
 254 }
 255
 256 static void reg_from_wait_to_run(vpu_reg *reg)
 257 {
 258         list_del_init(&reg->status_link);
 259         list_add_tail(&reg->status_link, &service.running);
 260
 261         list_del_init(&reg->session_link);
 262         list_add_tail(&reg->session_link, &reg->session->running);
 263 }
 264
 265 static void reg_copy_from_hw(vpu_reg *reg, volatile u32 *src, u32 count)
 266 {
 267         int i;
 268         u32 *dst = (u32 *)&reg->reg[0];
 269         for (i = 0; i < count; i++)
 270                 *dst++ = *src++;
 271 }
 272
 273 static void reg_from_run_to_done(vpu_reg *reg)
 274 {
 275         spin_lock(&service.lock);
 276         list_del_init(&reg->status_link);
 277         list_add_tail(&reg->status_link, &service.done);
 278
 279         list_del_init(&reg->session_link);
 280         list_add_tail(&reg->session_link, &reg->session->done);
 281
 282         switch (reg->type) {
 283         case VPU_ENC : {
 284                 service.reg_codec = NULL;
 285                 reg_copy_from_hw(reg, enc_dev.hwregs, REG_NUM_ENC);
 286                 break;
 287         }
 288         case VPU_DEC : {
 289                 service.reg_codec = NULL;
 290                 reg_copy_from_hw(reg, dec_dev.hwregs, REG_NUM_DEC);
 291                 break;
 292         }
 293         case VPU_PP : {
 294                 service.reg_pproc = NULL;
 295                 reg_copy_from_hw(reg, dec_dev.hwregs + PP_INTERRUPT_REGISTER, REG_NUM_PP);
 296                 dec_dev.hwregs[PP_INTERRUPT_REGISTER] = 0;
 297                 break;
 298         }
 299         case VPU_DEC_PP : {
 300                 service.reg_codec = NULL;
 301                 service.reg_pproc = NULL;
 302                 reg_copy_from_hw(reg, dec_dev.hwregs, REG_NUM_DEC_PP);
 303                 dec_dev.hwregs[PP_INTERRUPT_REGISTER] = 0;
 304                 break;
 305         }
 306         default : {
 307                 pr_err("copy reg from hw with unknown type %d\n", reg->type);
 308                 break;
 309         }
 310         }
 311         atomic_sub(1, &service.task_running);
 312         wake_up_interruptible_sync(&reg->session->wait);
 313         spin_unlock(&service.lock);
 314 }
 315
 316 void reg_copy_to_hw(vpu_reg *reg)
 317 {
 318         int i;
 319         u32 *src = (u32 *)&reg->reg[0];
 320         atomic_add(1, &service.task_running);
 321         switch (reg->type) {
 322         case VPU_ENC : {
 323                 u32 *dst = (u32 *)enc_dev.hwregs;
 324                 service.reg_codec = reg;
 325
 326                 dst[VPU_REG_EN_ENC] = src[VPU_REG_EN_ENC] & 0x6;
 327
 328                 for (i = 0; i < VPU_REG_EN_ENC; i++)
 329                         dst[i] = src[i];
 330
 331                 for (i = VPU_REG_EN_ENC + 1; i < REG_NUM_ENC; i++)
 332                         dst[i] = src[i];
 333
 334                 dsb();
 335
 336                 dst[VPU_REG_ENC_GATE] = src[VPU_REG_ENC_GATE] | VPU_REG_ENC_GATE_BIT;
 337                 dst[VPU_REG_EN_ENC]   = src[VPU_REG_EN_ENC];
 338         } break;
 339         case VPU_DEC : {
 340                 u32 *dst = (u32 *)dec_dev.hwregs;
 341                 service.reg_codec = reg;
 342
 343                 for (i = REG_NUM_DEC - 1; i > VPU_REG_DEC_GATE; i--)
 344                         dst[i] = src[i];
 345
 346                 dsb();
 347
 348                 dst[VPU_REG_DEC_GATE] = src[VPU_REG_DEC_GATE] | VPU_REG_DEC_GATE_BIT;
 349                 dst[VPU_REG_EN_DEC]   = src[VPU_REG_EN_DEC];
 350         } break;
 351         case VPU_PP : {
 352                 u32 *dst = (u32 *)dec_dev.hwregs + PP_INTERRUPT_REGISTER;
 353                 service.reg_pproc = reg;
 354
 355                 dst[VPU_REG_PP_GATE] = src[VPU_REG_PP_GATE] | VPU_REG_PP_GATE_BIT;
 356
 357                 for (i = VPU_REG_PP_GATE + 1; i < REG_NUM_PP; i++)
 358                         dst[i] = src[i];
 359
 360                 dsb();
 361
 362                 dst[VPU_REG_EN_PP] = src[VPU_REG_EN_PP];
 363         } break;
 364         case VPU_DEC_PP : {
 365                 u32 *dst = (u32 *)dec_dev.hwregs;
 366                 service.reg_codec = reg;
 367                 service.reg_pproc = reg;
 368
 369                 for (i = VPU_REG_EN_DEC_PP + 1; i < REG_NUM_DEC_PP; i++)
 370                         dst[i] = src[i];
 371
 372                 dst[VPU_REG_EN_DEC_PP]   = src[VPU_REG_EN_DEC_PP] | 0x2;
 373                 dsb();
 374
 375                 dst[VPU_REG_DEC_PP_GATE] = src[VPU_REG_DEC_PP_GATE] | VPU_REG_PP_GATE_BIT;
 376                 dst[VPU_REG_DEC_GATE]    = src[VPU_REG_DEC_GATE]    | VPU_REG_DEC_GATE_BIT;
 377                 dst[VPU_REG_EN_DEC]      = src[VPU_REG_EN_DEC];
 378         } break;
 379         default : {
 380                 pr_err("unsupport session type %d", reg->type);
 381                 atomic_sub(1, &service.task_running);
 382                 break;
 383         }
 384         }
 385 }
 386
 387 static void try_set_reg(void)
 388 {
 389         unsigned long flag;
 390         // first get reg from reg list
 391         spin_lock_irqsave(&service.lock, flag);
 392         if (!list_empty(&service.waiting)) {
 393                 vpu_reg *reg = list_entry(service.waiting.next, vpu_reg, status_link);
 394
 395                 if (((VPU_DEC_PP == reg->type) && (NULL == service.reg_codec) && (NULL == service.reg_pproc)) ||
 396                     ((VPU_DEC == reg->type) && (NULL == service.reg_codec)) ||
 397                     ((VPU_PP  == reg->type) && (NULL == service.reg_pproc)) ||
 398                     ((VPU_ENC == reg->type) && (NULL == service.reg_codec))) {
 399                         reg_from_wait_to_run(reg);
 400                         vpu_service_power_on();
 401                         reg_copy_to_hw(reg);
 402                 }
 403         }
 404         spin_unlock_irqrestore(&service.lock, flag);
 405 }
 406
 407 static int return_reg(vpu_reg *reg, u32 __user *dst)
 408 {
 409         int ret = 0;
 410         switch (reg->type) {
 411         case VPU_ENC : {
 412                 if (copy_to_user(dst, &reg->reg[0], SIZE_REG(REG_NUM_ENC)))
 413                         ret = -EFAULT;
 414                 break;
 415         }
 416         case VPU_DEC : {
 417                 if (copy_to_user(dst, &reg->reg[0], SIZE_REG(REG_NUM_DEC)))
 418                         ret = -EFAULT;
 419                 break;
 420         }
 421         case VPU_PP : {
 422                 if (copy_to_user(dst, &reg->reg[0], SIZE_REG(REG_NUM_PP)))
 423                         ret = -EFAULT;
 424                 break;
 425         }
 426         case VPU_DEC_PP : {
 427                 if (copy_to_user(dst, &reg->reg[0], SIZE_REG(REG_NUM_DEC_PP)))
 428                         ret = -EFAULT;
 429                 break;
 430         }
 431         default : {
 432                 ret = -EFAULT;
 433                 pr_err("copy reg to user with unknown type %d\n", reg->type);
 434                 break;
 435         }
 436         }
 437         reg_deinit(reg);
 438         return ret;
 439 }
 440
 441 static long vpu_service_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
 442 {
 443         vpu_session *session = (vpu_session *)filp->private_data;
 444         if (NULL == session) {
 445                 return -EINVAL;
 446         }
 447
 448         switch (cmd) {
 449         case VPU_IOC_SET_CLIENT_TYPE : {
 450         session->type = (VPU_CLIENT_TYPE)arg;
 451                 break;
 452         }
 453         case VPU_IOC_GET_HW_FUSE_STATUS : {
 454                 vpu_request req;
 455                 if (copy_from_user(&req, (void __user *)arg, sizeof(vpu_request))) {
 456                         pr_err("VPU_IOC_GET_HW_FUSE_STATUS copy_from_user failed\n");
 457                         return -EFAULT;
 458                 } else {
 459                         if (VPU_ENC != session->type) {
 460                                 if (copy_to_user((void __user *)req.req, &service.dec_config, sizeof(VPUHwDecConfig_t))) {
 461                                         pr_err("VPU_IOC_GET_HW_FUSE_STATUS copy_to_user failed type %d\n", session->type);
 462                                         return -EFAULT;
 463                                 }
 464                         } else {
 465                                 if (copy_to_user((void __user *)req.req, &service.enc_config, sizeof(VPUHwEncConfig_t))) {
 466                                         pr_err("VPU_IOC_GET_HW_FUSE_STATUS copy_to_user failed type %d\n", session->type);
 467                                         return -EFAULT;
 468                                 }
 469                         }
 470                 }
 471
 472                 break;
 473         }
 474         case VPU_IOC_SET_REG : {
 475                 vpu_request req;
 476                 vpu_reg *reg;
 477                 if (copy_from_user(&req, (void __user *)arg, sizeof(vpu_request))) {
 478                         pr_err("VPU_IOC_SET_REG copy_from_user failed\n");
 479                         return -EFAULT;
 480                 }
 481
 482                 reg = reg_init(session, (void __user *)req.req, req.size);
 483                 if (NULL == reg) {
 484                         return -EFAULT;
 485                 } else {
 486                         try_set_reg();
 487                 }
 488
 489                 break;
 490         }
 491         case VPU_IOC_GET_REG : {
 492                 vpu_request req;
 493                 vpu_reg *reg;
 494                 if (copy_from_user(&req, (void __user *)arg, sizeof(vpu_request))) {
 495                         pr_err("VPU_IOC_GET_REG copy_from_user failed\n");
 496                         return -EFAULT;
 497                 } else {
 498                         int ret = wait_event_interruptible_timeout(session->wait, !list_empty(&session->done), HZ);
 499                         if (unlikely(ret < 0)) {
 500                                 pr_err("pid %d wait task ret %d\n", session->pid, ret);
 501                                 return ret;
 502                         } else if (0 == ret) {
 503                                 pr_err("pid %d wait task done timeout\n", session->pid);
 504                                 return -ETIMEDOUT;
 505                         }
 506                 }
 507                 {
 508                         unsigned long flag;
 509                         spin_lock_irqsave(&service.lock, flag);
 510                         reg = list_entry(session->done.next, vpu_reg, session_link);
 511                         return_reg(reg, (u32 __user *)req.req);
 512                         spin_unlock_irqrestore(&service.lock, flag);
 513                 }
 514                 break;
 515         }
 516         default : {
 517                 pr_err("unknow vpu service ioctl cmd %x\n", cmd);
 518                 break;
 519         }
 520         }
 521
 522         return 0;
 523 }
 524
 525 static int vpu_service_check_hw_id(struct vpu_device * dev, const u16 *hwids, size_t num)
 526 {
 527         u32 hwid = readl(dev->hwregs);
 528         pr_info("HW ID = 0x%08x\n", hwid);
 529
 530         hwid = (hwid >> 16) & 0xFFFF;   /* product version only */
 531
 532         while (num--) {
 533                 if (hwid == hwids[num]) {
 534                         pr_info("Compatible HW found at 0x%08lx\n", dev->iobaseaddr);
 535                         return 1;
 536                 }
 537         }
 538
 539         pr_info("No Compatible HW found at 0x%08lx\n", dev->iobaseaddr);
 540         return 0;
 541 }
 542
 543 static void vpu_service_release_io(void)
 544 {
 545         if (dec_dev.hwregs)
 546                 iounmap((void *)dec_dev.hwregs);
 547         release_mem_region(dec_dev.iobaseaddr, dec_dev.iosize);
 548
 549         if (enc_dev.hwregs)
 550                 iounmap((void *)enc_dev.hwregs);
 551         release_mem_region(enc_dev.iobaseaddr, enc_dev.iosize);
 552 }
 553
 554 static int vpu_service_reserve_io(void)
 555 {
 556         unsigned long iobaseaddr;
 557         unsigned long iosize;
 558
 559         iobaseaddr      = dec_dev.iobaseaddr;
 560         iosize          = dec_dev.iosize;
 561
 562         if (!request_mem_region(iobaseaddr, iosize, "vdpu_io")) {
 563                 pr_info("failed to reserve dec HW regs\n");
 564                 return -EBUSY;
 565         }
 566
 567         dec_dev.hwregs = (volatile u32 *)ioremap_nocache(iobaseaddr, iosize);
 568
 569         if (dec_dev.hwregs == NULL) {
 570                 pr_info("failed to ioremap dec HW regs\n");
 571                 goto err;
 572         }
 573
 574         /* check for correct HW */
 575         if (!vpu_service_check_hw_id(&dec_dev, dec_hw_ids, ARRAY_SIZE(dec_hw_ids))) {
 576                 goto err;
 577         }
 578
 579         iobaseaddr      = enc_dev.iobaseaddr;
 580         iosize          = enc_dev.iosize;
 581
 582         if (!request_mem_region(iobaseaddr, iosize, "hx280enc")) {
 583                 pr_info("failed to reserve enc HW regs\n");
 584                 goto err;
 585         }
 586
 587         enc_dev.hwregs = (volatile u32 *)ioremap_nocache(iobaseaddr, iosize);
 588
 589         if (enc_dev.hwregs == NULL) {
 590                 pr_info("failed to ioremap enc HW regs\n");
 591                 goto err;
 592         }
 593
 594         /* check for correct HW */
 595         if (!vpu_service_check_hw_id(&enc_dev, enc_hw_ids, ARRAY_SIZE(enc_hw_ids))) {
 596                 goto err;
 597         }
 598         return 0;
 599
 600 err:
 601         vpu_service_release_io();
 602         return -EBUSY;
 603 }
 604
 605 static int vpu_service_open(struct inode *inode, struct file *filp)
 606 {
 607         vpu_session *session = (vpu_session *)kmalloc(sizeof(vpu_session), GFP_KERNEL);
 608         if (NULL == session) {
 609                 pr_err("unable to allocate memory for vpu_session.");
 610                 return -ENOMEM;
 611         }
 612
 613         session->type   = VPU_TYPE_BUTT;
 614         session->pid    = current->pid;
 615         INIT_LIST_HEAD(&session->waiting);
 616         INIT_LIST_HEAD(&session->running);
 617         INIT_LIST_HEAD(&session->done);
 618         INIT_LIST_HEAD(&session->list_session);
 619         init_waitqueue_head(&session->wait);
 620         /* no need to protect */
 621         list_add_tail(&session->list_session, &service.session);
 622         filp->private_data = (void *)session;
 623
 624         pr_debug("dev opened\n");
 625         return nonseekable_open(inode, filp);
 626 }
 627
 628 static int vpu_service_release(struct inode *inode, struct file *filp)
 629 {
 630         unsigned long flag;
 631         vpu_session *session = (vpu_session *)filp->private_data;
 632         if (NULL == session)
 633                 return -EINVAL;
 634
 635         wake_up_interruptible_sync(&session->wait);
 636
 637         msleep(50);
 638         /* remove this filp from the asynchronusly notified filp's */
 639         //vpu_service_fasync(-1, filp, 0);
 640         list_del(&session->list_session);
 641
 642         spin_lock_irqsave(&service.lock, flag);
 643         {
 644         vpu_reg *reg, *n;
 645         list_for_each_entry_safe(reg, n, &session->waiting, session_link) {
 646                 reg_deinit(reg);
 647         }
 648         list_for_each_entry_safe(reg, n, &session->running, session_link) {
 649                 reg_deinit(reg);
 650         }
 651         list_for_each_entry_safe(reg, n, &session->done, session_link) {
 652                 reg_deinit(reg);
 653         }
 654         }
 655         spin_unlock_irqrestore(&service.lock, flag);
 656
 657         kfree(session);
 658
 659         pr_debug("dev closed\n");
 660         return 0;
 661 }
 662
 663 static const struct file_operations vpu_service_fops = {
 664         .unlocked_ioctl = vpu_service_ioctl,
 665         .open           = vpu_service_open,
 666         .release        = vpu_service_release,
 667         //.fasync       = vpu_service_fasync,
 668 };
 669
 670 static struct miscdevice vpu_service_misc_device = {
 671         .minor          = MISC_DYNAMIC_MINOR,
 672         .name           = "vpu_service",
 673         .fops           = &vpu_service_fops,
 674 };
 675
 676 static void vpu_service_shutdown(struct platform_device *pdev)
 677 {
 678         pr_cont("shutdown...");
 679         del_timer(&service.timer);
 680         vpu_service_power_off();
 681         pr_cont("done\n");
 682 }
 683
 684 static int vpu_service_suspend(struct platform_device *pdev, pm_message_t state)
 685 {
 686         bool enabled;
 687         pr_info("suspend...");
 688         del_timer(&service.timer);
 689         enabled = service.enabled;
 690         vpu_service_power_off();
 691         service.enabled = enabled;
 692         return 0;
 693 }
 694
 695 static int vpu_service_resume(struct platform_device *pdev)
 696 {
 697         pr_info("resume...");
 698         if (service.enabled) {
 699                 service.enabled = false;
 700                 vpu_service_power_on();
 701         }
 702         return 0;
 703 }
 704
 705 static struct platform_device vpu_service_device = {
 706         .name              = "vpu_service",
 707         .id                = -1,
 708 };
 709
 710 static struct platform_driver vpu_service_driver = {
 711         .driver    = {
 712                 .name  = "vpu_service",
 713                 .owner = THIS_MODULE,
 714         },
 715         .shutdown  = vpu_service_shutdown,
 716         .suspend   = vpu_service_suspend,
 717         .resume    = vpu_service_resume,
 718 };
 719
 720 static void get_hw_info(void)
 721 {
 722         VPUHwDecConfig_t *dec = &service.dec_config;
 723         VPUHwEncConfig_t *enc = &service.enc_config;
 724         u32 configReg   = dec_dev.hwregs[VPU_DEC_HWCFG0];
 725         u32 asicID      = dec_dev.hwregs[0];
 726
 727         dec->h264Support    = (configReg >> DWL_H264_E) & 0x3U;
 728         dec->jpegSupport    = (configReg >> DWL_JPEG_E) & 0x01U;
 729         if (dec->jpegSupport && ((configReg >> DWL_PJPEG_E) & 0x01U))
 730                 dec->jpegSupport = JPEG_PROGRESSIVE;
 731         dec->mpeg4Support   = (configReg >> DWL_MPEG4_E) & 0x3U;
 732         dec->vc1Support     = (configReg >> DWL_VC1_E) & 0x3U;
 733         dec->mpeg2Support   = (configReg >> DWL_MPEG2_E) & 0x01U;
 734         dec->sorensonSparkSupport = (configReg >> DWL_SORENSONSPARK_E) & 0x01U;
 735         dec->refBufSupport  = (configReg >> DWL_REF_BUFF_E) & 0x01U;
 736         dec->vp6Support     = (configReg >> DWL_VP6_E) & 0x01U;
 737         dec->maxDecPicWidth = configReg & 0x07FFU;
 738
 739         /* 2nd Config register */
 740         configReg   = dec_dev.hwregs[VPU_DEC_HWCFG1];
 741         if (dec->refBufSupport) {
 742                 if ((configReg >> DWL_REF_BUFF_ILACE_E) & 0x01U)
 743                         dec->refBufSupport |= 2;
 744                 if ((configReg >> DWL_REF_BUFF_DOUBLE_E) & 0x01U)
 745                         dec->refBufSupport |= 4;
 746         }
 747         dec->customMpeg4Support = (configReg >> DWL_MPEG4_CUSTOM_E) & 0x01U;
 748         dec->vp7Support     = (configReg >> DWL_VP7_E) & 0x01U;
 749         dec->vp8Support     = (configReg >> DWL_VP8_E) & 0x01U;
 750         dec->avsSupport     = (configReg >> DWL_AVS_E) & 0x01U;
 751
 752         /* JPEG xtensions */
 753         if (((asicID >> 16) >= 0x8190U) || ((asicID >> 16) == 0x6731U)) {
 754                 dec->jpegESupport = (configReg >> DWL_JPEG_EXT_E) & 0x01U;
 755         } else {
 756                 dec->jpegESupport = JPEG_EXT_NOT_SUPPORTED;
 757         }
 758
 759         if (((asicID >> 16) >= 0x9170U) || ((asicID >> 16) == 0x6731U) ) {
 760                 dec->rvSupport = (configReg >> DWL_RV_E) & 0x03U;
 761         } else {
 762                 dec->rvSupport = RV_NOT_SUPPORTED;
 763         }
 764
 765         dec->mvcSupport = (configReg >> DWL_MVC_E) & 0x03U;
 766
 767         if (dec->refBufSupport && (asicID >> 16) == 0x6731U ) {
 768                 dec->refBufSupport |= 8; /* enable HW support for offset */
 769         }
 770
 771         {
 772         VPUHwFuseStatus_t hwFuseSts;
 773         /* Decoder fuse configuration */
 774         u32 fuseReg = dec_dev.hwregs[VPU_DEC_HW_FUSE_CFG];
 775
 776         hwFuseSts.h264SupportFuse = (fuseReg >> DWL_H264_FUSE_E) & 0x01U;
 777         hwFuseSts.mpeg4SupportFuse = (fuseReg >> DWL_MPEG4_FUSE_E) & 0x01U;
 778         hwFuseSts.mpeg2SupportFuse = (fuseReg >> DWL_MPEG2_FUSE_E) & 0x01U;
 779         hwFuseSts.sorensonSparkSupportFuse = (fuseReg >> DWL_SORENSONSPARK_FUSE_E) & 0x01U;
 780         hwFuseSts.jpegSupportFuse = (fuseReg >> DWL_JPEG_FUSE_E) & 0x01U;
 781         hwFuseSts.vp6SupportFuse = (fuseReg >> DWL_VP6_FUSE_E) & 0x01U;
 782         hwFuseSts.vc1SupportFuse = (fuseReg >> DWL_VC1_FUSE_E) & 0x01U;
 783         hwFuseSts.jpegProgSupportFuse = (fuseReg >> DWL_PJPEG_FUSE_E) & 0x01U;
 784         hwFuseSts.rvSupportFuse = (fuseReg >> DWL_RV_FUSE_E) & 0x01U;
 785         hwFuseSts.avsSupportFuse = (fuseReg >> DWL_AVS_FUSE_E) & 0x01U;
 786         hwFuseSts.vp7SupportFuse = (fuseReg >> DWL_VP7_FUSE_E) & 0x01U;
 787         hwFuseSts.vp8SupportFuse = (fuseReg >> DWL_VP8_FUSE_E) & 0x01U;
 788         hwFuseSts.customMpeg4SupportFuse = (fuseReg >> DWL_CUSTOM_MPEG4_FUSE_E) & 0x01U;
 789         hwFuseSts.mvcSupportFuse = (fuseReg >> DWL_MVC_FUSE_E) & 0x01U;
 790
 791         /* check max. decoder output width */
 792
 793         if (fuseReg & 0x8000U)
 794                 hwFuseSts.maxDecPicWidthFuse = 1920;
 795         else if (fuseReg & 0x4000U)
 796                 hwFuseSts.maxDecPicWidthFuse = 1280;
 797         else if (fuseReg & 0x2000U)
 798                 hwFuseSts.maxDecPicWidthFuse = 720;
 799         else if (fuseReg & 0x1000U)
 800                 hwFuseSts.maxDecPicWidthFuse = 352;
 801         else    /* remove warning */
 802                 hwFuseSts.maxDecPicWidthFuse = 352;
 803
 804         hwFuseSts.refBufSupportFuse = (fuseReg >> DWL_REF_BUFF_FUSE_E) & 0x01U;
 805
 806         /* Pp configuration */
 807         configReg = dec_dev.hwregs[VPU_PP_HW_SYNTH_CFG];
 808
 809         if ((configReg >> DWL_PP_E) & 0x01U) {
 810                 dec->ppSupport = 1;
 811                 dec->maxPpOutPicWidth = configReg & 0x07FFU;
 812                 /*pHwCfg->ppConfig = (configReg >> DWL_CFG_E) & 0x0FU; */
 813                 dec->ppConfig = configReg;
 814         } else {
 815                 dec->ppSupport = 0;
 816                 dec->maxPpOutPicWidth = 0;
 817                 dec->ppConfig = 0;
 818         }
 819
 820         /* check the HW versio */
 821         if (((asicID >> 16) >= 0x8190U) || ((asicID >> 16) == 0x6731U)) {
 822                 /* Pp configuration */
 823                 configReg = dec_dev.hwregs[VPU_DEC_HW_FUSE_CFG];
 824
 825                 if ((configReg >> DWL_PP_E) & 0x01U) {
 826                         /* Pp fuse configuration */
 827                         u32 fuseRegPp = dec_dev.hwregs[VPU_PP_HW_FUSE_CFG];
 828
 829                         if ((fuseRegPp >> DWL_PP_FUSE_E) & 0x01U) {
 830                                 hwFuseSts.ppSupportFuse = 1;
 831                                 /* check max. pp output width */
 832                                 if      (fuseRegPp & 0x8000U) hwFuseSts.maxPpOutPicWidthFuse = 1920;
 833                                 else if (fuseRegPp & 0x4000U) hwFuseSts.maxPpOutPicWidthFuse = 1280;
 834                                 else if (fuseRegPp & 0x2000U) hwFuseSts.maxPpOutPicWidthFuse = 720;
 835                                 else if (fuseRegPp & 0x1000U) hwFuseSts.maxPpOutPicWidthFuse = 352;
 836                                 else                          hwFuseSts.maxPpOutPicWidthFuse = 352;
 837                                 hwFuseSts.ppConfigFuse = fuseRegPp;
 838                         } else {
 839                                 hwFuseSts.ppSupportFuse = 0;
 840                                 hwFuseSts.maxPpOutPicWidthFuse = 0;
 841                                 hwFuseSts.ppConfigFuse = 0;
 842                         }
 843                 } else {
 844                         hwFuseSts.ppSupportFuse = 0;
 845                         hwFuseSts.maxPpOutPicWidthFuse = 0;
 846                         hwFuseSts.ppConfigFuse = 0;
 847                 }
 848
 849                 if (dec->maxDecPicWidth > hwFuseSts.maxDecPicWidthFuse)
 850                         dec->maxDecPicWidth = hwFuseSts.maxDecPicWidthFuse;
 851                 if (dec->maxPpOutPicWidth > hwFuseSts.maxPpOutPicWidthFuse)
 852                         dec->maxPpOutPicWidth = hwFuseSts.maxPpOutPicWidthFuse;
 853                 if (!hwFuseSts.h264SupportFuse) dec->h264Support = H264_NOT_SUPPORTED;
 854                 if (!hwFuseSts.mpeg4SupportFuse) dec->mpeg4Support = MPEG4_NOT_SUPPORTED;
 855                 if (!hwFuseSts.customMpeg4SupportFuse) dec->customMpeg4Support = MPEG4_CUSTOM_NOT_SUPPORTED;
 856                 if (!hwFuseSts.jpegSupportFuse) dec->jpegSupport = JPEG_NOT_SUPPORTED;
 857                 if ((dec->jpegSupport == JPEG_PROGRESSIVE) && !hwFuseSts.jpegProgSupportFuse)
 858                         dec->jpegSupport = JPEG_BASELINE;
 859                 if (!hwFuseSts.mpeg2SupportFuse) dec->mpeg2Support = MPEG2_NOT_SUPPORTED;
 860                 if (!hwFuseSts.vc1SupportFuse) dec->vc1Support = VC1_NOT_SUPPORTED;
 861                 if (!hwFuseSts.vp6SupportFuse) dec->vp6Support = VP6_NOT_SUPPORTED;
 862                 if (!hwFuseSts.vp7SupportFuse) dec->vp7Support = VP7_NOT_SUPPORTED;
 863                 if (!hwFuseSts.vp8SupportFuse) dec->vp8Support = VP8_NOT_SUPPORTED;
 864                 if (!hwFuseSts.ppSupportFuse) dec->ppSupport = PP_NOT_SUPPORTED;
 865
 866                 /* check the pp config vs fuse status */
 867                 if ((dec->ppConfig & 0xFC000000) && ((hwFuseSts.ppConfigFuse & 0xF0000000) >> 5)) {
 868                         u32 deInterlace = ((dec->ppConfig & PP_DEINTERLACING) >> 25);
 869                         u32 alphaBlend  = ((dec->ppConfig & PP_ALPHA_BLENDING) >> 24);
 870                         u32 deInterlaceFuse = (((hwFuseSts.ppConfigFuse >> 5) & PP_DEINTERLACING) >> 25);
 871                         u32 alphaBlendFuse  = (((hwFuseSts.ppConfigFuse >> 5) & PP_ALPHA_BLENDING) >> 24);
 872
 873                         if (deInterlace && !deInterlaceFuse) dec->ppConfig &= 0xFD000000;
 874                         if (alphaBlend && !alphaBlendFuse) dec->ppConfig &= 0xFE000000;
 875                 }
 876                 if (!hwFuseSts.sorensonSparkSupportFuse) dec->sorensonSparkSupport = SORENSON_SPARK_NOT_SUPPORTED;
 877                 if (!hwFuseSts.refBufSupportFuse)   dec->refBufSupport = REF_BUF_NOT_SUPPORTED;
 878                 if (!hwFuseSts.rvSupportFuse)       dec->rvSupport = RV_NOT_SUPPORTED;
 879                 if (!hwFuseSts.avsSupportFuse)      dec->avsSupport = AVS_NOT_SUPPORTED;
 880                 if (!hwFuseSts.mvcSupportFuse)      dec->mvcSupport = MVC_NOT_SUPPORTED;
 881         }
 882         }
 883         configReg = enc_dev.hwregs[63];
 884         enc->maxEncodedWidth = configReg & ((1 << 11) - 1);
 885         enc->h264Enabled = (configReg >> 27) & 1;
 886         enc->mpeg4Enabled = (configReg >> 26) & 1;
 887         enc->jpegEnabled = (configReg >> 25) & 1;
 888         enc->vsEnabled = (configReg >> 24) & 1;
 889         enc->rgbEnabled = (configReg >> 28) & 1;
 890         enc->busType = (configReg >> 20) & 15;
 891         enc->synthesisLanguage = (configReg >> 16) & 15;
 892         enc->busWidth = (configReg >> 12) & 15;
 893 }
 894
 895 static irqreturn_t vdpu_isr(int irq, void *dev_id)
 896 {
 897         vpu_device *dev = (vpu_device *) dev_id;
 898         u32 irq_status_dec = readl(dev->hwregs + DEC_INTERRUPT_REGISTER);
 899         u32 irq_status_pp  = readl(dev->hwregs + PP_INTERRUPT_REGISTER);
 900
 901         pr_debug("vdpu_isr dec %x pp %x\n", irq_status_dec, irq_status_pp);
 902
 903         if (irq_status_dec & DEC_INTERRUPT_BIT) {
 904                 irq_status_dec = readl(dev->hwregs + DEC_INTERRUPT_REGISTER);
 905                 if ((irq_status_dec & 0x40001) == 0x40001)
 906                 {
 907                         do {
 908                                 irq_status_dec = readl(dev->hwregs + DEC_INTERRUPT_REGISTER);
 909                         } while ((irq_status_dec & 0x40001) == 0x40001);
 910                 }
 911                 /* clear dec IRQ */
 912                 writel(irq_status_dec & (~DEC_INTERRUPT_BIT), dev->hwregs + DEC_INTERRUPT_REGISTER);
 913                 pr_debug("DEC IRQ received!\n");
 914                 if (NULL == service.reg_codec) {
 915                         pr_err("dec isr with no task waiting\n");
 916                 } else {
 917                         reg_from_run_to_done(service.reg_codec);
 918                 }
 919         }
 920
 921         if (irq_status_pp & PP_INTERRUPT_BIT) {
 922                 /* clear pp IRQ */
 923                 writel(irq_status_pp & (~DEC_INTERRUPT_BIT), dev->hwregs + PP_INTERRUPT_REGISTER);
 924                 pr_debug("PP IRQ received!\n");
 925
 926                 if (NULL == service.reg_pproc) {
 927                         pr_err("pp isr with no task waiting\n");
 928                 } else {
 929                         reg_from_run_to_done(service.reg_pproc);
 930                 }
 931         }
 932         try_set_reg();
 933         return IRQ_HANDLED;
 934 }
 935
 936 static irqreturn_t vepu_isr(int irq, void *dev_id)
 937 {
 938         struct vpu_device *dev = (struct vpu_device *) dev_id;
 939         u32 irq_status = readl(dev->hwregs + ENC_INTERRUPT_REGISTER);
 940
 941         pr_debug("enc_isr\n");
 942
 943         if (likely(irq_status & ENC_INTERRUPT_BIT)) {
 944                 /* clear enc IRQ */
 945                 writel(irq_status & (~ENC_INTERRUPT_BIT), dev->hwregs + ENC_INTERRUPT_REGISTER);
 946                 pr_debug("ENC IRQ received!\n");
 947
 948                 if (NULL == service.reg_codec) {
 949                         pr_err("enc isr with no task waiting\n");
 950                 } else {
 951                         reg_from_run_to_done(service.reg_codec);
 952                 }
 953         }
 954         try_set_reg();
 955         return IRQ_HANDLED;
 956 }
 957
 958 static int __init vpu_service_init(void)
 959 {
 960         int ret;
 961
 962         pr_debug("baseaddr = 0x%08x vdpu irq = %d vepu irq = %d\n", RK29_VCODEC_PHYS, IRQ_VDPU, IRQ_VEPU);
 963
 964         dec_dev.iobaseaddr      = RK29_VCODEC_PHYS + 0x200;
 965         dec_dev.iosize          = DEC_IO_SIZE;
 966         enc_dev.iobaseaddr      = RK29_VCODEC_PHYS;
 967         enc_dev.iosize          = ENC_IO_SIZE;
 968
 969         INIT_LIST_HEAD(&service.waiting);
 970         INIT_LIST_HEAD(&service.running);
 971         INIT_LIST_HEAD(&service.done);
 972         INIT_LIST_HEAD(&service.session);
 973         spin_lock_init(&service.lock);
 974         service.reg_codec       = NULL;
 975         service.reg_pproc       = NULL;
 976         atomic_set(&service.task_running, 0);
 977         service.enabled         = false;
 978
 979         vpu_get_clk();
 980         vpu_service_power_on();
 981
 982         ret = vpu_service_reserve_io();
 983         if (ret < 0) {
 984                 pr_err("reserve io failed\n");
 985                 goto err_reserve_io;
 986         }
 987
 988         /* get the IRQ line */
 989         ret = request_irq(IRQ_VDPU, vdpu_isr, IRQF_SHARED, "vdpu", (void *)&dec_dev);
 990         if (ret) {
 991                 pr_err("can't request vdpu irq %d\n", IRQ_VDPU);
 992                 goto err_req_vdpu_irq;
 993         }
 994
 995         ret = request_irq(IRQ_VEPU, vepu_isr, IRQF_SHARED, "vepu", (void *)&enc_dev);
 996         if (ret) {
 997                 pr_err("can't request vepu irq %d\n", IRQ_VEPU);
 998                 goto err_req_vepu_irq;
 999         }
1000
1001         ret = misc_register(&vpu_service_misc_device);
1002         if (ret) {
1003                 pr_err("misc_register failed\n");
1004                 goto err_register;
1005         }
1006
1007         platform_device_register(&vpu_service_device);
1008         platform_driver_probe(&vpu_service_driver, NULL);
1009         get_hw_info();
1010         del_timer(&service.timer);
1011         vpu_service_power_off();
1012         pr_info("init success\n");
1013
1014         return 0;
1015
1016 err_register:
1017         free_irq(IRQ_VEPU, (void *)&enc_dev);
1018 err_req_vepu_irq:
1019         free_irq(IRQ_VDPU, (void *)&dec_dev);
1020 err_req_vdpu_irq:
1021         pr_info("init failed\n");
1022 err_reserve_io:
1023         del_timer(&service.timer);
1024         vpu_service_power_off();
1025         vpu_service_release_io();
1026         vpu_put_clk();
1027         pr_info("init failed\n");
1028         return ret;
1029 }
1030
1031 static void __exit vpu_service_exit(void)
1032 {
1033         del_timer(&service.timer);
1034         vpu_service_power_off();
1035         platform_device_unregister(&vpu_service_device);
1036         platform_driver_unregister(&vpu_service_driver);
1037         misc_deregister(&vpu_service_misc_device);
1038         free_irq(IRQ_VEPU, (void *)&enc_dev);
1039         free_irq(IRQ_VDPU, (void *)&dec_dev);
1040         vpu_put_clk();
1041 }
1042
1043 module_init(vpu_service_init);
1044 module_exit(vpu_service_exit);
1045 MODULE_LICENSE("GPL");
1046
1047 #ifdef CONFIG_PROC_FS
1048 #include <linux/proc_fs.h>
1049 #include <linux/seq_file.h>
1050
1051 static int proc_vpu_service_show(struct seq_file *s, void *v)
1052 {
1053         unsigned int i, n;
1054         unsigned long flag;
1055         vpu_reg *reg, *reg_tmp;
1056         vpu_session *session, *session_tmp;
1057
1058         vpu_service_power_on();
1059         seq_printf(s, "\nENC Registers:\n");
1060         n = enc_dev.iosize >> 2;
1061         for (i = 0; i < n; i++) {
1062                 seq_printf(s, "\tswreg%d = %08X\n", i, readl(enc_dev.hwregs + i));
1063         }
1064         seq_printf(s, "\nDEC Registers:\n");
1065         n = dec_dev.iosize >> 2;
1066         for (i = 0; i < n; i++) {
1067                 seq_printf(s, "\tswreg%d = %08X\n", i, readl(dec_dev.hwregs + i));
1068         }
1069
1070         seq_printf(s, "\nvpu service status:\n");
1071         spin_lock_irqsave(&service.lock, flag);
1072         list_for_each_entry_safe(session, session_tmp, &service.session, list_session) {
1073                 seq_printf(s, "session pid %d type %d:\n", session->pid, session->type);
1074                 //seq_printf(s, "waiting reg set %d\n");
1075                 list_for_each_entry_safe(reg, reg_tmp, &session->waiting, session_link) {
1076                         seq_printf(s, "waiting register set\n");
1077                 }
1078                 list_for_each_entry_safe(reg, reg_tmp, &session->running, session_link) {
1079                         seq_printf(s, "running register set\n");
1080                 }
1081                 list_for_each_entry_safe(reg, reg_tmp, &session->done, session_link) {
1082                         seq_printf(s, "done    register set\n");
1083                 }
1084         }
1085         spin_unlock_irqrestore(&service.lock, flag);
1086
1087         return 0;
1088 }
1089
1090 static int proc_vpu_service_open(struct inode *inode, struct file *file)
1091 {
1092         return single_open(file, proc_vpu_service_show, NULL);
1093 }
1094
1095 static const struct file_operations proc_vpu_service_fops = {
1096         .open           = proc_vpu_service_open,
1097         .read           = seq_read,
1098         .llseek         = seq_lseek,
1099         .release        = single_release,
1100 };
1101
1102 static int __init vpu_service_proc_init(void)
1103 {
1104         proc_create("vpu_service", 0, NULL, &proc_vpu_service_fops);
1105         return 0;
1106
1107 }
1108 late_initcall(vpu_service_proc_init);
1109 #endif /* CONFIG_PROC_FS */
1110