1 /* arch/arm/mach-rk29/vpu.c
3 * Copyright (C) 2010 ROCKCHIP, Inc.
4 * author: chenhengming chm@rock-chips.com
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
17 #ifdef CONFIG_RK29_VPU_DEBUG
19 #define pr_fmt(fmt) "VPU_SERVICE: %s: " fmt, __func__
21 #define pr_fmt(fmt) "VPU_SERVICE: " fmt
25 #include <linux/clk.h>
26 #include <linux/delay.h>
27 #include <linux/init.h>
28 #include <linux/interrupt.h>
30 #include <linux/kernel.h>
31 #include <linux/module.h>
33 #include <linux/ioport.h>
34 #include <linux/miscdevice.h>
36 #include <linux/poll.h>
37 #include <linux/platform_device.h>
38 #include <linux/timer.h>
40 #include <asm/uaccess.h>
42 #include <mach/irqs.h>
43 #include <mach/vpu_service.h>
44 #include <mach/rk29_iomap.h>
49 #define DEC_INTERRUPT_REGISTER 1
50 #define PP_INTERRUPT_REGISTER 60
51 #define ENC_INTERRUPT_REGISTER 1
53 #define DEC_INTERRUPT_BIT 0x100
54 #define PP_INTERRUPT_BIT 0x100
55 #define ENC_INTERRUPT_BIT 0x1
57 #define REG_NUM_DEC (60)
58 #define REG_NUM_PP (41)
59 #define REG_NUM_ENC (96)
60 #define REG_NUM_DEC_PP (REG_NUM_DEC+REG_NUM_PP)
61 #define SIZE_REG(reg) ((reg)*4)
63 #define DEC_IO_SIZE ((100 + 1) * 4) /* bytes */
64 #define ENC_IO_SIZE (96 * 4) /* bytes */
65 static const u16 dec_hw_ids[] = { 0x8190, 0x8170, 0x9170, 0x9190, 0x6731 };
66 static const u16 enc_hw_ids[] = { 0x6280, 0x7280, 0x8270 };
68 #define VPU_REG_EN_ENC 14
69 #define VPU_REG_ENC_GATE 2
70 #define VPU_REG_ENC_GATE_BIT (1<<4)
72 #define VPU_REG_EN_DEC 1
73 #define VPU_REG_DEC_GATE 2
74 #define VPU_REG_DEC_GATE_BIT (1<<10)
75 #define VPU_REG_EN_PP 0
76 #define VPU_REG_PP_GATE 1
77 #define VPU_REG_PP_GATE_BIT (1<<8)
78 #define VPU_REG_EN_DEC_PP 1
79 #define VPU_REG_DEC_PP_GATE 61
80 #define VPU_REG_DEC_PP_GATE_BIT (1<<8)
84 * struct for process session which connect to vpu
86 * @author ChenHengming (2011-5-3)
88 typedef struct vpu_session {
90 /* a linked list of data so we can access them for debugging */
91 struct list_head list_session;
92 /* a linked list of register data waiting for process */
93 struct list_head waiting;
94 /* a linked list of register data in processing */
95 struct list_head running;
96 /* a linked list of register data processed */
97 struct list_head done;
98 wait_queue_head_t wait;
100 atomic_t task_running;
104 * struct for process register set
106 * @author ChenHengming (2011-5-4)
108 typedef struct vpu_reg {
109 VPU_CLIENT_TYPE type;
110 vpu_session *session;
111 struct list_head session_link; /* link to vpu service session */
112 struct list_head status_link; /* link to register set list */
114 unsigned long reg[VPU_REG_NUM_DEC_PP];
117 typedef struct vpu_device {
118 unsigned long iobaseaddr;
120 volatile u32 *hwregs;
123 typedef struct vpu_service_info {
125 struct timer_list timer; /* timer for power off */
126 struct list_head waiting; /* link to link_reg in struct vpu_reg */
127 struct list_head running; /* link to link_reg in struct vpu_reg */
128 struct list_head done; /* link to link_reg in struct vpu_reg */
129 struct list_head session; /* link to list_session in struct vpu_session */
130 atomic_t total_running;
135 VPUHwDecConfig_t dec_config;
136 VPUHwEncConfig_t enc_config;
139 typedef struct vpu_request
145 static struct clk *aclk_vepu;
146 static struct clk *hclk_vepu;
147 static struct clk *aclk_ddr_vepu;
148 static struct clk *hclk_cpu_vcodec;
149 static vpu_service_info service;
150 static vpu_device dec_dev;
151 static vpu_device enc_dev;
153 #define POWER_OFF_DELAY 4*HZ /* 4s */
154 #define TIMEOUT_DELAY 2*HZ /* 2s */
156 static void vpu_get_clk(void)
158 aclk_vepu = clk_get(NULL, "aclk_vepu");
159 hclk_vepu = clk_get(NULL, "hclk_vepu");
160 aclk_ddr_vepu = clk_get(NULL, "aclk_ddr_vepu");
161 hclk_cpu_vcodec = clk_get(NULL, "hclk_cpu_vcodec");
164 static void vpu_put_clk(void)
168 clk_put(aclk_ddr_vepu);
169 clk_put(hclk_cpu_vcodec);
172 static void vpu_reset(void)
174 clk_disable(aclk_ddr_vepu);
175 cru_set_soft_reset(SOFT_RST_CPU_VODEC_A2A_AHB, true);
176 cru_set_soft_reset(SOFT_RST_DDR_VCODEC_PORT, true);
177 cru_set_soft_reset(SOFT_RST_VCODEC_AHB_BUS, true);
178 cru_set_soft_reset(SOFT_RST_VCODEC_AXI_BUS, true);
180 cru_set_soft_reset(SOFT_RST_VCODEC_AXI_BUS, false);
181 cru_set_soft_reset(SOFT_RST_VCODEC_AHB_BUS, false);
182 cru_set_soft_reset(SOFT_RST_DDR_VCODEC_PORT, false);
183 cru_set_soft_reset(SOFT_RST_CPU_VODEC_A2A_AHB, false);
184 clk_enable(aclk_ddr_vepu);
185 service.reg_codec = NULL;
186 service.reg_pproc = NULL;
187 service.reg_resev = NULL;
190 static void reg_deinit(vpu_reg *reg);
191 static void vpu_service_session_clear(vpu_session *session)
195 spin_lock_irqsave(&service.lock, flag);
196 list_for_each_entry_safe(reg, n, &session->waiting, session_link) {
199 list_for_each_entry_safe(reg, n, &session->running, session_link) {
202 list_for_each_entry_safe(reg, n, &session->done, session_link) {
205 spin_unlock_irqrestore(&service.lock, flag);
208 static void vpu_service_dump(void)
212 vpu_reg *reg, *reg_tmp;
213 vpu_session *session, *session_tmp;
215 spin_lock_irqsave(&service.lock, flag);
216 running = atomic_read(&service.total_running);
217 printk("total_running %d\n", running);
219 printk("reg_codec 0x%.8x\n", (unsigned int)service.reg_codec);
220 printk("reg_pproc 0x%.8x\n", (unsigned int)service.reg_pproc);
221 printk("reg_resev 0x%.8x\n", (unsigned int)service.reg_resev);
223 list_for_each_entry_safe(session, session_tmp, &service.session, list_session) {
224 printk("session pid %d type %d:\n", session->pid, session->type);
225 running = atomic_read(&session->task_running);
226 printk("task_running %d\n", running);
227 list_for_each_entry_safe(reg, reg_tmp, &session->waiting, session_link) {
228 printk("waiting register set 0x%.8x\n", (unsigned int)reg);
230 list_for_each_entry_safe(reg, reg_tmp, &session->running, session_link) {
231 printk("running register set 0x%.8x\n", (unsigned int)reg);
233 list_for_each_entry_safe(reg, reg_tmp, &session->done, session_link) {
234 printk("done register set 0x%.8x\n", (unsigned int)reg);
237 spin_unlock_irqrestore(&service.lock, flag);
240 static void vpu_service_power_off(void)
244 if (!service.enabled)
247 service.enabled = false;
248 total_running = atomic_read(&service.total_running);
250 pr_alert("power off when %d task running!!\n", total_running);
252 pr_alert("delay 50 ms for running task\n");
256 printk("vpu: power off...");
257 pmu_set_power_domain(PD_VCODEC, false);
259 clk_disable(hclk_cpu_vcodec);
260 clk_disable(aclk_ddr_vepu);
261 clk_disable(hclk_vepu);
262 clk_disable(aclk_vepu);
266 static void vpu_service_power_off_work_func(unsigned long data)
269 vpu_service_power_off();
272 static void vpu_service_power_maintain(void)
274 if (service.enabled) {
275 mod_timer(&service.timer, jiffies + POWER_OFF_DELAY);
277 pr_err("maintain power when power is off!\n");
281 static void vpu_service_power_on(void)
283 if (!service.enabled) {
284 service.enabled = true;
285 printk("vpu: power on\n");
287 clk_enable(aclk_vepu);
288 clk_enable(hclk_vepu);
289 clk_enable(hclk_cpu_vcodec);
291 pmu_set_power_domain(PD_VCODEC, true);
293 clk_enable(aclk_ddr_vepu);
294 init_timer(&service.timer);
295 service.timer.expires = jiffies + POWER_OFF_DELAY;
296 service.timer.function = vpu_service_power_off_work_func;
297 add_timer(&service.timer);
299 vpu_service_power_maintain();
303 static vpu_reg *reg_init(vpu_session *session, void __user *src, unsigned long size)
306 vpu_reg *reg = kmalloc(sizeof(vpu_reg), GFP_KERNEL);
308 pr_err("kmalloc fail in reg_init\n");
312 reg->session = session;
313 reg->type = session->type;
315 INIT_LIST_HEAD(®->session_link);
316 INIT_LIST_HEAD(®->status_link);
318 if (copy_from_user(®->reg[0], (void __user *)src, size)) {
319 pr_err("copy_from_user failed in reg_init\n");
324 spin_lock_irqsave(&service.lock, flag);
325 list_add_tail(®->status_link, &service.waiting);
326 list_add_tail(®->session_link, &session->waiting);
327 spin_unlock_irqrestore(&service.lock, flag);
332 static void reg_deinit(vpu_reg *reg)
334 list_del_init(®->session_link);
335 list_del_init(®->status_link);
337 if (reg == service.reg_codec) service.reg_codec = NULL;
338 if (reg == service.reg_pproc) service.reg_pproc = NULL;
341 static void reg_from_wait_to_run(vpu_reg *reg)
343 list_del_init(®->status_link);
344 list_add_tail(®->status_link, &service.running);
346 list_del_init(®->session_link);
347 list_add_tail(®->session_link, ®->session->running);
350 static void reg_copy_from_hw(vpu_reg *reg, volatile u32 *src, u32 count)
353 u32 *dst = (u32 *)®->reg[0];
354 for (i = 0; i < count; i++)
358 static void reg_from_run_to_done(vpu_reg *reg)
360 spin_lock(&service.lock);
361 list_del_init(®->status_link);
362 list_add_tail(®->status_link, &service.done);
364 list_del_init(®->session_link);
365 list_add_tail(®->session_link, ®->session->done);
369 service.reg_codec = NULL;
370 reg_copy_from_hw(reg, enc_dev.hwregs, REG_NUM_ENC);
374 service.reg_codec = NULL;
375 reg_copy_from_hw(reg, dec_dev.hwregs, REG_NUM_DEC);
379 service.reg_pproc = NULL;
380 reg_copy_from_hw(reg, dec_dev.hwregs + PP_INTERRUPT_REGISTER, REG_NUM_PP);
381 dec_dev.hwregs[PP_INTERRUPT_REGISTER] = 0;
385 service.reg_codec = NULL;
386 service.reg_pproc = NULL;
387 reg_copy_from_hw(reg, dec_dev.hwregs, REG_NUM_DEC_PP);
388 dec_dev.hwregs[PP_INTERRUPT_REGISTER] = 0;
392 pr_err("copy reg from hw with unknown type %d\n", reg->type);
396 atomic_sub(1, ®->session->task_running);
397 wake_up_interruptible_sync(®->session->wait);
398 spin_unlock(&service.lock);
401 void reg_copy_to_hw(vpu_reg *reg)
404 u32 *src = (u32 *)®->reg[0];
405 atomic_add(1, &service.total_running);
406 atomic_add(1, ®->session->task_running);
409 u32 *dst = (u32 *)enc_dev.hwregs;
410 service.reg_codec = reg;
412 dst[VPU_REG_EN_ENC] = src[VPU_REG_EN_ENC] & 0x6;
414 for (i = 0; i < VPU_REG_EN_ENC; i++)
417 for (i = VPU_REG_EN_ENC + 1; i < REG_NUM_ENC; i++)
422 dst[VPU_REG_ENC_GATE] = src[VPU_REG_ENC_GATE] | VPU_REG_ENC_GATE_BIT;
423 dst[VPU_REG_EN_ENC] = src[VPU_REG_EN_ENC];
426 u32 *dst = (u32 *)dec_dev.hwregs;
427 service.reg_codec = reg;
429 for (i = REG_NUM_DEC - 1; i > VPU_REG_DEC_GATE; i--)
434 dst[VPU_REG_DEC_GATE] = src[VPU_REG_DEC_GATE] | VPU_REG_DEC_GATE_BIT;
435 dst[VPU_REG_EN_DEC] = src[VPU_REG_EN_DEC];
438 u32 *dst = (u32 *)dec_dev.hwregs + PP_INTERRUPT_REGISTER;
439 service.reg_pproc = reg;
441 dst[VPU_REG_PP_GATE] = src[VPU_REG_PP_GATE] | VPU_REG_PP_GATE_BIT;
443 for (i = VPU_REG_PP_GATE + 1; i < REG_NUM_PP; i++)
448 dst[VPU_REG_EN_PP] = src[VPU_REG_EN_PP];
451 u32 *dst = (u32 *)dec_dev.hwregs;
452 service.reg_codec = reg;
453 service.reg_pproc = reg;
455 for (i = VPU_REG_EN_DEC_PP + 1; i < REG_NUM_DEC_PP; i++)
458 dst[VPU_REG_EN_DEC_PP] = src[VPU_REG_EN_DEC_PP] | 0x2;
461 dst[VPU_REG_DEC_PP_GATE] = src[VPU_REG_DEC_PP_GATE] | VPU_REG_PP_GATE_BIT;
462 dst[VPU_REG_DEC_GATE] = src[VPU_REG_DEC_GATE] | VPU_REG_DEC_GATE_BIT;
463 dst[VPU_REG_EN_DEC] = src[VPU_REG_EN_DEC];
466 pr_err("unsupport session type %d", reg->type);
467 atomic_sub(1, &service.total_running);
468 atomic_sub(1, ®->session->task_running);
474 static void try_set_reg(void)
477 // first get reg from reg list
478 spin_lock_irqsave(&service.lock, flag);
479 if (!list_empty(&service.waiting)) {
480 vpu_reg *reg = list_entry(service.waiting.next, vpu_reg, status_link);
482 vpu_service_power_maintain();
483 if (((VPU_DEC_PP == reg->type) && (NULL == service.reg_codec) && (NULL == service.reg_pproc)) ||
484 ((VPU_DEC == reg->type) && (NULL == service.reg_codec)) ||
485 ((VPU_PP == reg->type) && (NULL == service.reg_pproc)) ||
486 ((VPU_ENC == reg->type) && (NULL == service.reg_codec))) {
487 reg_from_wait_to_run(reg);
491 spin_unlock_irqrestore(&service.lock, flag);
494 static int return_reg(vpu_reg *reg, u32 __user *dst)
499 if (copy_to_user(dst, ®->reg[0], SIZE_REG(REG_NUM_ENC)))
504 if (copy_to_user(dst, ®->reg[0], SIZE_REG(REG_NUM_DEC)))
509 if (copy_to_user(dst, ®->reg[0], SIZE_REG(REG_NUM_PP)))
514 if (copy_to_user(dst, ®->reg[0], SIZE_REG(REG_NUM_DEC_PP)))
520 pr_err("copy reg to user with unknown type %d\n", reg->type);
528 static long vpu_service_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
530 vpu_session *session = (vpu_session *)filp->private_data;
531 if (NULL == session) {
536 case VPU_IOC_SET_CLIENT_TYPE : {
537 session->type = (VPU_CLIENT_TYPE)arg;
540 case VPU_IOC_GET_HW_FUSE_STATUS : {
542 if (copy_from_user(&req, (void __user *)arg, sizeof(vpu_request))) {
543 pr_err("VPU_IOC_GET_HW_FUSE_STATUS copy_from_user failed\n");
546 if (VPU_ENC != session->type) {
547 if (copy_to_user((void __user *)req.req, &service.dec_config, sizeof(VPUHwDecConfig_t))) {
548 pr_err("VPU_IOC_GET_HW_FUSE_STATUS copy_to_user failed type %d\n", session->type);
552 if (copy_to_user((void __user *)req.req, &service.enc_config, sizeof(VPUHwEncConfig_t))) {
553 pr_err("VPU_IOC_GET_HW_FUSE_STATUS copy_to_user failed type %d\n", session->type);
561 case VPU_IOC_SET_REG : {
564 if (copy_from_user(&req, (void __user *)arg, sizeof(vpu_request))) {
565 pr_err("VPU_IOC_SET_REG copy_from_user failed\n");
569 reg = reg_init(session, (void __user *)req.req, req.size);
573 vpu_service_power_on();
579 case VPU_IOC_GET_REG : {
583 if (copy_from_user(&req, (void __user *)arg, sizeof(vpu_request))) {
584 pr_err("VPU_IOC_GET_REG copy_from_user failed\n");
587 int ret = wait_event_interruptible_timeout(session->wait, !list_empty(&session->done), TIMEOUT_DELAY);
588 if (unlikely(ret < 0)) {
589 pr_err("pid %d wait task ret %d\n", session->pid, ret);
590 } else if (0 == ret) {
591 pr_err("pid %d wait %d task done timeout\n", session->pid, atomic_read(&session->task_running));
595 int task_running = atomic_read(&session->task_running);
598 atomic_set(&session->task_running, 0);
599 printk("%d task is running but not return, reset hardware...", task_running);
603 vpu_service_session_clear(session);
607 spin_lock_irqsave(&service.lock, flag);
608 reg = list_entry(session->done.next, vpu_reg, session_link);
609 return_reg(reg, (u32 __user *)req.req);
610 spin_unlock_irqrestore(&service.lock, flag);
614 pr_err("unknow vpu service ioctl cmd %x\n", cmd);
622 static int vpu_service_check_hw_id(struct vpu_device * dev, const u16 *hwids, size_t num)
624 u32 hwid = readl(dev->hwregs);
625 pr_info("HW ID = 0x%08x\n", hwid);
627 hwid = (hwid >> 16) & 0xFFFF; /* product version only */
630 if (hwid == hwids[num]) {
631 pr_info("Compatible HW found at 0x%08lx\n", dev->iobaseaddr);
636 pr_info("No Compatible HW found at 0x%08lx\n", dev->iobaseaddr);
640 static void vpu_service_release_io(void)
643 iounmap((void *)dec_dev.hwregs);
644 release_mem_region(dec_dev.iobaseaddr, dec_dev.iosize);
647 iounmap((void *)enc_dev.hwregs);
648 release_mem_region(enc_dev.iobaseaddr, enc_dev.iosize);
651 static int vpu_service_reserve_io(void)
653 unsigned long iobaseaddr;
654 unsigned long iosize;
656 iobaseaddr = dec_dev.iobaseaddr;
657 iosize = dec_dev.iosize;
659 if (!request_mem_region(iobaseaddr, iosize, "vdpu_io")) {
660 pr_info("failed to reserve dec HW regs\n");
664 dec_dev.hwregs = (volatile u32 *)ioremap_nocache(iobaseaddr, iosize);
666 if (dec_dev.hwregs == NULL) {
667 pr_info("failed to ioremap dec HW regs\n");
671 /* check for correct HW */
672 if (!vpu_service_check_hw_id(&dec_dev, dec_hw_ids, ARRAY_SIZE(dec_hw_ids))) {
676 iobaseaddr = enc_dev.iobaseaddr;
677 iosize = enc_dev.iosize;
679 if (!request_mem_region(iobaseaddr, iosize, "hx280enc")) {
680 pr_info("failed to reserve enc HW regs\n");
684 enc_dev.hwregs = (volatile u32 *)ioremap_nocache(iobaseaddr, iosize);
686 if (enc_dev.hwregs == NULL) {
687 pr_info("failed to ioremap enc HW regs\n");
691 /* check for correct HW */
692 if (!vpu_service_check_hw_id(&enc_dev, enc_hw_ids, ARRAY_SIZE(enc_hw_ids))) {
698 vpu_service_release_io();
702 static int vpu_service_open(struct inode *inode, struct file *filp)
704 vpu_session *session = (vpu_session *)kmalloc(sizeof(vpu_session), GFP_KERNEL);
705 if (NULL == session) {
706 pr_err("unable to allocate memory for vpu_session.");
710 session->type = VPU_TYPE_BUTT;
711 session->pid = current->pid;
712 INIT_LIST_HEAD(&session->waiting);
713 INIT_LIST_HEAD(&session->running);
714 INIT_LIST_HEAD(&session->done);
715 INIT_LIST_HEAD(&session->list_session);
716 init_waitqueue_head(&session->wait);
717 /* no need to protect */
718 list_add_tail(&session->list_session, &service.session);
719 atomic_set(&session->task_running, 0);
720 filp->private_data = (void *)session;
722 pr_debug("dev opened\n");
723 return nonseekable_open(inode, filp);
726 static int vpu_service_release(struct inode *inode, struct file *filp)
729 vpu_session *session = (vpu_session *)filp->private_data;
733 task_running = atomic_read(&session->task_running);
735 pr_err("vpu_service session %d still has %d task running when closing\n", session->pid, task_running);
738 wake_up_interruptible_sync(&session->wait);
740 /* remove this filp from the asynchronusly notified filp's */
741 //vpu_service_fasync(-1, filp, 0);
742 list_del(&session->list_session);
744 vpu_service_session_clear(session);
748 pr_debug("dev closed\n");
752 static const struct file_operations vpu_service_fops = {
753 .unlocked_ioctl = vpu_service_ioctl,
754 .open = vpu_service_open,
755 .release = vpu_service_release,
756 //.fasync = vpu_service_fasync,
759 static struct miscdevice vpu_service_misc_device = {
760 .minor = MISC_DYNAMIC_MINOR,
761 .name = "vpu_service",
762 .fops = &vpu_service_fops,
765 static void vpu_service_shutdown(struct platform_device *pdev)
767 pr_cont("shutdown...");
768 del_timer(&service.timer);
769 vpu_service_power_off();
773 static int vpu_service_suspend(struct platform_device *pdev, pm_message_t state)
776 pr_info("suspend...");
777 del_timer(&service.timer);
778 enabled = service.enabled;
779 vpu_service_power_off();
780 service.enabled = enabled;
784 static int vpu_service_resume(struct platform_device *pdev)
786 pr_info("resume...");
787 if (service.enabled) {
788 service.enabled = false;
789 vpu_service_power_on();
795 static struct platform_device vpu_service_device = {
796 .name = "vpu_service",
800 static struct platform_driver vpu_service_driver = {
802 .name = "vpu_service",
803 .owner = THIS_MODULE,
805 .shutdown = vpu_service_shutdown,
806 .suspend = vpu_service_suspend,
807 .resume = vpu_service_resume,
810 static void get_hw_info(void)
812 VPUHwDecConfig_t *dec = &service.dec_config;
813 VPUHwEncConfig_t *enc = &service.enc_config;
814 u32 configReg = dec_dev.hwregs[VPU_DEC_HWCFG0];
815 u32 asicID = dec_dev.hwregs[0];
817 dec->h264Support = (configReg >> DWL_H264_E) & 0x3U;
818 dec->jpegSupport = (configReg >> DWL_JPEG_E) & 0x01U;
819 if (dec->jpegSupport && ((configReg >> DWL_PJPEG_E) & 0x01U))
820 dec->jpegSupport = JPEG_PROGRESSIVE;
821 dec->mpeg4Support = (configReg >> DWL_MPEG4_E) & 0x3U;
822 dec->vc1Support = (configReg >> DWL_VC1_E) & 0x3U;
823 dec->mpeg2Support = (configReg >> DWL_MPEG2_E) & 0x01U;
824 dec->sorensonSparkSupport = (configReg >> DWL_SORENSONSPARK_E) & 0x01U;
825 dec->refBufSupport = (configReg >> DWL_REF_BUFF_E) & 0x01U;
826 dec->vp6Support = (configReg >> DWL_VP6_E) & 0x01U;
827 dec->maxDecPicWidth = configReg & 0x07FFU;
829 /* 2nd Config register */
830 configReg = dec_dev.hwregs[VPU_DEC_HWCFG1];
831 if (dec->refBufSupport) {
832 if ((configReg >> DWL_REF_BUFF_ILACE_E) & 0x01U)
833 dec->refBufSupport |= 2;
834 if ((configReg >> DWL_REF_BUFF_DOUBLE_E) & 0x01U)
835 dec->refBufSupport |= 4;
837 dec->customMpeg4Support = (configReg >> DWL_MPEG4_CUSTOM_E) & 0x01U;
838 dec->vp7Support = (configReg >> DWL_VP7_E) & 0x01U;
839 dec->vp8Support = (configReg >> DWL_VP8_E) & 0x01U;
840 dec->avsSupport = (configReg >> DWL_AVS_E) & 0x01U;
843 if (((asicID >> 16) >= 0x8190U) || ((asicID >> 16) == 0x6731U)) {
844 dec->jpegESupport = (configReg >> DWL_JPEG_EXT_E) & 0x01U;
846 dec->jpegESupport = JPEG_EXT_NOT_SUPPORTED;
849 if (((asicID >> 16) >= 0x9170U) || ((asicID >> 16) == 0x6731U) ) {
850 dec->rvSupport = (configReg >> DWL_RV_E) & 0x03U;
852 dec->rvSupport = RV_NOT_SUPPORTED;
855 dec->mvcSupport = (configReg >> DWL_MVC_E) & 0x03U;
857 if (dec->refBufSupport && (asicID >> 16) == 0x6731U ) {
858 dec->refBufSupport |= 8; /* enable HW support for offset */
862 VPUHwFuseStatus_t hwFuseSts;
863 /* Decoder fuse configuration */
864 u32 fuseReg = dec_dev.hwregs[VPU_DEC_HW_FUSE_CFG];
866 hwFuseSts.h264SupportFuse = (fuseReg >> DWL_H264_FUSE_E) & 0x01U;
867 hwFuseSts.mpeg4SupportFuse = (fuseReg >> DWL_MPEG4_FUSE_E) & 0x01U;
868 hwFuseSts.mpeg2SupportFuse = (fuseReg >> DWL_MPEG2_FUSE_E) & 0x01U;
869 hwFuseSts.sorensonSparkSupportFuse = (fuseReg >> DWL_SORENSONSPARK_FUSE_E) & 0x01U;
870 hwFuseSts.jpegSupportFuse = (fuseReg >> DWL_JPEG_FUSE_E) & 0x01U;
871 hwFuseSts.vp6SupportFuse = (fuseReg >> DWL_VP6_FUSE_E) & 0x01U;
872 hwFuseSts.vc1SupportFuse = (fuseReg >> DWL_VC1_FUSE_E) & 0x01U;
873 hwFuseSts.jpegProgSupportFuse = (fuseReg >> DWL_PJPEG_FUSE_E) & 0x01U;
874 hwFuseSts.rvSupportFuse = (fuseReg >> DWL_RV_FUSE_E) & 0x01U;
875 hwFuseSts.avsSupportFuse = (fuseReg >> DWL_AVS_FUSE_E) & 0x01U;
876 hwFuseSts.vp7SupportFuse = (fuseReg >> DWL_VP7_FUSE_E) & 0x01U;
877 hwFuseSts.vp8SupportFuse = (fuseReg >> DWL_VP8_FUSE_E) & 0x01U;
878 hwFuseSts.customMpeg4SupportFuse = (fuseReg >> DWL_CUSTOM_MPEG4_FUSE_E) & 0x01U;
879 hwFuseSts.mvcSupportFuse = (fuseReg >> DWL_MVC_FUSE_E) & 0x01U;
881 /* check max. decoder output width */
883 if (fuseReg & 0x8000U)
884 hwFuseSts.maxDecPicWidthFuse = 1920;
885 else if (fuseReg & 0x4000U)
886 hwFuseSts.maxDecPicWidthFuse = 1280;
887 else if (fuseReg & 0x2000U)
888 hwFuseSts.maxDecPicWidthFuse = 720;
889 else if (fuseReg & 0x1000U)
890 hwFuseSts.maxDecPicWidthFuse = 352;
891 else /* remove warning */
892 hwFuseSts.maxDecPicWidthFuse = 352;
894 hwFuseSts.refBufSupportFuse = (fuseReg >> DWL_REF_BUFF_FUSE_E) & 0x01U;
896 /* Pp configuration */
897 configReg = dec_dev.hwregs[VPU_PP_HW_SYNTH_CFG];
899 if ((configReg >> DWL_PP_E) & 0x01U) {
901 dec->maxPpOutPicWidth = configReg & 0x07FFU;
902 /*pHwCfg->ppConfig = (configReg >> DWL_CFG_E) & 0x0FU; */
903 dec->ppConfig = configReg;
906 dec->maxPpOutPicWidth = 0;
910 /* check the HW versio */
911 if (((asicID >> 16) >= 0x8190U) || ((asicID >> 16) == 0x6731U)) {
912 /* Pp configuration */
913 configReg = dec_dev.hwregs[VPU_DEC_HW_FUSE_CFG];
915 if ((configReg >> DWL_PP_E) & 0x01U) {
916 /* Pp fuse configuration */
917 u32 fuseRegPp = dec_dev.hwregs[VPU_PP_HW_FUSE_CFG];
919 if ((fuseRegPp >> DWL_PP_FUSE_E) & 0x01U) {
920 hwFuseSts.ppSupportFuse = 1;
921 /* check max. pp output width */
922 if (fuseRegPp & 0x8000U) hwFuseSts.maxPpOutPicWidthFuse = 1920;
923 else if (fuseRegPp & 0x4000U) hwFuseSts.maxPpOutPicWidthFuse = 1280;
924 else if (fuseRegPp & 0x2000U) hwFuseSts.maxPpOutPicWidthFuse = 720;
925 else if (fuseRegPp & 0x1000U) hwFuseSts.maxPpOutPicWidthFuse = 352;
926 else hwFuseSts.maxPpOutPicWidthFuse = 352;
927 hwFuseSts.ppConfigFuse = fuseRegPp;
929 hwFuseSts.ppSupportFuse = 0;
930 hwFuseSts.maxPpOutPicWidthFuse = 0;
931 hwFuseSts.ppConfigFuse = 0;
934 hwFuseSts.ppSupportFuse = 0;
935 hwFuseSts.maxPpOutPicWidthFuse = 0;
936 hwFuseSts.ppConfigFuse = 0;
939 if (dec->maxDecPicWidth > hwFuseSts.maxDecPicWidthFuse)
940 dec->maxDecPicWidth = hwFuseSts.maxDecPicWidthFuse;
941 if (dec->maxPpOutPicWidth > hwFuseSts.maxPpOutPicWidthFuse)
942 dec->maxPpOutPicWidth = hwFuseSts.maxPpOutPicWidthFuse;
943 if (!hwFuseSts.h264SupportFuse) dec->h264Support = H264_NOT_SUPPORTED;
944 if (!hwFuseSts.mpeg4SupportFuse) dec->mpeg4Support = MPEG4_NOT_SUPPORTED;
945 if (!hwFuseSts.customMpeg4SupportFuse) dec->customMpeg4Support = MPEG4_CUSTOM_NOT_SUPPORTED;
946 if (!hwFuseSts.jpegSupportFuse) dec->jpegSupport = JPEG_NOT_SUPPORTED;
947 if ((dec->jpegSupport == JPEG_PROGRESSIVE) && !hwFuseSts.jpegProgSupportFuse)
948 dec->jpegSupport = JPEG_BASELINE;
949 if (!hwFuseSts.mpeg2SupportFuse) dec->mpeg2Support = MPEG2_NOT_SUPPORTED;
950 if (!hwFuseSts.vc1SupportFuse) dec->vc1Support = VC1_NOT_SUPPORTED;
951 if (!hwFuseSts.vp6SupportFuse) dec->vp6Support = VP6_NOT_SUPPORTED;
952 if (!hwFuseSts.vp7SupportFuse) dec->vp7Support = VP7_NOT_SUPPORTED;
953 if (!hwFuseSts.vp8SupportFuse) dec->vp8Support = VP8_NOT_SUPPORTED;
954 if (!hwFuseSts.ppSupportFuse) dec->ppSupport = PP_NOT_SUPPORTED;
956 /* check the pp config vs fuse status */
957 if ((dec->ppConfig & 0xFC000000) && ((hwFuseSts.ppConfigFuse & 0xF0000000) >> 5)) {
958 u32 deInterlace = ((dec->ppConfig & PP_DEINTERLACING) >> 25);
959 u32 alphaBlend = ((dec->ppConfig & PP_ALPHA_BLENDING) >> 24);
960 u32 deInterlaceFuse = (((hwFuseSts.ppConfigFuse >> 5) & PP_DEINTERLACING) >> 25);
961 u32 alphaBlendFuse = (((hwFuseSts.ppConfigFuse >> 5) & PP_ALPHA_BLENDING) >> 24);
963 if (deInterlace && !deInterlaceFuse) dec->ppConfig &= 0xFD000000;
964 if (alphaBlend && !alphaBlendFuse) dec->ppConfig &= 0xFE000000;
966 if (!hwFuseSts.sorensonSparkSupportFuse) dec->sorensonSparkSupport = SORENSON_SPARK_NOT_SUPPORTED;
967 if (!hwFuseSts.refBufSupportFuse) dec->refBufSupport = REF_BUF_NOT_SUPPORTED;
968 if (!hwFuseSts.rvSupportFuse) dec->rvSupport = RV_NOT_SUPPORTED;
969 if (!hwFuseSts.avsSupportFuse) dec->avsSupport = AVS_NOT_SUPPORTED;
970 if (!hwFuseSts.mvcSupportFuse) dec->mvcSupport = MVC_NOT_SUPPORTED;
973 configReg = enc_dev.hwregs[63];
974 enc->maxEncodedWidth = configReg & ((1 << 11) - 1);
975 enc->h264Enabled = (configReg >> 27) & 1;
976 enc->mpeg4Enabled = (configReg >> 26) & 1;
977 enc->jpegEnabled = (configReg >> 25) & 1;
978 enc->vsEnabled = (configReg >> 24) & 1;
979 enc->rgbEnabled = (configReg >> 28) & 1;
980 enc->busType = (configReg >> 20) & 15;
981 enc->synthesisLanguage = (configReg >> 16) & 15;
982 enc->busWidth = (configReg >> 12) & 15;
985 static irqreturn_t vdpu_isr(int irq, void *dev_id)
987 vpu_device *dev = (vpu_device *) dev_id;
988 u32 irq_status_dec = readl(dev->hwregs + DEC_INTERRUPT_REGISTER);
989 u32 irq_status_pp = readl(dev->hwregs + PP_INTERRUPT_REGISTER);
991 pr_debug("vdpu_isr dec %x pp %x\n", irq_status_dec, irq_status_pp);
993 if (irq_status_dec & DEC_INTERRUPT_BIT) {
994 irq_status_dec = readl(dev->hwregs + DEC_INTERRUPT_REGISTER);
995 if ((irq_status_dec & 0x40001) == 0x40001)
998 irq_status_dec = readl(dev->hwregs + DEC_INTERRUPT_REGISTER);
999 } while ((irq_status_dec & 0x40001) == 0x40001);
1002 writel(irq_status_dec & (~DEC_INTERRUPT_BIT), dev->hwregs + DEC_INTERRUPT_REGISTER);
1003 pr_debug("DEC IRQ received!\n");
1004 atomic_sub(1, &service.total_running);
1005 if (NULL == service.reg_codec) {
1006 pr_err("dec isr with no task waiting\n");
1008 reg_from_run_to_done(service.reg_codec);
1012 if (irq_status_pp & PP_INTERRUPT_BIT) {
1014 writel(irq_status_pp & (~DEC_INTERRUPT_BIT), dev->hwregs + PP_INTERRUPT_REGISTER);
1015 pr_debug("PP IRQ received!\n");
1016 atomic_sub(1, &service.total_running);
1017 if (NULL == service.reg_pproc) {
1018 pr_err("pp isr with no task waiting\n");
1020 reg_from_run_to_done(service.reg_pproc);
1027 static irqreturn_t vepu_isr(int irq, void *dev_id)
1029 struct vpu_device *dev = (struct vpu_device *) dev_id;
1030 u32 irq_status = readl(dev->hwregs + ENC_INTERRUPT_REGISTER);
1032 pr_debug("enc_isr\n");
1034 if (likely(irq_status & ENC_INTERRUPT_BIT)) {
1036 writel(irq_status & (~ENC_INTERRUPT_BIT), dev->hwregs + ENC_INTERRUPT_REGISTER);
1037 pr_debug("ENC IRQ received!\n");
1038 atomic_sub(1, &service.total_running);
1039 if (NULL == service.reg_codec) {
1040 pr_err("enc isr with no task waiting\n");
1042 reg_from_run_to_done(service.reg_codec);
1049 static int __init vpu_service_init(void)
1053 pr_debug("baseaddr = 0x%08x vdpu irq = %d vepu irq = %d\n", RK29_VCODEC_PHYS, IRQ_VDPU, IRQ_VEPU);
1055 dec_dev.iobaseaddr = RK29_VCODEC_PHYS + 0x200;
1056 dec_dev.iosize = DEC_IO_SIZE;
1057 enc_dev.iobaseaddr = RK29_VCODEC_PHYS;
1058 enc_dev.iosize = ENC_IO_SIZE;
1060 INIT_LIST_HEAD(&service.waiting);
1061 INIT_LIST_HEAD(&service.running);
1062 INIT_LIST_HEAD(&service.done);
1063 INIT_LIST_HEAD(&service.session);
1064 spin_lock_init(&service.lock);
1065 service.reg_codec = NULL;
1066 service.reg_pproc = NULL;
1067 atomic_set(&service.total_running, 0);
1068 service.enabled = false;
1071 vpu_service_power_on();
1073 ret = vpu_service_reserve_io();
1075 pr_err("reserve io failed\n");
1076 goto err_reserve_io;
1079 /* get the IRQ line */
1080 ret = request_irq(IRQ_VDPU, vdpu_isr, IRQF_SHARED, "vdpu", (void *)&dec_dev);
1082 pr_err("can't request vdpu irq %d\n", IRQ_VDPU);
1083 goto err_req_vdpu_irq;
1086 ret = request_irq(IRQ_VEPU, vepu_isr, IRQF_SHARED, "vepu", (void *)&enc_dev);
1088 pr_err("can't request vepu irq %d\n", IRQ_VEPU);
1089 goto err_req_vepu_irq;
1092 ret = misc_register(&vpu_service_misc_device);
1094 pr_err("misc_register failed\n");
1098 platform_device_register(&vpu_service_device);
1099 platform_driver_probe(&vpu_service_driver, NULL);
1101 del_timer(&service.timer);
1102 vpu_service_power_off();
1103 pr_info("init success\n");
1108 free_irq(IRQ_VEPU, (void *)&enc_dev);
1110 free_irq(IRQ_VDPU, (void *)&dec_dev);
1112 pr_info("init failed\n");
1114 del_timer(&service.timer);
1115 vpu_service_power_off();
1116 vpu_service_release_io();
1118 pr_info("init failed\n");
1122 static void __exit vpu_service_exit(void)
1124 del_timer(&service.timer);
1125 vpu_service_power_off();
1126 platform_device_unregister(&vpu_service_device);
1127 platform_driver_unregister(&vpu_service_driver);
1128 misc_deregister(&vpu_service_misc_device);
1129 free_irq(IRQ_VEPU, (void *)&enc_dev);
1130 free_irq(IRQ_VDPU, (void *)&dec_dev);
1134 module_init(vpu_service_init);
1135 module_exit(vpu_service_exit);
1136 MODULE_LICENSE("GPL");
1138 #ifdef CONFIG_PROC_FS
1139 #include <linux/proc_fs.h>
1140 #include <linux/seq_file.h>
1142 static int proc_vpu_service_show(struct seq_file *s, void *v)
1146 vpu_reg *reg, *reg_tmp;
1147 vpu_session *session, *session_tmp;
1149 vpu_service_power_on();
1150 seq_printf(s, "\nENC Registers:\n");
1151 n = enc_dev.iosize >> 2;
1152 for (i = 0; i < n; i++) {
1153 seq_printf(s, "\tswreg%d = %08X\n", i, readl(enc_dev.hwregs + i));
1155 seq_printf(s, "\nDEC Registers:\n");
1156 n = dec_dev.iosize >> 2;
1157 for (i = 0; i < n; i++) {
1158 seq_printf(s, "\tswreg%d = %08X\n", i, readl(dec_dev.hwregs + i));
1161 seq_printf(s, "\nvpu service status:\n");
1162 spin_lock_irqsave(&service.lock, flag);
1163 list_for_each_entry_safe(session, session_tmp, &service.session, list_session) {
1164 seq_printf(s, "session pid %d type %d:\n", session->pid, session->type);
1165 //seq_printf(s, "waiting reg set %d\n");
1166 list_for_each_entry_safe(reg, reg_tmp, &session->waiting, session_link) {
1167 seq_printf(s, "waiting register set\n");
1169 list_for_each_entry_safe(reg, reg_tmp, &session->running, session_link) {
1170 seq_printf(s, "running register set\n");
1172 list_for_each_entry_safe(reg, reg_tmp, &session->done, session_link) {
1173 seq_printf(s, "done register set\n");
1176 spin_unlock_irqrestore(&service.lock, flag);
1181 static int proc_vpu_service_open(struct inode *inode, struct file *file)
1183 return single_open(file, proc_vpu_service_show, NULL);
1186 static const struct file_operations proc_vpu_service_fops = {
1187 .open = proc_vpu_service_open,
1189 .llseek = seq_lseek,
1190 .release = single_release,
1193 static int __init vpu_service_proc_init(void)
1195 proc_create("vpu_service", 0, NULL, &proc_vpu_service_fops);
1199 late_initcall(vpu_service_proc_init);
1200 #endif /* CONFIG_PROC_FS */