arch/arm/mach-rk29/vpu_service.c

   1 /* arch/arm/mach-rk29/vpu.c
   2  *
   3  * Copyright (C) 2010 ROCKCHIP, Inc.
   4  * author: chenhengming chm@rock-chips.com
   5  *
   6  * This software is licensed under the terms of the GNU General Public
   7  * License version 2, as published by the Free Software Foundation, and
   8  * may be copied, distributed, and modified under those terms.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  */
  16
  17 #ifdef CONFIG_RK29_VPU_DEBUG
  18 #define DEBUG
  19 #define pr_fmt(fmt) "VPU_SERVICE: %s: " fmt, __func__
  20 #else
  21 #define pr_fmt(fmt) "VPU_SERVICE: " fmt
  22 #endif
  23
  24
  25 #include <linux/clk.h>
  26 #include <linux/delay.h>
  27 #include <linux/init.h>
  28 #include <linux/interrupt.h>
  29 #include <linux/io.h>
  30 #include <linux/kernel.h>
  31 #include <linux/module.h>
  32 #include <linux/fs.h>
  33 #include <linux/ioport.h>
  34 #include <linux/miscdevice.h>
  35 #include <linux/mm.h>
  36 #include <linux/poll.h>
  37 #include <linux/platform_device.h>
  38 #include <linux/timer.h>
  39
  40 #include <asm/uaccess.h>
  41
  42 #include <mach/irqs.h>
  43 #include <mach/vpu_service.h>
  44 #include <mach/rk29_iomap.h>
  45 #include <mach/pmu.h>
  46 #include <mach/cru.h>
  47
  48
  49 #define DEC_INTERRUPT_REGISTER                  1
  50 #define PP_INTERRUPT_REGISTER                   60
  51 #define ENC_INTERRUPT_REGISTER                  1
  52
  53 #define DEC_INTERRUPT_BIT                        0x100
  54 #define PP_INTERRUPT_BIT                         0x100
  55 #define ENC_INTERRUPT_BIT                        0x1
  56
  57 #define REG_NUM_DEC                             (60)
  58 #define REG_NUM_PP                              (41)
  59 #define REG_NUM_ENC                             (96)
  60 #define REG_NUM_DEC_PP                          (REG_NUM_DEC+REG_NUM_PP)
  61 #define SIZE_REG(reg)                           ((reg)*4)
  62
  63 #define DEC_IO_SIZE                             ((100 + 1) * 4) /* bytes */
  64 #define ENC_IO_SIZE                             (96 * 4)        /* bytes */
  65 static const u16 dec_hw_ids[] = { 0x8190, 0x8170, 0x9170, 0x9190, 0x6731 };
  66 static const u16 enc_hw_ids[] = { 0x6280, 0x7280, 0x8270 };
  67
  68 #define VPU_REG_EN_ENC                          14
  69 #define VPU_REG_ENC_GATE                        2
  70 #define VPU_REG_ENC_GATE_BIT                    (1<<4)
  71
  72 #define VPU_REG_EN_DEC                          1
  73 #define VPU_REG_DEC_GATE                        2
  74 #define VPU_REG_DEC_GATE_BIT                    (1<<10)
  75 #define VPU_REG_EN_PP                           0
  76 #define VPU_REG_PP_GATE                         1
  77 #define VPU_REG_PP_GATE_BIT                     (1<<8)
  78 #define VPU_REG_EN_DEC_PP                       1
  79 #define VPU_REG_DEC_PP_GATE                     61
  80 #define VPU_REG_DEC_PP_GATE_BIT                 (1<<8)
  81
  82
  83 /**
  84  * struct for process session which connect to vpu
  85  *
  86  * @author ChenHengming (2011-5-3)
  87  */
  88 typedef struct vpu_session {
  89         VPU_CLIENT_TYPE         type;
  90         /* a linked list of data so we can access them for debugging */
  91         struct list_head        list_session;
  92         /* a linked list of register data waiting for process */
  93         struct list_head        waiting;
  94         /* a linked list of register data in processing */
  95         struct list_head        running;
  96         /* a linked list of register data processed */
  97         struct list_head        done;
  98         wait_queue_head_t       wait;
  99         pid_t                   pid;
 100 } vpu_session;
 101
 102 /**
 103  * struct for process register set
 104  *
 105  * @author ChenHengming (2011-5-4)
 106  */
 107 typedef struct vpu_reg {
 108         VPU_CLIENT_TYPE         type;
 109         vpu_session             *session;
 110         struct list_head        session_link;           /* link to vpu service session */
 111         struct list_head        status_link;            /* link to register set list */
 112         unsigned long           size;
 113         unsigned long           reg[VPU_REG_NUM_DEC_PP];
 114 } vpu_reg;
 115
 116 typedef struct vpu_device {
 117         unsigned long           iobaseaddr;
 118         unsigned int            iosize;
 119         volatile u32            *hwregs;
 120 } vpu_device;
 121
 122 typedef struct vpu_service_info {
 123         spinlock_t              lock;
 124         struct timer_list       timer;                  /* timer for power off */
 125         struct list_head        waiting;                /* link to link_reg in struct vpu_reg */
 126         struct list_head        running;                /* link to link_reg in struct vpu_reg */
 127         struct list_head        done;                   /* link to link_reg in struct vpu_reg */
 128         struct list_head        session;                /* link to list_session in struct vpu_session */
 129         atomic_t                task_running;
 130         bool                    enabled;
 131         vpu_reg                 *reg_codec;
 132         vpu_reg                 *reg_pproc;
 133         vpu_reg                 *reg_resev;
 134         VPUHwDecConfig_t        dec_config;
 135         VPUHwEncConfig_t        enc_config;
 136 } vpu_service_info;
 137
 138 typedef struct vpu_request
 139 {
 140         unsigned long   *req;
 141         unsigned long   size;
 142 } vpu_request;
 143
 144 static struct clk *aclk_vepu;
 145 static struct clk *hclk_vepu;
 146 static struct clk *aclk_ddr_vepu;
 147 static struct clk *hclk_cpu_vcodec;
 148 static vpu_service_info service;
 149 static vpu_device       dec_dev;
 150 static vpu_device       enc_dev;
 151
 152 #define POWER_OFF_DELAY 4*HZ /* 4s */
 153 #define TIMEOUT_DELAY   2*HZ /* 2s */
 154
 155 static void vpu_get_clk(void)
 156 {
 157         aclk_vepu       = clk_get(NULL, "aclk_vepu");
 158         hclk_vepu       = clk_get(NULL, "hclk_vepu");
 159         aclk_ddr_vepu   = clk_get(NULL, "aclk_ddr_vepu");
 160         hclk_cpu_vcodec = clk_get(NULL, "hclk_cpu_vcodec");
 161 }
 162
 163 static void vpu_put_clk(void)
 164 {
 165         clk_put(aclk_vepu);
 166         clk_put(hclk_vepu);
 167         clk_put(aclk_ddr_vepu);
 168         clk_put(hclk_cpu_vcodec);
 169 }
 170
 171 static void vpu_service_power_off(void)
 172 {
 173         if (!service.enabled)
 174                 return;
 175
 176         service.enabled = false;
 177         printk("vpu: power off\n");
 178
 179         while(atomic_read(&service.task_running)) {
 180                 pr_alert("power off when task running!!\n");
 181                 udelay(10);
 182         }
 183
 184         pmu_set_power_domain(PD_VCODEC, false);
 185         udelay(10);
 186         clk_disable(hclk_cpu_vcodec);
 187         clk_disable(aclk_ddr_vepu);
 188         clk_disable(hclk_vepu);
 189         clk_disable(aclk_vepu);
 190 }
 191
 192 static void vpu_service_power_off_work_func(unsigned long data)
 193 {
 194         printk("vpu: delayed power off work\n");
 195         vpu_service_power_off();
 196 }
 197
 198 static void vpu_service_power_on(void)
 199 {
 200         if (service.enabled) {
 201                 mod_timer(&service.timer, jiffies + POWER_OFF_DELAY);
 202                 return;
 203         }
 204         service.enabled = true;
 205         printk("vpu: power on\n");
 206
 207         clk_enable(aclk_vepu);
 208         clk_enable(hclk_vepu);
 209         clk_enable(hclk_cpu_vcodec);
 210         udelay(10);
 211         pmu_set_power_domain(PD_VCODEC, true);
 212         udelay(10);
 213         clk_enable(aclk_ddr_vepu);
 214         init_timer(&service.timer);
 215         service.timer.expires = jiffies + POWER_OFF_DELAY;
 216         service.timer.function = vpu_service_power_off_work_func;
 217         add_timer(&service.timer);
 218 }
 219
 220 static vpu_reg *reg_init(vpu_session *session, void __user *src, unsigned long size)
 221 {
 222         unsigned long flag;
 223         vpu_reg *reg = kmalloc(sizeof(vpu_reg), GFP_KERNEL);
 224         if (NULL == reg) {
 225                 pr_err("kmalloc fail in reg_init\n");
 226                 return NULL;
 227         }
 228
 229         reg->session = session;
 230         reg->type = session->type;
 231         reg->size = size;
 232         INIT_LIST_HEAD(&reg->session_link);
 233         INIT_LIST_HEAD(&reg->status_link);
 234
 235         if (copy_from_user(&reg->reg[0], (void __user *)src, size)) {
 236                 pr_err("copy_from_user failed in reg_init\n");
 237                 kfree(reg);
 238                 return NULL;
 239         }
 240
 241         spin_lock_irqsave(&service.lock, flag);
 242         list_add_tail(&reg->status_link, &service.waiting);
 243         list_add_tail(&reg->session_link, &session->waiting);
 244         spin_unlock_irqrestore(&service.lock, flag);
 245
 246         return reg;
 247 }
 248
 249 static void reg_deinit(vpu_reg *reg)
 250 {
 251         list_del_init(&reg->session_link);
 252         list_del_init(&reg->status_link);
 253         kfree(reg);
 254         if (reg == service.reg_codec) service.reg_codec = NULL;
 255         if (reg == service.reg_pproc) service.reg_pproc = NULL;
 256 }
 257
 258 static void reg_from_wait_to_run(vpu_reg *reg)
 259 {
 260         list_del_init(&reg->status_link);
 261         list_add_tail(&reg->status_link, &service.running);
 262
 263         list_del_init(&reg->session_link);
 264         list_add_tail(&reg->session_link, &reg->session->running);
 265 }
 266
 267 static void reg_copy_from_hw(vpu_reg *reg, volatile u32 *src, u32 count)
 268 {
 269         int i;
 270         u32 *dst = (u32 *)&reg->reg[0];
 271         for (i = 0; i < count; i++)
 272                 *dst++ = *src++;
 273 }
 274
 275 static void reg_from_run_to_done(vpu_reg *reg)
 276 {
 277         spin_lock(&service.lock);
 278         list_del_init(&reg->status_link);
 279         list_add_tail(&reg->status_link, &service.done);
 280
 281         list_del_init(&reg->session_link);
 282         list_add_tail(&reg->session_link, &reg->session->done);
 283
 284         switch (reg->type) {
 285         case VPU_ENC : {
 286                 service.reg_codec = NULL;
 287                 reg_copy_from_hw(reg, enc_dev.hwregs, REG_NUM_ENC);
 288                 break;
 289         }
 290         case VPU_DEC : {
 291                 service.reg_codec = NULL;
 292                 reg_copy_from_hw(reg, dec_dev.hwregs, REG_NUM_DEC);
 293                 break;
 294         }
 295         case VPU_PP : {
 296                 service.reg_pproc = NULL;
 297                 reg_copy_from_hw(reg, dec_dev.hwregs + PP_INTERRUPT_REGISTER, REG_NUM_PP);
 298                 dec_dev.hwregs[PP_INTERRUPT_REGISTER] = 0;
 299                 break;
 300         }
 301         case VPU_DEC_PP : {
 302                 service.reg_codec = NULL;
 303                 service.reg_pproc = NULL;
 304                 reg_copy_from_hw(reg, dec_dev.hwregs, REG_NUM_DEC_PP);
 305                 dec_dev.hwregs[PP_INTERRUPT_REGISTER] = 0;
 306                 break;
 307         }
 308         default : {
 309                 pr_err("copy reg from hw with unknown type %d\n", reg->type);
 310                 break;
 311         }
 312         }
 313         wake_up_interruptible_sync(&reg->session->wait);
 314         spin_unlock(&service.lock);
 315 }
 316
 317 void reg_copy_to_hw(vpu_reg *reg)
 318 {
 319         int i;
 320         u32 *src = (u32 *)&reg->reg[0];
 321         atomic_add(1, &service.task_running);
 322         switch (reg->type) {
 323         case VPU_ENC : {
 324                 u32 *dst = (u32 *)enc_dev.hwregs;
 325                 service.reg_codec = reg;
 326
 327                 dst[VPU_REG_EN_ENC] = src[VPU_REG_EN_ENC] & 0x6;
 328
 329                 for (i = 0; i < VPU_REG_EN_ENC; i++)
 330                         dst[i] = src[i];
 331
 332                 for (i = VPU_REG_EN_ENC + 1; i < REG_NUM_ENC; i++)
 333                         dst[i] = src[i];
 334
 335                 dsb();
 336
 337                 dst[VPU_REG_ENC_GATE] = src[VPU_REG_ENC_GATE] | VPU_REG_ENC_GATE_BIT;
 338                 dst[VPU_REG_EN_ENC]   = src[VPU_REG_EN_ENC];
 339         } break;
 340         case VPU_DEC : {
 341                 u32 *dst = (u32 *)dec_dev.hwregs;
 342                 service.reg_codec = reg;
 343
 344                 for (i = REG_NUM_DEC - 1; i > VPU_REG_DEC_GATE; i--)
 345                         dst[i] = src[i];
 346
 347                 dsb();
 348
 349                 dst[VPU_REG_DEC_GATE] = src[VPU_REG_DEC_GATE] | VPU_REG_DEC_GATE_BIT;
 350                 dst[VPU_REG_EN_DEC]   = src[VPU_REG_EN_DEC];
 351         } break;
 352         case VPU_PP : {
 353                 u32 *dst = (u32 *)dec_dev.hwregs + PP_INTERRUPT_REGISTER;
 354                 service.reg_pproc = reg;
 355
 356                 dst[VPU_REG_PP_GATE] = src[VPU_REG_PP_GATE] | VPU_REG_PP_GATE_BIT;
 357
 358                 for (i = VPU_REG_PP_GATE + 1; i < REG_NUM_PP; i++)
 359                         dst[i] = src[i];
 360
 361                 dsb();
 362
 363                 dst[VPU_REG_EN_PP] = src[VPU_REG_EN_PP];
 364         } break;
 365         case VPU_DEC_PP : {
 366                 u32 *dst = (u32 *)dec_dev.hwregs;
 367                 service.reg_codec = reg;
 368                 service.reg_pproc = reg;
 369
 370                 for (i = VPU_REG_EN_DEC_PP + 1; i < REG_NUM_DEC_PP; i++)
 371                         dst[i] = src[i];
 372
 373                 dst[VPU_REG_EN_DEC_PP]   = src[VPU_REG_EN_DEC_PP] | 0x2;
 374                 dsb();
 375
 376                 dst[VPU_REG_DEC_PP_GATE] = src[VPU_REG_DEC_PP_GATE] | VPU_REG_PP_GATE_BIT;
 377                 dst[VPU_REG_DEC_GATE]    = src[VPU_REG_DEC_GATE]    | VPU_REG_DEC_GATE_BIT;
 378                 dst[VPU_REG_EN_DEC]      = src[VPU_REG_EN_DEC];
 379         } break;
 380         default : {
 381                 pr_err("unsupport session type %d", reg->type);
 382                 atomic_sub(1, &service.task_running);
 383                 break;
 384         }
 385         }
 386 }
 387
 388 static void try_set_reg(void)
 389 {
 390         unsigned long flag;
 391         // first get reg from reg list
 392         spin_lock_irqsave(&service.lock, flag);
 393         if (!list_empty(&service.waiting)) {
 394                 vpu_reg *reg = list_entry(service.waiting.next, vpu_reg, status_link);
 395
 396                 if (((VPU_DEC_PP == reg->type) && (NULL == service.reg_codec) && (NULL == service.reg_pproc)) ||
 397                     ((VPU_DEC == reg->type) && (NULL == service.reg_codec)) ||
 398                     ((VPU_PP  == reg->type) && (NULL == service.reg_pproc)) ||
 399                     ((VPU_ENC == reg->type) && (NULL == service.reg_codec))) {
 400                         reg_from_wait_to_run(reg);
 401                         vpu_service_power_on();
 402                         reg_copy_to_hw(reg);
 403                 }
 404         }
 405         spin_unlock_irqrestore(&service.lock, flag);
 406 }
 407
 408 static int return_reg(vpu_reg *reg, u32 __user *dst)
 409 {
 410         int ret = 0;
 411         switch (reg->type) {
 412         case VPU_ENC : {
 413                 if (copy_to_user(dst, &reg->reg[0], SIZE_REG(REG_NUM_ENC)))
 414                         ret = -EFAULT;
 415                 break;
 416         }
 417         case VPU_DEC : {
 418                 if (copy_to_user(dst, &reg->reg[0], SIZE_REG(REG_NUM_DEC)))
 419                         ret = -EFAULT;
 420                 break;
 421         }
 422         case VPU_PP : {
 423                 if (copy_to_user(dst, &reg->reg[0], SIZE_REG(REG_NUM_PP)))
 424                         ret = -EFAULT;
 425                 break;
 426         }
 427         case VPU_DEC_PP : {
 428                 if (copy_to_user(dst, &reg->reg[0], SIZE_REG(REG_NUM_DEC_PP)))
 429                         ret = -EFAULT;
 430                 break;
 431         }
 432         default : {
 433                 ret = -EFAULT;
 434                 pr_err("copy reg to user with unknown type %d\n", reg->type);
 435                 break;
 436         }
 437         }
 438         reg_deinit(reg);
 439         return ret;
 440 }
 441
 442 static long vpu_service_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
 443 {
 444         vpu_session *session = (vpu_session *)filp->private_data;
 445         if (NULL == session) {
 446                 return -EINVAL;
 447         }
 448
 449         switch (cmd) {
 450         case VPU_IOC_SET_CLIENT_TYPE : {
 451         session->type = (VPU_CLIENT_TYPE)arg;
 452                 break;
 453         }
 454         case VPU_IOC_GET_HW_FUSE_STATUS : {
 455                 vpu_request req;
 456                 if (copy_from_user(&req, (void __user *)arg, sizeof(vpu_request))) {
 457                         pr_err("VPU_IOC_GET_HW_FUSE_STATUS copy_from_user failed\n");
 458                         return -EFAULT;
 459                 } else {
 460                         if (VPU_ENC != session->type) {
 461                                 if (copy_to_user((void __user *)req.req, &service.dec_config, sizeof(VPUHwDecConfig_t))) {
 462                                         pr_err("VPU_IOC_GET_HW_FUSE_STATUS copy_to_user failed type %d\n", session->type);
 463                                         return -EFAULT;
 464                                 }
 465                         } else {
 466                                 if (copy_to_user((void __user *)req.req, &service.enc_config, sizeof(VPUHwEncConfig_t))) {
 467                                         pr_err("VPU_IOC_GET_HW_FUSE_STATUS copy_to_user failed type %d\n", session->type);
 468                                         return -EFAULT;
 469                                 }
 470                         }
 471                 }
 472
 473                 break;
 474         }
 475         case VPU_IOC_SET_REG : {
 476                 vpu_request req;
 477                 vpu_reg *reg;
 478                 if (copy_from_user(&req, (void __user *)arg, sizeof(vpu_request))) {
 479                         pr_err("VPU_IOC_SET_REG copy_from_user failed\n");
 480                         return -EFAULT;
 481                 }
 482
 483                 reg = reg_init(session, (void __user *)req.req, req.size);
 484                 if (NULL == reg) {
 485                         return -EFAULT;
 486                 } else {
 487                         try_set_reg();
 488                 }
 489
 490                 break;
 491         }
 492         case VPU_IOC_GET_REG : {
 493                 vpu_request req;
 494                 vpu_reg *reg;
 495                 if (copy_from_user(&req, (void __user *)arg, sizeof(vpu_request))) {
 496                         pr_err("VPU_IOC_GET_REG copy_from_user failed\n");
 497                         return -EFAULT;
 498                 } else {
 499                         int ret = wait_event_interruptible_timeout(session->wait, !list_empty(&session->done), TIMEOUT_DELAY);
 500                         if (unlikely(ret < 0)) {
 501                                 pr_err("pid %d wait task ret %d\n", session->pid, ret);
 502                                 return ret;
 503                         } else if (0 == ret) {
 504                                 pr_err("pid %d wait task done timeout\n", session->pid);
 505                                 return -ETIMEDOUT;
 506                         }
 507                 }
 508                 {
 509                         unsigned long flag;
 510                         spin_lock_irqsave(&service.lock, flag);
 511                         reg = list_entry(session->done.next, vpu_reg, session_link);
 512                         return_reg(reg, (u32 __user *)req.req);
 513                         spin_unlock_irqrestore(&service.lock, flag);
 514                 }
 515                 break;
 516         }
 517         default : {
 518                 pr_err("unknow vpu service ioctl cmd %x\n", cmd);
 519                 break;
 520         }
 521         }
 522
 523         return 0;
 524 }
 525
 526 static int vpu_service_check_hw_id(struct vpu_device * dev, const u16 *hwids, size_t num)
 527 {
 528         u32 hwid = readl(dev->hwregs);
 529         pr_info("HW ID = 0x%08x\n", hwid);
 530
 531         hwid = (hwid >> 16) & 0xFFFF;   /* product version only */
 532
 533         while (num--) {
 534                 if (hwid == hwids[num]) {
 535                         pr_info("Compatible HW found at 0x%08lx\n", dev->iobaseaddr);
 536                         return 1;
 537                 }
 538         }
 539
 540         pr_info("No Compatible HW found at 0x%08lx\n", dev->iobaseaddr);
 541         return 0;
 542 }
 543
 544 static void vpu_service_release_io(void)
 545 {
 546         if (dec_dev.hwregs)
 547                 iounmap((void *)dec_dev.hwregs);
 548         release_mem_region(dec_dev.iobaseaddr, dec_dev.iosize);
 549
 550         if (enc_dev.hwregs)
 551                 iounmap((void *)enc_dev.hwregs);
 552         release_mem_region(enc_dev.iobaseaddr, enc_dev.iosize);
 553 }
 554
 555 static int vpu_service_reserve_io(void)
 556 {
 557         unsigned long iobaseaddr;
 558         unsigned long iosize;
 559
 560         iobaseaddr      = dec_dev.iobaseaddr;
 561         iosize          = dec_dev.iosize;
 562
 563         if (!request_mem_region(iobaseaddr, iosize, "vdpu_io")) {
 564                 pr_info("failed to reserve dec HW regs\n");
 565                 return -EBUSY;
 566         }
 567
 568         dec_dev.hwregs = (volatile u32 *)ioremap_nocache(iobaseaddr, iosize);
 569
 570         if (dec_dev.hwregs == NULL) {
 571                 pr_info("failed to ioremap dec HW regs\n");
 572                 goto err;
 573         }
 574
 575         /* check for correct HW */
 576         if (!vpu_service_check_hw_id(&dec_dev, dec_hw_ids, ARRAY_SIZE(dec_hw_ids))) {
 577                 goto err;
 578         }
 579
 580         iobaseaddr      = enc_dev.iobaseaddr;
 581         iosize          = enc_dev.iosize;
 582
 583         if (!request_mem_region(iobaseaddr, iosize, "hx280enc")) {
 584                 pr_info("failed to reserve enc HW regs\n");
 585                 goto err;
 586         }
 587
 588         enc_dev.hwregs = (volatile u32 *)ioremap_nocache(iobaseaddr, iosize);
 589
 590         if (enc_dev.hwregs == NULL) {
 591                 pr_info("failed to ioremap enc HW regs\n");
 592                 goto err;
 593         }
 594
 595         /* check for correct HW */
 596         if (!vpu_service_check_hw_id(&enc_dev, enc_hw_ids, ARRAY_SIZE(enc_hw_ids))) {
 597                 goto err;
 598         }
 599         return 0;
 600
 601 err:
 602         vpu_service_release_io();
 603         return -EBUSY;
 604 }
 605
 606 static int vpu_service_open(struct inode *inode, struct file *filp)
 607 {
 608         vpu_session *session = (vpu_session *)kmalloc(sizeof(vpu_session), GFP_KERNEL);
 609         if (NULL == session) {
 610                 pr_err("unable to allocate memory for vpu_session.");
 611                 return -ENOMEM;
 612         }
 613
 614         session->type   = VPU_TYPE_BUTT;
 615         session->pid    = current->pid;
 616         INIT_LIST_HEAD(&session->waiting);
 617         INIT_LIST_HEAD(&session->running);
 618         INIT_LIST_HEAD(&session->done);
 619         INIT_LIST_HEAD(&session->list_session);
 620         init_waitqueue_head(&session->wait);
 621         /* no need to protect */
 622         list_add_tail(&session->list_session, &service.session);
 623         filp->private_data = (void *)session;
 624
 625         pr_debug("dev opened\n");
 626         return nonseekable_open(inode, filp);
 627 }
 628
 629 static int vpu_service_release(struct inode *inode, struct file *filp)
 630 {
 631         unsigned long flag;
 632         vpu_session *session = (vpu_session *)filp->private_data;
 633         if (NULL == session)
 634                 return -EINVAL;
 635
 636         wake_up_interruptible_sync(&session->wait);
 637
 638         msleep(50);
 639         /* remove this filp from the asynchronusly notified filp's */
 640         //vpu_service_fasync(-1, filp, 0);
 641         list_del(&session->list_session);
 642
 643         spin_lock_irqsave(&service.lock, flag);
 644         {
 645         vpu_reg *reg, *n;
 646         list_for_each_entry_safe(reg, n, &session->waiting, session_link) {
 647                 reg_deinit(reg);
 648         }
 649         list_for_each_entry_safe(reg, n, &session->running, session_link) {
 650                 reg_deinit(reg);
 651         }
 652         list_for_each_entry_safe(reg, n, &session->done, session_link) {
 653                 reg_deinit(reg);
 654         }
 655         }
 656         spin_unlock_irqrestore(&service.lock, flag);
 657
 658         kfree(session);
 659
 660         pr_debug("dev closed\n");
 661         return 0;
 662 }
 663
 664 static const struct file_operations vpu_service_fops = {
 665         .unlocked_ioctl = vpu_service_ioctl,
 666         .open           = vpu_service_open,
 667         .release        = vpu_service_release,
 668         //.fasync       = vpu_service_fasync,
 669 };
 670
 671 static struct miscdevice vpu_service_misc_device = {
 672         .minor          = MISC_DYNAMIC_MINOR,
 673         .name           = "vpu_service",
 674         .fops           = &vpu_service_fops,
 675 };
 676
 677 static void vpu_service_shutdown(struct platform_device *pdev)
 678 {
 679         pr_cont("shutdown...");
 680         del_timer(&service.timer);
 681         vpu_service_power_off();
 682         pr_cont("done\n");
 683 }
 684
 685 static int vpu_service_suspend(struct platform_device *pdev, pm_message_t state)
 686 {
 687         bool enabled;
 688         pr_info("suspend...");
 689         del_timer(&service.timer);
 690         enabled = service.enabled;
 691         vpu_service_power_off();
 692         service.enabled = enabled;
 693         return 0;
 694 }
 695
 696 static int vpu_service_resume(struct platform_device *pdev)
 697 {
 698         pr_info("resume...");
 699         if (service.enabled) {
 700                 service.enabled = false;
 701                 vpu_service_power_on();
 702         }
 703         return 0;
 704 }
 705
 706 static struct platform_device vpu_service_device = {
 707         .name              = "vpu_service",
 708         .id                = -1,
 709 };
 710
 711 static struct platform_driver vpu_service_driver = {
 712         .driver    = {
 713                 .name  = "vpu_service",
 714                 .owner = THIS_MODULE,
 715         },
 716         .shutdown  = vpu_service_shutdown,
 717         .suspend   = vpu_service_suspend,
 718         .resume    = vpu_service_resume,
 719 };
 720
 721 static void get_hw_info(void)
 722 {
 723         VPUHwDecConfig_t *dec = &service.dec_config;
 724         VPUHwEncConfig_t *enc = &service.enc_config;
 725         u32 configReg   = dec_dev.hwregs[VPU_DEC_HWCFG0];
 726         u32 asicID      = dec_dev.hwregs[0];
 727
 728         dec->h264Support    = (configReg >> DWL_H264_E) & 0x3U;
 729         dec->jpegSupport    = (configReg >> DWL_JPEG_E) & 0x01U;
 730         if (dec->jpegSupport && ((configReg >> DWL_PJPEG_E) & 0x01U))
 731                 dec->jpegSupport = JPEG_PROGRESSIVE;
 732         dec->mpeg4Support   = (configReg >> DWL_MPEG4_E) & 0x3U;
 733         dec->vc1Support     = (configReg >> DWL_VC1_E) & 0x3U;
 734         dec->mpeg2Support   = (configReg >> DWL_MPEG2_E) & 0x01U;
 735         dec->sorensonSparkSupport = (configReg >> DWL_SORENSONSPARK_E) & 0x01U;
 736         dec->refBufSupport  = (configReg >> DWL_REF_BUFF_E) & 0x01U;
 737         dec->vp6Support     = (configReg >> DWL_VP6_E) & 0x01U;
 738         dec->maxDecPicWidth = configReg & 0x07FFU;
 739
 740         /* 2nd Config register */
 741         configReg   = dec_dev.hwregs[VPU_DEC_HWCFG1];
 742         if (dec->refBufSupport) {
 743                 if ((configReg >> DWL_REF_BUFF_ILACE_E) & 0x01U)
 744                         dec->refBufSupport |= 2;
 745                 if ((configReg >> DWL_REF_BUFF_DOUBLE_E) & 0x01U)
 746                         dec->refBufSupport |= 4;
 747         }
 748         dec->customMpeg4Support = (configReg >> DWL_MPEG4_CUSTOM_E) & 0x01U;
 749         dec->vp7Support     = (configReg >> DWL_VP7_E) & 0x01U;
 750         dec->vp8Support     = (configReg >> DWL_VP8_E) & 0x01U;
 751         dec->avsSupport     = (configReg >> DWL_AVS_E) & 0x01U;
 752
 753         /* JPEG xtensions */
 754         if (((asicID >> 16) >= 0x8190U) || ((asicID >> 16) == 0x6731U)) {
 755                 dec->jpegESupport = (configReg >> DWL_JPEG_EXT_E) & 0x01U;
 756         } else {
 757                 dec->jpegESupport = JPEG_EXT_NOT_SUPPORTED;
 758         }
 759
 760         if (((asicID >> 16) >= 0x9170U) || ((asicID >> 16) == 0x6731U) ) {
 761                 dec->rvSupport = (configReg >> DWL_RV_E) & 0x03U;
 762         } else {
 763                 dec->rvSupport = RV_NOT_SUPPORTED;
 764         }
 765
 766         dec->mvcSupport = (configReg >> DWL_MVC_E) & 0x03U;
 767
 768         if (dec->refBufSupport && (asicID >> 16) == 0x6731U ) {
 769                 dec->refBufSupport |= 8; /* enable HW support for offset */
 770         }
 771
 772         {
 773         VPUHwFuseStatus_t hwFuseSts;
 774         /* Decoder fuse configuration */
 775         u32 fuseReg = dec_dev.hwregs[VPU_DEC_HW_FUSE_CFG];
 776
 777         hwFuseSts.h264SupportFuse = (fuseReg >> DWL_H264_FUSE_E) & 0x01U;
 778         hwFuseSts.mpeg4SupportFuse = (fuseReg >> DWL_MPEG4_FUSE_E) & 0x01U;
 779         hwFuseSts.mpeg2SupportFuse = (fuseReg >> DWL_MPEG2_FUSE_E) & 0x01U;
 780         hwFuseSts.sorensonSparkSupportFuse = (fuseReg >> DWL_SORENSONSPARK_FUSE_E) & 0x01U;
 781         hwFuseSts.jpegSupportFuse = (fuseReg >> DWL_JPEG_FUSE_E) & 0x01U;
 782         hwFuseSts.vp6SupportFuse = (fuseReg >> DWL_VP6_FUSE_E) & 0x01U;
 783         hwFuseSts.vc1SupportFuse = (fuseReg >> DWL_VC1_FUSE_E) & 0x01U;
 784         hwFuseSts.jpegProgSupportFuse = (fuseReg >> DWL_PJPEG_FUSE_E) & 0x01U;
 785         hwFuseSts.rvSupportFuse = (fuseReg >> DWL_RV_FUSE_E) & 0x01U;
 786         hwFuseSts.avsSupportFuse = (fuseReg >> DWL_AVS_FUSE_E) & 0x01U;
 787         hwFuseSts.vp7SupportFuse = (fuseReg >> DWL_VP7_FUSE_E) & 0x01U;
 788         hwFuseSts.vp8SupportFuse = (fuseReg >> DWL_VP8_FUSE_E) & 0x01U;
 789         hwFuseSts.customMpeg4SupportFuse = (fuseReg >> DWL_CUSTOM_MPEG4_FUSE_E) & 0x01U;
 790         hwFuseSts.mvcSupportFuse = (fuseReg >> DWL_MVC_FUSE_E) & 0x01U;
 791
 792         /* check max. decoder output width */
 793
 794         if (fuseReg & 0x8000U)
 795                 hwFuseSts.maxDecPicWidthFuse = 1920;
 796         else if (fuseReg & 0x4000U)
 797                 hwFuseSts.maxDecPicWidthFuse = 1280;
 798         else if (fuseReg & 0x2000U)
 799                 hwFuseSts.maxDecPicWidthFuse = 720;
 800         else if (fuseReg & 0x1000U)
 801                 hwFuseSts.maxDecPicWidthFuse = 352;
 802         else    /* remove warning */
 803                 hwFuseSts.maxDecPicWidthFuse = 352;
 804
 805         hwFuseSts.refBufSupportFuse = (fuseReg >> DWL_REF_BUFF_FUSE_E) & 0x01U;
 806
 807         /* Pp configuration */
 808         configReg = dec_dev.hwregs[VPU_PP_HW_SYNTH_CFG];
 809
 810         if ((configReg >> DWL_PP_E) & 0x01U) {
 811                 dec->ppSupport = 1;
 812                 dec->maxPpOutPicWidth = configReg & 0x07FFU;
 813                 /*pHwCfg->ppConfig = (configReg >> DWL_CFG_E) & 0x0FU; */
 814                 dec->ppConfig = configReg;
 815         } else {
 816                 dec->ppSupport = 0;
 817                 dec->maxPpOutPicWidth = 0;
 818                 dec->ppConfig = 0;
 819         }
 820
 821         /* check the HW versio */
 822         if (((asicID >> 16) >= 0x8190U) || ((asicID >> 16) == 0x6731U)) {
 823                 /* Pp configuration */
 824                 configReg = dec_dev.hwregs[VPU_DEC_HW_FUSE_CFG];
 825
 826                 if ((configReg >> DWL_PP_E) & 0x01U) {
 827                         /* Pp fuse configuration */
 828                         u32 fuseRegPp = dec_dev.hwregs[VPU_PP_HW_FUSE_CFG];
 829
 830                         if ((fuseRegPp >> DWL_PP_FUSE_E) & 0x01U) {
 831                                 hwFuseSts.ppSupportFuse = 1;
 832                                 /* check max. pp output width */
 833                                 if      (fuseRegPp & 0x8000U) hwFuseSts.maxPpOutPicWidthFuse = 1920;
 834                                 else if (fuseRegPp & 0x4000U) hwFuseSts.maxPpOutPicWidthFuse = 1280;
 835                                 else if (fuseRegPp & 0x2000U) hwFuseSts.maxPpOutPicWidthFuse = 720;
 836                                 else if (fuseRegPp & 0x1000U) hwFuseSts.maxPpOutPicWidthFuse = 352;
 837                                 else                          hwFuseSts.maxPpOutPicWidthFuse = 352;
 838                                 hwFuseSts.ppConfigFuse = fuseRegPp;
 839                         } else {
 840                                 hwFuseSts.ppSupportFuse = 0;
 841                                 hwFuseSts.maxPpOutPicWidthFuse = 0;
 842                                 hwFuseSts.ppConfigFuse = 0;
 843                         }
 844                 } else {
 845                         hwFuseSts.ppSupportFuse = 0;
 846                         hwFuseSts.maxPpOutPicWidthFuse = 0;
 847                         hwFuseSts.ppConfigFuse = 0;
 848                 }
 849
 850                 if (dec->maxDecPicWidth > hwFuseSts.maxDecPicWidthFuse)
 851                         dec->maxDecPicWidth = hwFuseSts.maxDecPicWidthFuse;
 852                 if (dec->maxPpOutPicWidth > hwFuseSts.maxPpOutPicWidthFuse)
 853                         dec->maxPpOutPicWidth = hwFuseSts.maxPpOutPicWidthFuse;
 854                 if (!hwFuseSts.h264SupportFuse) dec->h264Support = H264_NOT_SUPPORTED;
 855                 if (!hwFuseSts.mpeg4SupportFuse) dec->mpeg4Support = MPEG4_NOT_SUPPORTED;
 856                 if (!hwFuseSts.customMpeg4SupportFuse) dec->customMpeg4Support = MPEG4_CUSTOM_NOT_SUPPORTED;
 857                 if (!hwFuseSts.jpegSupportFuse) dec->jpegSupport = JPEG_NOT_SUPPORTED;
 858                 if ((dec->jpegSupport == JPEG_PROGRESSIVE) && !hwFuseSts.jpegProgSupportFuse)
 859                         dec->jpegSupport = JPEG_BASELINE;
 860                 if (!hwFuseSts.mpeg2SupportFuse) dec->mpeg2Support = MPEG2_NOT_SUPPORTED;
 861                 if (!hwFuseSts.vc1SupportFuse) dec->vc1Support = VC1_NOT_SUPPORTED;
 862                 if (!hwFuseSts.vp6SupportFuse) dec->vp6Support = VP6_NOT_SUPPORTED;
 863                 if (!hwFuseSts.vp7SupportFuse) dec->vp7Support = VP7_NOT_SUPPORTED;
 864                 if (!hwFuseSts.vp8SupportFuse) dec->vp8Support = VP8_NOT_SUPPORTED;
 865                 if (!hwFuseSts.ppSupportFuse) dec->ppSupport = PP_NOT_SUPPORTED;
 866
 867                 /* check the pp config vs fuse status */
 868                 if ((dec->ppConfig & 0xFC000000) && ((hwFuseSts.ppConfigFuse & 0xF0000000) >> 5)) {
 869                         u32 deInterlace = ((dec->ppConfig & PP_DEINTERLACING) >> 25);
 870                         u32 alphaBlend  = ((dec->ppConfig & PP_ALPHA_BLENDING) >> 24);
 871                         u32 deInterlaceFuse = (((hwFuseSts.ppConfigFuse >> 5) & PP_DEINTERLACING) >> 25);
 872                         u32 alphaBlendFuse  = (((hwFuseSts.ppConfigFuse >> 5) & PP_ALPHA_BLENDING) >> 24);
 873
 874                         if (deInterlace && !deInterlaceFuse) dec->ppConfig &= 0xFD000000;
 875                         if (alphaBlend && !alphaBlendFuse) dec->ppConfig &= 0xFE000000;
 876                 }
 877                 if (!hwFuseSts.sorensonSparkSupportFuse) dec->sorensonSparkSupport = SORENSON_SPARK_NOT_SUPPORTED;
 878                 if (!hwFuseSts.refBufSupportFuse)   dec->refBufSupport = REF_BUF_NOT_SUPPORTED;
 879                 if (!hwFuseSts.rvSupportFuse)       dec->rvSupport = RV_NOT_SUPPORTED;
 880                 if (!hwFuseSts.avsSupportFuse)      dec->avsSupport = AVS_NOT_SUPPORTED;
 881                 if (!hwFuseSts.mvcSupportFuse)      dec->mvcSupport = MVC_NOT_SUPPORTED;
 882         }
 883         }
 884         configReg = enc_dev.hwregs[63];
 885         enc->maxEncodedWidth = configReg & ((1 << 11) - 1);
 886         enc->h264Enabled = (configReg >> 27) & 1;
 887         enc->mpeg4Enabled = (configReg >> 26) & 1;
 888         enc->jpegEnabled = (configReg >> 25) & 1;
 889         enc->vsEnabled = (configReg >> 24) & 1;
 890         enc->rgbEnabled = (configReg >> 28) & 1;
 891         enc->busType = (configReg >> 20) & 15;
 892         enc->synthesisLanguage = (configReg >> 16) & 15;
 893         enc->busWidth = (configReg >> 12) & 15;
 894 }
 895
 896 static irqreturn_t vdpu_isr(int irq, void *dev_id)
 897 {
 898         vpu_device *dev = (vpu_device *) dev_id;
 899         u32 irq_status_dec = readl(dev->hwregs + DEC_INTERRUPT_REGISTER);
 900         u32 irq_status_pp  = readl(dev->hwregs + PP_INTERRUPT_REGISTER);
 901
 902         pr_debug("vdpu_isr dec %x pp %x\n", irq_status_dec, irq_status_pp);
 903
 904         if (irq_status_dec & DEC_INTERRUPT_BIT) {
 905                 irq_status_dec = readl(dev->hwregs + DEC_INTERRUPT_REGISTER);
 906                 if ((irq_status_dec & 0x40001) == 0x40001)
 907                 {
 908                         do {
 909                                 irq_status_dec = readl(dev->hwregs + DEC_INTERRUPT_REGISTER);
 910                         } while ((irq_status_dec & 0x40001) == 0x40001);
 911                 }
 912                 /* clear dec IRQ */
 913                 writel(irq_status_dec & (~DEC_INTERRUPT_BIT), dev->hwregs + DEC_INTERRUPT_REGISTER);
 914                 pr_debug("DEC IRQ received!\n");
 915                 atomic_sub(1, &service.task_running);
 916                 if (NULL == service.reg_codec) {
 917                         pr_err("dec isr with no task waiting\n");
 918                 } else {
 919                         reg_from_run_to_done(service.reg_codec);
 920                 }
 921         }
 922
 923         if (irq_status_pp & PP_INTERRUPT_BIT) {
 924                 /* clear pp IRQ */
 925                 writel(irq_status_pp & (~DEC_INTERRUPT_BIT), dev->hwregs + PP_INTERRUPT_REGISTER);
 926                 pr_debug("PP IRQ received!\n");
 927                 atomic_sub(1, &service.task_running);
 928                 if (NULL == service.reg_pproc) {
 929                         pr_err("pp isr with no task waiting\n");
 930                 } else {
 931                         reg_from_run_to_done(service.reg_pproc);
 932                 }
 933         }
 934         try_set_reg();
 935         return IRQ_HANDLED;
 936 }
 937
 938 static irqreturn_t vepu_isr(int irq, void *dev_id)
 939 {
 940         struct vpu_device *dev = (struct vpu_device *) dev_id;
 941         u32 irq_status = readl(dev->hwregs + ENC_INTERRUPT_REGISTER);
 942
 943         pr_debug("enc_isr\n");
 944
 945         if (likely(irq_status & ENC_INTERRUPT_BIT)) {
 946                 /* clear enc IRQ */
 947                 writel(irq_status & (~ENC_INTERRUPT_BIT), dev->hwregs + ENC_INTERRUPT_REGISTER);
 948                 pr_debug("ENC IRQ received!\n");
 949                 atomic_sub(1, &service.task_running);
 950                 if (NULL == service.reg_codec) {
 951                         pr_err("enc isr with no task waiting\n");
 952                 } else {
 953                         reg_from_run_to_done(service.reg_codec);
 954                 }
 955         }
 956         try_set_reg();
 957         return IRQ_HANDLED;
 958 }
 959
 960 static int __init vpu_service_init(void)
 961 {
 962         int ret;
 963
 964         pr_debug("baseaddr = 0x%08x vdpu irq = %d vepu irq = %d\n", RK29_VCODEC_PHYS, IRQ_VDPU, IRQ_VEPU);
 965
 966         dec_dev.iobaseaddr      = RK29_VCODEC_PHYS + 0x200;
 967         dec_dev.iosize          = DEC_IO_SIZE;
 968         enc_dev.iobaseaddr      = RK29_VCODEC_PHYS;
 969         enc_dev.iosize          = ENC_IO_SIZE;
 970
 971         INIT_LIST_HEAD(&service.waiting);
 972         INIT_LIST_HEAD(&service.running);
 973         INIT_LIST_HEAD(&service.done);
 974         INIT_LIST_HEAD(&service.session);
 975         spin_lock_init(&service.lock);
 976         service.reg_codec       = NULL;
 977         service.reg_pproc       = NULL;
 978         atomic_set(&service.task_running, 0);
 979         service.enabled         = false;
 980
 981         vpu_get_clk();
 982         vpu_service_power_on();
 983
 984         ret = vpu_service_reserve_io();
 985         if (ret < 0) {
 986                 pr_err("reserve io failed\n");
 987                 goto err_reserve_io;
 988         }
 989
 990         /* get the IRQ line */
 991         ret = request_irq(IRQ_VDPU, vdpu_isr, IRQF_SHARED, "vdpu", (void *)&dec_dev);
 992         if (ret) {
 993                 pr_err("can't request vdpu irq %d\n", IRQ_VDPU);
 994                 goto err_req_vdpu_irq;
 995         }
 996
 997         ret = request_irq(IRQ_VEPU, vepu_isr, IRQF_SHARED, "vepu", (void *)&enc_dev);
 998         if (ret) {
 999                 pr_err("can't request vepu irq %d\n", IRQ_VEPU);
1000                 goto err_req_vepu_irq;
1001         }
1002
1003         ret = misc_register(&vpu_service_misc_device);
1004         if (ret) {
1005                 pr_err("misc_register failed\n");
1006                 goto err_register;
1007         }
1008
1009         platform_device_register(&vpu_service_device);
1010         platform_driver_probe(&vpu_service_driver, NULL);
1011         get_hw_info();
1012         del_timer(&service.timer);
1013         vpu_service_power_off();
1014         pr_info("init success\n");
1015
1016         return 0;
1017
1018 err_register:
1019         free_irq(IRQ_VEPU, (void *)&enc_dev);
1020 err_req_vepu_irq:
1021         free_irq(IRQ_VDPU, (void *)&dec_dev);
1022 err_req_vdpu_irq:
1023         pr_info("init failed\n");
1024 err_reserve_io:
1025         del_timer(&service.timer);
1026         vpu_service_power_off();
1027         vpu_service_release_io();
1028         vpu_put_clk();
1029         pr_info("init failed\n");
1030         return ret;
1031 }
1032
1033 static void __exit vpu_service_exit(void)
1034 {
1035         del_timer(&service.timer);
1036         vpu_service_power_off();
1037         platform_device_unregister(&vpu_service_device);
1038         platform_driver_unregister(&vpu_service_driver);
1039         misc_deregister(&vpu_service_misc_device);
1040         free_irq(IRQ_VEPU, (void *)&enc_dev);
1041         free_irq(IRQ_VDPU, (void *)&dec_dev);
1042         vpu_put_clk();
1043 }
1044
1045 module_init(vpu_service_init);
1046 module_exit(vpu_service_exit);
1047 MODULE_LICENSE("GPL");
1048
1049 #ifdef CONFIG_PROC_FS
1050 #include <linux/proc_fs.h>
1051 #include <linux/seq_file.h>
1052
1053 static int proc_vpu_service_show(struct seq_file *s, void *v)
1054 {
1055         unsigned int i, n;
1056         unsigned long flag;
1057         vpu_reg *reg, *reg_tmp;
1058         vpu_session *session, *session_tmp;
1059
1060         vpu_service_power_on();
1061         seq_printf(s, "\nENC Registers:\n");
1062         n = enc_dev.iosize >> 2;
1063         for (i = 0; i < n; i++) {
1064                 seq_printf(s, "\tswreg%d = %08X\n", i, readl(enc_dev.hwregs + i));
1065         }
1066         seq_printf(s, "\nDEC Registers:\n");
1067         n = dec_dev.iosize >> 2;
1068         for (i = 0; i < n; i++) {
1069                 seq_printf(s, "\tswreg%d = %08X\n", i, readl(dec_dev.hwregs + i));
1070         }
1071
1072         seq_printf(s, "\nvpu service status:\n");
1073         spin_lock_irqsave(&service.lock, flag);
1074         list_for_each_entry_safe(session, session_tmp, &service.session, list_session) {
1075                 seq_printf(s, "session pid %d type %d:\n", session->pid, session->type);
1076                 //seq_printf(s, "waiting reg set %d\n");
1077                 list_for_each_entry_safe(reg, reg_tmp, &session->waiting, session_link) {
1078                         seq_printf(s, "waiting register set\n");
1079                 }
1080                 list_for_each_entry_safe(reg, reg_tmp, &session->running, session_link) {
1081                         seq_printf(s, "running register set\n");
1082                 }
1083                 list_for_each_entry_safe(reg, reg_tmp, &session->done, session_link) {
1084                         seq_printf(s, "done    register set\n");
1085                 }
1086         }
1087         spin_unlock_irqrestore(&service.lock, flag);
1088
1089         return 0;
1090 }
1091
1092 static int proc_vpu_service_open(struct inode *inode, struct file *file)
1093 {
1094         return single_open(file, proc_vpu_service_show, NULL);
1095 }
1096
1097 static const struct file_operations proc_vpu_service_fops = {
1098         .open           = proc_vpu_service_open,
1099         .read           = seq_read,
1100         .llseek         = seq_lseek,
1101         .release        = single_release,
1102 };
1103
1104 static int __init vpu_service_proc_init(void)
1105 {
1106         proc_create("vpu_service", 0, NULL, &proc_vpu_service_fops);
1107         return 0;
1108
1109 }
1110 late_initcall(vpu_service_proc_init);
1111 #endif /* CONFIG_PROC_FS */
1112