190070164d7ad289e2b42e1d7d0e7e2828fbd35a
[firefly-linux-kernel-4.4.55.git] / arch / arm / mach-rk29 / board-rk29-newton.c
1 /* arch/arm/mach-rk29/board-rk29.c
2  *
3  * Copyright (C) 2010 ROCKCHIP, Inc.
4  *
5  * This software is licensed under the terms of the GNU General Public
6  * License version 2, as published by the Free Software Foundation, and
7  * may be copied, distributed, and modified under those terms.
8  *
9  * This program is distributed in the hope that it will be useful,
10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12  * GNU General Public License for more details.
13  *
14  */
15
16 #include <linux/kernel.h>
17 #include <linux/init.h>
18 #include <linux/platform_device.h>
19 #include <linux/input.h>
20 #include <linux/io.h>
21 #include <linux/delay.h>
22 #include <linux/i2c.h>
23 #include <linux/spi/spi.h>
24 #include <linux/mmc/host.h>
25 #include <linux/android_pmem.h>
26 #include <linux/usb/android_composite.h>
27
28 #include <mach/hardware.h>
29 #include <asm/setup.h>
30 #include <asm/mach-types.h>
31 #include <asm/mach/arch.h>
32 #include <asm/mach/map.h>
33 #include <asm/mach/flash.h>
34 #include <asm/hardware/gic.h>
35
36 #include <mach/iomux.h>
37 #include <mach/gpio.h>
38 #include <mach/irqs.h>
39 #include <mach/rk29_iomap.h>
40 #include <mach/board.h>
41 #include <mach/rk29_nand.h>
42 #include <mach/rk29_camera.h>                          /* ddl@rock-chips.com : camera support */
43 #include <media/soc_camera.h>                               /* ddl@rock-chips.com : camera support */
44 #include <mach/vpu_mem.h>
45 #include <mach/sram.h>
46 #include <mach/ddr.h>
47 #include <mach/cpufreq.h>
48
49 #include <linux/regulator/rk29-pwm-regulator.h>
50 #include <linux/regulator/machine.h>
51
52 #include <linux/mtd/nand.h>
53 #include <linux/mtd/partitions.h>
54 #include <linux/i2c-gpio.h>
55
56 #include "devices.h"
57 #include "../../../drivers/input/touchscreen/xpt2046_cbn_ts.h"
58
59 #ifdef CONFIG_VIDEO_RK29
60 /*---------------- Camera Sensor Macro Define Begin  ------------------------*/
61 /*---------------- Camera Sensor Configuration Macro Begin ------------------------*/
62 #define CONFIG_SENSOR_0                   RK29_CAM_SENSOR_OV2655         /* back camera sensor */
63 #define CONFIG_SENSOR_IIC_ADDR_0              0//0x60
64 #define CONFIG_SENSOR_IIC_ADAPTER_ID_0    1
65 #define CONFIG_SENSOR_POWER_PIN_0         INVALID_GPIO
66 #define CONFIG_SENSOR_RESET_PIN_0         INVALID_GPIO
67 #define CONFIG_SENSOR_POWERDN_PIN_0       INVALID_GPIO
68 #define CONFIG_SENSOR_FALSH_PIN_0         INVALID_GPIO
69 #define CONFIG_SENSOR_POWERACTIVE_LEVEL_0 RK29_CAM_POWERACTIVE_L
70 #define CONFIG_SENSOR_RESETACTIVE_LEVEL_0 RK29_CAM_RESETACTIVE_L
71 #define CONFIG_SENSOR_POWERDNACTIVE_LEVEL_0 RK29_CAM_POWERDNACTIVE_H
72 #define CONFIG_SENSOR_FLASHACTIVE_LEVEL_0 RK29_CAM_FLASHACTIVE_L
73
74 #define CONFIG_SENSOR_1                   RK29_CAM_SENSOR_OV2655                      /* front camera sensor */
75 #define CONFIG_SENSOR_IIC_ADDR_1              0x60
76 #define CONFIG_SENSOR_IIC_ADAPTER_ID_1    1
77 #define CONFIG_SENSOR_POWER_PIN_1         INVALID_GPIO
78 #define CONFIG_SENSOR_RESET_PIN_1         INVALID_GPIO
79 #define CONFIG_SENSOR_POWERDN_PIN_1       RK29_PIN5_PD7
80 #define CONFIG_SENSOR_FALSH_PIN_1         INVALID_GPIO
81 #define CONFIG_SENSOR_POWERACTIVE_LEVEL_1 RK29_CAM_POWERACTIVE_L
82 #define CONFIG_SENSOR_RESETACTIVE_LEVEL_1 RK29_CAM_RESETACTIVE_L
83 #define CONFIG_SENSOR_POWERDNACTIVE_LEVEL_1 RK29_CAM_POWERDNACTIVE_H
84 #define CONFIG_SENSOR_FLASHACTIVE_LEVEL_1 RK29_CAM_FLASHACTIVE_L
85 #endif  //#ifdef CONFIG_VIDEO_RK29
86 /*---------------- Camera Sensor Configuration Macro End------------------------*/
87 #include "../../../drivers/media/video/rk29_camera.c"
88 /*---------------- Camera Sensor Macro Define End  ------------------------*/
89
90 /* Set memory size of pmem */
91 #ifdef CONFIG_RK29_MEM_SIZE_M
92 #define SDRAM_SIZE          (CONFIG_RK29_MEM_SIZE_M * SZ_1M)
93 #else
94 #define SDRAM_SIZE          SZ_512M
95 #endif
96 #define PMEM_GPU_SIZE       SZ_64M
97 #define PMEM_UI_SIZE        SZ_32M
98 #define PMEM_VPU_SIZE       SZ_64M
99 #define PMEM_CAM_SIZE       PMEM_CAM_NECESSARY
100 #ifdef CONFIG_VIDEO_RK29_WORK_IPP
101 #define MEM_CAMIPP_SIZE     SZ_4M
102 #else
103 #define MEM_CAMIPP_SIZE     0
104 #endif
105 #define MEM_FB_SIZE         (3*SZ_2M)
106 #ifdef CONFIG_FB_WORK_IPP
107 #define MEM_FBIPP_SIZE      SZ_8M   //1920 x 1080 x 2 x 2  //RGB565 = x2;RGB888 = x4
108 #else
109 #define MEM_FBIPP_SIZE      0
110 #endif
111 #if SDRAM_SIZE > SZ_512M
112 #define PMEM_GPU_BASE       (RK29_SDRAM_PHYS + SZ_512M - PMEM_GPU_SIZE)
113 #else
114 #define PMEM_GPU_BASE       (RK29_SDRAM_PHYS + SDRAM_SIZE - PMEM_GPU_SIZE)
115 #endif
116 #define PMEM_UI_BASE        (PMEM_GPU_BASE - PMEM_UI_SIZE)
117 #define PMEM_VPU_BASE       (PMEM_UI_BASE - PMEM_VPU_SIZE)
118 #define PMEM_CAM_BASE       (PMEM_VPU_BASE - PMEM_CAM_SIZE)
119 #define MEM_CAMIPP_BASE     (PMEM_CAM_BASE - MEM_CAMIPP_SIZE)
120 #define MEM_FB_BASE         (MEM_CAMIPP_BASE - MEM_FB_SIZE)
121 #define MEM_FBIPP_BASE      (MEM_FB_BASE - MEM_FBIPP_SIZE)
122 #define LINUX_SIZE          (MEM_FBIPP_BASE - RK29_SDRAM_PHYS)
123
124 #define PREALLOC_WLAN_SEC_NUM           4
125 #define PREALLOC_WLAN_BUF_NUM           160
126 #define PREALLOC_WLAN_SECTION_HEADER    24
127
128 #define WLAN_SECTION_SIZE_0     (PREALLOC_WLAN_BUF_NUM * 128)
129 #define WLAN_SECTION_SIZE_1     (PREALLOC_WLAN_BUF_NUM * 128)
130 #define WLAN_SECTION_SIZE_2     (PREALLOC_WLAN_BUF_NUM * 512)
131 #define WLAN_SECTION_SIZE_3     (PREALLOC_WLAN_BUF_NUM * 1024)
132
133 #define WLAN_SKB_BUF_NUM        16
134
135 static struct sk_buff *wlan_static_skb[WLAN_SKB_BUF_NUM];
136
137 struct wifi_mem_prealloc {
138         void *mem_ptr;
139         unsigned long size;
140 };
141
142 extern struct sys_timer rk29_timer;
143
144 static int rk29_nand_io_init(void)
145 {
146     return 0;
147 }
148
149 struct rk29_nand_platform_data rk29_nand_data = {
150     .width      = 1,     /* data bus width in bytes */
151     .hw_ecc     = 1,     /* hw ecc 0: soft ecc */
152     .num_flash    = 1,
153     .io_init   = rk29_nand_io_init,
154 };
155
156 #define TOUCH_SCREEN_STANDBY_PIN          RK29_PIN6_PD1
157 #define TOUCH_SCREEN_STANDBY_VALUE        GPIO_HIGH
158 #define TOUCH_SCREEN_DISPLAY_PIN          INVALID_GPIO
159 #define TOUCH_SCREEN_DISPLAY_VALUE        GPIO_HIGH
160 #ifdef CONFIG_FB_RK29
161 /*****************************************************************************************
162  * lcd  devices
163  * author: zyw@rock-chips.com
164  *****************************************************************************************/
165 //#ifdef  CONFIG_LCD_TD043MGEA1
166 #define LCD_TXD_PIN          INVALID_GPIO
167 #define LCD_CLK_PIN          INVALID_GPIO
168 #define LCD_CS_PIN           INVALID_GPIO
169 /*****************************************************************************************
170 * frame buffe  devices
171 * author: zyw@rock-chips.com
172 *****************************************************************************************/
173 #define FB_ID                       0
174 #define FB_DISPLAY_ON_PIN           INVALID_GPIO// RK29_PIN6_PD0
175 #define FB_LCD_STANDBY_PIN          INVALID_GPIO
176 #define FB_LCD_CABC_EN_PIN          RK29_PIN6_PD2
177 #define FB_MCU_FMK_PIN              INVALID_GPIO
178
179 #define FB_DISPLAY_ON_VALUE         GPIO_HIGH
180 #define FB_LCD_STANDBY_VALUE        GPIO_HIGH
181
182 static int rk29_lcd_io_init(void)
183 {
184     int ret = 0;
185     return ret;
186 }
187
188 static int rk29_lcd_io_deinit(void)
189 {
190     int ret = 0;
191     return ret;
192 }
193
194 static struct rk29lcd_info rk29_lcd_info = {
195     .txd_pin  = LCD_TXD_PIN,
196     .clk_pin = LCD_CLK_PIN,
197     .cs_pin = LCD_CS_PIN,
198     .io_init   = rk29_lcd_io_init,
199     .io_deinit = rk29_lcd_io_deinit,
200 };
201
202 int rk29_fb_io_enable(void)
203 {
204     if(FB_DISPLAY_ON_PIN != INVALID_GPIO)
205     {
206         gpio_direction_output(FB_DISPLAY_ON_PIN, 0);
207         gpio_set_value(FB_DISPLAY_ON_PIN, FB_DISPLAY_ON_VALUE);              
208     }
209     if(FB_LCD_STANDBY_PIN != INVALID_GPIO)
210     {
211         gpio_direction_output(FB_LCD_STANDBY_PIN, 0);
212         gpio_set_value(FB_LCD_STANDBY_PIN, FB_LCD_STANDBY_VALUE);             
213     }
214     return 0;
215 }
216
217 int rk29_fb_io_disable(void)
218 {
219     if(FB_DISPLAY_ON_PIN != INVALID_GPIO)
220     {
221         gpio_direction_output(FB_DISPLAY_ON_PIN, 0);
222         gpio_set_value(FB_DISPLAY_ON_PIN, !FB_DISPLAY_ON_VALUE);              
223     }
224     if(FB_LCD_STANDBY_PIN != INVALID_GPIO)
225     {
226         gpio_direction_output(FB_LCD_STANDBY_PIN, 0);
227         gpio_set_value(FB_LCD_STANDBY_PIN, !FB_LCD_STANDBY_VALUE);             
228     }
229     return 0;
230 }
231
232 static int rk29_fb_io_init(struct rk29_fb_setting_info *fb_setting)
233 {
234     int ret = 0;
235     if(fb_setting->mcu_fmk_en && (FB_MCU_FMK_PIN != INVALID_GPIO))
236     {
237         ret = gpio_request(FB_MCU_FMK_PIN, NULL);
238         if(ret != 0)
239         {
240             gpio_free(FB_MCU_FMK_PIN);
241             printk(">>>>>> FB_MCU_FMK_PIN gpio_request err \n ");
242         }
243         gpio_direction_input(FB_MCU_FMK_PIN);
244     }
245     if(fb_setting->disp_on_en)
246     {
247         if(FB_DISPLAY_ON_PIN != INVALID_GPIO)
248         {
249             ret = gpio_request(FB_DISPLAY_ON_PIN, NULL);
250             if(ret != 0)
251             {
252                 gpio_free(FB_DISPLAY_ON_PIN);
253                 printk(">>>>>> FB_DISPLAY_ON_PIN gpio_request err \n ");
254             }
255         }
256         else
257         {
258              ret = gpio_request(TOUCH_SCREEN_DISPLAY_PIN, NULL);
259              if(ret != 0)
260              {
261                  gpio_free(TOUCH_SCREEN_DISPLAY_PIN);
262                  printk(">>>>>> TOUCH_SCREEN_DISPLAY_PIN gpio_request err \n ");
263              }
264              gpio_direction_output(TOUCH_SCREEN_DISPLAY_PIN, 0);
265              gpio_set_value(TOUCH_SCREEN_DISPLAY_PIN, TOUCH_SCREEN_DISPLAY_VALUE);
266         }
267     }
268
269     if(fb_setting->disp_on_en)
270     {
271         if(FB_LCD_STANDBY_PIN != INVALID_GPIO)
272         {
273              ret = gpio_request(FB_LCD_STANDBY_PIN, NULL);
274              if(ret != 0)
275              {
276                  gpio_free(FB_LCD_STANDBY_PIN);
277                  printk(">>>>>> FB_LCD_STANDBY_PIN gpio_request err \n ");
278              }
279         }
280         else
281         {
282              ret = gpio_request(TOUCH_SCREEN_STANDBY_PIN, NULL);
283              if(ret != 0)
284              {
285                  gpio_free(TOUCH_SCREEN_STANDBY_PIN);
286                  printk(">>>>>> TOUCH_SCREEN_STANDBY_PIN gpio_request err \n ");
287              }
288              gpio_direction_output(TOUCH_SCREEN_STANDBY_PIN, 0);
289              gpio_set_value(TOUCH_SCREEN_STANDBY_PIN, TOUCH_SCREEN_STANDBY_VALUE);
290          }
291     }
292
293     if(FB_LCD_CABC_EN_PIN != INVALID_GPIO)
294     {
295         ret = gpio_request(FB_LCD_CABC_EN_PIN, NULL);
296         if(ret != 0)
297         {
298             gpio_free(FB_LCD_CABC_EN_PIN);
299             printk(">>>>>> FB_LCD_CABC_EN_PIN gpio_request err \n ");
300         }
301         gpio_direction_output(FB_LCD_CABC_EN_PIN, 0);
302         gpio_set_value(FB_LCD_CABC_EN_PIN, GPIO_LOW);
303     }
304     
305     rk29_fb_io_enable();   //enable it
306
307     return ret;
308 }
309
310 static struct rk29fb_info rk29_fb_info = {
311     .fb_id   = FB_ID,
312     .mcu_fmk_pin = FB_MCU_FMK_PIN,
313     .lcd_info = &rk29_lcd_info,
314     .io_init   = rk29_fb_io_init,
315     .io_enable = rk29_fb_io_enable,
316     .io_disable = rk29_fb_io_disable,
317 };
318
319 /* rk29 fb resource */
320 static struct resource rk29_fb_resource[] = {
321         [0] = {
322         .name  = "lcdc reg",
323                 .start = RK29_LCDC_PHYS,
324                 .end   = RK29_LCDC_PHYS + RK29_LCDC_SIZE - 1,
325                 .flags = IORESOURCE_MEM,
326         },
327         [1] = {
328             .name  = "lcdc irq",
329                 .start = IRQ_LCDC,
330                 .end   = IRQ_LCDC,
331                 .flags = IORESOURCE_IRQ,
332         },
333         [2] = {
334             .name   = "win1 buf",
335         .start  = MEM_FB_BASE,
336         .end    = MEM_FB_BASE + MEM_FB_SIZE - 1,
337         .flags  = IORESOURCE_MEM,
338     },
339     #ifdef CONFIG_FB_WORK_IPP
340     [3] = {
341             .name   = "win1 ipp buf",
342         .start  = MEM_FBIPP_BASE,
343         .end    = MEM_FBIPP_BASE + MEM_FBIPP_SIZE - 1,
344         .flags  = IORESOURCE_MEM,
345     },
346     #endif
347 };
348
349 /*platform_device*/
350 struct platform_device rk29_device_fb = {
351         .name             = "rk29-fb",
352         .id               = 4,
353         .num_resources    = ARRAY_SIZE(rk29_fb_resource),
354         .resource         = rk29_fb_resource,
355         .dev            = {
356                 .platform_data  = &rk29_fb_info,
357         }
358 };
359
360 struct platform_device rk29_device_dma_cpy = {
361         .name             = "dma_memcpy",
362         .id               = 4,
363
364 };
365
366 #endif
367
368 static struct android_pmem_platform_data android_pmem_pdata = {
369         .name           = "pmem",
370         .start          = PMEM_UI_BASE,
371         .size           = PMEM_UI_SIZE,
372         .no_allocator   = 0,
373         .cached         = 1,
374 };
375
376 static struct platform_device android_pmem_device = {
377         .name           = "android_pmem",
378         .id             = 0,
379         .dev            = {
380                 .platform_data = &android_pmem_pdata,
381         },
382 };
383
384
385 static struct vpu_mem_platform_data vpu_mem_pdata = {
386         .name           = "vpu_mem",
387         .start          = PMEM_VPU_BASE,
388         .size           = PMEM_VPU_SIZE,
389         .cached         = 1,
390 };
391
392 static struct platform_device rk29_vpu_mem_device = {
393         .name           = "vpu_mem",
394         .id                 = 2,
395         .dev            = {
396         .platform_data = &vpu_mem_pdata,
397         },
398 };
399 #ifdef CONFIG_VIDEO_RK29XX_VOUT
400 static struct platform_device rk29_v4l2_output_devce = {
401         .name           = "rk29_vout",
402 };
403 #endif
404 #ifdef CONFIG_RK29_NEWTON
405 struct rk29_newton_data rk29_newton_info = {    
406 };
407 struct platform_device rk29_device_newton = {
408         .name          = "rk29_newton",
409         .id            = -1,            
410         .dev               = {
411         .platform_data = &rk29_newton_info,     
412                 }           
413         };
414 #endif
415 #if defined (CONFIG_TOUCHSCREEN_FT5406)
416 #define TOUCH_RESET_PIN RK29_PIN6_PC3
417 #define TOUCH_INT_PIN   RK29_PIN0_PA2
418
419 //#define TOUCH_POER_PIN   RK29_PIN6_PB2
420
421 int ft5406_init_platform_hw(void)
422 {
423        printk("ft5406_init_platform_hw\n");
424
425     if(gpio_request(TOUCH_RESET_PIN,NULL) != 0){
426       gpio_free(TOUCH_RESET_PIN);
427       printk("ft5406_init_platform_hw gpio_request error\n");
428       return -EIO;
429     }
430
431     if(gpio_request(TOUCH_INT_PIN,NULL) != 0){
432       gpio_free(TOUCH_INT_PIN);
433       printk("ift5406_init_platform_hw gpio_request error\n");
434       return -EIO;
435     }
436
437  //   if(gpio_request(TOUCH_POER_PIN,NULL) != 0){
438  //     gpio_free(TOUCH_POER_PIN);
439  //     printk("ft5406_init_platform_hw gpio_power error\n");
440 //      return -EIO;
441  //   } 
442
443 #if 1
444        gpio_direction_output(TOUCH_RESET_PIN, 0);
445         gpio_set_value(TOUCH_RESET_PIN,GPIO_LOW);
446         msleep(100);
447         gpio_direction_output(TOUCH_INT_PIN, 0);
448         gpio_set_value(TOUCH_INT_PIN,GPIO_LOW);
449         mdelay(10);
450 //      gpio_direction_output(TOUCH_POER_PIN, 0);
451 //      gpio_set_value(TOUCH_POER_PIN,GPIO_HIGH);
452
453         //msleep(3000);
454         msleep(50);                             //harry 2011.04.20
455         
456         gpio_set_value(TOUCH_RESET_PIN,GPIO_HIGH);
457         msleep(100);
458         gpio_direction_output(TOUCH_INT_PIN, 1);
459         gpio_pull_updown(TOUCH_INT_PIN, 0);  
460 #endif
461
462
463     return 0;
464 }
465
466
467 struct ft5406_platform_data ft5406_info = {
468
469   .init_platform_hw= ft5406_init_platform_hw,
470
471 };
472 #endif
473
474 #if defined (CONFIG_SND_SOC_CS42L52)
475
476 void cs42l52_init_platform_hw()
477 {
478         printk("cs42l52_init_platform_hw\n");
479     if(gpio_request(RK29_PIN6_PB6,NULL) != 0){
480       gpio_free(RK29_PIN6_PB6);
481       printk("cs42l52_init_platform_hw gpio_request error\n");
482       return;
483     }
484     gpio_direction_output(RK29_PIN6_PB6, 0);
485         gpio_set_value(RK29_PIN6_PB6,GPIO_HIGH);
486 }
487 struct cs42l52_platform_data cs42l52_info = {
488
489   .init_platform_hw= cs42l52_init_platform_hw,
490
491 };
492 #endif
493
494 /*MMA8452 gsensor*/
495 #if defined (CONFIG_GS_MMA8452)
496 #define MMA8452_INT_PIN   RK29_PIN0_PA3
497
498 static int mma8452_init_platform_hw(void)
499 {
500
501     if(gpio_request(MMA8452_INT_PIN,NULL) != 0){
502       gpio_free(MMA8452_INT_PIN);
503       printk("mma8452_init_platform_hw gpio_request error\n");
504       return -EIO;
505     }
506     gpio_pull_updown(MMA8452_INT_PIN, 1);
507     return 0;
508 }
509
510
511 static struct mma8452_platform_data mma8452_info = {
512   .model= 8452,
513   .swap_xy = 0,
514   .init_platform_hw= mma8452_init_platform_hw,
515
516 };
517 #endif
518
519 #if defined (CONFIG_BATTERY_BQ27510)
520 #define DC_CHECK_PIN    RK29_PIN4_PA1
521 #define LI_LION_BAT_NUM 2
522 static int bq27510_init_dc_check_pin(void){     
523         if(gpio_request(DC_CHECK_PIN,"dc_check") != 0){      
524                 gpio_free(DC_CHECK_PIN);      
525                 printk("bq27510 init dc check pin request error\n");      
526                 return -EIO;    
527         }       
528         gpio_direction_input(DC_CHECK_PIN);     
529         return 0;
530 }
531
532 struct bq27510_platform_data bq27510_info = {   
533         .init_dc_check_pin = bq27510_init_dc_check_pin, 
534         .dc_check_pin =  DC_CHECK_PIN,          
535         .bat_num = LI_LION_BAT_NUM,
536 };
537 #endif
538
539
540 /*****************************************************************************************
541  * i2c devices
542  * author: kfx@rock-chips.com
543 *****************************************************************************************/
544 static int rk29_i2c0_io_init(void)
545 {
546 #ifdef CONFIG_RK29_I2C0_CONTROLLER
547         rk29_mux_api_set(GPIO2B7_I2C0SCL_NAME, GPIO2L_I2C0_SCL);
548         rk29_mux_api_set(GPIO2B6_I2C0SDA_NAME, GPIO2L_I2C0_SDA);
549 #else
550         rk29_mux_api_set(GPIO2B7_I2C0SCL_NAME, GPIO2L_GPIO2B7);
551         rk29_mux_api_set(GPIO2B6_I2C0SDA_NAME, GPIO2L_GPIO2B6);
552 #endif
553         return 0;
554 }
555
556 static int rk29_i2c1_io_init(void)
557 {
558 #ifdef CONFIG_RK29_I2C1_CONTROLLER
559         rk29_mux_api_set(GPIO1A7_I2C1SCL_NAME, GPIO1L_I2C1_SCL);
560         rk29_mux_api_set(GPIO1A6_I2C1SDA_NAME, GPIO1L_I2C1_SDA);
561 #else
562         rk29_mux_api_set(GPIO1A7_I2C1SCL_NAME, GPIO1L_GPIO1A7);
563         rk29_mux_api_set(GPIO1A6_I2C1SDA_NAME, GPIO1L_GPIO1A6);
564 #endif
565         return 0;
566 }
567 static int rk29_i2c2_io_init(void)
568 {
569 #ifdef CONFIG_RK29_I2C2_CONTROLLER
570         rk29_mux_api_set(GPIO5D4_I2C2SCL_NAME, GPIO5H_I2C2_SCL);
571         rk29_mux_api_set(GPIO5D3_I2C2SDA_NAME, GPIO5H_I2C2_SDA);
572 #else
573         rk29_mux_api_set(GPIO5D4_I2C2SCL_NAME, GPIO5H_GPIO5D4);
574         rk29_mux_api_set(GPIO5D3_I2C2SDA_NAME, GPIO5H_GPIO5D3);
575 #endif
576         return 0;
577 }
578
579 static int rk29_i2c3_io_init(void)
580 {
581 #ifdef CONFIG_RK29_I2C3_CONTROLLER
582         rk29_mux_api_set(GPIO2B5_UART3RTSN_I2C3SCL_NAME, GPIO2L_I2C3_SCL);
583         rk29_mux_api_set(GPIO2B4_UART3CTSN_I2C3SDA_NAME, GPIO2L_I2C3_SDA);
584 #else
585         rk29_mux_api_set(GPIO2B5_UART3RTSN_I2C3SCL_NAME, GPIO2L_GPIO2B5);
586         rk29_mux_api_set(GPIO2B4_UART3CTSN_I2C3SDA_NAME, GPIO2L_GPIO2B4);
587 #endif
588         return 0;
589 }
590 #ifdef CONFIG_RK29_I2C0_CONTROLLER
591 struct rk29_i2c_platform_data default_i2c0_data = {
592         .bus_num    = 0,
593         .flags      = 0,
594         .slave_addr = 0xff,
595         .scl_rate  = 400*1000,
596         .mode           = I2C_MODE_IRQ,
597         .io_init = rk29_i2c0_io_init,
598 };
599 #else
600 struct i2c_gpio_platform_data default_i2c0_data = {
601        .sda_pin = RK29_PIN2_PB6,
602        .scl_pin = RK29_PIN2_PB7,
603        .udelay = 5, // clk = 500/udelay = 100Khz
604        .timeout = 100,//msecs_to_jiffies(200),
605        .bus_num    = 0,
606        .io_init = rk29_i2c0_io_init,
607 };
608 #endif
609 #ifdef CONFIG_RK29_I2C1_CONTROLLER
610 struct rk29_i2c_platform_data default_i2c1_data = {
611         .bus_num    = 1,
612         .flags      = 0,
613         .slave_addr = 0xff,
614         .scl_rate  = 400*1000,
615         .mode           = I2C_MODE_IRQ,
616         .io_init = rk29_i2c1_io_init,
617 };
618 #else
619 struct i2c_gpio_platform_data default_i2c1_data = {
620        .sda_pin = RK29_PIN1_PA6,
621        .scl_pin = RK29_PIN1_PA7,
622        .udelay = 5, // clk = 500/udelay = 100Khz
623        .timeout = 100,//msecs_to_jiffies(200),
624        .bus_num    = 1,
625        .io_init = rk29_i2c1_io_init,
626 };
627 #endif
628 #ifdef CONFIG_RK29_I2C2_CONTROLLER
629 struct rk29_i2c_platform_data default_i2c2_data = {
630         .bus_num    = 2,
631         .flags      = 0,
632         .slave_addr = 0xff,
633         .scl_rate  = 400*1000,
634         .mode           = I2C_MODE_IRQ,
635         .io_init = rk29_i2c2_io_init,
636 };
637 #else
638 struct i2c_gpio_platform_data default_i2c2_data = {
639        .sda_pin = RK29_PIN5_PD3,
640        .scl_pin = RK29_PIN5_PD4,
641        .udelay = 5, // clk = 500/udelay = 100Khz
642        .timeout = 100,//msecs_to_jiffies(200),
643        .bus_num    = 2,
644        .io_init = rk29_i2c2_io_init,
645 };
646 #endif
647 #ifdef CONFIG_RK29_I2C3_CONTROLLER
648 struct rk29_i2c_platform_data default_i2c3_data = {
649         .bus_num    = 3,
650         .flags      = 0,
651         .slave_addr = 0xff,
652         .scl_rate  = 400*1000,
653         .mode           = I2C_MODE_IRQ,
654         .io_init = rk29_i2c3_io_init,
655 };
656 #else
657 struct i2c_gpio_platform_data default_i2c3_data = {
658        .sda_pin = RK29_PIN5_PB5,
659        .scl_pin = RK29_PIN5_PB4,
660        .udelay = 5, // clk = 500/udelay = 100Khz
661        .timeout = 100,//msecs_to_jiffies(200),
662        .bus_num    = 3,
663        .io_init = rk29_i2c3_io_init,
664 };
665 #endif
666 #ifdef CONFIG_I2C0_RK29
667 static struct i2c_board_info __initdata board_i2c0_devices[] = {
668 #if defined (CONFIG_RK1000_CONTROL)
669         {
670                 .type                   = "rk1000_control",
671                 .addr           = 0x40,
672                 .flags                  = 0,
673         },
674 #endif
675 #if defined (CONFIG_SND_SOC_alc5621)
676         {
677                 .type                   = "ALC5621",
678                 .addr                   = 0x1a,
679                 .flags                  = 0,
680         },
681 #endif
682 #if defined (CONFIG_SND_SOC_alc5631)
683         {
684                 .type                   = "rt5631",
685                 .addr                   = 0x1a,
686                 .flags                  = 0,
687         },
688 #endif
689 #if defined (CONFIG_SND_SOC_RK1000)
690         {
691                 .type                   = "rk1000_i2c_codec",
692                 .addr           = 0x60,
693                 .flags                  = 0,
694         },
695 #endif
696 #if defined (CONFIG_SND_SOC_WM8900)
697         {
698                 .type                   = "wm8900",
699                 .addr           = 0x1A,
700                 .flags                  = 0,
701         },
702 #endif
703 #if defined (CONFIG_SND_SOC_CS42L52)
704         {
705                 .type                   = "cs42l52",
706                 .addr           = 0x4A,
707                 .flags                  = 0,
708                 .platform_data  = &cs42l52_info,
709         },
710 #endif
711 #if defined (CONFIG_RTC_M41T66)
712         {
713                 .type           = "rtc-M41T66",
714                 .addr           = 0x68,
715                 .flags          = 0,
716                 .irq            = RK29_PIN0_PA1,
717         },
718 #endif
719 #if defined (CONFIG_BATTERY_STC3100)
720         {
721                 .type                   = "stc3100",
722                 .addr           = 0x70,
723                 .flags                  = 0,
724         },
725 #endif
726 #if defined (CONFIG_BATTERY_BQ27510)
727         {
728                 .type                   = "bq27510",
729                 .addr           = 0x55,
730                 .flags                  = 0,
731                 .platform_data  = &bq27510_info,
732         },
733 #endif
734 #if defined (CONFIG_RTC_HYM8563)
735         {
736                 .type                   = "rtc_hym8563",
737                 .addr           = 0x51,
738                 .flags                  = 0,
739                 .irq            = RK29_PIN0_PA1,
740         },
741 #endif
742 #if defined (CONFIG_GS_MMA8452)
743     {
744       .type           = "gs_mma8452",
745       .addr           = 0x1c,
746       .flags          = 0,
747       .irq            = MMA8452_INT_PIN,
748       .platform_data  = &mma8452_info,
749     },
750 #endif
751 #if defined (CONFIG_COMPASS_AK8973)
752         {
753                 .type                   = "ak8973",
754                 .addr           = 0x1d,
755                 .flags                  = 0,
756                 .irq                    = RK29_PIN0_PA4,
757         },
758 #endif
759 #if defined (CONFIG_COMPASS_AK8975)
760         {
761                 .type                   = "ak8975",
762                 .addr           = 0x0d,
763                 .flags                  = 0,
764                 .irq                    = RK29_PIN0_PA4,
765         },
766 #endif
767 };
768 #endif
769
770 #ifdef CONFIG_I2C1_RK29
771 static struct i2c_board_info __initdata board_i2c1_devices[] = {
772 #if defined (CONFIG_RK1000_CONTROL1)
773         {
774                 .type                   = "rk1000_control",
775                 .addr                   = 0x40,
776                 .flags                  = 0,
777         },
778 #endif
779 #if defined (CONFIG_ANX7150) || defined (CONFIG_ANX7150_NEW)
780     {
781                 .type           = "anx7150",
782         .addr           = 0x39,             //0x39, 0x3d
783         .flags          = 0,
784         .irq            = RK29_PIN1_PD7,
785     },
786 #endif
787
788 };
789 #endif
790
791 #ifdef CONFIG_I2C2_RK29
792 static struct i2c_board_info __initdata board_i2c2_devices[] = {
793 #if defined (CONFIG_HANNSTAR_P1003)
794     {
795       .type           = "p1003_touch",
796       .addr           = 0x04,
797       .flags          = 0, //I2C_M_NEED_DELAY
798       .irq            = RK29_PIN0_PA2,
799       .platform_data  = &p1003_info,
800       //.udelay           = 100
801     },
802 #endif
803 #if defined (CONFIG_EETI_EGALAX)
804     {
805       .type           = "egalax_i2c",
806       .addr           = 0x04,
807       .flags          = 0,
808       .irq            = RK29_PIN0_PA2,
809       .platform_data  = &eeti_egalax_info,
810     },
811 #endif
812 #if defined (CONFIG_TOUCHSCREEN_FT5406)
813 {
814         .type   ="ft5x0x_ts",
815                 .addr   = 0x38,    //0x70,
816                 .flags      =0,
817                 .irq            =RK29_PIN0_PA2,
818                 .platform_data = &ft5406_info,
819 },
820         //added by koffu
821         {
822                 .type   ="ft_rw_iic_drv",
823                         .addr   = 0x38,    //0x70,
824                         .flags          =0,
825                         //.irq          =RK29_PIN0_PA2,
826                         //.platform_data = &ft5406_info,
827         },
828
829 #endif
830 };
831 #endif
832
833 #ifdef CONFIG_I2C3_RK29
834 static struct i2c_board_info __initdata board_i2c3_devices[] = {
835 };
836 #endif
837
838 /*****************************************************************************************
839  * camera  devices
840  * author: ddl@rock-chips.com
841  *****************************************************************************************/
842 #ifdef CONFIG_VIDEO_RK29 
843 #define CONFIG_SENSOR_POWER_IOCTL_USR      0
844 #define CONFIG_SENSOR_RESET_IOCTL_USR      0
845 #define CONFIG_SENSOR_POWERDOWN_IOCTL_USR      0
846 #define CONFIG_SENSOR_FLASH_IOCTL_USR      0
847
848 #if CONFIG_SENSOR_POWER_IOCTL_USR
849 static int sensor_power_usr_cb (struct rk29camera_gpio_res *res,int on)
850 {
851     #error "CONFIG_SENSOR_POWER_IOCTL_USR is 1, sensor_power_usr_cb function must be writed!!";
852 }
853 #endif
854
855 #if CONFIG_SENSOR_RESET_IOCTL_USR
856 static int sensor_reset_usr_cb (struct rk29camera_gpio_res *res,int on)
857 {
858     #error "CONFIG_SENSOR_RESET_IOCTL_USR is 1, sensor_reset_usr_cb function must be writed!!";
859 }
860 #endif
861
862 #if CONFIG_SENSOR_POWERDOWN_IOCTL_USR
863 static int sensor_powerdown_usr_cb (struct rk29camera_gpio_res *res,int on)
864 {
865     #error "CONFIG_SENSOR_POWERDOWN_IOCTL_USR is 1, sensor_powerdown_usr_cb function must be writed!!";
866 }
867 #endif
868
869 #if CONFIG_SENSOR_FLASH_IOCTL_USR
870 static int sensor_flash_usr_cb (struct rk29camera_gpio_res *res,int on)
871 {
872     #error "CONFIG_SENSOR_FLASH_IOCTL_USR is 1, sensor_flash_usr_cb function must be writed!!";
873 }
874 #endif
875
876 static struct rk29camera_platform_ioctl_cb  sensor_ioctl_cb = {
877     #if CONFIG_SENSOR_POWER_IOCTL_USR
878     .sensor_power_cb = sensor_power_usr_cb,
879     #else
880     .sensor_power_cb = NULL,
881     #endif
882
883     #if CONFIG_SENSOR_RESET_IOCTL_USR
884     .sensor_reset_cb = sensor_reset_usr_cb,
885     #else
886     .sensor_reset_cb = NULL,
887     #endif
888
889     #if CONFIG_SENSOR_POWERDOWN_IOCTL_USR
890     .sensor_powerdown_cb = sensor_powerdown_usr_cb,
891     #else
892     .sensor_powerdown_cb = NULL,
893     #endif
894
895     #if CONFIG_SENSOR_FLASH_IOCTL_USR
896     .sensor_flash_cb = sensor_flash_usr_cb,
897     #else
898     .sensor_flash_cb = NULL,
899     #endif
900 };
901
902 #include "../../../drivers/media/video/rk29_camera.c"
903 #endif
904 /*****************************************************************************************
905  * backlight  devices
906  * author: nzy@rock-chips.com
907  *****************************************************************************************/
908 #ifdef CONFIG_BACKLIGHT_RK29_BL
909  /*
910  GPIO1B5_PWM0_NAME,       GPIO1L_PWM0
911  GPIO5D2_PWM1_UART1SIRIN_NAME,  GPIO5H_PWM1
912  GPIO2A3_SDMMC0WRITEPRT_PWM2_NAME,   GPIO2L_PWM2
913  GPIO1A5_EMMCPWREN_PWM3_NAME,     GPIO1L_PWM3
914  */
915
916 #define PWM_ID            0
917 #define PWM_MUX_NAME      GPIO1B5_PWM0_NAME
918 #define PWM_MUX_MODE      GPIO1L_PWM0
919 #define PWM_MUX_MODE_GPIO GPIO1L_GPIO1B5
920 #define PWM_GPIO RK29_PIN1_PB5
921 #define PWM_EFFECT_VALUE  1
922
923 #define LCD_DISP_ON_PIN
924
925 #ifdef  LCD_DISP_ON_PIN
926 //#define BL_EN_MUX_NAME    GPIOF34_UART3_SEL_NAME
927 //#define BL_EN_MUX_MODE    IOMUXB_GPIO1_B34
928
929 #define BL_EN_PIN         RK29_PIN6_PD0
930 #define BL_EN_VALUE       GPIO_HIGH
931 #endif
932 static int rk29_backlight_io_init(void)
933 {
934     int ret = 0;
935
936     rk29_mux_api_set(PWM_MUX_NAME, PWM_MUX_MODE);
937         #ifdef  LCD_DISP_ON_PIN
938    // rk29_mux_api_set(BL_EN_MUX_NAME, BL_EN_MUX_MODE);
939
940     ret = gpio_request(BL_EN_PIN, NULL);
941     if(ret != 0)
942     {
943         gpio_free(BL_EN_PIN);
944     }
945
946     gpio_direction_output(BL_EN_PIN, 0);
947     gpio_set_value(BL_EN_PIN, BL_EN_VALUE);
948         #endif
949     return ret;
950 }
951
952 static int rk29_backlight_io_deinit(void)
953 {
954     int ret = 0;
955     #ifdef  LCD_DISP_ON_PIN
956     gpio_free(BL_EN_PIN);
957     #endif
958     rk29_mux_api_set(PWM_MUX_NAME, PWM_MUX_MODE_GPIO);
959     return ret;
960 }
961
962 static int rk29_backlight_pwm_suspend(void)
963 {
964         int ret = 0;
965         rk29_mux_api_set(PWM_MUX_NAME, PWM_MUX_MODE_GPIO);
966         if (gpio_request(PWM_GPIO, NULL)) {
967                 printk("func %s, line %d: request gpio fail\n", __FUNCTION__, __LINE__);
968                 return -1;
969         }
970         gpio_direction_output(PWM_GPIO, GPIO_LOW);
971    #ifdef  LCD_DISP_ON_PIN
972     gpio_direction_output(BL_EN_PIN, 0);
973     gpio_set_value(BL_EN_PIN, !BL_EN_VALUE);
974    #endif
975         return ret;
976 }
977
978 static int rk29_backlight_pwm_resume(void)
979 {
980         gpio_free(PWM_GPIO);
981         rk29_mux_api_set(PWM_MUX_NAME, PWM_MUX_MODE);
982
983     #ifdef  LCD_DISP_ON_PIN
984     msleep(30);
985     gpio_direction_output(BL_EN_PIN, 1);
986     gpio_set_value(BL_EN_PIN, BL_EN_VALUE);
987     #endif
988         return 0;
989 }
990
991 struct rk29_bl_info rk29_bl_info = {
992     .pwm_id   = PWM_ID,
993     .bl_ref   = PWM_EFFECT_VALUE,
994     .io_init   = rk29_backlight_io_init,
995     .io_deinit = rk29_backlight_io_deinit,
996     .pwm_suspend = rk29_backlight_pwm_suspend,
997     .pwm_resume = rk29_backlight_pwm_resume,
998 };
999 #endif
1000 /*****************************************************************************************
1001 * pwm voltage regulator devices
1002 ******************************************************************************************/
1003 #if defined (CONFIG_RK29_PWM_REGULATOR)
1004
1005 #define REGULATOR_PWM_ID                                        2
1006 #define REGULATOR_PWM_MUX_NAME                  GPIO2A3_SDMMC0WRITEPRT_PWM2_NAME
1007 #define REGULATOR_PWM_MUX_MODE                                          GPIO2L_PWM2
1008 #define REGULATOR_PWM_MUX_MODE_GPIO                             GPIO2L_GPIO2A3
1009 #define REGULATOR_PWM_GPIO                              RK29_PIN2_PA3
1010
1011 static struct regulator_consumer_supply pwm_consumers[] = {
1012         {
1013                 .supply = "vcore",
1014         }
1015 };
1016
1017 static struct regulator_init_data rk29_pwm_regulator_data = {
1018         .constraints = {
1019                 .name = "PWM2",
1020                 .min_uV =  950000,
1021                 .max_uV = 1400000,
1022                 .apply_uV = 1,
1023                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE,
1024         },
1025         .num_consumer_supplies = ARRAY_SIZE(pwm_consumers),
1026         .consumer_supplies = pwm_consumers,
1027 };
1028
1029 static struct pwm_platform_data rk29_regulator_pwm_platform_data = {
1030         .pwm_id = REGULATOR_PWM_ID,
1031         .pwm_gpio = REGULATOR_PWM_GPIO,
1032         //.pwm_iomux_name[] = REGULATOR_PWM_MUX_NAME;
1033         .pwm_iomux_name = REGULATOR_PWM_MUX_NAME,
1034         .pwm_iomux_pwm = REGULATOR_PWM_MUX_MODE,
1035         .pwm_iomux_gpio = REGULATOR_PWM_MUX_MODE_GPIO,
1036         .init_data  = &rk29_pwm_regulator_data,
1037 };
1038
1039 static struct platform_device rk29_device_pwm_regulator = {
1040         .name = "pwm-voltage-regulator",
1041         .id   = -1,
1042         .dev  = {
1043                 .platform_data = &rk29_regulator_pwm_platform_data,
1044         },
1045 };
1046
1047 #endif
1048
1049 /*****************************************************************************************
1050  * SDMMC devices
1051 *****************************************************************************************/
1052 #ifdef CONFIG_SDMMC0_RK29
1053 static int rk29_sdmmc0_cfg_gpio(void)
1054 {
1055         rk29_mux_api_set(GPIO1D1_SDMMC0CMD_NAME, GPIO1H_SDMMC0_CMD);
1056         rk29_mux_api_set(GPIO1D0_SDMMC0CLKOUT_NAME, GPIO1H_SDMMC0_CLKOUT);
1057         rk29_mux_api_set(GPIO1D2_SDMMC0DATA0_NAME, GPIO1H_SDMMC0_DATA0);
1058         rk29_mux_api_set(GPIO1D3_SDMMC0DATA1_NAME, GPIO1H_SDMMC0_DATA1);
1059         rk29_mux_api_set(GPIO1D4_SDMMC0DATA2_NAME, GPIO1H_SDMMC0_DATA2);
1060         rk29_mux_api_set(GPIO1D5_SDMMC0DATA3_NAME, GPIO1H_SDMMC0_DATA3);
1061         rk29_mux_api_set(GPIO2A2_SDMMC0DETECTN_NAME, GPIO2L_GPIO2A2);
1062         rk29_mux_api_set(GPIO5D5_SDMMC0PWREN_NAME, GPIO5H_GPIO5D5);   ///GPIO5H_SDMMC0_PWR_EN);  ///GPIO5H_GPIO5D5);
1063         gpio_request(RK29_PIN5_PD5,"sdmmc");
1064 #if 0
1065         gpio_set_value(RK29_PIN5_PD5,GPIO_HIGH);
1066         mdelay(100);
1067         gpio_set_value(RK29_PIN5_PD5,GPIO_LOW);
1068 #else
1069         gpio_direction_output(RK29_PIN5_PD5,GPIO_LOW);
1070 #endif
1071         return 0;
1072 }
1073
1074 #define CONFIG_SDMMC0_USE_DMA
1075 struct rk29_sdmmc_platform_data default_sdmmc0_data = {
1076         .host_ocr_avail = (MMC_VDD_25_26|MMC_VDD_26_27|MMC_VDD_27_28|MMC_VDD_28_29|MMC_VDD_29_30|
1077                                            MMC_VDD_30_31|MMC_VDD_31_32|MMC_VDD_32_33|
1078                                            MMC_VDD_33_34|MMC_VDD_34_35| MMC_VDD_35_36),
1079         .host_caps      = (MMC_CAP_4_BIT_DATA|MMC_CAP_MMC_HIGHSPEED|MMC_CAP_SD_HIGHSPEED),
1080         .io_init = rk29_sdmmc0_cfg_gpio,
1081         .dma_name = "sd_mmc",
1082 #ifdef CONFIG_SDMMC0_USE_DMA
1083         .use_dma  = 1,
1084 #else
1085         .use_dma = 0,
1086 #endif
1087         .detect_irq = RK29_PIN2_PA2, // INVALID_GPIO
1088         .enable_sd_wakeup = 0,
1089 };
1090 #endif
1091 #ifdef CONFIG_SDMMC1_RK29
1092 #define CONFIG_SDMMC1_USE_DMA
1093 static int rk29_sdmmc1_cfg_gpio(void)
1094 {
1095         rk29_mux_api_set(GPIO1C2_SDMMC1CMD_NAME, GPIO1H_SDMMC1_CMD);
1096         rk29_mux_api_set(GPIO1C7_SDMMC1CLKOUT_NAME, GPIO1H_SDMMC1_CLKOUT);
1097         rk29_mux_api_set(GPIO1C3_SDMMC1DATA0_NAME, GPIO1H_SDMMC1_DATA0);
1098         rk29_mux_api_set(GPIO1C4_SDMMC1DATA1_NAME, GPIO1H_SDMMC1_DATA1);
1099         rk29_mux_api_set(GPIO1C5_SDMMC1DATA2_NAME, GPIO1H_SDMMC1_DATA2);
1100         rk29_mux_api_set(GPIO1C6_SDMMC1DATA3_NAME, GPIO1H_SDMMC1_DATA3);
1101         //rk29_mux_api_set(GPIO1C0_UART0CTSN_SDMMC1DETECTN_NAME, GPIO1H_SDMMC1_DETECT_N);
1102         return 0;
1103 }
1104
1105 #ifdef CONFIG_WIFI_CONTROL_FUNC
1106 static int rk29sdk_wifi_status(struct device *dev);
1107 static int rk29sdk_wifi_status_register(void (*callback)(int card_presend, void *dev_id), void *dev_id);
1108 #endif
1109
1110 #define RK29SDK_WIFI_SDIO_CARD_DETECT_N    RK29_PIN1_PD6
1111
1112 struct rk29_sdmmc_platform_data default_sdmmc1_data = {
1113         .host_ocr_avail = (MMC_VDD_25_26|MMC_VDD_26_27|MMC_VDD_27_28|MMC_VDD_28_29|
1114                                            MMC_VDD_29_30|MMC_VDD_30_31|MMC_VDD_31_32|
1115                                            MMC_VDD_32_33|MMC_VDD_33_34),
1116         .host_caps      = (MMC_CAP_4_BIT_DATA|MMC_CAP_SDIO_IRQ|
1117                                    MMC_CAP_MMC_HIGHSPEED|MMC_CAP_SD_HIGHSPEED),
1118         .io_init = rk29_sdmmc1_cfg_gpio,
1119         .dma_name = "sdio",
1120 #ifdef CONFIG_SDMMC1_USE_DMA
1121         .use_dma  = 1,
1122 #else
1123         .use_dma = 0,
1124 #endif
1125 #ifdef CONFIG_WIFI_CONTROL_FUNC
1126         .status = rk29sdk_wifi_status,
1127         .register_status_notify = rk29sdk_wifi_status_register,
1128 #endif
1129 #if 0
1130         .detect_irq = RK29SDK_WIFI_SDIO_CARD_DETECT_N,
1131 #endif
1132 };
1133 #endif
1134
1135 #ifdef CONFIG_WIFI_CONTROL_FUNC
1136 #define RK29SDK_WIFI_BT_GPIO_POWER_N       RK29_PIN5_PD6
1137 #define RK29SDK_WIFI_GPIO_RESET_N          RK29_PIN6_PC0
1138 #define RK29SDK_BT_GPIO_RESET_N            RK29_PIN6_PC4
1139
1140 static int rk29sdk_wifi_cd = 0;   /* wifi virtual 'card detect' status */
1141 static void (*wifi_status_cb)(int card_present, void *dev_id);
1142 static void *wifi_status_cb_devid;
1143 int rk29sdk_wifi_power_state = 0;
1144 int rk29sdk_bt_power_state = 0;
1145
1146 static int rk29sdk_wifi_status(struct device *dev)
1147 {
1148         return rk29sdk_wifi_cd;
1149 }
1150
1151 static int rk29sdk_wifi_status_register(void (*callback)(int card_present, void *dev_id), void *dev_id)
1152 {
1153         if(wifi_status_cb)
1154                 return -EAGAIN;
1155         wifi_status_cb = callback;
1156         wifi_status_cb_devid = dev_id;
1157         return 0;
1158 }
1159
1160 static int rk29sdk_wifi_bt_gpio_control_init(void)
1161 {
1162     if (gpio_request(RK29SDK_WIFI_BT_GPIO_POWER_N, "wifi_bt_power")) {
1163            pr_info("%s: request wifi_bt power gpio failed\n", __func__);
1164            return -1;
1165     }
1166
1167     if (gpio_request(RK29SDK_WIFI_GPIO_RESET_N, "wifi reset")) {
1168            pr_info("%s: request wifi reset gpio failed\n", __func__);
1169            gpio_free(RK29SDK_WIFI_BT_GPIO_POWER_N);
1170            return -1;
1171     }
1172
1173     if (gpio_request(RK29SDK_BT_GPIO_RESET_N, "bt reset")) {
1174           pr_info("%s: request bt reset gpio failed\n", __func__);
1175           gpio_free(RK29SDK_WIFI_GPIO_RESET_N);
1176           return -1;
1177     }
1178
1179     gpio_direction_output(RK29SDK_WIFI_BT_GPIO_POWER_N, GPIO_LOW);
1180     gpio_direction_output(RK29SDK_WIFI_GPIO_RESET_N,    GPIO_LOW);
1181     gpio_direction_output(RK29SDK_BT_GPIO_RESET_N,      GPIO_LOW);
1182
1183     pr_info("%s: init finished\n",__func__);
1184
1185     return 0;
1186 }
1187
1188 static int rk29sdk_wifi_power(int on)
1189 {
1190         pr_info("%s: %d\n", __func__, on);
1191         if (on){
1192                 gpio_set_value(RK29SDK_WIFI_BT_GPIO_POWER_N, GPIO_HIGH);
1193                 gpio_set_value(RK29SDK_WIFI_GPIO_RESET_N, GPIO_HIGH);
1194                 mdelay(100);
1195                 pr_info("wifi turn on power\n");
1196         }else{
1197                 if (!rk29sdk_bt_power_state){
1198                         gpio_set_value(RK29SDK_WIFI_BT_GPIO_POWER_N, GPIO_LOW);
1199                         mdelay(100);
1200                         pr_info("wifi shut off power\n");
1201                 }else
1202                 {
1203                         pr_info("wifi shouldn't shut off power, bt is using it!\n");
1204                 }
1205                 gpio_set_value(RK29SDK_WIFI_GPIO_RESET_N, GPIO_LOW);
1206
1207         }
1208
1209         rk29sdk_wifi_power_state = on;
1210         return 0;
1211 }
1212
1213 static int rk29sdk_wifi_reset_state;
1214 static int rk29sdk_wifi_reset(int on)
1215 {
1216         pr_info("%s: %d\n", __func__, on);
1217         gpio_set_value(RK29SDK_WIFI_GPIO_RESET_N, on);
1218         mdelay(100);
1219         rk29sdk_wifi_reset_state = on;
1220         return 0;
1221 }
1222
1223 int rk29sdk_wifi_set_carddetect(int val)
1224 {
1225         pr_info("%s:%d\n", __func__, val);
1226         rk29sdk_wifi_cd = val;
1227         if (wifi_status_cb){
1228                 wifi_status_cb(val, wifi_status_cb_devid);
1229         }else {
1230                 pr_warning("%s, nobody to notify\n", __func__);
1231         }
1232         return 0;
1233 }
1234 EXPORT_SYMBOL(rk29sdk_wifi_set_carddetect);
1235
1236 static struct wifi_mem_prealloc wifi_mem_array[PREALLOC_WLAN_SEC_NUM] = {
1237         {NULL, (WLAN_SECTION_SIZE_0 + PREALLOC_WLAN_SECTION_HEADER)},
1238         {NULL, (WLAN_SECTION_SIZE_1 + PREALLOC_WLAN_SECTION_HEADER)},
1239         {NULL, (WLAN_SECTION_SIZE_2 + PREALLOC_WLAN_SECTION_HEADER)},
1240         {NULL, (WLAN_SECTION_SIZE_3 + PREALLOC_WLAN_SECTION_HEADER)}
1241 };
1242
1243 static void *rk29sdk_mem_prealloc(int section, unsigned long size)
1244 {
1245         if (section == PREALLOC_WLAN_SEC_NUM)
1246                 return wlan_static_skb;
1247
1248         if ((section < 0) || (section > PREALLOC_WLAN_SEC_NUM))
1249                 return NULL;
1250
1251         if (wifi_mem_array[section].size < size)
1252                 return NULL;
1253
1254         return wifi_mem_array[section].mem_ptr;
1255 }
1256
1257 int __init rk29sdk_init_wifi_mem(void)
1258 {
1259         int i;
1260         int j;
1261
1262         for (i = 0 ; i < WLAN_SKB_BUF_NUM ; i++) {
1263                 wlan_static_skb[i] = dev_alloc_skb(
1264                                 ((i < (WLAN_SKB_BUF_NUM / 2)) ? 4096 : 8192));
1265
1266                 if (!wlan_static_skb[i])
1267                         goto err_skb_alloc;
1268         }
1269
1270         for (i = 0 ; i < PREALLOC_WLAN_SEC_NUM ; i++) {
1271                 wifi_mem_array[i].mem_ptr =
1272                                 kmalloc(wifi_mem_array[i].size, GFP_KERNEL);
1273
1274                 if (!wifi_mem_array[i].mem_ptr)
1275                         goto err_mem_alloc;
1276         }
1277         return 0;
1278
1279 err_mem_alloc:
1280         pr_err("Failed to mem_alloc for WLAN\n");
1281         for (j = 0 ; j < i ; j++)
1282                kfree(wifi_mem_array[j].mem_ptr);
1283
1284         i = WLAN_SKB_BUF_NUM;
1285
1286 err_skb_alloc:
1287         pr_err("Failed to skb_alloc for WLAN\n");
1288         for (j = 0 ; j < i ; j++)
1289                 dev_kfree_skb(wlan_static_skb[j]);
1290
1291         return -ENOMEM;
1292 }
1293
1294 static struct wifi_platform_data rk29sdk_wifi_control = {
1295         .set_power = rk29sdk_wifi_power,
1296         .set_reset = rk29sdk_wifi_reset,
1297         .set_carddetect = rk29sdk_wifi_set_carddetect,
1298         .mem_prealloc   = rk29sdk_mem_prealloc,
1299 };
1300 static struct platform_device rk29sdk_wifi_device = {
1301         .name = "bcm4329_wlan",
1302         .id = 1,
1303         .dev = {
1304                 .platform_data = &rk29sdk_wifi_control,
1305          },
1306 };
1307 #endif
1308
1309
1310 /* bluetooth rfkill device */
1311 static struct platform_device rk29sdk_rfkill = {
1312         .name = "rk29sdk_rfkill",
1313         .id = -1,
1314 };
1315
1316
1317 #ifdef CONFIG_VIVANTE
1318 #define GPU_HIGH_CLOCK        552
1319 #define GPU_LOW_CLOCK         288 /* same as general pll clock rate below */
1320 static struct resource resources_gpu[] = {
1321     [0] = {
1322                 .name   = "gpu_irq",
1323         .start  = IRQ_GPU,
1324         .end    = IRQ_GPU,
1325         .flags  = IORESOURCE_IRQ,
1326     },
1327     [1] = {
1328                 .name   = "gpu_base",
1329         .start  = RK29_GPU_PHYS,
1330         .end    = RK29_GPU_PHYS + RK29_GPU_SIZE - 1,
1331         .flags  = IORESOURCE_MEM,
1332     },
1333     [2] = {
1334                 .name   = "gpu_mem",
1335         .start  = PMEM_GPU_BASE,
1336         .end    = PMEM_GPU_BASE + PMEM_GPU_SIZE - 1,
1337         .flags  = IORESOURCE_MEM,
1338     },
1339     [3] = {
1340                 .name   = "gpu_clk",
1341         .start  = GPU_LOW_CLOCK,
1342         .end    = GPU_HIGH_CLOCK,
1343         .flags  = IORESOURCE_IO,
1344     },
1345 };
1346 static struct platform_device rk29_device_gpu = {
1347     .name             = "galcore",
1348     .id               = 0,
1349     .num_resources    = ARRAY_SIZE(resources_gpu),
1350     .resource         = resources_gpu,
1351 };
1352 #endif
1353
1354 #ifdef CONFIG_KEYS_RK29
1355 extern struct rk29_keys_platform_data rk29_keys_pdata;
1356 static struct platform_device rk29_device_keys = {
1357         .name           = "rk29-keypad",
1358         .id             = -1,
1359         .dev            = {
1360                 .platform_data  = &rk29_keys_pdata,
1361         },
1362 };
1363 #endif
1364
1365 static void __init rk29_board_iomux_init(void)
1366 {
1367         #ifdef CONFIG_RK29_PWM_REGULATOR
1368         rk29_mux_api_set(REGULATOR_PWM_MUX_NAME,REGULATOR_PWM_MUX_MODE);
1369         #endif
1370 }
1371
1372 static struct platform_device *devices[] __initdata = {
1373 #ifdef CONFIG_UART1_RK29
1374         &rk29_device_uart1,
1375 #endif
1376 #ifdef CONFIG_UART0_RK29
1377         &rk29_device_uart0,
1378 #endif
1379 #ifdef CONFIG_UART2_RK29
1380         &rk29_device_uart2,
1381 #endif
1382 #ifdef CONFIG_UART3_RK29
1383         &rk29_device_uart3,
1384 #endif
1385
1386 #ifdef CONFIG_RK29_PWM_REGULATOR
1387         &rk29_device_pwm_regulator,
1388 #endif
1389 #ifdef CONFIG_SPIM0_RK29
1390     &rk29xx_device_spi0m,
1391 #endif
1392 #ifdef CONFIG_SPIM1_RK29
1393     &rk29xx_device_spi1m,
1394 #endif
1395 #ifdef CONFIG_ADC_RK29
1396         &rk29_device_adc,
1397 #endif
1398 #ifdef CONFIG_I2C0_RK29
1399         &rk29_device_i2c0,
1400 #endif
1401 #ifdef CONFIG_I2C1_RK29
1402         &rk29_device_i2c1,
1403 #endif
1404 #ifdef CONFIG_I2C2_RK29
1405         &rk29_device_i2c2,
1406 #endif
1407 #ifdef CONFIG_I2C3_RK29
1408         &rk29_device_i2c3,
1409 #endif
1410
1411 #ifdef CONFIG_SND_RK29_SOC_I2S_2CH
1412         &rk29_device_iis_2ch,
1413 #endif
1414 #ifdef CONFIG_SND_RK29_SOC_I2S_8CH
1415         &rk29_device_iis_8ch,
1416 #endif
1417
1418 #ifdef CONFIG_KEYS_RK29
1419         &rk29_device_keys,
1420 #endif
1421 #ifdef CONFIG_SDMMC0_RK29
1422         &rk29_device_sdmmc0,
1423 #endif
1424 #ifdef CONFIG_SDMMC1_RK29
1425         &rk29_device_sdmmc1,
1426 #endif
1427
1428 #ifdef CONFIG_MTD_NAND_RK29XX
1429         &rk29xx_device_nand,
1430 #endif
1431
1432 #ifdef CONFIG_WIFI_CONTROL_FUNC
1433         &rk29sdk_wifi_device,
1434 #endif
1435
1436 #ifdef CONFIG_BT
1437         &rk29sdk_rfkill,
1438 #endif
1439
1440 #ifdef CONFIG_MTD_NAND_RK29
1441         &rk29_device_nand,
1442 #endif
1443
1444 #ifdef CONFIG_FB_RK29
1445         &rk29_device_fb,
1446         &rk29_device_dma_cpy,
1447 #endif
1448 #ifdef CONFIG_BACKLIGHT_RK29_BL
1449         &rk29_device_backlight,
1450 #endif
1451 #ifdef CONFIG_RK29_VMAC
1452         &rk29_device_vmac,
1453 #endif
1454 #ifdef CONFIG_VIVANTE
1455         &rk29_device_gpu,
1456 #endif
1457 #ifdef CONFIG_VIDEO_RK29
1458         &rk29_device_camera,      /* ddl@rock-chips.com : camera support  */
1459         #if (CONFIG_SENSOR_IIC_ADDR_0 != 0x00)
1460         &rk29_soc_camera_pdrv_0,
1461         #endif
1462         &rk29_soc_camera_pdrv_1,
1463         &android_pmem_cam_device,
1464 #endif
1465         &android_pmem_device,
1466         &rk29_vpu_mem_device,
1467 #ifdef CONFIG_USB20_OTG
1468         &rk29_device_usb20_otg,
1469 #endif
1470 #ifdef CONFIG_USB20_HOST
1471         &rk29_device_usb20_host,
1472 #endif
1473 #ifdef CONFIG_USB11_HOST
1474         &rk29_device_usb11_host,
1475 #endif
1476 #ifdef CONFIG_USB_ANDROID
1477         &android_usb_device,
1478         &usb_mass_storage_device,
1479 #endif
1480 #ifdef CONFIG_RK29_IPP
1481         &rk29_device_ipp,
1482 #endif
1483 #ifdef CONFIG_VIDEO_RK29XX_VOUT
1484         &rk29_v4l2_output_devce,
1485 #endif
1486 #ifdef CONFIG_RK29_NEWTON
1487         &rk29_device_newton,
1488 #endif
1489 };
1490
1491 /*****************************************************************************************
1492  * spi devices
1493  * author: cmc@rock-chips.com
1494  *****************************************************************************************/
1495 static int rk29_vmac_register_set(void)
1496 {
1497         //config rk29 vmac as rmii, 100MHz
1498         u32 value= readl(RK29_GRF_BASE + 0xbc);
1499         value = (value & 0xfff7ff) | (0x400);
1500         writel(value, RK29_GRF_BASE + 0xbc);
1501         return 0;
1502 }
1503
1504 static int rk29_rmii_io_init(void)
1505 {
1506         int err;
1507
1508         //phy power gpio
1509         err = gpio_request(RK29_PIN6_PB0, "phy_power_en");
1510         if (err) {
1511                 gpio_free(RK29_PIN6_PB0);
1512                 printk("-------request RK29_PIN6_PB0 fail--------\n");
1513                 return -1;
1514         }
1515         //phy power down
1516         gpio_direction_output(RK29_PIN6_PB0, GPIO_LOW);
1517         gpio_set_value(RK29_PIN6_PB0, GPIO_LOW);
1518
1519         return 0;
1520 }
1521
1522 static int rk29_rmii_io_deinit(void)
1523 {
1524         //phy power down
1525         gpio_direction_output(RK29_PIN6_PB0, GPIO_LOW);
1526         gpio_set_value(RK29_PIN6_PB0, GPIO_LOW);
1527         //free
1528         gpio_free(RK29_PIN6_PB0);
1529         return 0;
1530 }
1531
1532 static int rk29_rmii_power_control(int enable)
1533 {
1534         if (enable) {
1535                 //enable phy power
1536                 gpio_direction_output(RK29_PIN6_PB0, GPIO_HIGH);
1537                 gpio_set_value(RK29_PIN6_PB0, GPIO_HIGH);
1538         }
1539         else {
1540                 gpio_direction_output(RK29_PIN6_PB0, GPIO_LOW);
1541                 gpio_set_value(RK29_PIN6_PB0, GPIO_LOW);
1542         }
1543         return 0;
1544 }
1545
1546 struct rk29_vmac_platform_data rk29_vmac_pdata = {
1547         .vmac_register_set = rk29_vmac_register_set,
1548         .rmii_io_init = rk29_rmii_io_init,
1549         .rmii_io_deinit = rk29_rmii_io_deinit,
1550         .rmii_power_control = rk29_rmii_power_control,
1551 };
1552
1553 /*****************************************************************************************
1554  * spi devices
1555  * author: cmc@rock-chips.com
1556  *****************************************************************************************/
1557 #define SPI_CHIPSELECT_NUM 2
1558 static struct spi_cs_gpio rk29xx_spi0_cs_gpios[SPI_CHIPSELECT_NUM] = {
1559     {
1560                 .name = "spi0 cs0",
1561                 .cs_gpio = RK29_PIN2_PC1,
1562                 .cs_iomux_name = GPIO2C1_SPI0CSN0_NAME,
1563                 .cs_iomux_mode = GPIO2H_SPI0_CSN0,
1564         },
1565         {
1566                 .name = "spi0 cs1",
1567                 .cs_gpio = RK29_PIN1_PA4,
1568                 .cs_iomux_name = GPIO1A4_EMMCWRITEPRT_SPI0CS1_NAME,//if no iomux,set it NULL
1569                 .cs_iomux_mode = GPIO1L_SPI0_CSN1,
1570         }
1571 };
1572
1573 static struct spi_cs_gpio rk29xx_spi1_cs_gpios[SPI_CHIPSELECT_NUM] = {
1574     {
1575                 .name = "spi1 cs0",
1576                 .cs_gpio = RK29_PIN2_PC5,
1577                 .cs_iomux_name = GPIO2C5_SPI1CSN0_NAME,
1578                 .cs_iomux_mode = GPIO2H_SPI1_CSN0,
1579         },
1580         {
1581                 .name = "spi1 cs1",
1582                 .cs_gpio = RK29_PIN1_PA3,
1583                 .cs_iomux_name = GPIO1A3_EMMCDETECTN_SPI1CS1_NAME,//if no iomux,set it NULL
1584                 .cs_iomux_mode = GPIO1L_SPI1_CSN1,
1585         }
1586 };
1587
1588 static int spi_io_init(struct spi_cs_gpio *cs_gpios, int cs_num)
1589 {
1590 #if 1
1591         int i;
1592         if (cs_gpios) {
1593                 for (i=0; i<cs_num; i++) {
1594                         rk29_mux_api_set(cs_gpios[i].cs_iomux_name, cs_gpios[i].cs_iomux_mode);
1595                 }
1596         }
1597 #endif
1598         return 0;
1599 }
1600
1601 static int spi_io_deinit(struct spi_cs_gpio *cs_gpios, int cs_num)
1602 {
1603         return 0;
1604 }
1605
1606 static int spi_io_fix_leakage_bug(void)
1607 {
1608 #if 0
1609         gpio_direction_output(RK29_PIN2_PC1, GPIO_LOW);
1610 #endif
1611         return 0;
1612 }
1613
1614 static int spi_io_resume_leakage_bug(void)
1615 {
1616 #if 0
1617         gpio_direction_output(RK29_PIN2_PC1, GPIO_HIGH);
1618 #endif
1619         return 0;
1620 }
1621
1622 struct rk29xx_spi_platform_data rk29xx_spi0_platdata = {
1623         .num_chipselect = SPI_CHIPSELECT_NUM,
1624         .chipselect_gpios = rk29xx_spi0_cs_gpios,
1625         .io_init = spi_io_init,
1626         .io_deinit = spi_io_deinit,
1627         .io_fix_leakage_bug = spi_io_fix_leakage_bug,
1628         .io_resume_leakage_bug = spi_io_resume_leakage_bug,
1629 };
1630
1631 struct rk29xx_spi_platform_data rk29xx_spi1_platdata = {
1632         .num_chipselect = SPI_CHIPSELECT_NUM,
1633         .chipselect_gpios = rk29xx_spi1_cs_gpios,
1634         .io_init = spi_io_init,
1635         .io_deinit = spi_io_deinit,
1636         .io_fix_leakage_bug = spi_io_fix_leakage_bug,
1637         .io_resume_leakage_bug = spi_io_resume_leakage_bug,
1638 };
1639
1640
1641 static struct spi_board_info board_spi_devices[] = {
1642 };
1643
1644
1645 static void __init rk29_gic_init_irq(void)
1646 {
1647         gic_dist_init(0, (void __iomem *)RK29_GICPERI_BASE, 32);
1648         gic_cpu_init(0, (void __iomem *)RK29_GICCPU_BASE);
1649 }
1650
1651 static void __init machine_rk29_init_irq(void)
1652 {
1653         rk29_gic_init_irq();
1654         rk29_gpio_init();
1655 }
1656
1657 static void __init machine_rk29_board_init(void)
1658 {
1659         rk29_board_iomux_init();
1660
1661         board_power_init();
1662
1663                 platform_add_devices(devices, ARRAY_SIZE(devices));
1664 #ifdef CONFIG_I2C0_RK29
1665         i2c_register_board_info(default_i2c0_data.bus_num, board_i2c0_devices,
1666                         ARRAY_SIZE(board_i2c0_devices));
1667 #endif
1668 #ifdef CONFIG_I2C1_RK29
1669         i2c_register_board_info(default_i2c1_data.bus_num, board_i2c1_devices,
1670                         ARRAY_SIZE(board_i2c1_devices));
1671 #endif
1672 #ifdef CONFIG_I2C2_RK29
1673         i2c_register_board_info(default_i2c2_data.bus_num, board_i2c2_devices,
1674                         ARRAY_SIZE(board_i2c2_devices));
1675 #endif
1676 #ifdef CONFIG_I2C3_RK29
1677         i2c_register_board_info(default_i2c3_data.bus_num, board_i2c3_devices,
1678                         ARRAY_SIZE(board_i2c3_devices));
1679 #endif
1680
1681         spi_register_board_info(board_spi_devices, ARRAY_SIZE(board_spi_devices));
1682         
1683 #ifdef CONFIG_WIFI_CONTROL_FUNC
1684         rk29sdk_wifi_bt_gpio_control_init();
1685         rk29sdk_init_wifi_mem();
1686 #endif
1687
1688         board_usb_detect_init(RK29_PIN0_PA0);
1689 }
1690
1691 static void __init machine_rk29_fixup(struct machine_desc *desc, struct tag *tags,
1692                                         char **cmdline, struct meminfo *mi)
1693 {
1694         mi->nr_banks = 1;
1695         mi->bank[0].start = RK29_SDRAM_PHYS;
1696         mi->bank[0].node = PHYS_TO_NID(RK29_SDRAM_PHYS);
1697         mi->bank[0].size = LINUX_SIZE;
1698 #if SDRAM_SIZE > SZ_512M
1699         mi->nr_banks = 2;
1700         mi->bank[1].start = RK29_SDRAM_PHYS + SZ_512M;
1701         mi->bank[1].size = SDRAM_SIZE - SZ_512M;
1702 #endif
1703 }
1704
1705 static void __init machine_rk29_mapio(void)
1706 {
1707         rk29_map_common_io();
1708         rk29_setup_early_printk();
1709         rk29_sram_init();
1710         rk29_clock_init(periph_pll_288mhz);
1711         rk29_iomux_init();
1712         ddr_init(DDR_TYPE, DDR_FREQ);
1713 }
1714
1715 MACHINE_START(RK29, "RK29board")
1716         /* UART for LL DEBUG */
1717         .phys_io        = RK29_UART1_PHYS & 0xfff00000,
1718         .io_pg_offst    = ((RK29_UART1_BASE) >> 18) & 0xfffc,
1719         .boot_params    = RK29_SDRAM_PHYS + 0x88000,
1720         .fixup          = machine_rk29_fixup,
1721         .map_io         = machine_rk29_mapio,
1722         .init_irq       = machine_rk29_init_irq,
1723         .init_machine   = machine_rk29_board_init,
1724         .timer          = &rk29_timer,
1725 MACHINE_END