2 * arch/arm/mach-orion5x/common.c
4 * Core functions for Marvell Orion 5x SoCs
6 * Maintainer: Tzachi Perelstein <tzachi@marvell.com>
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied.
13 #include <linux/kernel.h>
14 #include <linux/init.h>
15 #include <linux/platform_device.h>
16 #include <linux/dma-mapping.h>
17 #include <linux/serial_8250.h>
18 #include <linux/mv643xx_i2c.h>
19 #include <linux/ata_platform.h>
20 #include <linux/delay.h>
21 #include <linux/clk-provider.h>
24 #include <asm/setup.h>
25 #include <asm/system_misc.h>
26 #include <asm/timex.h>
27 #include <asm/mach/arch.h>
28 #include <asm/mach/map.h>
29 #include <asm/mach/time.h>
30 #include <mach/bridge-regs.h>
31 #include <mach/hardware.h>
32 #include <mach/orion5x.h>
33 #include <plat/orion_nand.h>
34 #include <plat/ehci-orion.h>
35 #include <plat/time.h>
36 #include <plat/common.h>
37 #include <plat/addr-map.h>
40 /*****************************************************************************
42 ****************************************************************************/
43 static struct map_desc orion5x_io_desc[] __initdata = {
45 .virtual = ORION5X_REGS_VIRT_BASE,
46 .pfn = __phys_to_pfn(ORION5X_REGS_PHYS_BASE),
47 .length = ORION5X_REGS_SIZE,
50 .virtual = ORION5X_PCIE_IO_VIRT_BASE,
51 .pfn = __phys_to_pfn(ORION5X_PCIE_IO_PHYS_BASE),
52 .length = ORION5X_PCIE_IO_SIZE,
55 .virtual = ORION5X_PCI_IO_VIRT_BASE,
56 .pfn = __phys_to_pfn(ORION5X_PCI_IO_PHYS_BASE),
57 .length = ORION5X_PCI_IO_SIZE,
60 .virtual = ORION5X_PCIE_WA_VIRT_BASE,
61 .pfn = __phys_to_pfn(ORION5X_PCIE_WA_PHYS_BASE),
62 .length = ORION5X_PCIE_WA_SIZE,
67 void __init orion5x_map_io(void)
69 iotable_init(orion5x_io_desc, ARRAY_SIZE(orion5x_io_desc));
73 /*****************************************************************************
75 ****************************************************************************/
76 static struct clk *tclk;
78 static void __init clk_init(void)
80 tclk = clk_register_fixed_rate(NULL, "tclk", NULL, CLK_IS_ROOT,
83 orion_clkdev_init(tclk);
86 /*****************************************************************************
88 ****************************************************************************/
89 void __init orion5x_ehci0_init(void)
91 orion_ehci_init(ORION5X_USB0_PHYS_BASE, IRQ_ORION5X_USB0_CTRL,
96 /*****************************************************************************
98 ****************************************************************************/
99 void __init orion5x_ehci1_init(void)
101 orion_ehci_1_init(ORION5X_USB1_PHYS_BASE, IRQ_ORION5X_USB1_CTRL);
105 /*****************************************************************************
107 ****************************************************************************/
108 void __init orion5x_eth_init(struct mv643xx_eth_platform_data *eth_data)
110 orion_ge00_init(eth_data,
111 ORION5X_ETH_PHYS_BASE, IRQ_ORION5X_ETH_SUM,
112 IRQ_ORION5X_ETH_ERR);
116 /*****************************************************************************
118 ****************************************************************************/
119 void __init orion5x_eth_switch_init(struct dsa_platform_data *d, int irq)
121 orion_ge00_switch_init(d, irq);
125 /*****************************************************************************
127 ****************************************************************************/
128 void __init orion5x_i2c_init(void)
130 orion_i2c_init(I2C_PHYS_BASE, IRQ_ORION5X_I2C, 8);
135 /*****************************************************************************
137 ****************************************************************************/
138 void __init orion5x_sata_init(struct mv_sata_platform_data *sata_data)
140 orion_sata_init(sata_data, ORION5X_SATA_PHYS_BASE, IRQ_ORION5X_SATA);
144 /*****************************************************************************
146 ****************************************************************************/
147 void __init orion5x_spi_init()
149 orion_spi_init(SPI_PHYS_BASE);
153 /*****************************************************************************
155 ****************************************************************************/
156 void __init orion5x_uart0_init(void)
158 orion_uart0_init(UART0_VIRT_BASE, UART0_PHYS_BASE,
159 IRQ_ORION5X_UART0, tclk);
162 /*****************************************************************************
164 ****************************************************************************/
165 void __init orion5x_uart1_init(void)
167 orion_uart1_init(UART1_VIRT_BASE, UART1_PHYS_BASE,
168 IRQ_ORION5X_UART1, tclk);
171 /*****************************************************************************
173 ****************************************************************************/
174 void __init orion5x_xor_init(void)
176 orion_xor0_init(ORION5X_XOR_PHYS_BASE,
177 ORION5X_XOR_PHYS_BASE + 0x200,
178 IRQ_ORION5X_XOR0, IRQ_ORION5X_XOR1);
181 /*****************************************************************************
182 * Cryptographic Engines and Security Accelerator (CESA)
183 ****************************************************************************/
184 static void __init orion5x_crypto_init(void)
186 orion5x_setup_sram_win();
187 orion_crypto_init(ORION5X_CRYPTO_PHYS_BASE, ORION5X_SRAM_PHYS_BASE,
188 SZ_8K, IRQ_ORION5X_CESA);
191 /*****************************************************************************
193 ****************************************************************************/
194 void __init orion5x_wdt_init(void)
200 /*****************************************************************************
202 ****************************************************************************/
203 void __init orion5x_init_early(void)
205 orion_time_set_base(TIMER_VIRT_BASE);
210 int __init orion5x_find_tclk(void)
214 orion5x_pcie_id(&dev, &rev);
215 if (dev == MV88F6183_DEV_ID &&
216 (readl(MPP_RESET_SAMPLE) & 0x00000200) == 0)
222 static void __init orion5x_timer_init(void)
224 orion5x_tclk = orion5x_find_tclk();
226 orion_time_init(ORION5X_BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR,
227 IRQ_ORION5X_BRIDGE, orion5x_tclk);
230 struct sys_timer orion5x_timer = {
231 .init = orion5x_timer_init,
235 /*****************************************************************************
237 ****************************************************************************/
239 * Identify device ID and rev from PCIe configuration header space '0'.
241 static void __init orion5x_id(u32 *dev, u32 *rev, char **dev_name)
243 orion5x_pcie_id(dev, rev);
245 if (*dev == MV88F5281_DEV_ID) {
246 if (*rev == MV88F5281_REV_D2) {
247 *dev_name = "MV88F5281-D2";
248 } else if (*rev == MV88F5281_REV_D1) {
249 *dev_name = "MV88F5281-D1";
250 } else if (*rev == MV88F5281_REV_D0) {
251 *dev_name = "MV88F5281-D0";
253 *dev_name = "MV88F5281-Rev-Unsupported";
255 } else if (*dev == MV88F5182_DEV_ID) {
256 if (*rev == MV88F5182_REV_A2) {
257 *dev_name = "MV88F5182-A2";
259 *dev_name = "MV88F5182-Rev-Unsupported";
261 } else if (*dev == MV88F5181_DEV_ID) {
262 if (*rev == MV88F5181_REV_B1) {
263 *dev_name = "MV88F5181-Rev-B1";
264 } else if (*rev == MV88F5181L_REV_A1) {
265 *dev_name = "MV88F5181L-Rev-A1";
267 *dev_name = "MV88F5181(L)-Rev-Unsupported";
269 } else if (*dev == MV88F6183_DEV_ID) {
270 if (*rev == MV88F6183_REV_B0) {
271 *dev_name = "MV88F6183-Rev-B0";
273 *dev_name = "MV88F6183-Rev-Unsupported";
276 *dev_name = "Device-Unknown";
280 void __init orion5x_init(void)
285 orion5x_id(&dev, &rev, &dev_name);
286 printk(KERN_INFO "Orion ID: %s. TCLK=%d.\n", dev_name, orion5x_tclk);
289 * Setup Orion address map
291 orion5x_setup_cpu_mbus_bridge();
293 /* Setup root of clk tree */
297 * Don't issue "Wait for Interrupt" instruction if we are
298 * running on D0 5281 silicon.
300 if (dev == MV88F5281_DEV_ID && rev == MV88F5281_REV_D0) {
301 printk(KERN_INFO "Orion: Applying 5281 D0 WFI workaround.\n");
306 * The 5082/5181l/5182/6082/6082l/6183 have crypto
307 * while 5180n/5181/5281 don't have crypto.
309 if ((dev == MV88F5181_DEV_ID && rev >= MV88F5181L_REV_A0) ||
310 dev == MV88F5182_DEV_ID || dev == MV88F6183_DEV_ID)
311 orion5x_crypto_init();
314 * Register watchdog driver
319 void orion5x_restart(char mode, const char *cmd)
322 * Enable and issue soft reset
324 orion5x_setbits(RSTOUTn_MASK, (1 << 2));
325 orion5x_setbits(CPU_SOFT_RESET, 1);
327 orion5x_clrbits(CPU_SOFT_RESET, 1);
331 * Many orion-based systems have buggy bootloader implementations.
332 * This is a common fixup for bogus memory tags.
334 void __init tag_fixup_mem32(struct tag *t, char **from,
335 struct meminfo *meminfo)
337 for (; t->hdr.size; t = tag_next(t))
338 if (t->hdr.tag == ATAG_MEM &&
339 (!t->u.mem.size || t->u.mem.size & ~PAGE_MASK ||
340 t->u.mem.start & ~PAGE_MASK)) {
342 "Clearing invalid memory bank %dKB@0x%08x\n",
343 t->u.mem.size / 1024, t->u.mem.start);