2 * arch/arm/mach-orion5x/common.c
4 * Core functions for Marvell Orion 5x SoCs
6 * Maintainer: Tzachi Perelstein <tzachi@marvell.com>
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied.
13 #include <linux/kernel.h>
14 #include <linux/init.h>
15 #include <linux/platform_device.h>
16 #include <linux/dma-mapping.h>
17 #include <linux/serial_8250.h>
18 #include <linux/mv643xx_i2c.h>
19 #include <linux/ata_platform.h>
20 #include <linux/delay.h>
21 #include <linux/clk-provider.h>
22 #include <linux/cpu.h>
25 #include <asm/setup.h>
26 #include <asm/system_misc.h>
27 #include <asm/timex.h>
28 #include <asm/mach/arch.h>
29 #include <asm/mach/map.h>
30 #include <asm/mach/time.h>
31 #include <mach/bridge-regs.h>
32 #include <mach/hardware.h>
33 #include <mach/orion5x.h>
34 #include <linux/platform_data/mtd-orion_nand.h>
35 #include <linux/platform_data/usb-ehci-orion.h>
36 #include <plat/time.h>
37 #include <plat/common.h>
38 #include <plat/addr-map.h>
41 /*****************************************************************************
43 ****************************************************************************/
44 static struct map_desc orion5x_io_desc[] __initdata = {
46 .virtual = (unsigned long) ORION5X_REGS_VIRT_BASE,
47 .pfn = __phys_to_pfn(ORION5X_REGS_PHYS_BASE),
48 .length = ORION5X_REGS_SIZE,
51 .virtual = (unsigned long) ORION5X_PCIE_WA_VIRT_BASE,
52 .pfn = __phys_to_pfn(ORION5X_PCIE_WA_PHYS_BASE),
53 .length = ORION5X_PCIE_WA_SIZE,
58 void __init orion5x_map_io(void)
60 iotable_init(orion5x_io_desc, ARRAY_SIZE(orion5x_io_desc));
64 /*****************************************************************************
66 ****************************************************************************/
67 static struct clk *tclk;
69 void __init clk_init(void)
71 tclk = clk_register_fixed_rate(NULL, "tclk", NULL, CLK_IS_ROOT,
74 orion_clkdev_init(tclk);
77 /*****************************************************************************
79 ****************************************************************************/
80 void __init orion5x_ehci0_init(void)
82 orion_ehci_init(ORION5X_USB0_PHYS_BASE, IRQ_ORION5X_USB0_CTRL,
87 /*****************************************************************************
89 ****************************************************************************/
90 void __init orion5x_ehci1_init(void)
92 orion_ehci_1_init(ORION5X_USB1_PHYS_BASE, IRQ_ORION5X_USB1_CTRL);
96 /*****************************************************************************
98 ****************************************************************************/
99 void __init orion5x_eth_init(struct mv643xx_eth_platform_data *eth_data)
101 orion_ge00_init(eth_data,
102 ORION5X_ETH_PHYS_BASE, IRQ_ORION5X_ETH_SUM,
104 MV643XX_TX_CSUM_DEFAULT_LIMIT);
108 /*****************************************************************************
110 ****************************************************************************/
111 void __init orion5x_eth_switch_init(struct dsa_platform_data *d, int irq)
113 orion_ge00_switch_init(d, irq);
117 /*****************************************************************************
119 ****************************************************************************/
120 void __init orion5x_i2c_init(void)
122 orion_i2c_init(I2C_PHYS_BASE, IRQ_ORION5X_I2C, 8);
127 /*****************************************************************************
129 ****************************************************************************/
130 void __init orion5x_sata_init(struct mv_sata_platform_data *sata_data)
132 orion_sata_init(sata_data, ORION5X_SATA_PHYS_BASE, IRQ_ORION5X_SATA);
136 /*****************************************************************************
138 ****************************************************************************/
139 void __init orion5x_spi_init()
141 orion_spi_init(SPI_PHYS_BASE);
145 /*****************************************************************************
147 ****************************************************************************/
148 void __init orion5x_uart0_init(void)
150 orion_uart0_init(UART0_VIRT_BASE, UART0_PHYS_BASE,
151 IRQ_ORION5X_UART0, tclk);
154 /*****************************************************************************
156 ****************************************************************************/
157 void __init orion5x_uart1_init(void)
159 orion_uart1_init(UART1_VIRT_BASE, UART1_PHYS_BASE,
160 IRQ_ORION5X_UART1, tclk);
163 /*****************************************************************************
165 ****************************************************************************/
166 void __init orion5x_xor_init(void)
168 orion_xor0_init(ORION5X_XOR_PHYS_BASE,
169 ORION5X_XOR_PHYS_BASE + 0x200,
170 IRQ_ORION5X_XOR0, IRQ_ORION5X_XOR1);
173 /*****************************************************************************
174 * Cryptographic Engines and Security Accelerator (CESA)
175 ****************************************************************************/
176 static void __init orion5x_crypto_init(void)
178 orion5x_setup_sram_win();
179 orion_crypto_init(ORION5X_CRYPTO_PHYS_BASE, ORION5X_SRAM_PHYS_BASE,
180 SZ_8K, IRQ_ORION5X_CESA);
183 /*****************************************************************************
185 ****************************************************************************/
186 void __init orion5x_wdt_init(void)
192 /*****************************************************************************
194 ****************************************************************************/
195 void __init orion5x_init_early(void)
197 orion_time_set_base(TIMER_VIRT_BASE);
200 * Some Orion5x devices allocate their coherent buffers from atomic
201 * context. Increase size of atomic coherent pool to make sure such
202 * the allocations won't fail.
204 init_dma_coherent_pool_size(SZ_1M);
209 int __init orion5x_find_tclk(void)
213 orion5x_pcie_id(&dev, &rev);
214 if (dev == MV88F6183_DEV_ID &&
215 (readl(MPP_RESET_SAMPLE) & 0x00000200) == 0)
221 void __init orion5x_timer_init(void)
223 orion5x_tclk = orion5x_find_tclk();
225 orion_time_init(ORION5X_BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR,
226 IRQ_ORION5X_BRIDGE, orion5x_tclk);
230 /*****************************************************************************
232 ****************************************************************************/
234 * Identify device ID and rev from PCIe configuration header space '0'.
236 void __init orion5x_id(u32 *dev, u32 *rev, char **dev_name)
238 orion5x_pcie_id(dev, rev);
240 if (*dev == MV88F5281_DEV_ID) {
241 if (*rev == MV88F5281_REV_D2) {
242 *dev_name = "MV88F5281-D2";
243 } else if (*rev == MV88F5281_REV_D1) {
244 *dev_name = "MV88F5281-D1";
245 } else if (*rev == MV88F5281_REV_D0) {
246 *dev_name = "MV88F5281-D0";
248 *dev_name = "MV88F5281-Rev-Unsupported";
250 } else if (*dev == MV88F5182_DEV_ID) {
251 if (*rev == MV88F5182_REV_A2) {
252 *dev_name = "MV88F5182-A2";
254 *dev_name = "MV88F5182-Rev-Unsupported";
256 } else if (*dev == MV88F5181_DEV_ID) {
257 if (*rev == MV88F5181_REV_B1) {
258 *dev_name = "MV88F5181-Rev-B1";
259 } else if (*rev == MV88F5181L_REV_A1) {
260 *dev_name = "MV88F5181L-Rev-A1";
262 *dev_name = "MV88F5181(L)-Rev-Unsupported";
264 } else if (*dev == MV88F6183_DEV_ID) {
265 if (*rev == MV88F6183_REV_B0) {
266 *dev_name = "MV88F6183-Rev-B0";
268 *dev_name = "MV88F6183-Rev-Unsupported";
271 *dev_name = "Device-Unknown";
275 void __init orion5x_init(void)
280 orion5x_id(&dev, &rev, &dev_name);
281 printk(KERN_INFO "Orion ID: %s. TCLK=%d.\n", dev_name, orion5x_tclk);
284 * Setup Orion address map
286 orion5x_setup_cpu_mbus_bridge();
288 /* Setup root of clk tree */
292 * Don't issue "Wait for Interrupt" instruction if we are
293 * running on D0 5281 silicon.
295 if (dev == MV88F5281_DEV_ID && rev == MV88F5281_REV_D0) {
296 printk(KERN_INFO "Orion: Applying 5281 D0 WFI workaround.\n");
297 cpu_idle_poll_ctrl(true);
301 * The 5082/5181l/5182/6082/6082l/6183 have crypto
302 * while 5180n/5181/5281 don't have crypto.
304 if ((dev == MV88F5181_DEV_ID && rev >= MV88F5181L_REV_A0) ||
305 dev == MV88F5182_DEV_ID || dev == MV88F6183_DEV_ID)
306 orion5x_crypto_init();
309 * Register watchdog driver
314 void orion5x_restart(char mode, const char *cmd)
317 * Enable and issue soft reset
319 orion5x_setbits(RSTOUTn_MASK, (1 << 2));
320 orion5x_setbits(CPU_SOFT_RESET, 1);
322 orion5x_clrbits(CPU_SOFT_RESET, 1);
326 * Many orion-based systems have buggy bootloader implementations.
327 * This is a common fixup for bogus memory tags.
329 void __init tag_fixup_mem32(struct tag *t, char **from,
330 struct meminfo *meminfo)
332 for (; t->hdr.size; t = tag_next(t))
333 if (t->hdr.tag == ATAG_MEM &&
334 (!t->u.mem.size || t->u.mem.size & ~PAGE_MASK ||
335 t->u.mem.start & ~PAGE_MASK)) {
337 "Clearing invalid memory bank %dKB@0x%08x\n",
338 t->u.mem.size / 1024, t->u.mem.start);