2 * OMAP2+ common Power & Reset Management (PRM) IP block functions
4 * Copyright (C) 2011 Texas Instruments, Inc.
5 * Tero Kristo <t-kristo@ti.com>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
12 * For historical purposes, the API used to configure the PRM
13 * interrupt handler refers to it as the "PRCM interrupt." The
14 * underlying registers are located in the PRM on OMAP3/4.
16 * XXX This code should eventually be moved to a PRM driver.
19 #include <linux/kernel.h>
20 #include <linux/module.h>
21 #include <linux/init.h>
23 #include <linux/irq.h>
24 #include <linux/interrupt.h>
25 #include <linux/slab.h>
27 #include <linux/of_address.h>
28 #include <linux/clk-provider.h>
29 #include <linux/clk/ti.h>
32 #include "prm2xxx_3xxx.h"
40 * OMAP_PRCM_MAX_NR_PENDING_REG: maximum number of PRM_IRQ*_MPU regs
41 * XXX this is technically not needed, since
42 * omap_prcm_register_chain_handler() could allocate this based on the
43 * actual amount of memory needed for the SoC
45 #define OMAP_PRCM_MAX_NR_PENDING_REG 2
48 * prcm_irq_chips: an array of all of the "generic IRQ chips" in use
49 * by the PRCM interrupt handler code. There will be one 'chip' per
50 * PRM_{IRQSTATUS,IRQENABLE}_MPU register pair. (So OMAP3 will have
51 * one "chip" and OMAP4 will have two.)
53 static struct irq_chip_generic **prcm_irq_chips;
56 * prcm_irq_setup: the PRCM IRQ parameters for the hardware the code
57 * is currently running on. Defined and passed by initialization code
58 * that calls omap_prcm_register_chain_handler().
60 static struct omap_prcm_irq_setup *prcm_irq_setup;
62 /* prm_base: base virtual address of the PRM IP block */
63 void __iomem *prm_base;
68 * prm_ll_data: function pointers to SoC-specific implementations of
69 * common PRM functions
71 static struct prm_ll_data null_prm_ll_data;
72 static struct prm_ll_data *prm_ll_data = &null_prm_ll_data;
74 /* Private functions */
77 * Move priority events from events to priority_events array
79 static void omap_prcm_events_filter_priority(unsigned long *events,
80 unsigned long *priority_events)
84 for (i = 0; i < prcm_irq_setup->nr_regs; i++) {
86 events[i] & prcm_irq_setup->priority_mask[i];
87 events[i] ^= priority_events[i];
92 * PRCM Interrupt Handler
94 * This is a common handler for the OMAP PRCM interrupts. Pending
95 * interrupts are detected by a call to prcm_pending_events and
96 * dispatched accordingly. Clearing of the wakeup events should be
97 * done by the SoC specific individual handlers.
99 static void omap_prcm_irq_handler(unsigned int irq, struct irq_desc *desc)
101 unsigned long pending[OMAP_PRCM_MAX_NR_PENDING_REG];
102 unsigned long priority_pending[OMAP_PRCM_MAX_NR_PENDING_REG];
103 struct irq_chip *chip = irq_desc_get_chip(desc);
104 unsigned int virtirq;
105 int nr_irq = prcm_irq_setup->nr_regs * 32;
108 * If we are suspended, mask all interrupts from PRCM level,
109 * this does not ack them, and they will be pending until we
110 * re-enable the interrupts, at which point the
111 * omap_prcm_irq_handler will be executed again. The
112 * _save_and_clear_irqen() function must ensure that the PRM
113 * write to disable all IRQs has reached the PRM before
114 * returning, or spurious PRCM interrupts may occur during
117 if (prcm_irq_setup->suspended) {
118 prcm_irq_setup->save_and_clear_irqen(prcm_irq_setup->saved_mask);
119 prcm_irq_setup->suspend_save_flag = true;
123 * Loop until all pending irqs are handled, since
124 * generic_handle_irq() can cause new irqs to come
126 while (!prcm_irq_setup->suspended) {
127 prcm_irq_setup->read_pending_irqs(pending);
129 /* No bit set, then all IRQs are handled */
130 if (find_first_bit(pending, nr_irq) >= nr_irq)
133 omap_prcm_events_filter_priority(pending, priority_pending);
136 * Loop on all currently pending irqs so that new irqs
137 * cannot starve previously pending irqs
140 /* Serve priority events first */
141 for_each_set_bit(virtirq, priority_pending, nr_irq)
142 generic_handle_irq(prcm_irq_setup->base_irq + virtirq);
144 /* Serve normal events next */
145 for_each_set_bit(virtirq, pending, nr_irq)
146 generic_handle_irq(prcm_irq_setup->base_irq + virtirq);
149 chip->irq_ack(&desc->irq_data);
151 chip->irq_eoi(&desc->irq_data);
152 chip->irq_unmask(&desc->irq_data);
154 prcm_irq_setup->ocp_barrier(); /* avoid spurious IRQs */
157 /* Public functions */
160 * omap_prcm_event_to_irq - given a PRCM event name, returns the
161 * corresponding IRQ on which the handler should be registered
162 * @name: name of the PRCM interrupt bit to look up - see struct omap_prcm_irq
164 * Returns the Linux internal IRQ ID corresponding to @name upon success,
165 * or -ENOENT upon failure.
167 int omap_prcm_event_to_irq(const char *name)
171 if (!prcm_irq_setup || !name)
174 for (i = 0; i < prcm_irq_setup->nr_irqs; i++)
175 if (!strcmp(prcm_irq_setup->irqs[i].name, name))
176 return prcm_irq_setup->base_irq +
177 prcm_irq_setup->irqs[i].offset;
183 * omap_prcm_irq_cleanup - reverses memory allocated and other steps
184 * done by omap_prcm_register_chain_handler()
188 void omap_prcm_irq_cleanup(void)
193 if (!prcm_irq_setup) {
194 pr_err("PRCM: IRQ handler not initialized; cannot cleanup\n");
198 if (prcm_irq_chips) {
199 for (i = 0; i < prcm_irq_setup->nr_regs; i++) {
200 if (prcm_irq_chips[i])
201 irq_remove_generic_chip(prcm_irq_chips[i],
203 prcm_irq_chips[i] = NULL;
205 kfree(prcm_irq_chips);
206 prcm_irq_chips = NULL;
209 kfree(prcm_irq_setup->saved_mask);
210 prcm_irq_setup->saved_mask = NULL;
212 kfree(prcm_irq_setup->priority_mask);
213 prcm_irq_setup->priority_mask = NULL;
215 if (prcm_irq_setup->xlate_irq)
216 irq = prcm_irq_setup->xlate_irq(prcm_irq_setup->irq);
218 irq = prcm_irq_setup->irq;
219 irq_set_chained_handler(irq, NULL);
221 if (prcm_irq_setup->base_irq > 0)
222 irq_free_descs(prcm_irq_setup->base_irq,
223 prcm_irq_setup->nr_regs * 32);
224 prcm_irq_setup->base_irq = 0;
227 void omap_prcm_irq_prepare(void)
229 prcm_irq_setup->suspended = true;
232 void omap_prcm_irq_complete(void)
234 prcm_irq_setup->suspended = false;
236 /* If we have not saved the masks, do not attempt to restore */
237 if (!prcm_irq_setup->suspend_save_flag)
240 prcm_irq_setup->suspend_save_flag = false;
243 * Re-enable all masked PRCM irq sources, this causes the PRCM
244 * interrupt to fire immediately if the events were masked
245 * previously in the chain handler
247 prcm_irq_setup->restore_irqen(prcm_irq_setup->saved_mask);
251 * omap_prcm_register_chain_handler - initializes the prcm chained interrupt
252 * handler based on provided parameters
253 * @irq_setup: hardware data about the underlying PRM/PRCM
255 * Set up the PRCM chained interrupt handler on the PRCM IRQ. Sets up
256 * one generic IRQ chip per PRM interrupt status/enable register pair.
257 * Returns 0 upon success, -EINVAL if called twice or if invalid
258 * arguments are passed, or -ENOMEM on any other error.
260 int omap_prcm_register_chain_handler(struct omap_prcm_irq_setup *irq_setup)
263 u32 mask[OMAP_PRCM_MAX_NR_PENDING_REG];
265 struct irq_chip_generic *gc;
266 struct irq_chip_type *ct;
272 nr_regs = irq_setup->nr_regs;
274 if (prcm_irq_setup) {
275 pr_err("PRCM: already initialized; won't reinitialize\n");
279 if (nr_regs > OMAP_PRCM_MAX_NR_PENDING_REG) {
280 pr_err("PRCM: nr_regs too large\n");
284 prcm_irq_setup = irq_setup;
286 prcm_irq_chips = kzalloc(sizeof(void *) * nr_regs, GFP_KERNEL);
287 prcm_irq_setup->saved_mask = kzalloc(sizeof(u32) * nr_regs, GFP_KERNEL);
288 prcm_irq_setup->priority_mask = kzalloc(sizeof(u32) * nr_regs,
291 if (!prcm_irq_chips || !prcm_irq_setup->saved_mask ||
292 !prcm_irq_setup->priority_mask) {
293 pr_err("PRCM: kzalloc failed\n");
297 memset(mask, 0, sizeof(mask));
299 for (i = 0; i < irq_setup->nr_irqs; i++) {
300 offset = irq_setup->irqs[i].offset;
301 mask[offset >> 5] |= 1 << (offset & 0x1f);
302 if (irq_setup->irqs[i].priority)
303 irq_setup->priority_mask[offset >> 5] |=
304 1 << (offset & 0x1f);
307 if (irq_setup->xlate_irq)
308 irq = irq_setup->xlate_irq(irq_setup->irq);
310 irq = irq_setup->irq;
311 irq_set_chained_handler(irq, omap_prcm_irq_handler);
313 irq_setup->base_irq = irq_alloc_descs(-1, 0, irq_setup->nr_regs * 32,
316 if (irq_setup->base_irq < 0) {
317 pr_err("PRCM: failed to allocate irq descs: %d\n",
318 irq_setup->base_irq);
322 for (i = 0; i < irq_setup->nr_regs; i++) {
323 gc = irq_alloc_generic_chip("PRCM", 1,
324 irq_setup->base_irq + i * 32, prm_base,
328 pr_err("PRCM: failed to allocate generic chip\n");
332 ct->chip.irq_ack = irq_gc_ack_set_bit;
333 ct->chip.irq_mask = irq_gc_mask_clr_bit;
334 ct->chip.irq_unmask = irq_gc_mask_set_bit;
336 ct->regs.ack = irq_setup->ack + i * 4;
337 ct->regs.mask = irq_setup->mask + i * 4;
339 irq_setup_generic_chip(gc, mask[i], 0, IRQ_NOREQUEST, 0);
340 prcm_irq_chips[i] = gc;
343 if (of_have_populated_dt()) {
344 int irq = omap_prcm_event_to_irq("io");
345 omap_pcs_legacy_init(irq, irq_setup->reconfigure_io_chain);
351 omap_prcm_irq_cleanup();
356 * omap2_set_globals_prm - set the PRM base address (for early use)
357 * @prm: PRM base virtual address
359 * XXX Will be replaced when the PRM/CM drivers are completed.
361 void __init omap2_set_globals_prm(void __iomem *prm)
367 * prm_read_reset_sources - return the sources of the SoC's last reset
369 * Return a u32 bitmask representing the reset sources that caused the
370 * SoC to reset. The low-level per-SoC functions called by this
371 * function remap the SoC-specific reset source bits into an
372 * OMAP-common set of reset source bits, defined in
373 * arch/arm/mach-omap2/prm.h. Returns the standardized reset source
374 * u32 bitmask from the hardware upon success, or returns (1 <<
375 * OMAP_UNKNOWN_RST_SRC_ID_SHIFT) if no low-level read_reset_sources()
376 * function was registered.
378 u32 prm_read_reset_sources(void)
380 u32 ret = 1 << OMAP_UNKNOWN_RST_SRC_ID_SHIFT;
382 if (prm_ll_data->read_reset_sources)
383 ret = prm_ll_data->read_reset_sources();
385 WARN_ONCE(1, "prm: %s: no mapping function defined for reset sources\n", __func__);
391 * prm_was_any_context_lost_old - was device context lost? (old API)
392 * @part: PRM partition ID (e.g., OMAP4430_PRM_PARTITION)
393 * @inst: PRM instance offset (e.g., OMAP4430_PRM_MPU_INST)
394 * @idx: CONTEXT register offset
396 * Return 1 if any bits were set in the *_CONTEXT_* register
397 * identified by (@part, @inst, @idx), which means that some context
398 * was lost for that module; otherwise, return 0. XXX Deprecated;
399 * callers need to use a less-SoC-dependent way to identify hardware
402 bool prm_was_any_context_lost_old(u8 part, s16 inst, u16 idx)
406 if (prm_ll_data->was_any_context_lost_old)
407 ret = prm_ll_data->was_any_context_lost_old(part, inst, idx);
409 WARN_ONCE(1, "prm: %s: no mapping function defined\n",
416 * prm_clear_context_lost_flags_old - clear context loss flags (old API)
417 * @part: PRM partition ID (e.g., OMAP4430_PRM_PARTITION)
418 * @inst: PRM instance offset (e.g., OMAP4430_PRM_MPU_INST)
419 * @idx: CONTEXT register offset
421 * Clear hardware context loss bits for the module identified by
422 * (@part, @inst, @idx). No return value. XXX Deprecated; callers
423 * need to use a less-SoC-dependent way to identify hardware IP
426 void prm_clear_context_loss_flags_old(u8 part, s16 inst, u16 idx)
428 if (prm_ll_data->clear_context_loss_flags_old)
429 prm_ll_data->clear_context_loss_flags_old(part, inst, idx);
431 WARN_ONCE(1, "prm: %s: no mapping function defined\n",
436 * omap_prm_assert_hardreset - assert hardreset for an IP block
437 * @shift: register bit shift corresponding to the reset line
438 * @part: PRM partition
439 * @prm_mod: PRM submodule base or instance offset
440 * @offset: register offset
442 * Asserts a hardware reset line for an IP block.
444 int omap_prm_assert_hardreset(u8 shift, u8 part, s16 prm_mod, u16 offset)
446 if (!prm_ll_data->assert_hardreset) {
447 WARN_ONCE(1, "prm: %s: no mapping function defined\n",
452 return prm_ll_data->assert_hardreset(shift, part, prm_mod, offset);
456 * omap_prm_deassert_hardreset - deassert hardreset for an IP block
457 * @shift: register bit shift corresponding to the reset line
458 * @st_shift: reset status bit shift corresponding to the reset line
459 * @part: PRM partition
460 * @prm_mod: PRM submodule base or instance offset
461 * @offset: register offset
462 * @st_offset: status register offset
464 * Deasserts a hardware reset line for an IP block.
466 int omap_prm_deassert_hardreset(u8 shift, u8 st_shift, u8 part, s16 prm_mod,
467 u16 offset, u16 st_offset)
469 if (!prm_ll_data->deassert_hardreset) {
470 WARN_ONCE(1, "prm: %s: no mapping function defined\n",
475 return prm_ll_data->deassert_hardreset(shift, st_shift, part, prm_mod,
480 * omap_prm_is_hardreset_asserted - check the hardreset status for an IP block
481 * @shift: register bit shift corresponding to the reset line
482 * @part: PRM partition
483 * @prm_mod: PRM submodule base or instance offset
484 * @offset: register offset
486 * Checks if a hardware reset line for an IP block is enabled or not.
488 int omap_prm_is_hardreset_asserted(u8 shift, u8 part, s16 prm_mod, u16 offset)
490 if (!prm_ll_data->is_hardreset_asserted) {
491 WARN_ONCE(1, "prm: %s: no mapping function defined\n",
496 return prm_ll_data->is_hardreset_asserted(shift, part, prm_mod, offset);
500 * omap_prm_reconfigure_io_chain - clear latches and reconfigure I/O chain
502 * Clear any previously-latched I/O wakeup events and ensure that the
503 * I/O wakeup gates are aligned with the current mux settings.
504 * Calls SoC specific I/O chain reconfigure function if available,
505 * otherwise does nothing.
507 void omap_prm_reconfigure_io_chain(void)
509 if (!prcm_irq_setup || !prcm_irq_setup->reconfigure_io_chain)
512 prcm_irq_setup->reconfigure_io_chain();
516 * omap_prm_reset_system - trigger global SW reset
518 * Triggers SoC specific global warm reset to reboot the device.
520 void omap_prm_reset_system(void)
522 if (!prm_ll_data->reset_system) {
523 WARN_ONCE(1, "prm: %s: no mapping function defined\n",
528 prm_ll_data->reset_system();
535 * prm_register - register per-SoC low-level data with the PRM
536 * @pld: low-level per-SoC OMAP PRM data & function pointers to register
538 * Register per-SoC low-level OMAP PRM data and function pointers with
539 * the OMAP PRM common interface. The caller must keep the data
540 * pointed to by @pld valid until it calls prm_unregister() and
541 * it returns successfully. Returns 0 upon success, -EINVAL if @pld
542 * is NULL, or -EEXIST if prm_register() has already been called
543 * without an intervening prm_unregister().
545 int prm_register(struct prm_ll_data *pld)
550 if (prm_ll_data != &null_prm_ll_data)
559 * prm_unregister - unregister per-SoC low-level data & function pointers
560 * @pld: low-level per-SoC OMAP PRM data & function pointers to unregister
562 * Unregister per-SoC low-level OMAP PRM data and function pointers
563 * that were previously registered with prm_register(). The
564 * caller may not destroy any of the data pointed to by @pld until
565 * this function returns successfully. Returns 0 upon success, or
566 * -EINVAL if @pld is NULL or if @pld does not match the struct
567 * prm_ll_data * previously registered by prm_register().
569 int prm_unregister(struct prm_ll_data *pld)
571 if (!pld || prm_ll_data != pld)
574 prm_ll_data = &null_prm_ll_data;
579 static const struct of_device_id omap_prcm_dt_match_table[] = {
580 { .compatible = "ti,am3-prcm" },
581 { .compatible = "ti,am3-scrm" },
582 { .compatible = "ti,am4-prcm" },
583 { .compatible = "ti,am4-scrm" },
584 { .compatible = "ti,omap2-prcm" },
585 { .compatible = "ti,omap2-scrm" },
586 { .compatible = "ti,omap3-prm" },
587 { .compatible = "ti,omap3-cm" },
588 { .compatible = "ti,omap3-scrm" },
589 { .compatible = "ti,omap4-cm1" },
590 { .compatible = "ti,omap4-prm" },
591 { .compatible = "ti,omap4-cm2" },
592 { .compatible = "ti,omap4-scrm" },
593 { .compatible = "ti,omap5-prm" },
594 { .compatible = "ti,omap5-cm-core-aon" },
595 { .compatible = "ti,omap5-scrm" },
596 { .compatible = "ti,omap5-cm-core" },
597 { .compatible = "ti,dra7-prm" },
598 { .compatible = "ti,dra7-cm-core-aon" },
599 { .compatible = "ti,dra7-cm-core" },
603 static struct clk_hw_omap memmap_dummy_ck = {
604 .flags = MEMMAP_ADDRESSING,
607 static u32 prm_clk_readl(void __iomem *reg)
609 return omap2_clk_readl(&memmap_dummy_ck, reg);
612 static void prm_clk_writel(u32 val, void __iomem *reg)
614 omap2_clk_writel(val, &memmap_dummy_ck, reg);
617 static struct ti_clk_ll_ops omap_clk_ll_ops = {
618 .clk_readl = prm_clk_readl,
619 .clk_writel = prm_clk_writel,
622 int __init of_prcm_init(void)
624 struct device_node *np;
626 int memmap_index = 0;
628 ti_clk_ll_ops = &omap_clk_ll_ops;
630 for_each_matching_node(np, omap_prcm_dt_match_table) {
631 mem = of_iomap(np, 0);
632 clk_memmaps[memmap_index] = mem;
633 ti_dt_clk_init_provider(np, memmap_index);
640 static int __init prm_late_init(void)
642 if (prm_ll_data->late_init)
643 return prm_ll_data->late_init();
646 subsys_initcall(prm_late_init);