2 * omap_hwmod_2430_data.c - hardware modules present on the OMAP2430 chips
4 * Copyright (C) 2009-2011 Nokia Corporation
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 * XXX handle crossbar/shared link difference for L3?
12 * XXX these should be marked initdata for multi-OMAP kernels
14 #include <plat/omap_hwmod.h>
15 #include <mach/irqs.h>
18 #include <plat/serial.h>
20 #include <plat/gpio.h>
21 #include <plat/mcbsp.h>
22 #include <plat/mcspi.h>
23 #include <plat/dmtimer.h>
25 #include <plat/l3_2xxx.h>
27 #include "omap_hwmod_common_data.h"
29 #include "prm-regbits-24xx.h"
30 #include "cm-regbits-24xx.h"
34 * OMAP2430 hardware module integration data
36 * ALl of the data in this section should be autogeneratable from the
37 * TI hardware database or other technical documentation. Data that
38 * is driver-specific or driver-kernel integration-specific belongs
42 static struct omap_hwmod omap2430_mpu_hwmod;
43 static struct omap_hwmod omap2430_iva_hwmod;
44 static struct omap_hwmod omap2430_l3_main_hwmod;
45 static struct omap_hwmod omap2430_l4_core_hwmod;
46 static struct omap_hwmod omap2430_dss_core_hwmod;
47 static struct omap_hwmod omap2430_dss_dispc_hwmod;
48 static struct omap_hwmod omap2430_dss_rfbi_hwmod;
49 static struct omap_hwmod omap2430_dss_venc_hwmod;
50 static struct omap_hwmod omap2430_wd_timer2_hwmod;
51 static struct omap_hwmod omap2430_gpio1_hwmod;
52 static struct omap_hwmod omap2430_gpio2_hwmod;
53 static struct omap_hwmod omap2430_gpio3_hwmod;
54 static struct omap_hwmod omap2430_gpio4_hwmod;
55 static struct omap_hwmod omap2430_gpio5_hwmod;
56 static struct omap_hwmod omap2430_dma_system_hwmod;
57 static struct omap_hwmod omap2430_mcbsp1_hwmod;
58 static struct omap_hwmod omap2430_mcbsp2_hwmod;
59 static struct omap_hwmod omap2430_mcbsp3_hwmod;
60 static struct omap_hwmod omap2430_mcbsp4_hwmod;
61 static struct omap_hwmod omap2430_mcbsp5_hwmod;
62 static struct omap_hwmod omap2430_mcspi1_hwmod;
63 static struct omap_hwmod omap2430_mcspi2_hwmod;
64 static struct omap_hwmod omap2430_mcspi3_hwmod;
65 static struct omap_hwmod omap2430_mmc1_hwmod;
66 static struct omap_hwmod omap2430_mmc2_hwmod;
68 /* L3 -> L4_CORE interface */
69 static struct omap_hwmod_ocp_if omap2430_l3_main__l4_core = {
70 .master = &omap2430_l3_main_hwmod,
71 .slave = &omap2430_l4_core_hwmod,
72 .user = OCP_USER_MPU | OCP_USER_SDMA,
75 /* MPU -> L3 interface */
76 static struct omap_hwmod_ocp_if omap2430_mpu__l3_main = {
77 .master = &omap2430_mpu_hwmod,
78 .slave = &omap2430_l3_main_hwmod,
82 /* Slave interfaces on the L3 interconnect */
83 static struct omap_hwmod_ocp_if *omap2430_l3_main_slaves[] = {
84 &omap2430_mpu__l3_main,
88 static struct omap_hwmod_ocp_if omap2430_dss__l3 = {
89 .master = &omap2430_dss_core_hwmod,
90 .slave = &omap2430_l3_main_hwmod,
93 .l3_perm_bit = OMAP2_L3_CORE_FW_CONNID_DSS,
94 .flags = OMAP_FIREWALL_L3,
97 .user = OCP_USER_MPU | OCP_USER_SDMA,
100 /* Master interfaces on the L3 interconnect */
101 static struct omap_hwmod_ocp_if *omap2430_l3_main_masters[] = {
102 &omap2430_l3_main__l4_core,
106 static struct omap_hwmod omap2430_l3_main_hwmod = {
108 .class = &l3_hwmod_class,
109 .masters = omap2430_l3_main_masters,
110 .masters_cnt = ARRAY_SIZE(omap2430_l3_main_masters),
111 .slaves = omap2430_l3_main_slaves,
112 .slaves_cnt = ARRAY_SIZE(omap2430_l3_main_slaves),
113 .flags = HWMOD_NO_IDLEST,
116 static struct omap_hwmod omap2430_l4_wkup_hwmod;
117 static struct omap_hwmod omap2430_uart1_hwmod;
118 static struct omap_hwmod omap2430_uart2_hwmod;
119 static struct omap_hwmod omap2430_uart3_hwmod;
120 static struct omap_hwmod omap2430_i2c1_hwmod;
121 static struct omap_hwmod omap2430_i2c2_hwmod;
123 static struct omap_hwmod omap2430_usbhsotg_hwmod;
125 /* l3_core -> usbhsotg interface */
126 static struct omap_hwmod_ocp_if omap2430_usbhsotg__l3 = {
127 .master = &omap2430_usbhsotg_hwmod,
128 .slave = &omap2430_l3_main_hwmod,
130 .user = OCP_USER_MPU,
133 /* L4 CORE -> I2C1 interface */
134 static struct omap_hwmod_ocp_if omap2430_l4_core__i2c1 = {
135 .master = &omap2430_l4_core_hwmod,
136 .slave = &omap2430_i2c1_hwmod,
138 .addr = omap2_i2c1_addr_space,
139 .user = OCP_USER_MPU | OCP_USER_SDMA,
142 /* L4 CORE -> I2C2 interface */
143 static struct omap_hwmod_ocp_if omap2430_l4_core__i2c2 = {
144 .master = &omap2430_l4_core_hwmod,
145 .slave = &omap2430_i2c2_hwmod,
147 .addr = omap2_i2c2_addr_space,
148 .user = OCP_USER_MPU | OCP_USER_SDMA,
151 /* L4_CORE -> L4_WKUP interface */
152 static struct omap_hwmod_ocp_if omap2430_l4_core__l4_wkup = {
153 .master = &omap2430_l4_core_hwmod,
154 .slave = &omap2430_l4_wkup_hwmod,
155 .user = OCP_USER_MPU | OCP_USER_SDMA,
158 /* L4 CORE -> UART1 interface */
159 static struct omap_hwmod_ocp_if omap2_l4_core__uart1 = {
160 .master = &omap2430_l4_core_hwmod,
161 .slave = &omap2430_uart1_hwmod,
163 .addr = omap2xxx_uart1_addr_space,
164 .user = OCP_USER_MPU | OCP_USER_SDMA,
167 /* L4 CORE -> UART2 interface */
168 static struct omap_hwmod_ocp_if omap2_l4_core__uart2 = {
169 .master = &omap2430_l4_core_hwmod,
170 .slave = &omap2430_uart2_hwmod,
172 .addr = omap2xxx_uart2_addr_space,
173 .user = OCP_USER_MPU | OCP_USER_SDMA,
176 /* L4 PER -> UART3 interface */
177 static struct omap_hwmod_ocp_if omap2_l4_core__uart3 = {
178 .master = &omap2430_l4_core_hwmod,
179 .slave = &omap2430_uart3_hwmod,
181 .addr = omap2xxx_uart3_addr_space,
182 .user = OCP_USER_MPU | OCP_USER_SDMA,
186 * usbhsotg interface data
188 static struct omap_hwmod_addr_space omap2430_usbhsotg_addrs[] = {
190 .pa_start = OMAP243X_HS_BASE,
191 .pa_end = OMAP243X_HS_BASE + SZ_4K - 1,
192 .flags = ADDR_TYPE_RT
197 /* l4_core ->usbhsotg interface */
198 static struct omap_hwmod_ocp_if omap2430_l4_core__usbhsotg = {
199 .master = &omap2430_l4_core_hwmod,
200 .slave = &omap2430_usbhsotg_hwmod,
202 .addr = omap2430_usbhsotg_addrs,
203 .user = OCP_USER_MPU,
206 static struct omap_hwmod_ocp_if *omap2430_usbhsotg_masters[] = {
207 &omap2430_usbhsotg__l3,
210 static struct omap_hwmod_ocp_if *omap2430_usbhsotg_slaves[] = {
211 &omap2430_l4_core__usbhsotg,
214 /* L4 CORE -> MMC1 interface */
215 static struct omap_hwmod_ocp_if omap2430_l4_core__mmc1 = {
216 .master = &omap2430_l4_core_hwmod,
217 .slave = &omap2430_mmc1_hwmod,
219 .addr = omap2430_mmc1_addr_space,
220 .user = OCP_USER_MPU | OCP_USER_SDMA,
223 /* L4 CORE -> MMC2 interface */
224 static struct omap_hwmod_ocp_if omap2430_l4_core__mmc2 = {
225 .master = &omap2430_l4_core_hwmod,
226 .slave = &omap2430_mmc2_hwmod,
228 .addr = omap2430_mmc2_addr_space,
229 .user = OCP_USER_MPU | OCP_USER_SDMA,
232 /* Slave interfaces on the L4_CORE interconnect */
233 static struct omap_hwmod_ocp_if *omap2430_l4_core_slaves[] = {
234 &omap2430_l3_main__l4_core,
237 /* Master interfaces on the L4_CORE interconnect */
238 static struct omap_hwmod_ocp_if *omap2430_l4_core_masters[] = {
239 &omap2430_l4_core__l4_wkup,
240 &omap2430_l4_core__mmc1,
241 &omap2430_l4_core__mmc2,
245 static struct omap_hwmod omap2430_l4_core_hwmod = {
247 .class = &l4_hwmod_class,
248 .masters = omap2430_l4_core_masters,
249 .masters_cnt = ARRAY_SIZE(omap2430_l4_core_masters),
250 .slaves = omap2430_l4_core_slaves,
251 .slaves_cnt = ARRAY_SIZE(omap2430_l4_core_slaves),
252 .flags = HWMOD_NO_IDLEST,
255 /* Slave interfaces on the L4_WKUP interconnect */
256 static struct omap_hwmod_ocp_if *omap2430_l4_wkup_slaves[] = {
257 &omap2430_l4_core__l4_wkup,
258 &omap2_l4_core__uart1,
259 &omap2_l4_core__uart2,
260 &omap2_l4_core__uart3,
263 /* Master interfaces on the L4_WKUP interconnect */
264 static struct omap_hwmod_ocp_if *omap2430_l4_wkup_masters[] = {
267 /* l4 core -> mcspi1 interface */
268 static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi1 = {
269 .master = &omap2430_l4_core_hwmod,
270 .slave = &omap2430_mcspi1_hwmod,
272 .addr = omap2_mcspi1_addr_space,
273 .user = OCP_USER_MPU | OCP_USER_SDMA,
276 /* l4 core -> mcspi2 interface */
277 static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi2 = {
278 .master = &omap2430_l4_core_hwmod,
279 .slave = &omap2430_mcspi2_hwmod,
281 .addr = omap2_mcspi2_addr_space,
282 .user = OCP_USER_MPU | OCP_USER_SDMA,
285 /* l4 core -> mcspi3 interface */
286 static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi3 = {
287 .master = &omap2430_l4_core_hwmod,
288 .slave = &omap2430_mcspi3_hwmod,
290 .addr = omap2430_mcspi3_addr_space,
291 .user = OCP_USER_MPU | OCP_USER_SDMA,
295 static struct omap_hwmod omap2430_l4_wkup_hwmod = {
297 .class = &l4_hwmod_class,
298 .masters = omap2430_l4_wkup_masters,
299 .masters_cnt = ARRAY_SIZE(omap2430_l4_wkup_masters),
300 .slaves = omap2430_l4_wkup_slaves,
301 .slaves_cnt = ARRAY_SIZE(omap2430_l4_wkup_slaves),
302 .flags = HWMOD_NO_IDLEST,
305 /* Master interfaces on the MPU device */
306 static struct omap_hwmod_ocp_if *omap2430_mpu_masters[] = {
307 &omap2430_mpu__l3_main,
311 static struct omap_hwmod omap2430_mpu_hwmod = {
313 .class = &mpu_hwmod_class,
314 .main_clk = "mpu_ck",
315 .masters = omap2430_mpu_masters,
316 .masters_cnt = ARRAY_SIZE(omap2430_mpu_masters),
320 * IVA2_1 interface data
323 /* IVA2 <- L3 interface */
324 static struct omap_hwmod_ocp_if omap2430_l3__iva = {
325 .master = &omap2430_l3_main_hwmod,
326 .slave = &omap2430_iva_hwmod,
328 .user = OCP_USER_MPU | OCP_USER_SDMA,
331 static struct omap_hwmod_ocp_if *omap2430_iva_masters[] = {
339 static struct omap_hwmod omap2430_iva_hwmod = {
341 .class = &iva_hwmod_class,
342 .masters = omap2430_iva_masters,
343 .masters_cnt = ARRAY_SIZE(omap2430_iva_masters),
346 /* always-on timers dev attribute */
347 static struct omap_timer_capability_dev_attr capability_alwon_dev_attr = {
348 .timer_capability = OMAP_TIMER_ALWON,
351 /* pwm timers dev attribute */
352 static struct omap_timer_capability_dev_attr capability_pwm_dev_attr = {
353 .timer_capability = OMAP_TIMER_HAS_PWM,
357 static struct omap_hwmod omap2430_timer1_hwmod;
359 static struct omap_hwmod_addr_space omap2430_timer1_addrs[] = {
361 .pa_start = 0x49018000,
362 .pa_end = 0x49018000 + SZ_1K - 1,
363 .flags = ADDR_TYPE_RT
368 /* l4_wkup -> timer1 */
369 static struct omap_hwmod_ocp_if omap2430_l4_wkup__timer1 = {
370 .master = &omap2430_l4_wkup_hwmod,
371 .slave = &omap2430_timer1_hwmod,
373 .addr = omap2430_timer1_addrs,
374 .user = OCP_USER_MPU | OCP_USER_SDMA,
377 /* timer1 slave port */
378 static struct omap_hwmod_ocp_if *omap2430_timer1_slaves[] = {
379 &omap2430_l4_wkup__timer1,
383 static struct omap_hwmod omap2430_timer1_hwmod = {
385 .mpu_irqs = omap2_timer1_mpu_irqs,
386 .main_clk = "gpt1_fck",
390 .module_bit = OMAP24XX_EN_GPT1_SHIFT,
391 .module_offs = WKUP_MOD,
393 .idlest_idle_bit = OMAP24XX_ST_GPT1_SHIFT,
396 .dev_attr = &capability_alwon_dev_attr,
397 .slaves = omap2430_timer1_slaves,
398 .slaves_cnt = ARRAY_SIZE(omap2430_timer1_slaves),
399 .class = &omap2xxx_timer_hwmod_class,
403 static struct omap_hwmod omap2430_timer2_hwmod;
405 /* l4_core -> timer2 */
406 static struct omap_hwmod_ocp_if omap2430_l4_core__timer2 = {
407 .master = &omap2430_l4_core_hwmod,
408 .slave = &omap2430_timer2_hwmod,
410 .addr = omap2xxx_timer2_addrs,
411 .user = OCP_USER_MPU | OCP_USER_SDMA,
414 /* timer2 slave port */
415 static struct omap_hwmod_ocp_if *omap2430_timer2_slaves[] = {
416 &omap2430_l4_core__timer2,
420 static struct omap_hwmod omap2430_timer2_hwmod = {
422 .mpu_irqs = omap2_timer2_mpu_irqs,
423 .main_clk = "gpt2_fck",
427 .module_bit = OMAP24XX_EN_GPT2_SHIFT,
428 .module_offs = CORE_MOD,
430 .idlest_idle_bit = OMAP24XX_ST_GPT2_SHIFT,
433 .dev_attr = &capability_alwon_dev_attr,
434 .slaves = omap2430_timer2_slaves,
435 .slaves_cnt = ARRAY_SIZE(omap2430_timer2_slaves),
436 .class = &omap2xxx_timer_hwmod_class,
440 static struct omap_hwmod omap2430_timer3_hwmod;
442 /* l4_core -> timer3 */
443 static struct omap_hwmod_ocp_if omap2430_l4_core__timer3 = {
444 .master = &omap2430_l4_core_hwmod,
445 .slave = &omap2430_timer3_hwmod,
447 .addr = omap2xxx_timer3_addrs,
448 .user = OCP_USER_MPU | OCP_USER_SDMA,
451 /* timer3 slave port */
452 static struct omap_hwmod_ocp_if *omap2430_timer3_slaves[] = {
453 &omap2430_l4_core__timer3,
457 static struct omap_hwmod omap2430_timer3_hwmod = {
459 .mpu_irqs = omap2_timer3_mpu_irqs,
460 .main_clk = "gpt3_fck",
464 .module_bit = OMAP24XX_EN_GPT3_SHIFT,
465 .module_offs = CORE_MOD,
467 .idlest_idle_bit = OMAP24XX_ST_GPT3_SHIFT,
470 .dev_attr = &capability_alwon_dev_attr,
471 .slaves = omap2430_timer3_slaves,
472 .slaves_cnt = ARRAY_SIZE(omap2430_timer3_slaves),
473 .class = &omap2xxx_timer_hwmod_class,
477 static struct omap_hwmod omap2430_timer4_hwmod;
479 /* l4_core -> timer4 */
480 static struct omap_hwmod_ocp_if omap2430_l4_core__timer4 = {
481 .master = &omap2430_l4_core_hwmod,
482 .slave = &omap2430_timer4_hwmod,
484 .addr = omap2xxx_timer4_addrs,
485 .user = OCP_USER_MPU | OCP_USER_SDMA,
488 /* timer4 slave port */
489 static struct omap_hwmod_ocp_if *omap2430_timer4_slaves[] = {
490 &omap2430_l4_core__timer4,
494 static struct omap_hwmod omap2430_timer4_hwmod = {
496 .mpu_irqs = omap2_timer4_mpu_irqs,
497 .main_clk = "gpt4_fck",
501 .module_bit = OMAP24XX_EN_GPT4_SHIFT,
502 .module_offs = CORE_MOD,
504 .idlest_idle_bit = OMAP24XX_ST_GPT4_SHIFT,
507 .dev_attr = &capability_alwon_dev_attr,
508 .slaves = omap2430_timer4_slaves,
509 .slaves_cnt = ARRAY_SIZE(omap2430_timer4_slaves),
510 .class = &omap2xxx_timer_hwmod_class,
514 static struct omap_hwmod omap2430_timer5_hwmod;
516 /* l4_core -> timer5 */
517 static struct omap_hwmod_ocp_if omap2430_l4_core__timer5 = {
518 .master = &omap2430_l4_core_hwmod,
519 .slave = &omap2430_timer5_hwmod,
521 .addr = omap2xxx_timer5_addrs,
522 .user = OCP_USER_MPU | OCP_USER_SDMA,
525 /* timer5 slave port */
526 static struct omap_hwmod_ocp_if *omap2430_timer5_slaves[] = {
527 &omap2430_l4_core__timer5,
531 static struct omap_hwmod omap2430_timer5_hwmod = {
533 .mpu_irqs = omap2_timer5_mpu_irqs,
534 .main_clk = "gpt5_fck",
538 .module_bit = OMAP24XX_EN_GPT5_SHIFT,
539 .module_offs = CORE_MOD,
541 .idlest_idle_bit = OMAP24XX_ST_GPT5_SHIFT,
544 .dev_attr = &capability_alwon_dev_attr,
545 .slaves = omap2430_timer5_slaves,
546 .slaves_cnt = ARRAY_SIZE(omap2430_timer5_slaves),
547 .class = &omap2xxx_timer_hwmod_class,
551 static struct omap_hwmod omap2430_timer6_hwmod;
553 /* l4_core -> timer6 */
554 static struct omap_hwmod_ocp_if omap2430_l4_core__timer6 = {
555 .master = &omap2430_l4_core_hwmod,
556 .slave = &omap2430_timer6_hwmod,
558 .addr = omap2xxx_timer6_addrs,
559 .user = OCP_USER_MPU | OCP_USER_SDMA,
562 /* timer6 slave port */
563 static struct omap_hwmod_ocp_if *omap2430_timer6_slaves[] = {
564 &omap2430_l4_core__timer6,
568 static struct omap_hwmod omap2430_timer6_hwmod = {
570 .mpu_irqs = omap2_timer6_mpu_irqs,
571 .main_clk = "gpt6_fck",
575 .module_bit = OMAP24XX_EN_GPT6_SHIFT,
576 .module_offs = CORE_MOD,
578 .idlest_idle_bit = OMAP24XX_ST_GPT6_SHIFT,
581 .dev_attr = &capability_alwon_dev_attr,
582 .slaves = omap2430_timer6_slaves,
583 .slaves_cnt = ARRAY_SIZE(omap2430_timer6_slaves),
584 .class = &omap2xxx_timer_hwmod_class,
588 static struct omap_hwmod omap2430_timer7_hwmod;
590 /* l4_core -> timer7 */
591 static struct omap_hwmod_ocp_if omap2430_l4_core__timer7 = {
592 .master = &omap2430_l4_core_hwmod,
593 .slave = &omap2430_timer7_hwmod,
595 .addr = omap2xxx_timer7_addrs,
596 .user = OCP_USER_MPU | OCP_USER_SDMA,
599 /* timer7 slave port */
600 static struct omap_hwmod_ocp_if *omap2430_timer7_slaves[] = {
601 &omap2430_l4_core__timer7,
605 static struct omap_hwmod omap2430_timer7_hwmod = {
607 .mpu_irqs = omap2_timer7_mpu_irqs,
608 .main_clk = "gpt7_fck",
612 .module_bit = OMAP24XX_EN_GPT7_SHIFT,
613 .module_offs = CORE_MOD,
615 .idlest_idle_bit = OMAP24XX_ST_GPT7_SHIFT,
618 .dev_attr = &capability_alwon_dev_attr,
619 .slaves = omap2430_timer7_slaves,
620 .slaves_cnt = ARRAY_SIZE(omap2430_timer7_slaves),
621 .class = &omap2xxx_timer_hwmod_class,
625 static struct omap_hwmod omap2430_timer8_hwmod;
627 /* l4_core -> timer8 */
628 static struct omap_hwmod_ocp_if omap2430_l4_core__timer8 = {
629 .master = &omap2430_l4_core_hwmod,
630 .slave = &omap2430_timer8_hwmod,
632 .addr = omap2xxx_timer8_addrs,
633 .user = OCP_USER_MPU | OCP_USER_SDMA,
636 /* timer8 slave port */
637 static struct omap_hwmod_ocp_if *omap2430_timer8_slaves[] = {
638 &omap2430_l4_core__timer8,
642 static struct omap_hwmod omap2430_timer8_hwmod = {
644 .mpu_irqs = omap2_timer8_mpu_irqs,
645 .main_clk = "gpt8_fck",
649 .module_bit = OMAP24XX_EN_GPT8_SHIFT,
650 .module_offs = CORE_MOD,
652 .idlest_idle_bit = OMAP24XX_ST_GPT8_SHIFT,
655 .dev_attr = &capability_alwon_dev_attr,
656 .slaves = omap2430_timer8_slaves,
657 .slaves_cnt = ARRAY_SIZE(omap2430_timer8_slaves),
658 .class = &omap2xxx_timer_hwmod_class,
662 static struct omap_hwmod omap2430_timer9_hwmod;
664 /* l4_core -> timer9 */
665 static struct omap_hwmod_ocp_if omap2430_l4_core__timer9 = {
666 .master = &omap2430_l4_core_hwmod,
667 .slave = &omap2430_timer9_hwmod,
669 .addr = omap2xxx_timer9_addrs,
670 .user = OCP_USER_MPU | OCP_USER_SDMA,
673 /* timer9 slave port */
674 static struct omap_hwmod_ocp_if *omap2430_timer9_slaves[] = {
675 &omap2430_l4_core__timer9,
679 static struct omap_hwmod omap2430_timer9_hwmod = {
681 .mpu_irqs = omap2_timer9_mpu_irqs,
682 .main_clk = "gpt9_fck",
686 .module_bit = OMAP24XX_EN_GPT9_SHIFT,
687 .module_offs = CORE_MOD,
689 .idlest_idle_bit = OMAP24XX_ST_GPT9_SHIFT,
692 .dev_attr = &capability_pwm_dev_attr,
693 .slaves = omap2430_timer9_slaves,
694 .slaves_cnt = ARRAY_SIZE(omap2430_timer9_slaves),
695 .class = &omap2xxx_timer_hwmod_class,
699 static struct omap_hwmod omap2430_timer10_hwmod;
701 /* l4_core -> timer10 */
702 static struct omap_hwmod_ocp_if omap2430_l4_core__timer10 = {
703 .master = &omap2430_l4_core_hwmod,
704 .slave = &omap2430_timer10_hwmod,
706 .addr = omap2_timer10_addrs,
707 .user = OCP_USER_MPU | OCP_USER_SDMA,
710 /* timer10 slave port */
711 static struct omap_hwmod_ocp_if *omap2430_timer10_slaves[] = {
712 &omap2430_l4_core__timer10,
716 static struct omap_hwmod omap2430_timer10_hwmod = {
718 .mpu_irqs = omap2_timer10_mpu_irqs,
719 .main_clk = "gpt10_fck",
723 .module_bit = OMAP24XX_EN_GPT10_SHIFT,
724 .module_offs = CORE_MOD,
726 .idlest_idle_bit = OMAP24XX_ST_GPT10_SHIFT,
729 .dev_attr = &capability_pwm_dev_attr,
730 .slaves = omap2430_timer10_slaves,
731 .slaves_cnt = ARRAY_SIZE(omap2430_timer10_slaves),
732 .class = &omap2xxx_timer_hwmod_class,
736 static struct omap_hwmod omap2430_timer11_hwmod;
738 /* l4_core -> timer11 */
739 static struct omap_hwmod_ocp_if omap2430_l4_core__timer11 = {
740 .master = &omap2430_l4_core_hwmod,
741 .slave = &omap2430_timer11_hwmod,
743 .addr = omap2_timer11_addrs,
744 .user = OCP_USER_MPU | OCP_USER_SDMA,
747 /* timer11 slave port */
748 static struct omap_hwmod_ocp_if *omap2430_timer11_slaves[] = {
749 &omap2430_l4_core__timer11,
753 static struct omap_hwmod omap2430_timer11_hwmod = {
755 .mpu_irqs = omap2_timer11_mpu_irqs,
756 .main_clk = "gpt11_fck",
760 .module_bit = OMAP24XX_EN_GPT11_SHIFT,
761 .module_offs = CORE_MOD,
763 .idlest_idle_bit = OMAP24XX_ST_GPT11_SHIFT,
766 .dev_attr = &capability_pwm_dev_attr,
767 .slaves = omap2430_timer11_slaves,
768 .slaves_cnt = ARRAY_SIZE(omap2430_timer11_slaves),
769 .class = &omap2xxx_timer_hwmod_class,
773 static struct omap_hwmod omap2430_timer12_hwmod;
775 /* l4_core -> timer12 */
776 static struct omap_hwmod_ocp_if omap2430_l4_core__timer12 = {
777 .master = &omap2430_l4_core_hwmod,
778 .slave = &omap2430_timer12_hwmod,
780 .addr = omap2xxx_timer12_addrs,
781 .user = OCP_USER_MPU | OCP_USER_SDMA,
784 /* timer12 slave port */
785 static struct omap_hwmod_ocp_if *omap2430_timer12_slaves[] = {
786 &omap2430_l4_core__timer12,
790 static struct omap_hwmod omap2430_timer12_hwmod = {
792 .mpu_irqs = omap2xxx_timer12_mpu_irqs,
793 .main_clk = "gpt12_fck",
797 .module_bit = OMAP24XX_EN_GPT12_SHIFT,
798 .module_offs = CORE_MOD,
800 .idlest_idle_bit = OMAP24XX_ST_GPT12_SHIFT,
803 .dev_attr = &capability_pwm_dev_attr,
804 .slaves = omap2430_timer12_slaves,
805 .slaves_cnt = ARRAY_SIZE(omap2430_timer12_slaves),
806 .class = &omap2xxx_timer_hwmod_class,
809 /* l4_wkup -> wd_timer2 */
810 static struct omap_hwmod_addr_space omap2430_wd_timer2_addrs[] = {
812 .pa_start = 0x49016000,
813 .pa_end = 0x4901607f,
814 .flags = ADDR_TYPE_RT
819 static struct omap_hwmod_ocp_if omap2430_l4_wkup__wd_timer2 = {
820 .master = &omap2430_l4_wkup_hwmod,
821 .slave = &omap2430_wd_timer2_hwmod,
822 .clk = "mpu_wdt_ick",
823 .addr = omap2430_wd_timer2_addrs,
824 .user = OCP_USER_MPU | OCP_USER_SDMA,
828 static struct omap_hwmod_ocp_if *omap2430_wd_timer2_slaves[] = {
829 &omap2430_l4_wkup__wd_timer2,
832 static struct omap_hwmod omap2430_wd_timer2_hwmod = {
834 .class = &omap2xxx_wd_timer_hwmod_class,
835 .main_clk = "mpu_wdt_fck",
839 .module_bit = OMAP24XX_EN_MPU_WDT_SHIFT,
840 .module_offs = WKUP_MOD,
842 .idlest_idle_bit = OMAP24XX_ST_MPU_WDT_SHIFT,
845 .slaves = omap2430_wd_timer2_slaves,
846 .slaves_cnt = ARRAY_SIZE(omap2430_wd_timer2_slaves),
851 static struct omap_hwmod_ocp_if *omap2430_uart1_slaves[] = {
852 &omap2_l4_core__uart1,
855 static struct omap_hwmod omap2430_uart1_hwmod = {
857 .mpu_irqs = omap2_uart1_mpu_irqs,
858 .sdma_reqs = omap2_uart1_sdma_reqs,
859 .main_clk = "uart1_fck",
862 .module_offs = CORE_MOD,
864 .module_bit = OMAP24XX_EN_UART1_SHIFT,
866 .idlest_idle_bit = OMAP24XX_EN_UART1_SHIFT,
869 .slaves = omap2430_uart1_slaves,
870 .slaves_cnt = ARRAY_SIZE(omap2430_uart1_slaves),
871 .class = &omap2_uart_class,
876 static struct omap_hwmod_ocp_if *omap2430_uart2_slaves[] = {
877 &omap2_l4_core__uart2,
880 static struct omap_hwmod omap2430_uart2_hwmod = {
882 .mpu_irqs = omap2_uart2_mpu_irqs,
883 .sdma_reqs = omap2_uart2_sdma_reqs,
884 .main_clk = "uart2_fck",
887 .module_offs = CORE_MOD,
889 .module_bit = OMAP24XX_EN_UART2_SHIFT,
891 .idlest_idle_bit = OMAP24XX_EN_UART2_SHIFT,
894 .slaves = omap2430_uart2_slaves,
895 .slaves_cnt = ARRAY_SIZE(omap2430_uart2_slaves),
896 .class = &omap2_uart_class,
901 static struct omap_hwmod_ocp_if *omap2430_uart3_slaves[] = {
902 &omap2_l4_core__uart3,
905 static struct omap_hwmod omap2430_uart3_hwmod = {
907 .mpu_irqs = omap2_uart3_mpu_irqs,
908 .sdma_reqs = omap2_uart3_sdma_reqs,
909 .main_clk = "uart3_fck",
912 .module_offs = CORE_MOD,
914 .module_bit = OMAP24XX_EN_UART3_SHIFT,
916 .idlest_idle_bit = OMAP24XX_EN_UART3_SHIFT,
919 .slaves = omap2430_uart3_slaves,
920 .slaves_cnt = ARRAY_SIZE(omap2430_uart3_slaves),
921 .class = &omap2_uart_class,
925 /* dss master ports */
926 static struct omap_hwmod_ocp_if *omap2430_dss_masters[] = {
931 static struct omap_hwmod_ocp_if omap2430_l4_core__dss = {
932 .master = &omap2430_l4_core_hwmod,
933 .slave = &omap2430_dss_core_hwmod,
935 .addr = omap2_dss_addrs,
936 .user = OCP_USER_MPU | OCP_USER_SDMA,
939 /* dss slave ports */
940 static struct omap_hwmod_ocp_if *omap2430_dss_slaves[] = {
941 &omap2430_l4_core__dss,
944 static struct omap_hwmod_opt_clk dss_opt_clks[] = {
946 * The DSS HW needs all DSS clocks enabled during reset. The dss_core
947 * driver does not use these clocks.
949 { .role = "tv_clk", .clk = "dss_54m_fck" },
950 { .role = "sys_clk", .clk = "dss2_fck" },
953 static struct omap_hwmod omap2430_dss_core_hwmod = {
955 .class = &omap2_dss_hwmod_class,
956 .main_clk = "dss1_fck", /* instead of dss_fck */
957 .sdma_reqs = omap2xxx_dss_sdma_chs,
961 .module_bit = OMAP24XX_EN_DSS1_SHIFT,
962 .module_offs = CORE_MOD,
964 .idlest_stdby_bit = OMAP24XX_ST_DSS_SHIFT,
967 .opt_clks = dss_opt_clks,
968 .opt_clks_cnt = ARRAY_SIZE(dss_opt_clks),
969 .slaves = omap2430_dss_slaves,
970 .slaves_cnt = ARRAY_SIZE(omap2430_dss_slaves),
971 .masters = omap2430_dss_masters,
972 .masters_cnt = ARRAY_SIZE(omap2430_dss_masters),
973 .flags = HWMOD_NO_IDLEST | HWMOD_CONTROL_OPT_CLKS_IN_RESET,
976 /* l4_core -> dss_dispc */
977 static struct omap_hwmod_ocp_if omap2430_l4_core__dss_dispc = {
978 .master = &omap2430_l4_core_hwmod,
979 .slave = &omap2430_dss_dispc_hwmod,
981 .addr = omap2_dss_dispc_addrs,
982 .user = OCP_USER_MPU | OCP_USER_SDMA,
985 /* dss_dispc slave ports */
986 static struct omap_hwmod_ocp_if *omap2430_dss_dispc_slaves[] = {
987 &omap2430_l4_core__dss_dispc,
990 static struct omap_hwmod omap2430_dss_dispc_hwmod = {
992 .class = &omap2_dispc_hwmod_class,
993 .mpu_irqs = omap2_dispc_irqs,
994 .main_clk = "dss1_fck",
998 .module_bit = OMAP24XX_EN_DSS1_SHIFT,
999 .module_offs = CORE_MOD,
1001 .idlest_stdby_bit = OMAP24XX_ST_DSS_SHIFT,
1004 .slaves = omap2430_dss_dispc_slaves,
1005 .slaves_cnt = ARRAY_SIZE(omap2430_dss_dispc_slaves),
1006 .flags = HWMOD_NO_IDLEST,
1007 .dev_attr = &omap2_3_dss_dispc_dev_attr
1010 /* l4_core -> dss_rfbi */
1011 static struct omap_hwmod_ocp_if omap2430_l4_core__dss_rfbi = {
1012 .master = &omap2430_l4_core_hwmod,
1013 .slave = &omap2430_dss_rfbi_hwmod,
1015 .addr = omap2_dss_rfbi_addrs,
1016 .user = OCP_USER_MPU | OCP_USER_SDMA,
1019 /* dss_rfbi slave ports */
1020 static struct omap_hwmod_ocp_if *omap2430_dss_rfbi_slaves[] = {
1021 &omap2430_l4_core__dss_rfbi,
1024 static struct omap_hwmod_opt_clk dss_rfbi_opt_clks[] = {
1025 { .role = "ick", .clk = "dss_ick" },
1028 static struct omap_hwmod omap2430_dss_rfbi_hwmod = {
1030 .class = &omap2_rfbi_hwmod_class,
1031 .main_clk = "dss1_fck",
1035 .module_bit = OMAP24XX_EN_DSS1_SHIFT,
1036 .module_offs = CORE_MOD,
1039 .opt_clks = dss_rfbi_opt_clks,
1040 .opt_clks_cnt = ARRAY_SIZE(dss_rfbi_opt_clks),
1041 .slaves = omap2430_dss_rfbi_slaves,
1042 .slaves_cnt = ARRAY_SIZE(omap2430_dss_rfbi_slaves),
1043 .flags = HWMOD_NO_IDLEST,
1046 /* l4_core -> dss_venc */
1047 static struct omap_hwmod_ocp_if omap2430_l4_core__dss_venc = {
1048 .master = &omap2430_l4_core_hwmod,
1049 .slave = &omap2430_dss_venc_hwmod,
1051 .addr = omap2_dss_venc_addrs,
1052 .flags = OCPIF_SWSUP_IDLE,
1053 .user = OCP_USER_MPU | OCP_USER_SDMA,
1056 /* dss_venc slave ports */
1057 static struct omap_hwmod_ocp_if *omap2430_dss_venc_slaves[] = {
1058 &omap2430_l4_core__dss_venc,
1061 static struct omap_hwmod omap2430_dss_venc_hwmod = {
1063 .class = &omap2_venc_hwmod_class,
1064 .main_clk = "dss_54m_fck",
1068 .module_bit = OMAP24XX_EN_DSS1_SHIFT,
1069 .module_offs = CORE_MOD,
1072 .slaves = omap2430_dss_venc_slaves,
1073 .slaves_cnt = ARRAY_SIZE(omap2430_dss_venc_slaves),
1074 .flags = HWMOD_NO_IDLEST,
1078 static struct omap_hwmod_class_sysconfig i2c_sysc = {
1082 .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE |
1083 SYSS_HAS_RESET_STATUS),
1084 .sysc_fields = &omap_hwmod_sysc_type1,
1087 static struct omap_hwmod_class i2c_class = {
1090 .rev = OMAP_I2C_IP_VERSION_1,
1091 .reset = &omap_i2c_reset,
1094 static struct omap_i2c_dev_attr i2c_dev_attr = {
1095 .fifo_depth = 8, /* bytes */
1096 .flags = OMAP_I2C_FLAG_APPLY_ERRATA_I207 |
1097 OMAP_I2C_FLAG_BUS_SHIFT_2 |
1098 OMAP_I2C_FLAG_FORCE_19200_INT_CLK,
1103 static struct omap_hwmod_ocp_if *omap2430_i2c1_slaves[] = {
1104 &omap2430_l4_core__i2c1,
1107 static struct omap_hwmod omap2430_i2c1_hwmod = {
1109 .flags = HWMOD_16BIT_REG,
1110 .mpu_irqs = omap2_i2c1_mpu_irqs,
1111 .sdma_reqs = omap2_i2c1_sdma_reqs,
1112 .main_clk = "i2chs1_fck",
1116 * NOTE: The CM_FCLKEN* and CM_ICLKEN* for
1117 * I2CHS IP's do not follow the usual pattern.
1118 * prcm_reg_id alone cannot be used to program
1119 * the iclk and fclk. Needs to be handled using
1120 * additional flags when clk handling is moved
1121 * to hwmod framework.
1123 .module_offs = CORE_MOD,
1125 .module_bit = OMAP2430_EN_I2CHS1_SHIFT,
1127 .idlest_idle_bit = OMAP2430_ST_I2CHS1_SHIFT,
1130 .slaves = omap2430_i2c1_slaves,
1131 .slaves_cnt = ARRAY_SIZE(omap2430_i2c1_slaves),
1132 .class = &i2c_class,
1133 .dev_attr = &i2c_dev_attr,
1138 static struct omap_hwmod_ocp_if *omap2430_i2c2_slaves[] = {
1139 &omap2430_l4_core__i2c2,
1142 static struct omap_hwmod omap2430_i2c2_hwmod = {
1144 .flags = HWMOD_16BIT_REG,
1145 .mpu_irqs = omap2_i2c2_mpu_irqs,
1146 .sdma_reqs = omap2_i2c2_sdma_reqs,
1147 .main_clk = "i2chs2_fck",
1150 .module_offs = CORE_MOD,
1152 .module_bit = OMAP2430_EN_I2CHS2_SHIFT,
1154 .idlest_idle_bit = OMAP2430_ST_I2CHS2_SHIFT,
1157 .slaves = omap2430_i2c2_slaves,
1158 .slaves_cnt = ARRAY_SIZE(omap2430_i2c2_slaves),
1159 .class = &i2c_class,
1160 .dev_attr = &i2c_dev_attr,
1163 /* l4_wkup -> gpio1 */
1164 static struct omap_hwmod_addr_space omap2430_gpio1_addr_space[] = {
1166 .pa_start = 0x4900C000,
1167 .pa_end = 0x4900C1ff,
1168 .flags = ADDR_TYPE_RT
1173 static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio1 = {
1174 .master = &omap2430_l4_wkup_hwmod,
1175 .slave = &omap2430_gpio1_hwmod,
1177 .addr = omap2430_gpio1_addr_space,
1178 .user = OCP_USER_MPU | OCP_USER_SDMA,
1181 /* l4_wkup -> gpio2 */
1182 static struct omap_hwmod_addr_space omap2430_gpio2_addr_space[] = {
1184 .pa_start = 0x4900E000,
1185 .pa_end = 0x4900E1ff,
1186 .flags = ADDR_TYPE_RT
1191 static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio2 = {
1192 .master = &omap2430_l4_wkup_hwmod,
1193 .slave = &omap2430_gpio2_hwmod,
1195 .addr = omap2430_gpio2_addr_space,
1196 .user = OCP_USER_MPU | OCP_USER_SDMA,
1199 /* l4_wkup -> gpio3 */
1200 static struct omap_hwmod_addr_space omap2430_gpio3_addr_space[] = {
1202 .pa_start = 0x49010000,
1203 .pa_end = 0x490101ff,
1204 .flags = ADDR_TYPE_RT
1209 static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio3 = {
1210 .master = &omap2430_l4_wkup_hwmod,
1211 .slave = &omap2430_gpio3_hwmod,
1213 .addr = omap2430_gpio3_addr_space,
1214 .user = OCP_USER_MPU | OCP_USER_SDMA,
1217 /* l4_wkup -> gpio4 */
1218 static struct omap_hwmod_addr_space omap2430_gpio4_addr_space[] = {
1220 .pa_start = 0x49012000,
1221 .pa_end = 0x490121ff,
1222 .flags = ADDR_TYPE_RT
1227 static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio4 = {
1228 .master = &omap2430_l4_wkup_hwmod,
1229 .slave = &omap2430_gpio4_hwmod,
1231 .addr = omap2430_gpio4_addr_space,
1232 .user = OCP_USER_MPU | OCP_USER_SDMA,
1235 /* l4_core -> gpio5 */
1236 static struct omap_hwmod_addr_space omap2430_gpio5_addr_space[] = {
1238 .pa_start = 0x480B6000,
1239 .pa_end = 0x480B61ff,
1240 .flags = ADDR_TYPE_RT
1245 static struct omap_hwmod_ocp_if omap2430_l4_core__gpio5 = {
1246 .master = &omap2430_l4_core_hwmod,
1247 .slave = &omap2430_gpio5_hwmod,
1249 .addr = omap2430_gpio5_addr_space,
1250 .user = OCP_USER_MPU | OCP_USER_SDMA,
1254 static struct omap_gpio_dev_attr gpio_dev_attr = {
1260 static struct omap_hwmod_ocp_if *omap2430_gpio1_slaves[] = {
1261 &omap2430_l4_wkup__gpio1,
1264 static struct omap_hwmod omap2430_gpio1_hwmod = {
1266 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
1267 .mpu_irqs = omap2_gpio1_irqs,
1268 .main_clk = "gpios_fck",
1272 .module_bit = OMAP24XX_EN_GPIOS_SHIFT,
1273 .module_offs = WKUP_MOD,
1275 .idlest_idle_bit = OMAP24XX_EN_GPIOS_SHIFT,
1278 .slaves = omap2430_gpio1_slaves,
1279 .slaves_cnt = ARRAY_SIZE(omap2430_gpio1_slaves),
1280 .class = &omap2xxx_gpio_hwmod_class,
1281 .dev_attr = &gpio_dev_attr,
1285 static struct omap_hwmod_ocp_if *omap2430_gpio2_slaves[] = {
1286 &omap2430_l4_wkup__gpio2,
1289 static struct omap_hwmod omap2430_gpio2_hwmod = {
1291 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
1292 .mpu_irqs = omap2_gpio2_irqs,
1293 .main_clk = "gpios_fck",
1297 .module_bit = OMAP24XX_EN_GPIOS_SHIFT,
1298 .module_offs = WKUP_MOD,
1300 .idlest_idle_bit = OMAP24XX_ST_GPIOS_SHIFT,
1303 .slaves = omap2430_gpio2_slaves,
1304 .slaves_cnt = ARRAY_SIZE(omap2430_gpio2_slaves),
1305 .class = &omap2xxx_gpio_hwmod_class,
1306 .dev_attr = &gpio_dev_attr,
1310 static struct omap_hwmod_ocp_if *omap2430_gpio3_slaves[] = {
1311 &omap2430_l4_wkup__gpio3,
1314 static struct omap_hwmod omap2430_gpio3_hwmod = {
1316 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
1317 .mpu_irqs = omap2_gpio3_irqs,
1318 .main_clk = "gpios_fck",
1322 .module_bit = OMAP24XX_EN_GPIOS_SHIFT,
1323 .module_offs = WKUP_MOD,
1325 .idlest_idle_bit = OMAP24XX_ST_GPIOS_SHIFT,
1328 .slaves = omap2430_gpio3_slaves,
1329 .slaves_cnt = ARRAY_SIZE(omap2430_gpio3_slaves),
1330 .class = &omap2xxx_gpio_hwmod_class,
1331 .dev_attr = &gpio_dev_attr,
1335 static struct omap_hwmod_ocp_if *omap2430_gpio4_slaves[] = {
1336 &omap2430_l4_wkup__gpio4,
1339 static struct omap_hwmod omap2430_gpio4_hwmod = {
1341 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
1342 .mpu_irqs = omap2_gpio4_irqs,
1343 .main_clk = "gpios_fck",
1347 .module_bit = OMAP24XX_EN_GPIOS_SHIFT,
1348 .module_offs = WKUP_MOD,
1350 .idlest_idle_bit = OMAP24XX_ST_GPIOS_SHIFT,
1353 .slaves = omap2430_gpio4_slaves,
1354 .slaves_cnt = ARRAY_SIZE(omap2430_gpio4_slaves),
1355 .class = &omap2xxx_gpio_hwmod_class,
1356 .dev_attr = &gpio_dev_attr,
1360 static struct omap_hwmod_irq_info omap243x_gpio5_irqs[] = {
1361 { .irq = 33 }, /* INT_24XX_GPIO_BANK5 */
1365 static struct omap_hwmod_ocp_if *omap2430_gpio5_slaves[] = {
1366 &omap2430_l4_core__gpio5,
1369 static struct omap_hwmod omap2430_gpio5_hwmod = {
1371 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
1372 .mpu_irqs = omap243x_gpio5_irqs,
1373 .main_clk = "gpio5_fck",
1377 .module_bit = OMAP2430_EN_GPIO5_SHIFT,
1378 .module_offs = CORE_MOD,
1380 .idlest_idle_bit = OMAP2430_ST_GPIO5_SHIFT,
1383 .slaves = omap2430_gpio5_slaves,
1384 .slaves_cnt = ARRAY_SIZE(omap2430_gpio5_slaves),
1385 .class = &omap2xxx_gpio_hwmod_class,
1386 .dev_attr = &gpio_dev_attr,
1389 /* dma attributes */
1390 static struct omap_dma_dev_attr dma_dev_attr = {
1391 .dev_caps = RESERVE_CHANNEL | DMA_LINKED_LCH | GLOBAL_PRIORITY |
1392 IS_CSSA_32 | IS_CDSA_32 | IS_RW_PRIORITY,
1396 /* dma_system -> L3 */
1397 static struct omap_hwmod_ocp_if omap2430_dma_system__l3 = {
1398 .master = &omap2430_dma_system_hwmod,
1399 .slave = &omap2430_l3_main_hwmod,
1400 .clk = "core_l3_ck",
1401 .user = OCP_USER_MPU | OCP_USER_SDMA,
1404 /* dma_system master ports */
1405 static struct omap_hwmod_ocp_if *omap2430_dma_system_masters[] = {
1406 &omap2430_dma_system__l3,
1409 /* l4_core -> dma_system */
1410 static struct omap_hwmod_ocp_if omap2430_l4_core__dma_system = {
1411 .master = &omap2430_l4_core_hwmod,
1412 .slave = &omap2430_dma_system_hwmod,
1414 .addr = omap2_dma_system_addrs,
1415 .user = OCP_USER_MPU | OCP_USER_SDMA,
1418 /* dma_system slave ports */
1419 static struct omap_hwmod_ocp_if *omap2430_dma_system_slaves[] = {
1420 &omap2430_l4_core__dma_system,
1423 static struct omap_hwmod omap2430_dma_system_hwmod = {
1425 .class = &omap2xxx_dma_hwmod_class,
1426 .mpu_irqs = omap2_dma_system_irqs,
1427 .main_clk = "core_l3_ck",
1428 .slaves = omap2430_dma_system_slaves,
1429 .slaves_cnt = ARRAY_SIZE(omap2430_dma_system_slaves),
1430 .masters = omap2430_dma_system_masters,
1431 .masters_cnt = ARRAY_SIZE(omap2430_dma_system_masters),
1432 .dev_attr = &dma_dev_attr,
1433 .flags = HWMOD_NO_IDLEST,
1437 static struct omap_hwmod omap2430_mailbox_hwmod;
1438 static struct omap_hwmod_irq_info omap2430_mailbox_irqs[] = {
1443 /* l4_core -> mailbox */
1444 static struct omap_hwmod_ocp_if omap2430_l4_core__mailbox = {
1445 .master = &omap2430_l4_core_hwmod,
1446 .slave = &omap2430_mailbox_hwmod,
1447 .addr = omap2_mailbox_addrs,
1448 .user = OCP_USER_MPU | OCP_USER_SDMA,
1451 /* mailbox slave ports */
1452 static struct omap_hwmod_ocp_if *omap2430_mailbox_slaves[] = {
1453 &omap2430_l4_core__mailbox,
1456 static struct omap_hwmod omap2430_mailbox_hwmod = {
1458 .class = &omap2xxx_mailbox_hwmod_class,
1459 .mpu_irqs = omap2430_mailbox_irqs,
1460 .main_clk = "mailboxes_ick",
1464 .module_bit = OMAP24XX_EN_MAILBOXES_SHIFT,
1465 .module_offs = CORE_MOD,
1467 .idlest_idle_bit = OMAP24XX_ST_MAILBOXES_SHIFT,
1470 .slaves = omap2430_mailbox_slaves,
1471 .slaves_cnt = ARRAY_SIZE(omap2430_mailbox_slaves),
1475 static struct omap_hwmod_ocp_if *omap2430_mcspi1_slaves[] = {
1476 &omap2430_l4_core__mcspi1,
1479 static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = {
1480 .num_chipselect = 4,
1483 static struct omap_hwmod omap2430_mcspi1_hwmod = {
1484 .name = "mcspi1_hwmod",
1485 .mpu_irqs = omap2_mcspi1_mpu_irqs,
1486 .sdma_reqs = omap2_mcspi1_sdma_reqs,
1487 .main_clk = "mcspi1_fck",
1490 .module_offs = CORE_MOD,
1492 .module_bit = OMAP24XX_EN_MCSPI1_SHIFT,
1494 .idlest_idle_bit = OMAP24XX_ST_MCSPI1_SHIFT,
1497 .slaves = omap2430_mcspi1_slaves,
1498 .slaves_cnt = ARRAY_SIZE(omap2430_mcspi1_slaves),
1499 .class = &omap2xxx_mcspi_class,
1500 .dev_attr = &omap_mcspi1_dev_attr,
1504 static struct omap_hwmod_ocp_if *omap2430_mcspi2_slaves[] = {
1505 &omap2430_l4_core__mcspi2,
1508 static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = {
1509 .num_chipselect = 2,
1512 static struct omap_hwmod omap2430_mcspi2_hwmod = {
1513 .name = "mcspi2_hwmod",
1514 .mpu_irqs = omap2_mcspi2_mpu_irqs,
1515 .sdma_reqs = omap2_mcspi2_sdma_reqs,
1516 .main_clk = "mcspi2_fck",
1519 .module_offs = CORE_MOD,
1521 .module_bit = OMAP24XX_EN_MCSPI2_SHIFT,
1523 .idlest_idle_bit = OMAP24XX_ST_MCSPI2_SHIFT,
1526 .slaves = omap2430_mcspi2_slaves,
1527 .slaves_cnt = ARRAY_SIZE(omap2430_mcspi2_slaves),
1528 .class = &omap2xxx_mcspi_class,
1529 .dev_attr = &omap_mcspi2_dev_attr,
1533 static struct omap_hwmod_irq_info omap2430_mcspi3_mpu_irqs[] = {
1538 static struct omap_hwmod_dma_info omap2430_mcspi3_sdma_reqs[] = {
1539 { .name = "tx0", .dma_req = 15 }, /* DMA_SPI3_TX0 */
1540 { .name = "rx0", .dma_req = 16 }, /* DMA_SPI3_RX0 */
1541 { .name = "tx1", .dma_req = 23 }, /* DMA_SPI3_TX1 */
1542 { .name = "rx1", .dma_req = 24 }, /* DMA_SPI3_RX1 */
1546 static struct omap_hwmod_ocp_if *omap2430_mcspi3_slaves[] = {
1547 &omap2430_l4_core__mcspi3,
1550 static struct omap2_mcspi_dev_attr omap_mcspi3_dev_attr = {
1551 .num_chipselect = 2,
1554 static struct omap_hwmod omap2430_mcspi3_hwmod = {
1555 .name = "mcspi3_hwmod",
1556 .mpu_irqs = omap2430_mcspi3_mpu_irqs,
1557 .sdma_reqs = omap2430_mcspi3_sdma_reqs,
1558 .main_clk = "mcspi3_fck",
1561 .module_offs = CORE_MOD,
1563 .module_bit = OMAP2430_EN_MCSPI3_SHIFT,
1565 .idlest_idle_bit = OMAP2430_ST_MCSPI3_SHIFT,
1568 .slaves = omap2430_mcspi3_slaves,
1569 .slaves_cnt = ARRAY_SIZE(omap2430_mcspi3_slaves),
1570 .class = &omap2xxx_mcspi_class,
1571 .dev_attr = &omap_mcspi3_dev_attr,
1577 static struct omap_hwmod_class_sysconfig omap2430_usbhsotg_sysc = {
1579 .sysc_offs = 0x0404,
1580 .syss_offs = 0x0408,
1581 .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE|
1582 SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
1584 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
1585 MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
1586 .sysc_fields = &omap_hwmod_sysc_type1,
1589 static struct omap_hwmod_class usbotg_class = {
1591 .sysc = &omap2430_usbhsotg_sysc,
1595 static struct omap_hwmod_irq_info omap2430_usbhsotg_mpu_irqs[] = {
1597 { .name = "mc", .irq = 92 },
1598 { .name = "dma", .irq = 93 },
1602 static struct omap_hwmod omap2430_usbhsotg_hwmod = {
1603 .name = "usb_otg_hs",
1604 .mpu_irqs = omap2430_usbhsotg_mpu_irqs,
1605 .main_clk = "usbhs_ick",
1609 .module_bit = OMAP2430_EN_USBHS_MASK,
1610 .module_offs = CORE_MOD,
1612 .idlest_idle_bit = OMAP2430_ST_USBHS_SHIFT,
1615 .masters = omap2430_usbhsotg_masters,
1616 .masters_cnt = ARRAY_SIZE(omap2430_usbhsotg_masters),
1617 .slaves = omap2430_usbhsotg_slaves,
1618 .slaves_cnt = ARRAY_SIZE(omap2430_usbhsotg_slaves),
1619 .class = &usbotg_class,
1621 * Erratum ID: i479 idle_req / idle_ack mechanism potentially
1622 * broken when autoidle is enabled
1623 * workaround is to disable the autoidle bit at module level.
1625 .flags = HWMOD_NO_OCP_AUTOIDLE | HWMOD_SWSUP_SIDLE
1626 | HWMOD_SWSUP_MSTANDBY,
1631 * multi channel buffered serial port controller
1634 static struct omap_hwmod_class_sysconfig omap2430_mcbsp_sysc = {
1636 .sysc_offs = 0x008C,
1637 .sysc_flags = (SYSC_HAS_SOFTRESET),
1638 .sysc_fields = &omap_hwmod_sysc_type1,
1641 static struct omap_hwmod_class omap2430_mcbsp_hwmod_class = {
1643 .sysc = &omap2430_mcbsp_sysc,
1644 .rev = MCBSP_CONFIG_TYPE2,
1648 static struct omap_hwmod_irq_info omap2430_mcbsp1_irqs[] = {
1649 { .name = "tx", .irq = 59 },
1650 { .name = "rx", .irq = 60 },
1651 { .name = "ovr", .irq = 61 },
1652 { .name = "common", .irq = 64 },
1656 /* l4_core -> mcbsp1 */
1657 static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp1 = {
1658 .master = &omap2430_l4_core_hwmod,
1659 .slave = &omap2430_mcbsp1_hwmod,
1660 .clk = "mcbsp1_ick",
1661 .addr = omap2_mcbsp1_addrs,
1662 .user = OCP_USER_MPU | OCP_USER_SDMA,
1665 /* mcbsp1 slave ports */
1666 static struct omap_hwmod_ocp_if *omap2430_mcbsp1_slaves[] = {
1667 &omap2430_l4_core__mcbsp1,
1670 static struct omap_hwmod omap2430_mcbsp1_hwmod = {
1672 .class = &omap2430_mcbsp_hwmod_class,
1673 .mpu_irqs = omap2430_mcbsp1_irqs,
1674 .sdma_reqs = omap2_mcbsp1_sdma_reqs,
1675 .main_clk = "mcbsp1_fck",
1679 .module_bit = OMAP24XX_EN_MCBSP1_SHIFT,
1680 .module_offs = CORE_MOD,
1682 .idlest_idle_bit = OMAP24XX_ST_MCBSP1_SHIFT,
1685 .slaves = omap2430_mcbsp1_slaves,
1686 .slaves_cnt = ARRAY_SIZE(omap2430_mcbsp1_slaves),
1690 static struct omap_hwmod_irq_info omap2430_mcbsp2_irqs[] = {
1691 { .name = "tx", .irq = 62 },
1692 { .name = "rx", .irq = 63 },
1693 { .name = "common", .irq = 16 },
1697 /* l4_core -> mcbsp2 */
1698 static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp2 = {
1699 .master = &omap2430_l4_core_hwmod,
1700 .slave = &omap2430_mcbsp2_hwmod,
1701 .clk = "mcbsp2_ick",
1702 .addr = omap2xxx_mcbsp2_addrs,
1703 .user = OCP_USER_MPU | OCP_USER_SDMA,
1706 /* mcbsp2 slave ports */
1707 static struct omap_hwmod_ocp_if *omap2430_mcbsp2_slaves[] = {
1708 &omap2430_l4_core__mcbsp2,
1711 static struct omap_hwmod omap2430_mcbsp2_hwmod = {
1713 .class = &omap2430_mcbsp_hwmod_class,
1714 .mpu_irqs = omap2430_mcbsp2_irqs,
1715 .sdma_reqs = omap2_mcbsp2_sdma_reqs,
1716 .main_clk = "mcbsp2_fck",
1720 .module_bit = OMAP24XX_EN_MCBSP2_SHIFT,
1721 .module_offs = CORE_MOD,
1723 .idlest_idle_bit = OMAP24XX_ST_MCBSP2_SHIFT,
1726 .slaves = omap2430_mcbsp2_slaves,
1727 .slaves_cnt = ARRAY_SIZE(omap2430_mcbsp2_slaves),
1731 static struct omap_hwmod_irq_info omap2430_mcbsp3_irqs[] = {
1732 { .name = "tx", .irq = 89 },
1733 { .name = "rx", .irq = 90 },
1734 { .name = "common", .irq = 17 },
1738 static struct omap_hwmod_addr_space omap2430_mcbsp3_addrs[] = {
1741 .pa_start = 0x4808C000,
1742 .pa_end = 0x4808C0ff,
1743 .flags = ADDR_TYPE_RT
1748 /* l4_core -> mcbsp3 */
1749 static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp3 = {
1750 .master = &omap2430_l4_core_hwmod,
1751 .slave = &omap2430_mcbsp3_hwmod,
1752 .clk = "mcbsp3_ick",
1753 .addr = omap2430_mcbsp3_addrs,
1754 .user = OCP_USER_MPU | OCP_USER_SDMA,
1757 /* mcbsp3 slave ports */
1758 static struct omap_hwmod_ocp_if *omap2430_mcbsp3_slaves[] = {
1759 &omap2430_l4_core__mcbsp3,
1762 static struct omap_hwmod omap2430_mcbsp3_hwmod = {
1764 .class = &omap2430_mcbsp_hwmod_class,
1765 .mpu_irqs = omap2430_mcbsp3_irqs,
1766 .sdma_reqs = omap2_mcbsp3_sdma_reqs,
1767 .main_clk = "mcbsp3_fck",
1771 .module_bit = OMAP2430_EN_MCBSP3_SHIFT,
1772 .module_offs = CORE_MOD,
1774 .idlest_idle_bit = OMAP2430_ST_MCBSP3_SHIFT,
1777 .slaves = omap2430_mcbsp3_slaves,
1778 .slaves_cnt = ARRAY_SIZE(omap2430_mcbsp3_slaves),
1782 static struct omap_hwmod_irq_info omap2430_mcbsp4_irqs[] = {
1783 { .name = "tx", .irq = 54 },
1784 { .name = "rx", .irq = 55 },
1785 { .name = "common", .irq = 18 },
1789 static struct omap_hwmod_dma_info omap2430_mcbsp4_sdma_chs[] = {
1790 { .name = "rx", .dma_req = 20 },
1791 { .name = "tx", .dma_req = 19 },
1795 static struct omap_hwmod_addr_space omap2430_mcbsp4_addrs[] = {
1798 .pa_start = 0x4808E000,
1799 .pa_end = 0x4808E0ff,
1800 .flags = ADDR_TYPE_RT
1805 /* l4_core -> mcbsp4 */
1806 static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp4 = {
1807 .master = &omap2430_l4_core_hwmod,
1808 .slave = &omap2430_mcbsp4_hwmod,
1809 .clk = "mcbsp4_ick",
1810 .addr = omap2430_mcbsp4_addrs,
1811 .user = OCP_USER_MPU | OCP_USER_SDMA,
1814 /* mcbsp4 slave ports */
1815 static struct omap_hwmod_ocp_if *omap2430_mcbsp4_slaves[] = {
1816 &omap2430_l4_core__mcbsp4,
1819 static struct omap_hwmod omap2430_mcbsp4_hwmod = {
1821 .class = &omap2430_mcbsp_hwmod_class,
1822 .mpu_irqs = omap2430_mcbsp4_irqs,
1823 .sdma_reqs = omap2430_mcbsp4_sdma_chs,
1824 .main_clk = "mcbsp4_fck",
1828 .module_bit = OMAP2430_EN_MCBSP4_SHIFT,
1829 .module_offs = CORE_MOD,
1831 .idlest_idle_bit = OMAP2430_ST_MCBSP4_SHIFT,
1834 .slaves = omap2430_mcbsp4_slaves,
1835 .slaves_cnt = ARRAY_SIZE(omap2430_mcbsp4_slaves),
1839 static struct omap_hwmod_irq_info omap2430_mcbsp5_irqs[] = {
1840 { .name = "tx", .irq = 81 },
1841 { .name = "rx", .irq = 82 },
1842 { .name = "common", .irq = 19 },
1846 static struct omap_hwmod_dma_info omap2430_mcbsp5_sdma_chs[] = {
1847 { .name = "rx", .dma_req = 22 },
1848 { .name = "tx", .dma_req = 21 },
1852 static struct omap_hwmod_addr_space omap2430_mcbsp5_addrs[] = {
1855 .pa_start = 0x48096000,
1856 .pa_end = 0x480960ff,
1857 .flags = ADDR_TYPE_RT
1862 /* l4_core -> mcbsp5 */
1863 static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp5 = {
1864 .master = &omap2430_l4_core_hwmod,
1865 .slave = &omap2430_mcbsp5_hwmod,
1866 .clk = "mcbsp5_ick",
1867 .addr = omap2430_mcbsp5_addrs,
1868 .user = OCP_USER_MPU | OCP_USER_SDMA,
1871 /* mcbsp5 slave ports */
1872 static struct omap_hwmod_ocp_if *omap2430_mcbsp5_slaves[] = {
1873 &omap2430_l4_core__mcbsp5,
1876 static struct omap_hwmod omap2430_mcbsp5_hwmod = {
1878 .class = &omap2430_mcbsp_hwmod_class,
1879 .mpu_irqs = omap2430_mcbsp5_irqs,
1880 .sdma_reqs = omap2430_mcbsp5_sdma_chs,
1881 .main_clk = "mcbsp5_fck",
1885 .module_bit = OMAP2430_EN_MCBSP5_SHIFT,
1886 .module_offs = CORE_MOD,
1888 .idlest_idle_bit = OMAP2430_ST_MCBSP5_SHIFT,
1891 .slaves = omap2430_mcbsp5_slaves,
1892 .slaves_cnt = ARRAY_SIZE(omap2430_mcbsp5_slaves),
1895 /* MMC/SD/SDIO common */
1897 static struct omap_hwmod_class_sysconfig omap2430_mmc_sysc = {
1901 .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE |
1902 SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
1903 SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS),
1904 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
1905 .sysc_fields = &omap_hwmod_sysc_type1,
1908 static struct omap_hwmod_class omap2430_mmc_class = {
1910 .sysc = &omap2430_mmc_sysc,
1915 static struct omap_hwmod_irq_info omap2430_mmc1_mpu_irqs[] = {
1920 static struct omap_hwmod_dma_info omap2430_mmc1_sdma_reqs[] = {
1921 { .name = "tx", .dma_req = 61 }, /* DMA_MMC1_TX */
1922 { .name = "rx", .dma_req = 62 }, /* DMA_MMC1_RX */
1926 static struct omap_hwmod_opt_clk omap2430_mmc1_opt_clks[] = {
1927 { .role = "dbck", .clk = "mmchsdb1_fck" },
1930 static struct omap_hwmod_ocp_if *omap2430_mmc1_slaves[] = {
1931 &omap2430_l4_core__mmc1,
1934 static struct omap_mmc_dev_attr mmc1_dev_attr = {
1935 .flags = OMAP_HSMMC_SUPPORTS_DUAL_VOLT,
1938 static struct omap_hwmod omap2430_mmc1_hwmod = {
1940 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
1941 .mpu_irqs = omap2430_mmc1_mpu_irqs,
1942 .sdma_reqs = omap2430_mmc1_sdma_reqs,
1943 .opt_clks = omap2430_mmc1_opt_clks,
1944 .opt_clks_cnt = ARRAY_SIZE(omap2430_mmc1_opt_clks),
1945 .main_clk = "mmchs1_fck",
1948 .module_offs = CORE_MOD,
1950 .module_bit = OMAP2430_EN_MMCHS1_SHIFT,
1952 .idlest_idle_bit = OMAP2430_ST_MMCHS1_SHIFT,
1955 .dev_attr = &mmc1_dev_attr,
1956 .slaves = omap2430_mmc1_slaves,
1957 .slaves_cnt = ARRAY_SIZE(omap2430_mmc1_slaves),
1958 .class = &omap2430_mmc_class,
1963 static struct omap_hwmod_irq_info omap2430_mmc2_mpu_irqs[] = {
1968 static struct omap_hwmod_dma_info omap2430_mmc2_sdma_reqs[] = {
1969 { .name = "tx", .dma_req = 47 }, /* DMA_MMC2_TX */
1970 { .name = "rx", .dma_req = 48 }, /* DMA_MMC2_RX */
1974 static struct omap_hwmod_opt_clk omap2430_mmc2_opt_clks[] = {
1975 { .role = "dbck", .clk = "mmchsdb2_fck" },
1978 static struct omap_hwmod_ocp_if *omap2430_mmc2_slaves[] = {
1979 &omap2430_l4_core__mmc2,
1982 static struct omap_hwmod omap2430_mmc2_hwmod = {
1984 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
1985 .mpu_irqs = omap2430_mmc2_mpu_irqs,
1986 .sdma_reqs = omap2430_mmc2_sdma_reqs,
1987 .opt_clks = omap2430_mmc2_opt_clks,
1988 .opt_clks_cnt = ARRAY_SIZE(omap2430_mmc2_opt_clks),
1989 .main_clk = "mmchs2_fck",
1992 .module_offs = CORE_MOD,
1994 .module_bit = OMAP2430_EN_MMCHS2_SHIFT,
1996 .idlest_idle_bit = OMAP2430_ST_MMCHS2_SHIFT,
1999 .slaves = omap2430_mmc2_slaves,
2000 .slaves_cnt = ARRAY_SIZE(omap2430_mmc2_slaves),
2001 .class = &omap2430_mmc_class,
2004 static __initdata struct omap_hwmod *omap2430_hwmods[] = {
2005 &omap2430_l3_main_hwmod,
2006 &omap2430_l4_core_hwmod,
2007 &omap2430_l4_wkup_hwmod,
2008 &omap2430_mpu_hwmod,
2009 &omap2430_iva_hwmod,
2011 &omap2430_timer1_hwmod,
2012 &omap2430_timer2_hwmod,
2013 &omap2430_timer3_hwmod,
2014 &omap2430_timer4_hwmod,
2015 &omap2430_timer5_hwmod,
2016 &omap2430_timer6_hwmod,
2017 &omap2430_timer7_hwmod,
2018 &omap2430_timer8_hwmod,
2019 &omap2430_timer9_hwmod,
2020 &omap2430_timer10_hwmod,
2021 &omap2430_timer11_hwmod,
2022 &omap2430_timer12_hwmod,
2024 &omap2430_wd_timer2_hwmod,
2025 &omap2430_uart1_hwmod,
2026 &omap2430_uart2_hwmod,
2027 &omap2430_uart3_hwmod,
2029 &omap2430_dss_core_hwmod,
2030 &omap2430_dss_dispc_hwmod,
2031 &omap2430_dss_rfbi_hwmod,
2032 &omap2430_dss_venc_hwmod,
2034 &omap2430_i2c1_hwmod,
2035 &omap2430_i2c2_hwmod,
2036 &omap2430_mmc1_hwmod,
2037 &omap2430_mmc2_hwmod,
2040 &omap2430_gpio1_hwmod,
2041 &omap2430_gpio2_hwmod,
2042 &omap2430_gpio3_hwmod,
2043 &omap2430_gpio4_hwmod,
2044 &omap2430_gpio5_hwmod,
2046 /* dma_system class*/
2047 &omap2430_dma_system_hwmod,
2050 &omap2430_mcbsp1_hwmod,
2051 &omap2430_mcbsp2_hwmod,
2052 &omap2430_mcbsp3_hwmod,
2053 &omap2430_mcbsp4_hwmod,
2054 &omap2430_mcbsp5_hwmod,
2057 &omap2430_mailbox_hwmod,
2060 &omap2430_mcspi1_hwmod,
2061 &omap2430_mcspi2_hwmod,
2062 &omap2430_mcspi3_hwmod,
2065 &omap2430_usbhsotg_hwmod,
2070 int __init omap2430_hwmod_init(void)
2072 return omap_hwmod_register(omap2430_hwmods);