arch/arm/mach-omap2/io.c

   1 /*
   2  * linux/arch/arm/mach-omap2/io.c
   3  *
   4  * OMAP2 I/O mapping code
   5  *
   6  * Copyright (C) 2005 Nokia Corporation
   7  * Copyright (C) 2007-2009 Texas Instruments
   8  *
   9  * Author:
  10  *      Juha Yrjola <juha.yrjola@nokia.com>
  11  *      Syed Khasim <x0khasim@ti.com>
  12  *
  13  * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
  14  *
  15  * This program is free software; you can redistribute it and/or modify
  16  * it under the terms of the GNU General Public License version 2 as
  17  * published by the Free Software Foundation.
  18  */
  19 #include <linux/module.h>
  20 #include <linux/kernel.h>
  21 #include <linux/init.h>
  22 #include <linux/io.h>
  23 #include <linux/clk.h>
  24
  25 #include <asm/tlb.h>
  26 #include <asm/mach/map.h>
  27
  28 #include <plat-omap/dma-omap.h>
  29
  30 #include "omap_hwmod.h"
  31 #include "soc.h"
  32 #include "iomap.h"
  33 #include "voltage.h"
  34 #include "powerdomain.h"
  35 #include "clockdomain.h"
  36 #include "common.h"
  37 #include "clock.h"
  38 #include "clock2xxx.h"
  39 #include "clock3xxx.h"
  40 #include "clock44xx.h"
  41 #include "omap-pm.h"
  42 #include "sdrc.h"
  43 #include "control.h"
  44 #include "serial.h"
  45 #include "sram.h"
  46 #include "cm2xxx.h"
  47 #include "cm3xxx.h"
  48 #include "prm.h"
  49 #include "cm.h"
  50 #include "prcm_mpu44xx.h"
  51 #include "prminst44xx.h"
  52 #include "cminst44xx.h"
  53
  54 /*
  55  * The machine specific code may provide the extra mapping besides the
  56  * default mapping provided here.
  57  */
  58
  59 #if defined(CONFIG_SOC_OMAP2420) || defined(CONFIG_SOC_OMAP2430)
  60 static struct map_desc omap24xx_io_desc[] __initdata = {
  61         {
  62                 .virtual        = L3_24XX_VIRT,
  63                 .pfn            = __phys_to_pfn(L3_24XX_PHYS),
  64                 .length         = L3_24XX_SIZE,
  65                 .type           = MT_DEVICE
  66         },
  67         {
  68                 .virtual        = L4_24XX_VIRT,
  69                 .pfn            = __phys_to_pfn(L4_24XX_PHYS),
  70                 .length         = L4_24XX_SIZE,
  71                 .type           = MT_DEVICE
  72         },
  73 };
  74
  75 #ifdef CONFIG_SOC_OMAP2420
  76 static struct map_desc omap242x_io_desc[] __initdata = {
  77         {
  78                 .virtual        = DSP_MEM_2420_VIRT,
  79                 .pfn            = __phys_to_pfn(DSP_MEM_2420_PHYS),
  80                 .length         = DSP_MEM_2420_SIZE,
  81                 .type           = MT_DEVICE
  82         },
  83         {
  84                 .virtual        = DSP_IPI_2420_VIRT,
  85                 .pfn            = __phys_to_pfn(DSP_IPI_2420_PHYS),
  86                 .length         = DSP_IPI_2420_SIZE,
  87                 .type           = MT_DEVICE
  88         },
  89         {
  90                 .virtual        = DSP_MMU_2420_VIRT,
  91                 .pfn            = __phys_to_pfn(DSP_MMU_2420_PHYS),
  92                 .length         = DSP_MMU_2420_SIZE,
  93                 .type           = MT_DEVICE
  94         },
  95 };
  96
  97 #endif
  98
  99 #ifdef CONFIG_SOC_OMAP2430
 100 static struct map_desc omap243x_io_desc[] __initdata = {
 101         {
 102                 .virtual        = L4_WK_243X_VIRT,
 103                 .pfn            = __phys_to_pfn(L4_WK_243X_PHYS),
 104                 .length         = L4_WK_243X_SIZE,
 105                 .type           = MT_DEVICE
 106         },
 107         {
 108                 .virtual        = OMAP243X_GPMC_VIRT,
 109                 .pfn            = __phys_to_pfn(OMAP243X_GPMC_PHYS),
 110                 .length         = OMAP243X_GPMC_SIZE,
 111                 .type           = MT_DEVICE
 112         },
 113         {
 114                 .virtual        = OMAP243X_SDRC_VIRT,
 115                 .pfn            = __phys_to_pfn(OMAP243X_SDRC_PHYS),
 116                 .length         = OMAP243X_SDRC_SIZE,
 117                 .type           = MT_DEVICE
 118         },
 119         {
 120                 .virtual        = OMAP243X_SMS_VIRT,
 121                 .pfn            = __phys_to_pfn(OMAP243X_SMS_PHYS),
 122                 .length         = OMAP243X_SMS_SIZE,
 123                 .type           = MT_DEVICE
 124         },
 125 };
 126 #endif
 127 #endif
 128
 129 #ifdef  CONFIG_ARCH_OMAP3
 130 static struct map_desc omap34xx_io_desc[] __initdata = {
 131         {
 132                 .virtual        = L3_34XX_VIRT,
 133                 .pfn            = __phys_to_pfn(L3_34XX_PHYS),
 134                 .length         = L3_34XX_SIZE,
 135                 .type           = MT_DEVICE
 136         },
 137         {
 138                 .virtual        = L4_34XX_VIRT,
 139                 .pfn            = __phys_to_pfn(L4_34XX_PHYS),
 140                 .length         = L4_34XX_SIZE,
 141                 .type           = MT_DEVICE
 142         },
 143         {
 144                 .virtual        = OMAP34XX_GPMC_VIRT,
 145                 .pfn            = __phys_to_pfn(OMAP34XX_GPMC_PHYS),
 146                 .length         = OMAP34XX_GPMC_SIZE,
 147                 .type           = MT_DEVICE
 148         },
 149         {
 150                 .virtual        = OMAP343X_SMS_VIRT,
 151                 .pfn            = __phys_to_pfn(OMAP343X_SMS_PHYS),
 152                 .length         = OMAP343X_SMS_SIZE,
 153                 .type           = MT_DEVICE
 154         },
 155         {
 156                 .virtual        = OMAP343X_SDRC_VIRT,
 157                 .pfn            = __phys_to_pfn(OMAP343X_SDRC_PHYS),
 158                 .length         = OMAP343X_SDRC_SIZE,
 159                 .type           = MT_DEVICE
 160         },
 161         {
 162                 .virtual        = L4_PER_34XX_VIRT,
 163                 .pfn            = __phys_to_pfn(L4_PER_34XX_PHYS),
 164                 .length         = L4_PER_34XX_SIZE,
 165                 .type           = MT_DEVICE
 166         },
 167         {
 168                 .virtual        = L4_EMU_34XX_VIRT,
 169                 .pfn            = __phys_to_pfn(L4_EMU_34XX_PHYS),
 170                 .length         = L4_EMU_34XX_SIZE,
 171                 .type           = MT_DEVICE
 172         },
 173 #if defined(CONFIG_DEBUG_LL) &&                                                 \
 174         (defined(CONFIG_MACH_OMAP_ZOOM2) || defined(CONFIG_MACH_OMAP_ZOOM3))
 175         {
 176                 .virtual        = ZOOM_UART_VIRT,
 177                 .pfn            = __phys_to_pfn(ZOOM_UART_BASE),
 178                 .length         = SZ_1M,
 179                 .type           = MT_DEVICE
 180         },
 181 #endif
 182 };
 183 #endif
 184
 185 #ifdef CONFIG_SOC_TI81XX
 186 static struct map_desc omapti81xx_io_desc[] __initdata = {
 187         {
 188                 .virtual        = L4_34XX_VIRT,
 189                 .pfn            = __phys_to_pfn(L4_34XX_PHYS),
 190                 .length         = L4_34XX_SIZE,
 191                 .type           = MT_DEVICE
 192         }
 193 };
 194 #endif
 195
 196 #ifdef CONFIG_SOC_AM33XX
 197 static struct map_desc omapam33xx_io_desc[] __initdata = {
 198         {
 199                 .virtual        = L4_34XX_VIRT,
 200                 .pfn            = __phys_to_pfn(L4_34XX_PHYS),
 201                 .length         = L4_34XX_SIZE,
 202                 .type           = MT_DEVICE
 203         },
 204         {
 205                 .virtual        = L4_WK_AM33XX_VIRT,
 206                 .pfn            = __phys_to_pfn(L4_WK_AM33XX_PHYS),
 207                 .length         = L4_WK_AM33XX_SIZE,
 208                 .type           = MT_DEVICE
 209         }
 210 };
 211 #endif
 212
 213 #ifdef  CONFIG_ARCH_OMAP4
 214 static struct map_desc omap44xx_io_desc[] __initdata = {
 215         {
 216                 .virtual        = L3_44XX_VIRT,
 217                 .pfn            = __phys_to_pfn(L3_44XX_PHYS),
 218                 .length         = L3_44XX_SIZE,
 219                 .type           = MT_DEVICE,
 220         },
 221         {
 222                 .virtual        = L4_44XX_VIRT,
 223                 .pfn            = __phys_to_pfn(L4_44XX_PHYS),
 224                 .length         = L4_44XX_SIZE,
 225                 .type           = MT_DEVICE,
 226         },
 227         {
 228                 .virtual        = L4_PER_44XX_VIRT,
 229                 .pfn            = __phys_to_pfn(L4_PER_44XX_PHYS),
 230                 .length         = L4_PER_44XX_SIZE,
 231                 .type           = MT_DEVICE,
 232         },
 233 #ifdef CONFIG_OMAP4_ERRATA_I688
 234         {
 235                 .virtual        = OMAP4_SRAM_VA,
 236                 .pfn            = __phys_to_pfn(OMAP4_SRAM_PA),
 237                 .length         = PAGE_SIZE,
 238                 .type           = MT_MEMORY_SO,
 239         },
 240 #endif
 241
 242 };
 243 #endif
 244
 245 #ifdef  CONFIG_SOC_OMAP5
 246 static struct map_desc omap54xx_io_desc[] __initdata = {
 247         {
 248                 .virtual        = L3_54XX_VIRT,
 249                 .pfn            = __phys_to_pfn(L3_54XX_PHYS),
 250                 .length         = L3_54XX_SIZE,
 251                 .type           = MT_DEVICE,
 252         },
 253         {
 254                 .virtual        = L4_54XX_VIRT,
 255                 .pfn            = __phys_to_pfn(L4_54XX_PHYS),
 256                 .length         = L4_54XX_SIZE,
 257                 .type           = MT_DEVICE,
 258         },
 259         {
 260                 .virtual        = L4_WK_54XX_VIRT,
 261                 .pfn            = __phys_to_pfn(L4_WK_54XX_PHYS),
 262                 .length         = L4_WK_54XX_SIZE,
 263                 .type           = MT_DEVICE,
 264         },
 265         {
 266                 .virtual        = L4_PER_54XX_VIRT,
 267                 .pfn            = __phys_to_pfn(L4_PER_54XX_PHYS),
 268                 .length         = L4_PER_54XX_SIZE,
 269                 .type           = MT_DEVICE,
 270         },
 271 };
 272 #endif
 273
 274 #ifdef CONFIG_SOC_OMAP2420
 275 void __init omap242x_map_io(void)
 276 {
 277         iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc));
 278         iotable_init(omap242x_io_desc, ARRAY_SIZE(omap242x_io_desc));
 279 }
 280 #endif
 281
 282 #ifdef CONFIG_SOC_OMAP2430
 283 void __init omap243x_map_io(void)
 284 {
 285         iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc));
 286         iotable_init(omap243x_io_desc, ARRAY_SIZE(omap243x_io_desc));
 287 }
 288 #endif
 289
 290 #ifdef CONFIG_ARCH_OMAP3
 291 void __init omap3_map_io(void)
 292 {
 293         iotable_init(omap34xx_io_desc, ARRAY_SIZE(omap34xx_io_desc));
 294 }
 295 #endif
 296
 297 #ifdef CONFIG_SOC_TI81XX
 298 void __init ti81xx_map_io(void)
 299 {
 300         iotable_init(omapti81xx_io_desc, ARRAY_SIZE(omapti81xx_io_desc));
 301 }
 302 #endif
 303
 304 #ifdef CONFIG_SOC_AM33XX
 305 void __init am33xx_map_io(void)
 306 {
 307         iotable_init(omapam33xx_io_desc, ARRAY_SIZE(omapam33xx_io_desc));
 308 }
 309 #endif
 310
 311 #ifdef CONFIG_ARCH_OMAP4
 312 void __init omap4_map_io(void)
 313 {
 314         iotable_init(omap44xx_io_desc, ARRAY_SIZE(omap44xx_io_desc));
 315         omap_barriers_init();
 316 }
 317 #endif
 318
 319 #ifdef CONFIG_SOC_OMAP5
 320 void __init omap5_map_io(void)
 321 {
 322         iotable_init(omap54xx_io_desc, ARRAY_SIZE(omap54xx_io_desc));
 323 }
 324 #endif
 325 /*
 326  * omap2_init_reprogram_sdrc - reprogram SDRC timing parameters
 327  *
 328  * Sets the CORE DPLL3 M2 divider to the same value that it's at
 329  * currently.  This has the effect of setting the SDRC SDRAM AC timing
 330  * registers to the values currently defined by the kernel.  Currently
 331  * only defined for OMAP3; will return 0 if called on OMAP2.  Returns
 332  * -EINVAL if the dpll3_m2_ck cannot be found, 0 if called on OMAP2,
 333  * or passes along the return value of clk_set_rate().
 334  */
 335 static int __init _omap2_init_reprogram_sdrc(void)
 336 {
 337         struct clk *dpll3_m2_ck;
 338         int v = -EINVAL;
 339         long rate;
 340
 341         if (!cpu_is_omap34xx())
 342                 return 0;
 343
 344         dpll3_m2_ck = clk_get(NULL, "dpll3_m2_ck");
 345         if (IS_ERR(dpll3_m2_ck))
 346                 return -EINVAL;
 347
 348         rate = clk_get_rate(dpll3_m2_ck);
 349         pr_info("Reprogramming SDRC clock to %ld Hz\n", rate);
 350         v = clk_set_rate(dpll3_m2_ck, rate);
 351         if (v)
 352                 pr_err("dpll3_m2_clk rate change failed: %d\n", v);
 353
 354         clk_put(dpll3_m2_ck);
 355
 356         return v;
 357 }
 358
 359 static int _set_hwmod_postsetup_state(struct omap_hwmod *oh, void *data)
 360 {
 361         return omap_hwmod_set_postsetup_state(oh, *(u8 *)data);
 362 }
 363
 364 static void __init omap_hwmod_init_postsetup(void)
 365 {
 366         u8 postsetup_state;
 367
 368         /* Set the default postsetup state for all hwmods */
 369 #ifdef CONFIG_PM_RUNTIME
 370         postsetup_state = _HWMOD_STATE_IDLE;
 371 #else
 372         postsetup_state = _HWMOD_STATE_ENABLED;
 373 #endif
 374         omap_hwmod_for_each(_set_hwmod_postsetup_state, &postsetup_state);
 375
 376         omap_pm_if_early_init();
 377 }
 378
 379 #ifdef CONFIG_SOC_OMAP2420
 380 void __init omap2420_init_early(void)
 381 {
 382         omap2_set_globals_tap(OMAP242X_CLASS, OMAP2_L4_IO_ADDRESS(0x48014000));
 383         omap2_set_globals_sdrc(OMAP2_L3_IO_ADDRESS(OMAP2420_SDRC_BASE),
 384                                OMAP2_L3_IO_ADDRESS(OMAP2420_SMS_BASE));
 385         omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP242X_CTRL_BASE),
 386                                   NULL);
 387         omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP2420_PRM_BASE));
 388         omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP2420_CM_BASE), NULL);
 389         omap2xxx_check_revision();
 390         omap2xxx_cm_init();
 391         omap2xxx_voltagedomains_init();
 392         omap242x_powerdomains_init();
 393         omap242x_clockdomains_init();
 394         omap2420_hwmod_init();
 395         omap_hwmod_init_postsetup();
 396         omap2420_clk_init();
 397 }
 398
 399 void __init omap2420_init_late(void)
 400 {
 401         omap_mux_late_init();
 402         omap2_common_pm_late_init();
 403         omap2_pm_init();
 404 }
 405 #endif
 406
 407 #ifdef CONFIG_SOC_OMAP2430
 408 void __init omap2430_init_early(void)
 409 {
 410         omap2_set_globals_tap(OMAP243X_CLASS, OMAP2_L4_IO_ADDRESS(0x4900a000));
 411         omap2_set_globals_sdrc(OMAP2_L3_IO_ADDRESS(OMAP243X_SDRC_BASE),
 412                                OMAP2_L3_IO_ADDRESS(OMAP243X_SMS_BASE));
 413         omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP243X_CTRL_BASE),
 414                                   NULL);
 415         omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP2430_PRM_BASE));
 416         omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP2430_CM_BASE), NULL);
 417         omap2xxx_check_revision();
 418         omap2xxx_cm_init();
 419         omap2xxx_voltagedomains_init();
 420         omap243x_powerdomains_init();
 421         omap243x_clockdomains_init();
 422         omap2430_hwmod_init();
 423         omap_hwmod_init_postsetup();
 424         omap2430_clk_init();
 425 }
 426
 427 void __init omap2430_init_late(void)
 428 {
 429         omap_mux_late_init();
 430         omap2_common_pm_late_init();
 431         omap2_pm_init();
 432 }
 433 #endif
 434
 435 /*
 436  * Currently only board-omap3beagle.c should call this because of the
 437  * same machine_id for 34xx and 36xx beagle.. Will get fixed with DT.
 438  */
 439 #ifdef CONFIG_ARCH_OMAP3
 440 void __init omap3_init_early(void)
 441 {
 442         omap2_set_globals_tap(OMAP343X_CLASS, OMAP2_L4_IO_ADDRESS(0x4830A000));
 443         omap2_set_globals_sdrc(OMAP2_L3_IO_ADDRESS(OMAP343X_SDRC_BASE),
 444                                OMAP2_L3_IO_ADDRESS(OMAP343X_SMS_BASE));
 445         omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE),
 446                                   NULL);
 447         omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE));
 448         omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE), NULL);
 449         omap3xxx_check_revision();
 450         omap3xxx_check_features();
 451         omap3xxx_cm_init();
 452         omap3xxx_voltagedomains_init();
 453         omap3xxx_powerdomains_init();
 454         omap3xxx_clockdomains_init();
 455         omap3xxx_hwmod_init();
 456         omap_hwmod_init_postsetup();
 457         omap3xxx_clk_init();
 458 }
 459
 460 void __init omap3430_init_early(void)
 461 {
 462         omap3_init_early();
 463 }
 464
 465 void __init omap35xx_init_early(void)
 466 {
 467         omap3_init_early();
 468 }
 469
 470 void __init omap3630_init_early(void)
 471 {
 472         omap3_init_early();
 473 }
 474
 475 void __init am35xx_init_early(void)
 476 {
 477         omap3_init_early();
 478 }
 479
 480 void __init ti81xx_init_early(void)
 481 {
 482         omap2_set_globals_tap(OMAP343X_CLASS,
 483                               OMAP2_L4_IO_ADDRESS(TI81XX_TAP_BASE));
 484         omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(TI81XX_CTRL_BASE),
 485                                   NULL);
 486         omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE));
 487         omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE), NULL);
 488         omap3xxx_check_revision();
 489         ti81xx_check_features();
 490         omap3xxx_voltagedomains_init();
 491         omap3xxx_powerdomains_init();
 492         omap3xxx_clockdomains_init();
 493         omap3xxx_hwmod_init();
 494         omap_hwmod_init_postsetup();
 495         omap3xxx_clk_init();
 496 }
 497
 498 void __init omap3_init_late(void)
 499 {
 500         omap_mux_late_init();
 501         omap2_common_pm_late_init();
 502         omap3_pm_init();
 503 }
 504
 505 void __init omap3430_init_late(void)
 506 {
 507         omap_mux_late_init();
 508         omap2_common_pm_late_init();
 509         omap3_pm_init();
 510 }
 511
 512 void __init omap35xx_init_late(void)
 513 {
 514         omap_mux_late_init();
 515         omap2_common_pm_late_init();
 516         omap3_pm_init();
 517 }
 518
 519 void __init omap3630_init_late(void)
 520 {
 521         omap_mux_late_init();
 522         omap2_common_pm_late_init();
 523         omap3_pm_init();
 524 }
 525
 526 void __init am35xx_init_late(void)
 527 {
 528         omap_mux_late_init();
 529         omap2_common_pm_late_init();
 530         omap3_pm_init();
 531 }
 532
 533 void __init ti81xx_init_late(void)
 534 {
 535         omap_mux_late_init();
 536         omap2_common_pm_late_init();
 537         omap3_pm_init();
 538 }
 539 #endif
 540
 541 #ifdef CONFIG_SOC_AM33XX
 542 void __init am33xx_init_early(void)
 543 {
 544         omap2_set_globals_tap(AM335X_CLASS,
 545                               AM33XX_L4_WK_IO_ADDRESS(AM33XX_TAP_BASE));
 546         omap2_set_globals_control(AM33XX_L4_WK_IO_ADDRESS(AM33XX_CTRL_BASE),
 547                                   NULL);
 548         omap2_set_globals_prm(AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE));
 549         omap2_set_globals_cm(AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE), NULL);
 550         omap3xxx_check_revision();
 551         ti81xx_check_features();
 552         am33xx_voltagedomains_init();
 553         am33xx_powerdomains_init();
 554         am33xx_clockdomains_init();
 555         am33xx_hwmod_init();
 556         omap_hwmod_init_postsetup();
 557         am33xx_clk_init();
 558 }
 559 #endif
 560
 561 #ifdef CONFIG_ARCH_OMAP4
 562 void __init omap4430_init_early(void)
 563 {
 564         omap2_set_globals_tap(OMAP443X_CLASS,
 565                               OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE));
 566         omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE),
 567                                   OMAP2_L4_IO_ADDRESS(OMAP443X_CTRL_BASE));
 568         omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE));
 569         omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP4430_CM_BASE),
 570                              OMAP2_L4_IO_ADDRESS(OMAP4430_CM2_BASE));
 571         omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP4430_PRCM_MPU_BASE));
 572         omap_prm_base_init();
 573         omap_cm_base_init();
 574         omap4xxx_check_revision();
 575         omap4xxx_check_features();
 576         omap44xx_voltagedomains_init();
 577         omap44xx_powerdomains_init();
 578         omap44xx_clockdomains_init();
 579         omap44xx_hwmod_init();
 580         omap_hwmod_init_postsetup();
 581         omap4xxx_clk_init();
 582 }
 583
 584 void __init omap4430_init_late(void)
 585 {
 586         omap_mux_late_init();
 587         omap2_common_pm_late_init();
 588         omap4_pm_init();
 589 }
 590 #endif
 591
 592 #ifdef CONFIG_SOC_OMAP5
 593 void __init omap5_init_early(void)
 594 {
 595         omap2_set_globals_tap(OMAP54XX_CLASS,
 596                               OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE));
 597         omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE),
 598                                   OMAP2_L4_IO_ADDRESS(OMAP54XX_CTRL_BASE));
 599         omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRM_BASE));
 600         omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_AON_BASE),
 601                              OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_BASE));
 602         omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE));
 603         omap_prm_base_init();
 604         omap_cm_base_init();
 605         omap5xxx_check_revision();
 606 }
 607 #endif
 608
 609 void __init omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
 610                                       struct omap_sdrc_params *sdrc_cs1)
 611 {
 612         omap_sram_init();
 613
 614         if (cpu_is_omap24xx() || omap3_has_sdrc()) {
 615                 omap2_sdrc_init(sdrc_cs0, sdrc_cs1);
 616                 _omap2_init_reprogram_sdrc();
 617         }
 618 }